Il est de tradition d'ajouter en début de manuscrit une page de remerciements afin d'offrir sa gratitude aux personnes ayant permis l'aboutissement du travail de thèse. En effet, ce travail n'est pas qu'une expérience personnelle ni scientifique c'est avant tout une aventure humaine. C'est d'ailleurs cette aventure humaine et la somme des contributions des personnes en faisant partie qui ont permis à cette thèse d'aboutir. Je tiens tout d'abord à te remercier Thierry pour ta très grande disponibilité tout au long de cette thèse, qui a permit au travail d'avancer surement beaucoup plus vite. Un grand merci à toi aussi Christophe pour tout le temps que tu as passé en salle à réaliser des dispositifs quand je n'avais pas le temps de les faire et à veiller au bon déroulement des opérations lorsque je touchais à la techno. Enfin, un grand merci à toi aussi Didier qui a toujours été la quand j'en avais besoin pour répondre à mes questionnements en y apportant ton expertise et à ce que je me pose encore plus de questions. Merci à vous trois pour tout ce que j'ai pu découvrir et apprendre à vos côtés. Je souhaiterais aussi remercier Frédéric Boeuf pour s'être toujours donné le temps de venir aux points de thèse et d'y avoir apporté sa contribution. Merci à Chantal Fontaine ainsi qu'à Jean Decobert d'avoir accepté d'être rapporteurs de cette thèse et d'avoir pris le temps de me faire vos retours avant ma soutenance. Chantal, je te remercie aussi de m'avoir fait un retour très détaillé grâce au manuscrit intégralement annoté que tu m'as laissé à la fin de la soutenance. Vos remarques et corrections pertinentes m'ont permit d'améliorer le manuscrit initial. Merci à Evelyne Gil qui a accepté de présider le jury de thèse ainsi qu'à Isabelle Berbezier et Eric Tournié d'avoir accepté de faire partie de ce jury. Vos remarques constructives ont été utilisées à bon escient. Enfin, un grand merci à tous les membres du jury d'avoir accepté de faire le déplacement à Grenoble des quatre coins de la France malgré des circonstances exceptionnelles. Je tiens aussi à remercier mes collègues et collaborateurs des différentes entités dans lesquelles j'ai pu effectuer ma thèse ainsi que mes amis et ma famille. Enfin, je tiens tout particulièrement à remercier une personne qui compte beaucoup pour moi et qui se reconnaitra pour son soutien infaillible tout au long de mes études et notamment lors de cette expérience. Merci à vous tous d'avoir contribué à la réussite de cette aventure finie dans des circonstances plus qu'inhabituelles.

Dark Brown: Si, Black: As and Grey: Ga. 1 and 2 indicate monatomic and diatomic steps. The picture does not portray lattice mismatch between the two. Reproduced from [START_REF] Lourdudoss | Heteroepitaxy and selective area heteroepitaxy for silicon photonics[END_REF]. (b) AFM image of a 400 nm thick GaAs layer grown on Si(001), exhibiting a high density of randomly oriented APBs. Reproduced from [START_REF] Alcotte | Epitaxial growth of antiphase boundary free GaAs layer on 300 mm Si(001) substrate by metalorganic chemical vapour deposition with high mobility[END_REF] 18 Mode [0,0] distribution inside full structure (a) in the case of a full sheet epitaxy and (b) for a selectively integrated structure for a ridge width of 300 nm. Only half of the structure is shown as it is symmetric along the axis X Direction = 0. .

2.19

Schematics of the Van der Pauw method for measuring the sheet resistance.

Reproduced from [START_REF] Liu | Opticallycontrolled digital electrodeposition of thin-film metals for fabrication of nano-devices[END_REF]

2.25

Homogeneity of Al incorporation across the diameter of 4" wafers with 300 nm deposited layers of Al x Ga 1-x As upon GaAs with x = {0.10, 0.30, 0.45}. . . . . . . .

2.26

Evolution of the Al incorporation for two 600 nm gradients depending on the ToF-SIMS sputtering time. The layers were deposited at 620 °C, with constant P T B As and P T MG a with P T M Al varying between 0.25 mTorr and 2.18 mTorr for the blue gradient up to 30% Al and up to 3.71 mTorr for the violet gradient reaching 45% Al. Both gradients were deposited on top of a 400 nm GaAs buffer layer grown upon a 300 mm Si(001) wafer. . . . . . . . . . . . . . . . . . . . . . . . . . .

2.27

Rocking curves along the GaAs (004) reflection. All the samples are made of a 600 nm GaAs buffer on Si (001). For samples "Al x Ga 1-x " 200 nm of Al x Ga 1-x is added on top of the GaAs buffer as well as a 15 nm GaAs capping layer for oxidation protection. Growth rate ratios. The selective epitaxial growths presented on this graph were realized at at 620 °C. The ratio P T B As /P T MG a is kept constant at a value of 5.51. Data is extracted for a constant ridge width inside the dielectric of 300 nm. . . .

3.9

Growth rate for facet (001) as a function of temperature and TMGa partial pressure. The ratio P T B As /P T MG a is kept constant at a value of 5.51. Data is extracted for a constant ridge width inside the dielectric of 300 nm. . . . . . . . . . . . . . The blanket grown layers are made of GaAs either directly grown onto of silicon or using a Ge buffer. The selective epitaxial growth shown here exhibit different aspect ratios indicated beneath the points. The dotted lines are here as a guideline to the eyes and do not represent any regression. The data comes from the following sources: A [START_REF] Alcotte | Epitaxial growth of antiphase boundary free GaAs layer on 300 mm Si(001) substrate by metalorganic chemical vapour deposition with high mobility[END_REF], B [START_REF] Widiez | 300 mm InGaAs-on-insulator substrates fabricated using direct wafer bonding and the smart cut™ technology[END_REF], C [START_REF] Orzali | GaAs on si epitaxy by aspect ratio trapping: Analysis and reduction of defects propagating along the trench direction[END_REF], D [START_REF] Wan | InAs/GaAs quantum dots on gaas-on-V-grooved-Si substrate with high optical quality in the 1.3 µm band[END_REF], E [START_REF] Richter | GaAs on 200 mm Si wafers via thin temperature graded Ge buffers by molecular beam epitaxy[END_REF], F [START_REF] Bogumilowicz | Anti-phase boundaries-free GaAs epilayers on "quasi-nominal" Ge-buffered silicon substrates[END_REF], G [START_REF] Daix | Towards large size substrates for III-V co-integration made by direct wafer bonding on Si[END_REF] and I [START_REF] Kunert | How to control defect formation in monolithic III/v hetero-epitaxy on (100) Si? a critical review on current approaches[END_REF]. Adapted from [START_REF] Gong | Targeting mm-wave communications with waferlevel integration of InGaAs HEMTs and silicon CMOS[END_REF] C.7 Dépendance de la vitesse de croissance de GaAs avec utilisation du précurseur de TMGa. La vitesse de croissance est normalisée par rapport au flux molaire entré dans le bulleur de TMGa . Les données proviennet de (a) [START_REF] Manasevit | The use of metal-organics in the preparation of semiconductor materials[END_REF], (b) [START_REF] Kräutle | Investigations on low temperature MO-CVD growth of GaAs[END_REF], (c) [START_REF] Gottschalch | Epitaxial deposition of GaAs in the Ga(CH 3 ) 3 AsH 3 H 2 system (II). investigations on the hetero-epitaxy of GaAs on Ge[END_REF] and (d) [START_REF] Leys | A study of the growth mechanism of epitaxial GaAs as grown by the technique of metal organic vapour phase epitaxy[END_REF]. Reproduit de [START_REF] Zilko | Metal organic chemical vapor deposition[END_REF] [START_REF] Hayakawa | Lowthreshold room-temperature cw operation of (AlGaAs) m (GaAs) n superlattice quantum well lasers emitting at ∼680 nm[END_REF], C [START_REF] Hayakawa | High reliability in AlGaAs laser diodes prepared by molecular beam epitaxy on 0.5°-misoriented (111)B substrates[END_REF], D [START_REF] Nemoto | Monolithic-integrated two-wavelength laser diodes for digital-versatile-disk/compact-disk playback[END_REF], E [START_REF] Herrmann | Reduction of mirror temperature in GaAs/AlGaAs quantum well laser diodes with segmented contacts[END_REF], F [START_REF] Groenert | Monolithic integration of room-temperature cw GaAs/AlGaAs lasers on Si substrates via relaxed graded GeSi buffer layers[END_REF], G [START_REF] Iwamura | Dynamic behaviour of a GaAs-AlGaAs MQW laser diode[END_REF], H [START_REF] Choi | InGaAs/AlGaAs strained single quantum well diode lasers with extremely low threshold current density and high efficiency[END_REF], I [START_REF] Hu | Lateral carrier diffusion and surface recombination in InGaAs/AlGaAs quantum-well ridge-waveguide lasers[END_REF], J [START_REF] Liu | Electrically pumped continuous-wave 1.3 µm quantum-dot lasers epitaxially grown on on-axis (001)GaP/Si[END_REF], K [START_REF] Chen | Electrically pumped continuous-wave 1.3 µm InAs/GaAs quantum dot lasers monolithically grown on on-axis Si (001) substrates[END_REF], L [START_REF] Wang | Emerging technologies in si active photonics[END_REF],M [START_REF] Zhu | Room-temperature electrically-pumped 1.5 µm InGaAs/InAlGaAs laser monolithically grown on on-axis (001) Si[END_REF], N [START_REF] Kawamura | InGaAs/InGaAlAs/InAlAs/InP SCH-MQW laser diodes grown by molecular-beam epitaxy[END_REF] and O [START_REF] Temkin | InGaAs/InP quantum well lasers with sub-mA threshold current[END_REF]

Introduction

The increased demand for performance in terms of data transmission, whether for longdistance links, inter-chip or intra-chip interconnections, is a major challenge for the microelectronic and telecommunication industries. The telecommunication field has converged towards the microelectronic field via the silicon technology. Indeed, telecoms require infrared optical transmission. Therefore, silicon photonics has emerged as a new paradigm over the past decade. The need to lower manufacturing costs and thus optimize the integration of optical functions has pushed the development of circuits based on III-V materials integrated on silicon wafers. For the telecoms industry silicon will offer a miniaturized optical guide system powered by directly integrated infrared III-V laser sources. Moreover, other fields of applications, such as biophotonics and autonomous driving systems for instance, take advantage of this approach.

Usually, the chosen approach consists of bonding a III-V semiconductor-based component on a silicon on insulator substrate previously structured to guide the light. The optical wave thus circulates from the III-V cavity towards the silicon photonic circuit. Recently, a new integration option is being developed by several labs. This novel integration method requires to integrate the III-V components directly onto the silicon substrate by heteroepitaxy. However, several challenges need to be solved to integrate a III-V light emitting source directly deposited onto silicon.

Indeed, it is of utmost importance to reduce the defect density propagating to the active layer of the light emitting source. The defect generation results from the differences in lattice parameter, thermal expansion coefficient and polarity between III-V materials and silicon.

In this work the chosen approach to get rid of this defects is to use selective epitaxial growth combined to the aspect ratio trapping method.

To achieve a directly integrated grown light emitting structure onto silicon this work presents the technological bricks rendering this integration possible.

The first chapter, gives an overview of the different applications of such sources and why they are of interest for the future of silicon photonics. Then, some reminders to understand how a laser diode works are provided. Afterwards, the state-of-the-art of monolithically integrated III-V lasers on silicon is given. A specific focus on III-V lasers grown onto silicon is given with an emphasis on the challenges that are faced. Then, strategies are given to overcome them. Later on, the growth method chosen in this work is detailed. Finally, the specifications for this study are given including the main requirements.

In the second chapter, the different technological bricks needed are presented. Simulations are provided to define the best possible stacks for selectively grown III-V materials. From those simulations, three stacks are defined, one for a red emission, one for a near infrared emission and a last one for an L-band emission. Afterwards, the lacking III-V materials to realise these stacks are developed on full-sheet wafers.

The third chapter, deals with selective epitaxial growth. First a study concerning the morphology of the selective epitaxial growths is presented. This allows to know the specific growth parameters to realise a rectangular III-V ridge. Afterwards, the dislocation reduction using the aspect ratio trapping method is presented. Eventually, the stacks simulated in chapter 2 are integrated onto silicon wafers using the selective epitaxial growth technique.

The fourth and last chapter, is dedicated to the realization of red light emitting structures. Those structures are realized from full-sheet growths on silicon and GaAs wafers. Eventually, in the perspectives some clues are given for the realization of light-emitting structures from selective epitaxial growths.

Target, description and state of the art of III-V lasers on silicon

Nowadays, almost anything one uses on everyday basis is connected and in need for a data exchange at some point in the process. Data flow is expanding everyday with the growing use of connected objects and is in need for faster rates of transfer and novel technologies. With this growing use of connected objects the internet demand is bursting. Most of the world's internet protocol traffic goes through data centres. Therefore, greater connectivity drives the demand for data centres. For that reason, transitioning from electrical data transmission to optical data communication becomes a new paradigm. Data centres and data centres interconnects (DCIs) will drive the use of photonic integrated circuits (PICs). Though, even if the largest volume of PICs will be of use for DCIs, new applications, medical sensing devices, advanced driver assistance-systems (ADAS) for instance are looming for those circuits. Those applications will also be exhibiting fast market growth, hence, PICs are set to become more and more of a generality.

Photonic integrated circuits for the information data era

PICs are based on several building blocks one of them being the laser. This chapter aims at explaining the context of the thesis and the growing interest for integrating a laser directly onto a silicon platform for future PICs.

A data driven world

The world is currently entering a new data driven Era: the fourth industrial revolution. As the three precedent revolutions, this one is paving the way towards a radical change in the way we live. This revolution was made possible by the appearance of digital systems, networked communications, machine learning and large-scale data analysis, it refers to the increasing integration of these technologies into business and production processes in order to make them self-sustaining and more efficient. The Fourth Industrial Revolution encompasses the Internet of Things (IoT), but goes beyond simple device connectivity toward being an Internet of Everything. At its core is the combination of big data, analytics and physical technology [START_REF] Ey | Four things to know about the fourth industrial revolution[END_REF].

This fourth industrial revolution leads to an intensive use of new technologies coming from the growth of internet users set to reach by 2022 60% of the world population. This will lead to an all time high of 28.5 billion global networked devices and connections by 2022, generating an explosion of the numerical data volume as seen on figure 1.1. Reproduced from [START_REF] Weldon | The Future X Network[END_REF].

The evolution is so important that Cisco forecasts that by 2022, the total internet traffic will be 3.7 times larger than in 2017 with a compound annual growth rate of 30%. This will represent the equivalent to 120 million DVDs per hour. For instance in France in 2022, the gigabyte equivalent of all films ever made will cross France's IP network every 45 minutes [START_REF]VNI Forecast Highlights Tool[END_REF].

Since 2008, most internet traffic has originated or terminated in a data centre. For this reason nowadays, and for the years to come, data centres are at the crux of delivering IT services and providing storage, communications and networking to the growing number of networked devices, users and business processes in general. Consequently, data centre traffic will continue to dominate internet transit for the foreseeable future [2]. One can mention that inter-and intra-chip traffic ie. within data centre traffic is the telecom part which is the most important in terms of data transfer. Indeed, nowadays it represents 75.4% of the total portion of the traffic. The transit percentage residing in data centres will decline slightly to 71.5% but will still grow from 14.1 Zettabytes per year in 2019 to 20.6 Zettabytes per year in 2021. The portion of total traffic predicted in 2021 is shown in figure 1.2. As an information a Zettabyte is 10 21 byte. The world is set to enter the Yottabyte Era,10 24 bytes, in a small decade time. As seen in figure 1.2 the traffic by destination highlights that the data centre will be at the middle of all exchanges. The exponential growth of massive data transfers for the Internet of Everything Era pressures the transition from electronic to photonic supports for data transfer.

Optical devices for the Internet of Things

Since the 1980's, a large part of long distance communication networks based on terrestrial, satellites and copper cables technologies have migrated towards optical technologies. This shift lead to the development of semiconductor lasers and optical fibres.

1.1.2.a Supports for data transfer

Optical fibre systems have many advantages over metallic-based communication systems. They allow for long distance transmission with much lower attenuation. They have large bandwidth and are lightweight and small in diameter. As optical fibres are dielectric, they are insensible to environmental perturbation like electromagnetic interference.

Nowadays, numerical information is hence mostly transferred through optical communication networks. The frequency ranges over which data is sent has been selected for physical devices containing a glass core in order to limit the losses.

As seen in figure 1.3 loss profile of a standard optic fibre is mostly dependent on Rayleigh scattering, water peak and Infra-red absorption. From this graph, two transparency windows appear for a standard silica optical fibre centred around 1.31 µm and 1.55 µm, offering a zero chromatic dispersion and minimum attenuation (0.25 dB/km) respectively. Those two wavelengths are the wavelengths of interest for telecom and datacom due to the advantages they offer. Yet, depending on the optical fibres used one can use other transmission wavelengths.

Indeed, in the range 1250 nm -1700 nm they are 6 different Telecom bands which are defined 1.1. Photonic integrated circuits for the information data era

1.1.2.b The Different networks

The transition from metallic based communication to optical communications has already been performed on several networks.

At the present time one can distinguish 3 types of networks based on the distance they cover. First, Long Haul (LH) Core network (> 1000 km) and wide area networks (WAN) (300 km -1000 km) which cover large paths. In a second part, metropolitan area networks (MAN) (< 300 km) scaling smaller (city, region...). Eventually, local area network (LAN) (< 40 km) scaling even smaller in size (neighbourhoods...). Yet, further on, a down-scale remains, Datacom, it concerns very small interconnections typically between data centres, servers and chips.

Silicon photonics or the integration of circuits

As stated in the previous paragraphs, light is already used worldwide for km-long transport of information. However, the minimum distance for its use continues to decrease. To tackle this length shrinkage meaning the communications at the scale of data centres one needs photonic integrated circuits. Photonic integrated circuits are the optical equivalent to electrical integrated circuits (EICs). They integrate multiple photonic functions on a single integrated circuit (IC). The functions encompasses modulation, emission, guiding, filtering, coupling and detecting.

1.1.3.a Various types of photonic platforms

It was previously explained that data centres are the driving force for the development of photonic integrated circuits. Yet, other applications are looking forward to use these photonic integrated circuits. Therefore, a range of materials are of use for the various applications. Depending on the application, telecom, datacom, automotive, medical or even sensors, the materials required will change. This depends on the material's use, that is to say which function it will take once in the PIC.

Figure 1.5 -Main PIC platforms and their corresponding optical functionalities. Reproduced from [START_REF] Mounier | Silicon photonics and photonic integrated circuits 2019[END_REF].

First, the most important thing is to define what application one wants to serve. This will allow to chose the platform of interest. A platform is the package that uses the technology and processes available in standard fabrication of the used base material. For instance, the most known platforms for datacom and telecom applications are InP [START_REF] Soares | InP-based foundry PICs for optical interconnects[END_REF] and silicon. Though, there are other materials that can be used as platforms for these applications as seen from figure 1.5.

The various platforms of integration are dependent on the transparency windows of the materials as seen in figure 1.6. Indeed, one can see by comparing figures 1.5 and 1.6 that the transparency windows of the different materials correspond to the wavelengths dependent applications.

Figure 1.6 -Materials applied in integrated optics and their corresponding transparency ranges. Reproduced from [START_REF] Wörhoff | TriPleX: a versatile dielectric photonic platform[END_REF].

Yet, if we take the silicon photonic platform, one can see from figure 1.5 that it allows to answer to all the applications presented, ranging from telecom to medical applications. Therefore, the wavelengths attainable range from the early 400 nm up to 1550 nm. Yet, the silicon's transparency range only starts at 1.1 µm. Which is indeed appropriate to work with 1.3 µm and 1.55 µm wavelengths used for optical data transport, as explained in section 1.1.2.a. This can be explained from the versatility of such a platform. Actually, silicon photonics is the technology platform in which the PICs are fabricated using the technology and processes available in a standard CMOS fab. Hence, from the CMOS processes fabs have access to, it is possible to integrate a range of other materials onto the platform. Accordingly, this makes it adaptable for the various wavelengths of interest from 400 nm until much further on. For example, by integrating silicon nitride onto a silicon photonic platform, one can have access to visible light applications [START_REF] Romero-García | Silicon nitride CMOS-compatible platform for integrated photonics applications at visible wavelengths[END_REF][START_REF] Porcel | INVITED] silicon nitride photonic integration for visible light applications[END_REF][START_REF] Wilmart | A versatile silicon-silicon nitride photonics platform for enhanced functionalities and applications[END_REF]. This allows the silicon photonic platform to encompass the possibility of reaching all applications by integrating different materials to realize the different functions making a PIC.

1.1. Photonic integrated circuits for the information data era

1.1.3.b The photonic integrated circuit

Photonics has been in development for the past 40 years, but, the past decade has seen some major improvements. Indeed, nowadays the integration of photonics components inside circuits is becoming standard industrial process. An example of a PIC is shown in figure 1.7. A PIC contains, lasers generating light guided via waveguides, the generated light goes through a modulator which encodes data onto it. Waveguides then merge in a multiplexer, afterwards the light is transmitted through a fibre or a waveguide. The signal is received by a demultiplexer which separates the different wavelengths mixed together eventually the light is sent to photodetectors converting it to an electrical signal out to an electronic chip via copper wires. The majority of devices making up a PIC have been demonstrated and their industrialization becomes common practice. Most of the units, either passive components such as surface-to-fibre grating couplers, multiplexers and demultiplexer for wavelength division multiplexing (WDM) functions or active components as modulators and photodetectors have been demonstrated and are mature [START_REF] Roelkens | III-V-on-silicon photonic devices for optical communication and sensing[END_REF][START_REF] Kish | System-on-chip photonic integrated circuits[END_REF]. Still, remains the issue of integrating an efficient light source directly onto an existing circuitry.

Figure 1.7 -Schematic of a photonic integrated circuit.

III-V on silicon lasers

The most efficient light source to date are lasers. Accordingly, they are the light source of interest for PICs. In essence, a laser which stands for light amplification by stimulated emission of radiation, is a gain material in which light is amplified by making round trips thanks to an optical cavity. The amplification is only possible by bringing energy to the active region of the laser, which is then said to be pumped. This section aims at presenting the basics of laser physics. Various phenomena contributing to the emission of coherent light will be described. The importance of III-V materials for laser making will also be highlighted. For more detailed theoretical explanations one can refer to the following books by Coldren and Corzine, Iga and Kinoshita, and Numai [START_REF] Iga | Process Technology for Semiconductor Lasers[END_REF][START_REF] Coldren | Diode Lasers and Photonic Integrated Circuits[END_REF][START_REF] Numai | Fundamentals of Semiconductor Lasers[END_REF].

1.1.4.a Stimulated emission

From the acronym, laser is based on light stimulated emission. Stimulated emission was introduced by Albert Einstein in 1917 in his derivation of the blackbody spectrum [START_REF] Einstein | Zur quantentheorie der strahlung[END_REF]. If one considers a two level energy system as shown in figure 1.8 , consisting of E 1 the ground state and E 2 the excited state, an electron being in E 1 state can absorb energy either from light or heat phonons. If the energy supply is large enough the electron becomes excited in E 2 state from here it can then spontaneously transition from E 2 to E 1 state which releases a photon. In the case of stimulated emission, an incident photon stimulates the electron to make a transition from the higher state E 2 to the lower energy state E 1 and the creation of a second photon identical to the incoming one. For all the arrangements the photon energy hν is equal to E 2 -E 1 . Accordingly, stimulated emission allows coherent light amplification at a certain frequency depending on the material's energy levels.

1.1.4.b Optical amplification

If we consider a group of atoms, N 2 , beginning in the same excited state, E 2 , and within the stimulation range of a passing photon, it is assumed that the probability for the stimulated emission to happen is 100%. Therefore, the incoming photon can interact with one of the atoms, which will cause stimulated emission of a coherent photon with energy E 2 -E 1 . Those two photons can then interact with two other atoms and so on. Obviously, in real life not all atoms are in excited state and some of the excited atoms will not undergo any interaction. Hence, one can describe the power variation of a system as a function of atoms population in excited state, N 2 , and of atoms at a lower energy state, N 1 :

d E (ν) d t = hν( d N 2 d t - d N 1 d t ) (1.1)
The amplifier gain G in a homogenous structure of length L can then be expressed as follows:

G(ν) = P (L) I P (L 0 ) = exp[g (ν)L] (1.2)
Where, P (L) is the output light of the system, I (L 0 ) is the input light of the system and g (ν) is 1.1. Photonic integrated circuits for the information data era the optical power gain coefficient.

For the optical amplification to happen it is clear from equation 1.1 that d E (ν) d t > 0 requires N 2 > N 1 . From equation 1.2, the same conclusion can be made, indeed, g (ν) > 0 also has the same requirement. The condition N 2 > N 1 is called population inversion.

1.1.4.c Population inversion

In order to obtain stimulated emission it is required to have the higher energy level, E 2 , populated with more excited atoms than in the lower state, E 1 .

Yet, the thermal equilibrium of an atoms population has to respond to the Boltzmann Distribution. The Boltzmann distribution expresses the relative probability that a subsystem of a physical system has a certain energy. Accordingly, in our system a population of N 2 excited atoms, at E 2 energy level, co-existing with N 1 atoms at a lower energy state, E 1 , must obey the following equilibrium reaction:

N 2 N 1 = exp (- E 2 -E 1 kT ) (1.3)
Where, k is Boltzmann's constant and T is the temperature.

From equation 1.3, one can see that N 2 remains mostly inferior to N 1 , for reasonable temperatures. This is why when stimulated emission happens with the condition N 2 > N 1 it constitutes a population inversion from the thermal equilibrium.

All the processes providing a population inversion are called pumping.

1.1.4.d Pumping mechanisms

Population inversion is either reached via optical or electrical pumping. Optical pumping is the easiest one to achieve as one only needs to illuminate the active region with a light beam providing enough energy to have the photons absorbed until reaching transparency,

N 2 = N 1 .
Under an electrical field electron pumping requires a p-i-n junction in order to have electrons and holes in the material for them to recombine. The p-i-n junction consists of an intrinsic region, the active region, surrounded by two regions, a p-doped and an n-doped zone. Initially, when no bias is applied the system has a built-in voltage V b . This barrier is lowered by applying a forward bias opposite to this built-in voltage. As follows, electrons from the n-region, respectively holes from the p-region, transfer towards the p-region, respectively towards the n-region. While transferring, both population get trapped into the active region and recombine, emitting light.

1.1.4.e Active region

Semiconductors exhibit two types of bandgap, either a direct one or an indirect one. In direct bandgap materials, the conduction band minimum and the valence band maximum lie at the same wavevector and low energy electrons can undergo optical transitions directly across the bandgap as seen on the left hand sight of figure 1.9. In indirect bandgap materials, the conduction band minimum and valence band maximum lie at different wavevectors. Therefore, phonons must gain enough energy to populate the much higher energy γ valley, which lies directly above the valence band maximum before undergoing a radiative transition as shown on the right hand sight of figure 1.9.

Figure 1.9 -Schematic illustration of direct, here InP, and indirect bandgap, here Si, materials.

Reproduced from [START_REF] Liang | Recent progress in lasers on silicon[END_REF].

Obviously, this difference has major implications for radiative recombination. The need to involve a photon for radiative recombination to occur in indirect bandgap materials makes this process rarer to occur in a given amount of time. It underlines why radiative recombination is far slower in indirect band gap materials than direct band gap ones. This illustrates the need to use direct bandgap III-V materials instead of silicon for diode laser applications.

Once the need for direct bandgap semiconductor has been addressed, one can improve the active part from a p-i-n homojunction to a p-i-n hereojunction, known as a double heterostructure. A double heterojunction is made of two junctions separated by the active part, a quantum well for example. When a current is injected into the structure the radiative recombination of the electron holes pairs then happens inside the active part, sandwiched between two confinement layers that play the role of an optical guide. The active part is tuned to exhibit a smaller bandgap than the one of the confinement layers. Therefore, the insertion of a smaller bandgap material between two higher bandgap materials, allows to make an optical guide as the refraction index from the confinement layers is smaller than the one of the active part as seen in figure 1.10. This property has allowed to make numerous structures in order to optimize the optical confinement of the layers, mainly by using multiple quantum well heterostructure and further on multiple layers of quantum dots as will be explained later The active region allows to optimize the recombination efficiency and the optical confinement, but one still needs an optical cavity to make a laser.

1.1.4.f In plane optical cavities

While it is possible to get optical amplification with stimulated emission, a single-pass triggers a stimulated emission producing a restricted amplifying effect. In order to turn the system into a laser a positive feedback mechanism needs to be added: an optical cavity. Once the amplifying active medium is pumped and integrated inside a cavity it becomes a laser oscillator. A range of optical cavities exist, ranging from linear types to circular based cavities.

Fabry-Pérot cavity

The Fabry-Pérot (FP) cavity is the easiest cavity to be obtained. It consists of two parallel mirrors surrounding a gain medium as shown in figure 1.11. In this type of geometry the optical wave will go back and forth from one mirror to another. In order to get an optical beam to exit the cavity, one of the mirrors is a partial reflector while the other is an almost total reflector. For a precise spacing value between the gratings, a small reflected feedback is provided at each step of the grating. The sum of all those multiple fed-back reflections add up in phase determining the lasing wavelength and stabilizing it against changes in drive current and baseplate temperature. Those cavities work as a narrowband optical fibre, where the Bragg frequency, λ B , is given by the following equation:

λ B = 2l n e f f Λ (1.4)
Where, Λ is the grating pitch, l is the order of the grating and, n e f f is the effective index of the propagation medium, which depends solely on the guide geometry and on the layer composition.

Circular based cavities They are also circular cavities, in forms of rings, disks or racetracks, they will not be explained in detail in this report. Still, they work as every other laser the resonance condition being a 2π phase-shift after one round trip inside the cavity. One can also point that the resonant modes inside those cavities are called whispering gallery modes (WGM).

All the cavities detailed in here are in plane cavities where the light output is coupled in the plane of the device. However, there are also out of planes cavities as vertical surface emitting lasers (VCSELs).

1.1.4.g Static laser characteristics

To evaluate laser performance, several parameters have to be taken into account. It is first important to know the type of operation the laser is submitted to, either pulsed or continuous wave (CW) operation. Pulsed operation is less demanding on the device as it allows not to overheat it. Though, the endgame is to operate the laser by CW operation. Two major representations have to be studied to extract the important static characteristics of a laser. The light-current graph, P out (I) and the light-wavelength graph, P out (λ) as shown in figure 1.13. The first one quantifies the laser efficiency, while, the other one gives insight into the laser modes. The following equations are given without demonstration, one can find more information on the following characteristics in the books of Coldren and Corzine [START_REF] Coldren | Diode Lasers and Photonic Integrated Circuits[END_REF], Numai [START_REF] Numai | Fundamentals of Semiconductor Lasers[END_REF] and Blood [START_REF] Blood | Principles of semiconductor lasers[END_REF]. Laser threshold and light-current characteristic In order to observe a lasing effect, the laser needs to be operated above the current threshold, I t h . The current threshold corresponds to the laser oscillation. At this threshold value, the optical gain created inside the cavity is sufficient to make the semiconductor transparent and compensate for the optical losses of the cavity.

The transmitted light intensity inside a FP cavity is defined as:

I t = T 1 T 2 G (1 -G 2 R 1 R 2 ) + 4G R 1 R 2 si n 2 (n e f f k 0 L) I 0 (1.5)
Where, T 1 and T 2 are the transmission coefficients from mirrors M 1 and M 2 , R 1 and R 2 are the reflection coefficients from mirrors M 1 and M 2 , n e f f is the effective refractive index of the medium, L is the cavity length, and G is the gain.

The oscillation condition from equation 1.5 is obtained when I 0 = 0 and I t > 0, hence, the denominator of the right side of the equation is then equal to zero, giving two equations.

Resonance condition: si n(n e f f k 0 L) = 0 and gain Condition:

1 -G 2 R 1 R 2 = 0 (1.6)
From the resonance condition in equation 1.6 one gets the spacing between two resonant frequencies.

∆λ = 2n e f f L (1.7)
From the gain condition in equation 1.6 and from 1.2 one gets the threshold gain.

G t h = Γg = α i + 1 2L ln 1 R 1 R 2 (1.8)
Where, Γ is the optical confinement factor, g is the optical power gain coefficient and α i is the optical power loss coefficient of the medium.

When pumping the laser above threshold the laser output power in terms of current is,

P out = Mirror losses Total losses η i hν q (I -I t h) (1.9)
Where, q is the elementary charge and η i is the internal quantum efficiency.

The external differential quantum efficiency is proportional to the slope efficiency of the L(I) curve. Therefore one can determine it experimentally from the following equation,

η d = η i = q hν ∆P out ∆I (1.10)
With the light-current curve it is possible to have access to the maximum output power, the external differential quantum efficiency and last but not least the threshold current.

Light-current characteristic dependence on temperature This current is sensitive to the temperature of operation. When the temperature of operation increases I t h increases while, η d decreases. The current dependence on a temperature is empirically expressed as,

I t h (T ) = I t h 0 exp( T T 0 ) (1.11)
Where, I 0 is a coefficient, T is the junction temperature, and T 0 is the characteristic temperature. T 0 indicates how well the device performs at higher temperatures.

Light-wavelength characteristic Some important parameters are obtained from the spectral characteristic. First one can have access experimentally to the free spectral range (FSR) written ∆ ω , which is the frequency spacing for adjacent resonances.

∆ λ = λ 2 0 2n e f f L = λ 2 0 2πc ∆ ω (1.12)

Monolithically integrated III-V lasers

Where, λ 0 is the centre wavelength of the light and c is the speed of light in vacuum.

Another important parameter is the spectral linewidth which defines the full width at half maximum of the considered wavelength. The resonance condition of equation 1.5 is satisfied. Therefore after calculation one gets the full width at half maximum (FWHM), δω is given by,

δω = c(1 -G R 1 R 2 ) n e f f L 4 G 2 R 1 R 2 (1.13)
From the ratio of the free spectral range and the full width at half maximum of a resonance for a specific resonance wavelength, one can get the resolution of the resonator, named finesse, F.

F = ∆ω δω = ∆λ δλ (1.14)
From the ratio of the resonance frequency to the FWHM, one can also access a measure of the sharpness of the transmission peak. This ratio know as the quality factor, Q demonstrates the ability of a cavity to confine the field. It is related to the finesse factor by,

Q = ω δω = n e f f L λ F (1.15)

Monolithically integrated III-V lasers

The importance of the silicon photonic platform was introduced beforehand. Similarly, the need for III-V materials for lasers applications was previously highlighted. This section introduces the possibilities of integration of these III-V materials directly onto silicon, as well as the constraints of material integration that remain to be solved to imagine a full optical integration.

Different monolithical integration techniques

In order to integrate those lasers onto silicon wafers using CMOS processes, one can use either bonding or direct growth onto silicon wafers.

1.2.1.a Bonding

Bonding is the most common technique to this day due to its maturity as opposed to direct epitaxy. This technique is already used in foundries to integrate lasers onto chips. One can note that this technique has permitted some companies to produce transceivers using such photonic chips, as Intel or Luxtera.

The technique consists of growing the III-V stack on a III-V substrate in order to have the best material quality available. Indeed the growth of III-V materials onto silicon will exhibit defects which will be more thoroughly explained in section 1.3.1.a. For the bonding technique either the whole III-V wafer is bonded, or multiple dies, cut from the III-V wafer, are bonded the silicon on insulator (SOI) wafer. Nowadays, the most used option is the multiple dies option as it allows to use more efficiently the III-V material [START_REF] Vivien | Building blocks of silicon photonics[END_REF]. When using multiple dies they are collectively bonded using a die holder. The bonding itself is possible via two techniques either molecular or adhesive bonding [START_REF] Roelkens | III-V-on-silicon photonic devices for optical communication and sensing[END_REF]. Molecular bonding a well established, decade-long used method uses Van der Walls forces to maintain the materials together, hence, needing very flat and clean surfaces. Adhesive bonding uses an adhesive bonding agent as divinylsiloxanebenzocyclobutene (DVS-BCB) giving more relaxed requirements for the surface flatness [START_REF] Roelkens | Hybrid silicon lasers[END_REF]. In both cases the substrate is removed and the III-V is processed as one can see in figure 1.14. Even though this process has a good maturity and makes good lasers they are some drawbacks to it. First of all, it requires additional technological steps which makes it long, difficult and expensive. It is also possible to note that the use of bulk substrates of III-V materials is not optimal due to their removal during the device processing. As seen from table 1.2 the weight of standard substrates is pretty important. Hence, the loss of all of this material during the process is not optimal.

Density

Furthermore, III-V materials, mainly indium and gallium are critical materials [START_REF]Mineral Commodity Summaries[END_REF] therefore, it is of importance to limit their use for future applications.

1.2.1.b Direct growth integration

Monolithic integration also referred to as direct growth integration is a technique under development that allows to tackle the two problems cited for bonding integration. Obviously, not using a III-V wafer is a good option to reduce the used weight of critical material. For instance, for a standard 4 inch semi insulating GaAs wafer it would allow to decrease by 26.10 g the material use. Evidently, one should also take into account the material use for the epi layer. This will be accounted for in the following chapters. As its name suggest monolithic integration allows for a direct growth of the III-V material onto the silicon. However, it is not a miraculous technique, it has its drawbacks too, the main being the direct growth of III-V material directly onto Si causing defects.

State of the art of existing III-V lasers grown on silicon

They are two paths of direct integration of III-V lasers grown on silicon. Either blanket heteroepitaxy, where the III-V material is deposited onto a full sheet silicon wafer, making it a 2D growth. Or selective epitaxial growth (SEG), where the III-V material is deposited only on opening made onto silicon with on oxide or nitride mask, making it a 3D growth.

1.2.2.a Blanket heteroepitaxy

For blanket heteroepitaxy all the actual demonstrators use quantum dots as the active medium because of the advantages that will be described in section 1.3.3. They are either made using full molecular beam epitaxy (MBE) growth on Metal-organic chemical vapour phase deposition (MOCVD) buffers and MBE growth of the rest of the device. Two major types of substrates are used, either, on axis Si(100) [START_REF] Chen | Electrically pumped continuous-wave 1.3 µm InAs/GaAs quantum dot lasers monolithically grown on on-axis Si (001) substrates[END_REF] or, GaAs on V-grooved Si(100) (GoVS) templates [START_REF] Norman | Electrically pumped continuous wave quantum dot lasers epitaxially grown on patterned, on-axis (001) Si[END_REF]. Those structure are already a pretty mature technology with electrically pumped demonstrators being made since 2014 already [START_REF] Liu | High performance continuous wave 1.3 µm quantum dot lasers on silicon[END_REF].

1.2.2.b Selective area epitaxy

The selective epitaxial growth is mostly used by two groups combined with the aspect ratio trapping technique (ART). The ART technique will be detailed in section 1.3.2.c. Those two groups integrate the active part in a different way either outside the ridge in the case of Bernardette Kunert's group at IMEC or inside the ridge for Kei May Lau's group at HKUST.

For the outside ridge integration IMEC seems to be targeting the 1.3 µm window but currently made it to 1 µm. The further they can get not to induce relaxation of the InGaAs quantum wells (QWs) on GaAs. The characterization of the ridges are made directly onto the SOI template using DBR structuration of the III-V material gain medium [START_REF] Shi | Optical pumped InGaAs/GaAs nano-ridge laser epitaxially grown on a standard 300 mm Si wafer[END_REF].

Inside the ridge HKUST targets 1.55 µm range using InGaAs QWs on InP. As the material is confined inside the ridge the characterization of those ridges requires further preparation by removing the oxide to then make the DBR structuration of the III-V gain medium [START_REF] Han | Room-temperature InP/InGaAs nano-ridge lasers grown on si and emitting at telecom bands[END_REF][START_REF] Han | Telecom InP/InGaAs nanolaser array directly grown on (001) silicon-on-insulator[END_REF].

Those structures are recent, they were first investigated by IMEC in 2015 [START_REF] Wang | Room-temperature InP distributed feedback laser array directly grown on silicon[END_REF][START_REF] Tian | Room temperature O-band DFB laser array directly grown on (001) silicon[END_REF]. Hence, the demonstrators are currently only optically pumped and quantum dots have not yet been integrated in the active parts.

III-V materials integration challenges on silicon

Several challenges need to be overcome to make heteroepitaxy of III-V materials for integrated lasers a reality in the near future. This section gives insights into those challenges and how the groups working on it try to overcome them or at least reduce their significance for laser operation.

III-V materials properties

As their name shows it, III-V materials are alloys formed of one or more elements from the third column of Mendeleiv's table with one or more elements from the fifth column of Mendeleiv's table, as shown on figure 1.15 (a).

They can be found as binary alloys as GaAs or InAs, ternary alloys for instance: In x Ga 1-x As or even as quaternary alloys such as In x Ga 1-x As y Sb 1-y . Those materials cover a large range of lattice parameters as well as bandgap energies as listed on figure 1.15 (b). They are all direct bandgap materials, which makes them good photon issuing elements as previously described in section 1.1.4.e.

1.3.1.a Issues associated to III-V epitaxy on Silicon

The integration of III-V materials directly onto silicon could be a great way of achieving improved performance devices in comparison to the ones we can currently manage. Still, there are some intrinsic properties of these materials that make the direct synthesis on silicon difficult. One will follow the example of GaAs material to explain the three problems encountered with heteroepitaxy on silicon: temperature expansion coefficient mismatch, polarity difference and eventually lattice mismatch.

Temperature expansion coefficient mismatch

The first major difference between GaAs and silicon is their thermal expansion coefficient. The GaAs coefficient is larger than the one of silicon on a large temperature scale as seen on figure 1.16 (a). The increase of the deposited layer thickness increases the stored elastic energy. It can lead to cracks appearing in the deposited sheet. Elastic energy is calculated as follows:

E e = 2S m 1 + ν 1 -ν f t (1.16)
Where, t is layer's thickness, S m is the layer's Shear Modulus, ν is the layer's Poisson coefficient and f is the layer's deformation. The formula is taken from Radzimski's et al. proceeding [START_REF] Radzimski | The partitioning of elastic energy relaxation during misfit dislcation formation in heteroepitaxial layers[END_REF].

Hence, as epitaxy is realised between 500 °Cand 700 °Cthe equation 1.16, gives us a maximum of 5.5 µm to 3 µm of deposited GaAs on silicon before encountering cracks due to thermal coefficient mismatch.

As seen from figure 1.16 (b) cracks can be observed easily by optical micrography.

Polarity difference Another difference is that III-V semiconductors are polar materials contrasting with silicon which is non-polar. This difference induces the creation of antiphase boundaries. In the case of III-V materials, for instance, GaAs, exhibit zinc-blende structures (ZB). Ga and As atoms are positioned on two face cubic centred (FCC) sublattices at a shifted distance of 3a 4 , therefore it is a diatomic step structure. Silicon has a diamond type lattice, equivalent to a monoatomic ZB structure, hence, it has monoatomic step structure. Both structures are illustrated on figure 1.17. When a diatomic molecule such as GaAs is grown on Figure 1.17 -Lattices of silicon and III-V materials.

Si, Si first bonds to As, because of a stronger bonding preference regarding Si-As. Hence, the emerging growth along [001] from the adjacent terraces will follow the same stacking sequence of Si-(As-Ga) n . A mismatch in the stacking sequence is therefore created concerning adjacent terraces and creates antiphase boundaries (APBs) as shown in figure 1.18 [START_REF] Lourdudoss | Heteroepitaxy and selective area heteroepitaxy for silicon photonics[END_REF].

Antiphase boundaries are crystallographic defect planes which, incorporate non-stoichiometric excess atoms of one of the constituents of the compound [START_REF] Holt | Antiphase boundaries in semiconducting compounds[END_REF]. These APBs generate homoatomic bonds of III, respectively V, atoms which behave as acceptors, respectively donors, of electrons. Jointly, it can lead to a highly compensated semiconductor degrading its own electronic properties.

As seen from figure 1.18 (b) APBs can be observed easily by atomic force microscopy (AFM) Reproduced from [START_REF] Lourdudoss | Heteroepitaxy and selective area heteroepitaxy for silicon photonics[END_REF]. (b) AFM image of a 400 nm thick GaAs layer grown on Si(001), exhibiting a high density of randomly oriented APBs. Reproduced from [START_REF] Alcotte | Epitaxial growth of antiphase boundary free GaAs layer on 300 mm Si(001) substrate by metalorganic chemical vapour deposition with high mobility[END_REF].

but also by scanning electron microscopy (SEM).

Lattice mismatch Last but not least: most heteroepitaxies exhibit a lattice mismatch which can be defined as:

f = a G a As -a Si a Si
. Where, a x is the lattice parameter of x. Here, with GaAs on Si the value is f = 4.1% .

First, initial growth tends to be coherent with the substrate within the growth plane. The growth is said to be pseudomorphic. As the epitaxial layer thickness increases, so does the strain energy stored in the pseudomorphic layer. In our case GaAs is strained and in compression (a G a As > a Si ). Therefore, the stored elastic energy within the GaAs layer intensifies with an augmenting thickness layer. Until, at the critical layer thickness (h c ) defined at equation 1.17 the threshold for the genesis of dislocations at the interface is reached because their formation will be able to relax some the mismatch strain, as shown on figure 1. [START_REF] Li | Growing antiphase-domain-free GaAs thin films out of highly ordered planar nanowire arrays on exact (001) silicon[END_REF].

hc = b 8π f (1 + ν) (ln h c b + 1) (1.17)
where, b is the dislocation's Burgers vector norm and ν is the material's Poisson coefficient.

For the GaAs on Si case, the critical thickness is lower than 1 nm, obtained with equation 1.17. Hence, it is not possible to deposit any interesting layer under the critical thickness. Consequently, some ways are to be found to limit the backlash of those defects on the operation of future devices. Since, those dislocations behave as centres for non radiative recombinations, they contribute to the diffusion of charge carriers which lead to premature failure of devices made with those materials. . The references presented here come from the following papers: [START_REF] Hartmann | Reduced pressure-chemical vapor deposition of intrinsic and doped Ge layers on Si(001) for microelectronics and optoelectronics purposes[END_REF][START_REF] Larsen | Epitaxial growth of Ge and SiGe on Si substrates[END_REF][START_REF] Fitzgerald | Dislocations in relaxed SiGe/Si heterostructures[END_REF][START_REF] Tamura | Rearrangement of misfit dislocations in GaAs on Si by post-growth annealing[END_REF][START_REF] Yamaguchi | Dislocation density reduction in heteroepitaxial III-V compound films on Si substrates for optical devices[END_REF]. Reproduced from [START_REF] Wang | A model of threading dislocation density in strain-relaxed Ge and GaAs epitaxial films on Si (100)[END_REF].

One could imagine that after a large thickness of GaAs material on silicon the density of dislocations would become interesting to manufacture satisfying devices. To have a comparison point a nominal GaAs substrate has around 10 4 cm -2 threading density dislocation. But, as displayed on figure 1.20, the thickness order of magnitude to have around 10 6 cm -2 threading dislocation density is of the order of tens of microns which is too important because it can lead to physical limitations, cracks for example.

The characterization of dislocations

The characterization of dislocations is not as straightforward as it is for cracks or antiphase-boundaries. Indeed one can not detect them using AFM or a simple SEM. There are various possibilities when it comes to characterizing dislocations.

• X-Ray Diffraction (XRD) analysis This method requires the measure of several rocking curves for different (hkl ) reflections, symmetric and asymmetric. From those measures it is then possible to plot the rocking curve width adjusted to account for the intrinsic rocking curve widths versus tan 2 (θ) where θ is the Bragg angle. A straight line is then obtained. From the slope and the intercept one can then extract the dislocation density [START_REF] Ayers | The measurement of threading dislocation densities in semiconductor crystals by x-ray diffraction[END_REF]. Yet, this technique has a major disadvantage as it is an indirect characterization method and a time consuming characterization.

• Chemical etching This method has been used a lot over the years. The material is dipped into a chemical solution for a certain time. The chemical will react differently depending on the type of defect, forming pits of different geometries. Therefore, it allows for a good quantification of defects by combining the etch method to microscopy to extract the etch pit density (EDP), thus, the dislocation density [START_REF] Stirland | A review of etching and defect characterisation of gallium arsenide substrate material[END_REF]. Nowadays, it has become more and more abandoned because of the chemicals it needs [START_REF] Clawson | Guide to references on III-V semiconductor chemical etching[END_REF]. Indeed, They are not compatible with the requirements of CMOS fabs it is hence difficult to have access to it. For instance molten KOH is used on GaAs(001) surfaces but is not permitted in CMOS fabs.

• Transmission electron microscopy (TEM) top views This method requires a plan-view lamellae, extracted parallel to the substrate material, to be prepared. While the preparation is time consuming and the characterization requires someone able to operate a TEM, it allows to obtain an almost direct image of the dislocation density. It used to be the most commonly used method until recently due to the possibility of obtaining an image. However, as the sample size was relatively small, around 10 µm 2 , it is possible to use this technique only for densities being higher than 10 -7 cm -2 .

• Electron channelling contrast imagery (ECCI) This technique is based on the use of a SEM setup having a backscattered electron (BSE) detector. It is ready to use method as it dos not require any sample preparation. This technique was first used for characterizing defects in metals since the 90s [START_REF] Ahmed | Characterizing dislocation structures in bulk fatigued copper single crystals using electron channelling contrast imaging (ECCI)[END_REF]. This method has gained popularity for dislocation characterization in III-V materials in the recent years, around 2015 [START_REF] Carnevale | Rapid misfit dislocation characterization in heteroepitaxial III-V/Si thin films by electron channeling contrast imaging[END_REF][START_REF] Carnevale | Applications of electron channeling contrast imaging for the rapid characterization of extended defects in III-V/Si heterostructures[END_REF][START_REF] Yaung | Threading dislocation density characterization in III-V photovoltaic materials by electron channeling contrast imaging[END_REF]. Moreover, since 2018 it was shown that it was a relevant technique to use in confined semiconductor device structures [START_REF] Schulze | Non-destructive characterization of extended crystalline defects in confined semiconductor device structures[END_REF]. This recent technique use has become relatively well known. The easiness that comes from the preparation free method is of great advantage as well as the use of a simple SEM-BSE detector setup.

It is of utmost importance to be able to observe and quantify the defects in the epitaxy. Indeed, "When you can measure what you are speaking about, and express it in numbers, you know something about it" [START_REF] Thomson | Electrical units of measurement[END_REF]. By being able to quantify the defects by measuring them it is possible to put on strategies to decrease them.

Growth strategies to overcome intrinsic defects

This section will show that cracks and APBs are easy to control, while dislocations are another matter entirely. Still, as they are a show stopper for III-V CMOS technologies they need to be taken care of [START_REF] Claeys | Are extended defects a show stopper for future III-V CMOS technologies?[END_REF]. The following paragraphs will point out the established strategies that allow for a more suitable III-V material quality.

1.3.2.a Suppress cracks

As cracks appear above a certain thickness as presented before, the easiest option to suppress cracks entirely is to deposit a thin layer.

1.3.2.b Suppress antiphase boundaries

A specific topography with nanometric grooves is the result of APBs as seen on figure 1.21 (a). Those grooves are detrimental to a high degree because they cause a roughness which further prevents satisfactory growth of III-V materials. To suppress them different techniques are possible.

Growth on misoriented substrates Growth on misoriented Si(001) surfaces with a 4 °-6 °miscut angle towards a <110> direction allows to cancel the creation of APBs [START_REF] Akiyama | Growth of GaAs on Si by MOVCD[END_REF][START_REF] Akiyama | Growth of high quality GaAs layers on Si substrates by MOCVD[END_REF].

Still, this solution is not viable for industrial purposes. Indeed the orientation difference on those substrates with standard nominal silicon wafers cause the existing treatment processes unusable, for example the oxidation and etching speeds can be different, surface reactivities can also change, etc. Nevertheless, Dr Baron's group at LTM managed to obtain a surface preparation of nominal

Surface preparation of nominal silicon substrate

III-V materials integration challenges on silicon

Si(001) that enables doubles steps formation and prevents APBs nucleation [START_REF] Alcotte | Epitaxial growth of antiphase boundary free GaAs layer on 300 mm Si(001) substrate by metalorganic chemical vapour deposition with high mobility[END_REF][START_REF] Martin | Toward the III-V/Si co-integration by controlling the biatomic steps on hydrogenated Si(001)[END_REF].

Surface structuration of nominal silicon substrate

In epitaxy by aspect ratio trapping, some studies have suggested that the use of V-grooved Si [START_REF] Akiyama | Growth of high quality GaAs layers on Si substrates by MOCVD[END_REF] surfaces is effective to hinder APBs creation [START_REF] Guo | Selective metal-organic chemical vapor deposition growth of high quality GaAs on Si(001)[END_REF][START_REF] Merckling | Heteroepitaxy of InP on Si(001) by selectivearea metal organic vapor-phase epitaxy in sub-50 nm width trenches: The role of the nucleation layer and the recess engineering[END_REF]. This structuration was then applied on blanket wafers [START_REF] Li | Growing antiphase-domain-free GaAs thin films out of highly ordered planar nanowire arrays on exact (001) silicon[END_REF]. To make the structuration a <110> direction orientated SiO 2 stripe pattern is made. Then,the samples were immersed in a 45% KOH solution at a temperature of 70 °C for 15 s to form V-grooved [START_REF] Akiyama | Growth of high quality GaAs layers on Si substrates by MOCVD[END_REF] facets at the bottom of the trenches, afterwards, GaAs nanowires are grown inside the trenches. In a second step, the SiO 2 stripe pattern is removed by buffered oxide etch (BOE) and eventually a coalesced GaAs film is grown on top of that allowing for a low roughness layer to be grown as seen in figure 1.22 [START_REF] Li | Growing antiphase-domain-free GaAs thin films out of highly ordered planar nanowire arrays on exact (001) silicon[END_REF]. The suppression of APBs leads to an improvement of electrical and optical properties. One can outline the following: electron mobility is 10 times higher without APBs and photoluminescence (PL) intensity of GaAs without APBs and 3 times the PL intensity of GaAs with APBs.

It is directly correlated to the APBs acting as non-radiative recombination centres. Moreover, The PL peak without APBs is 40% narrower than with APBs [START_REF] Alcotte | Epitaxial growth of antiphase boundary free GaAs layer on 300 mm Si(001) substrate by metalorganic chemical vapour deposition with high mobility[END_REF].

1.3.2.c Limit dislocations impact

Threading dislocation (TDs) formation is the most severe problem when depositing III-V materials on silicon. TDs hinder a good material quality, hence, the luminescence of the active part, consisting of quantum wells or dots, is greatly diminished as recombination can happen in those defects. The electrical characteristics as the threshold current density are also greatly impacted by their presence [START_REF] Liu | Origin of defect tolerance in InAs/GaAs quantum dot lasers grown on silicon[END_REF]. Still, more and more studies show that the TDD impacts a lot on the lifetime of III-V lasers on silicon [START_REF] Jung | Impact of threading dislocation density on the lifetime of InAs quantum dot lasers on Si[END_REF]. Therefore, it is of the utmost importance to prevent their presence inside the active part of a laser or at least to limit their impact.

Buffer engineering

To avoid the formation of TDs, an alternative to direct growth on nominal silicon substrate is the use of an intermediate epitaxial layer which, forms a near-GaAs lattice constant but has hardly any defects. For instance, one can take Lee et al. from UCL example [START_REF] Lee | Continuous-wave InAs/GaAs quantumdot laser diodes monolithically grown on Si substrate with low threshold current densities[END_REF], they use germanium as an ideal "virtual substrate", which, only has 0.08% mismatch to GaAs, there is also matched thermal expansion between GaAs and Ge, and complete miscibility between Ge and Si. Same example with Rajesh et al. from Tokyo University [START_REF] Rajesh | Electroluminescence at 1.3 µm from InAs/GaAs quantum dots monolithically grown on Ge/Si substrate by metal organic chemical vapor deposition[END_REF] who use a Ge inter-layer of 2 µm for the same purpose and Bowers et al. from UCSB who used a 150 mm Ge-on-Si substrate with 500 nm of Ge grown by chemical vapour deposition was used [START_REF] Liu | High performance continuous wave 1.3 µm quantum dot lasers on silicon[END_REF].

Defect filter layers Eventually, another way of limiting the propagation of TDs into the III-V active region and lead to surface degradation is to introduce defect filter layers (DFLs) [START_REF] Tang | 1.3µm InAs/GaAs quantum-dot lasers monolithically grown on Si substrates using InAlAs/GaAs dislocation filter layers[END_REF][START_REF] Shi | Continuous-wave optically pumped 1.55 µm InAs/InAlGaAs quantum dot microdisk lasers epitaxially grown on silicon[END_REF]. These DFLs allow to significantly reduce the density of propagating TDs. Nowadays, strained layer superlattices (SLSs) are developed as DFLs as Tang et al. from UCL do it [20]. From figure 1.23 (a) one can see that most of the dislocations are trapped near the GaAs/Si interface due to self annihilation. Yet, lots of them are still propagating towards the active region. However it can be noted from the same image that SLSs permit an enhanced annihilation of TDs.

Defect filter layers are here made of wells but can also be made from quantum dots as seen on figure 1.23 (b). The dots produce a strain field which allows the bending of dislocation and hence a greater chance of recombination and hence disappearance as stated by Shi et al. [START_REF] Shi | Epitaxial growth of high quality InP on Si substrates: The role of InAs/InP quantum dots as effective dislocation filters[END_REF].

They demonstrate high quality growth of InP on Si via the use of InAs/InP quantum dost (QDs) dislocation filters. They state that for a certain QD height the dislocation filtering is effective

III-V materials integration challenges on silicon

to reduce the TDD from 1.5x10 9 cm -2 approximately to 3x10 8 cm -2 .

Silicon lattice matched III-V semiconductors A german company NAsP and the materials science and physics division of the Philipps-University in Marburg developed a unique approach to suppress lattice mismatch impact, it consists of using silicon lattice matched III-V semiconductors.

They managed to grow a GaP layer free from dislocations, stacking faults, twins and/or antiphase disorder on a Si homoepitaxial buffer by MOCVD in a two step process. They showed that a thin and low temperature GaP nucleation layer has to be deposited in flow rate modulated growth mode to achieve a charge neutral interface and two-dimensional growth. A GaP layer grown at high temperature on this nucleation layer results in self-annihilation of the remaining antiphase domains. This defect-free GaP layer that they managed to grow could later serve as a template for subsequent integration of III/V device structures on Si (001) substrates [START_REF] Volz | GaPnucleation on exact Si (001) substrates for III/V device integration[END_REF]. Closer in time they published a study on lattice matched MOCVD Ga(NAsP)/(BGa)(AsP) multi quantum well heterostructures for the monolithic integration of laser structures on (001) Si-substrates [120], yet, with these materials they can't yet manage to go below the silicon bandgap hence they are working on quaternary or ternary materials containing bismuth as Ga(AsBi), Ga(NAsBi) or Ga(PAsBi) [START_REF] Nattermann | Exploiting strain to enhance the Bi incorporation in GaAs-based III/V semiconductors using MOVPE[END_REF].

Epitaxial lateral overgrowth Another strategic approach to grown InP on Si or also Ga x In 1-x P is to use the epitaxial lateral overgrowth (ELO) technique as Lourdudoss et al. from RIT-KTH work with. One can effectively filter out TDs by maintaining a high-aspect-ratio between the opening size and mask thickness resulting from the defect-necking effect, which happens when epitaxial growth of materials restrict in a high-aspect-ratio structure. Figure 1.24 presents the schematics of ELO technique. Therefore, defect-free top surface layer can be achieved, [START_REF] Lourdudoss | Heteroepitaxy and selective area heteroepitaxy for silicon photonics[END_REF][START_REF] Wang | III-Vs on Si for photonic applications-A monolithic approach[END_REF][START_REF] Zhou | On-chip light sources for silicon photonics[END_REF][START_REF] Omanakuttan | Epitaxial lateral overgrowth of G a x I n 1-x P toward direct G a x I n 1-x P /Si heterojunction[END_REF]. Aspect ratio trapping Another method allowing to minimize the effects of dislocations, is the Aspect Ratio Trapping method which "ambushes" dislocations due to the geometry of the cavities where the selective epitaxial growth of the III-V material is performed. This method can be used for InP/Si growth, or GaAs/Si.

This approach allow to block inside the cavities some of the threading dislocations and planar defects propagating perpendicularly to the trench direction. Still, a few structural defects propagate through the film as one can see on the figure 1.25. Accordingly, they will propagate to the surface and not end on the cavity's sidewalls. Hence, non-radiative recombination centres are still present and degrade the luminescence.

Eventually Cipro et al. from LTM [START_REF] Cipro | Low defect InGaAs quantum well selectively grown by metal organic chemical vapor deposition on Si(100) 300 mm wafers for next generation non planar devices[END_REF] used ART in SiO 2 cavities to grow GaAs. They managed besides confining TDs in the cavities to annihilate almost all the APB domains for an aspect ratio as low as 1.3 without using any prior surface preparation. They also had a good thickness uniformity from trench to trench. Eventually, there was extended defect-free III-V material at the top of cavities. An image of the trenches is displayed on figure 1.26.

Furthermore, there is another possibility which can furthermore reduce the impact of defects.

One could open the bottom of the cavities using selective etching so as to make ( 111) planes appear at the bottom of the trench. This technique which is referred to as v-groove patterning is used by IMEC as shown in figure 1.27. Indeed, V-grooving the silicon at the bottom of the trenches could allow more defects to be trapped inside the cavity. This would happen due to the angle the defects make with the substrate and on which they propagate.

Using the same method Kunert et al. from IMEC [START_REF] Kunert | III/V nano ridge structures for optical applications on patterned 300 mm silicon substrate[END_REF] but with GaAs/Si(001) manage to confine the TDs on (110) box's sidewalls as shown on figure 1.27. Yet, one can still see that planar defects such as twins are still an issue.

They are many techniques to reduce the dislocation density, in order to have the best working laser possible. Obviously, if one wants to lessen their impact on the laser efficiency, it is straightforward to use techniques to lessen them. However, it is also possible to combine the methods to reduce dislocations to an active medium less sensitive to defects: quantum dots.

Active layer, quantum wells versus quantum dots

As it was previously explained in section 1.1.4.e, a laser is nothing else than p-i-n junction, which contains an active medium inside the intrinsic part. The active layer has exhibited several optimizations around the years. The first type of active layers were homojunctions until now, were double heterostructure made of quantum wells are the norm. In the currently used commercial PIC quantum wells have been the active medium of choice. Nevertheless, quantum dots have a great future in front of them.

Indeed, on major advantage of quantum dots is that they happen to be less sensitive to defects as opposed to quantum wells [START_REF] Gerard | Semiconductor structure for optoelectronic components with inclusions[END_REF][START_REF] Mi | High-performance quantum dot lasers and integrated optoelectronics on Si[END_REF][START_REF] Liu | Long-wavelength InAs/GaAs quantum-dot laser diode monolithically grown on Ge substrate[END_REF][START_REF] Liu | Quantum dot lasers for silicon photonics[END_REF][START_REF] Liu | Reliability of InAs/GaAs quantum dot lasers epitaxially grown on silicon[END_REF]. If dislocations propagate towards the active medium, in the case of quantum wells they will tend to kill the whole quantum well.

As seen from figure 1.28 (a), in the case of quantum dots, as they are small defined structures they will either kill a small number of quantum dots or they can be pinned or propelled away from QDs, therefore, not impacting them. Their size has also a major impact on their electronic properties which makes them very good candidates in terms of performance.

Whereas, quantum wells are 2Dimensional structures where, electrons are confined in one direction, quantum dots are 0Dimensional structures where electrons are confined in three directions. From figure 1.28 (b) one can see their respective density of states (DOS) function: stepwise for quantum wells and discrete for quantum dots. Due to the discrete form of quantum dots DOS function their efficiency is greater on a number of parameters. Thus, quantum dots are prepared to become a base for low-cost, low threshold, high output, and heat sink free lasers for the 1.3µm and 1.55µm communication band [START_REF] Deppe | Quantum dot laser diode with low threshold and low internal loss[END_REF][START_REF] Arakawa | Multidimensional quantum well laser and temperature dependence of its threshold current[END_REF][START_REF] Sugawara | Quantum dot devices: Handling the heat[END_REF][START_REF] Hospodkova | Capping of InAs/GaAs quantum dots for GaAs based lasers[END_REF].

Quantum dots exhibit lower threshold currents and higher temperature operation which is due to the unique three-dimensional carrier confinement of quantum dots.

Ultimately, by being less sensitive to defects, exhibiting lower threshold currents [START_REF] Bimberg | Quantum dots: promises and accomplishments[END_REF] and higher temperature operation [START_REF] Kageyama | Extremely high temperature (220 °C) continuous-wave operation of 1300-nm-range quantum-dot lasers[END_REF], QDs lasers mean time to failure (MTTF) is higher than the one of quantum wells [START_REF] Van Der Ziel | Degradation of GaAs lasers grown by metalorganic chemical vapor deposition on Si substrates[END_REF]134,135,[START_REF] Groenert | Improved room-temperature continuous wave GaAs/AlGaAs and InGaAs/GaAs/AlGaAs lasers fabricated on Si substrates via relaxed graded GeSi buffer layers[END_REF][START_REF] Liu | Reliability of InAs/GaAs quantum dot lasers epitaxially grown on silicon[END_REF]. The references presented here come from the following papers [START_REF] Windhorn | Room-temperature operation of GaAs/AlGaAs diode lasers fabricated on a monolithic GaAs/Si substrate[END_REF][START_REF] Sakai | Room-temperature laser operation of AlGaAs/GaAs double heterostructures fabricated on Si substrates by metalorganic chemical vapor deposition[END_REF][START_REF] Fischer | Low threshold laser operation at room temperature in GaAs/(Al,Ga)As structures grown directly on (100)Si[END_REF][START_REF] Van Der Ziel | Degradation of GaAs lasers grown by metalorganic chemical vapor deposition on Si substrates[END_REF][START_REF] Deppe | Room-temperature continuous operation of p-n Al x G a 1-x As -G a As quantum well heterostructure lasers grown on Si[END_REF][START_REF] Deppe | Stability of 300 K continuous operation of p-n Al x G a 1-x As -G a As quantum well lasers grown on Si[END_REF][START_REF] Razeghi | First cw operation of a G a 0.25 I n 0.75 As 0.5 P 0.5 -I nP laser on a silicon substrate[END_REF][START_REF] Chong | Low-threshold operation of AlGaAs/GaAs multiple quantum well lasers grown on Si substrates by molecular beam epitaxy[END_REF][START_REF] Sugo | Stable cw operation at room temperature of a 1.5 µm wavelength multiple quantum well laser on a Si substrate[END_REF][START_REF] Egawa | AlGaAs/GaAs laser diodes with GaAs islands active regions on Si grown by droplet epitaxy[END_REF][START_REF] Kazi | Growth of I n x G a 1-x As quantum dots by metal-organic chemical vapor deposition on Si substrates and in GaAs-based lasers[END_REF][START_REF] Mi | High-performance quantum dot lasers and integrated optoelectronics on Si[END_REF][START_REF] Wang | 1.3µm InAs/GaAs quantum-dot lasers monolithically grown on Si substrates[END_REF][START_REF] Liu | High performance continuous wave 1.3 µm quantum dot lasers on silicon[END_REF][START_REF] Tang | 1.3µm InAs/GaAs quantum-dot lasers monolithically grown on Si substrates using InAlAs/GaAs dislocation filter layers[END_REF][START_REF] Lee | Continuous-wave InAs/GaAs quantumdot laser diodes monolithically grown on Si substrate with low threshold current densities[END_REF][START_REF] Chen | Electrically pumped continuous-wave III-V quantum dot lasers on silicon[END_REF]. Reproduced from [44].

Specifications for this study 1.3.4.a Main requirements

In this thesis, the aim is to respond to the need of a laser source for telecom and datacom applications, though, other applications will be addressed. It is currently of interest to integrate the laser directly onto a silicon photonic chip. The reduction of dislocation density is of utmost importance, so as not to hinder the efficiency of the device while, it is grown on top of silicon. Industrialisation is also an important requirement as the device aims at being compatible with CMOS processes hence the MOCVD method will be of choice.

1.3.4.b Chosen Approach

To achieve a directly integrated light emitting structure grown onto silicon several blocks had to be studied. As the structure of the manuscript is already presented in the introduction , here the different technological bricks that are studied are only briefly reminded. The technological bricks are first developed by blanket epitaxy or as it will is referred to, 2D growth, as described in the following chapter 2. Simulations for three different stacks are provided and afterwards the lacking materials are developed by 2D growth. Later on, as it is important to reduce the dislocation density inside the active layer the selective epitaxial growth technique combined to aspect ratio trapping method or as it is referred to, 3D growth, is deemed the most compact and efficient. Thus becoming the following thing to master as explained in chapter 3. Eventually, to achieve light-emitting structures, design and processing of the grown 2D III-V layers are realized in chapter 4. This allows to test the stacks and have references when the emitting devices from 3D grown structures will be realized in future projects.

Technological bricks development: from stack definition to materials

In order to develop all the materials needed to grow diode lasers in patterned templates, the different technological bricks necessary to do so will be discussed. Here, several applications will be addressed: biophotonics, lidar, telecom and datacom. Each of those applications have wavelength ranges of interest ranging from 650 nm up to 1550 nm. Here, the wavelength ranges of interest to respond to the various concerned applications will be 650-750 nm, 900-1000 nm, 1260-1360 nm and 1530-1625 nm. For each wavelength range a material couple will be of interest. However, firstly one needs to know the particularities of the epitaxy reactor used in this study, as this will set the requirements for the materials realization. Then, it will be possible to extract via simulation the best achievable stacks while taking into account the specifications. Afterwards, some preliminary requirements to the development of selective epitaxial growth will be shown. This will cover doping process points for the cladding layers, contact resistivity and active regions material developments.

Specifications of the used MOCVD cluster tool

They are several methods to grow materials, MOCVD is the chosen method for reasons previously described in chapter 1. The equipment used in this work is an Applied Materials cluster tool. It therefore differs from most AIXTRON, Veeco and AMEC systems used nowadays for MOCVD.

Cluster tool presentation

The cluster tool allows to process up to 300 mm wafers. This cluster tool, consists of 7 parts shown in figure 2.1. Two load locks used for loading and unloading, a transfer chamber through which a robot transfers the wafers to the different chambers, a Pfeiffer ex Adixen case allowing manual transfer under vacuum conditions to other equipments, a SiCoNi preclean chamber, an epitaxy reactor allowing the deposition of III-V materials possibly doped, a gaspanel containing the organometallic precursors and an additional plasma chamber.

Here, only the SiCoNi chamber, the gaspanel and the epitaxy reactor will be discussed. The system only allows for a single wafer to be processed in each of the chambers, however, the chambers can run simultaneously. A silicon wafer which has to undergo an epitaxy starts its journey in a Front Opening Unified Pod (FOUP) which can contain up to twenty-five 300 mm wafers. The FOUP is loaded onto one of the load locks, one wafer selected by the user is then taken to the SiCoNi chamber for surface cleaning.

SiCoNi™pre-clean chamber

Before any epitaxy, it is of utmost importance to ensure an atomically clean surface. Indeed, any contamination will lead to major defects in the epitaxial layer. In contact with air a native oxide is formed on the silicon wafer surface, this can therefore become an issue. Thus, one needs to get rid of the native oxide on the silicon wafer surface. They are numerous ways to remove this native oxide from the silicon surface, as for instance HF-based treatments. However, a SiCoNi module for pre-clean which was patented in 2005 [START_REF] Kao | In-situ dry clean chamber for front end of line fabrication[END_REF] will be used.

The SiCoNi chamber relies on a deported NH 3 /NF 3 plasma which creates reactive by-product species NH 4 F and/or NH 4 HF 2 . When in contact with silicon oxide these species react and form a thin solid layer of (NH 4 F) 2 SiF 6 on the surface of the substrate and NH 3 and H 2 0 products. This thin solid layer of (NH 4 F) 2 SiF 6 is then removed by sublimation around 100 °C. The sublimation transforms the thin solid layer into volatile products NH 3 , HF and SiF 4 , which are evacuated from the chamber.

The advantage of this cleaning process is that after the SiCoNi treatment, the wafer stays in the controlled environment of the cluster tool, not entering in contact with air. It also allows a fast processing as immediately after de-oxidation the wafer enters the epi chamber. Eventually, as the process is at low temperatures it will keep the pattern morphology for patterned wafers.

When the wafer has finished being cleaned, it switches to the epitaxy chamber through the transfer chamber.

Epitaxy chamber

The MOCVD reactor is formed by two dome-shaped quartz, superior and inferior between which the wafer is inserted. The wafer sits on top of a graphite susceptor covered by a silicon carbide, SiC, layer rotating at 32 rotations per minute (RPM). The susceptor is heated by a bench of lamps located below the lower dome.

Heating is realized by a bottom module containing up to 200 lamps placed in 6 concentric rings. Lamp use allows for fast temperature ramps of 5 °C/s upwards. Temperatures ranging from 350 °C to 980 °C can be attained with this system. The temperature is measured by four pyrometers, two located upon the upper dome measuring the emission from the wafer, two located beneath the lower dome, measuring the emission from the bottom of the susceptor. The temperature is controlled by the bottom pyrometers through a proportional-integralderivative (PID) control loop.

The chamber runs in a pressure range from 1 Torr to atmospheric pressure. The gas flow is horizontal and flows on the surface of the 300 mm silicon substrate.

The gases which are used in the MOCVD reactor are listed here after.

2.1.3.a Used gases

• The carrier gas: hydrogen, H 2

• The organometallic precursors for column III materials:

Aluminium precursor: trimethylaluminium or TMAl, Al(Ch 3 ) 3

Gallium precursor: trimethylgallium or TMGa, Ga(Ch 3 ) 3

Indium precursor: trimethylindium or TMIn, In(Ch 3 ) 3 • Cleaning gases to clean the chamber between two runs. Clore, Cl 2 mixed with nitrogen gas N 2

All the gases for the epitaxy are diluted in the carrier gas, hydrogen.

The organometallic precursors are stored in cylinders in form of bubblers for liquid sources (all but TMIn source in this case) which are maintained at constant temperature and pressure.

For the solid source, here TMIn, it is in the form of an agglomerated powder packaged in similar designed bubblers as liquid sources. The carrier gas is passed through the bottom of the material by a dip tube, the carrier gas then transports the source material into the reactor [START_REF] Zilko | Metal organic chemical vapor deposition[END_REF] as illustrated on figure 2.2. It was shown that by using bubblers and a small carrier flow approach, the reagent flow can be accurately controlled and predicted over a wide range [START_REF] Hersee | The operation of metalorganic bubblers at reduced pressure[END_REF]. Once the carrier gas has exited the bubbler mixed with source material, the flow runs to the epitaxy chamber where the growth will proceed.

2.1.3.b Growth transports and mechanisms

Once the species enter the reactor they come into contact with the wafer and decompose into solid elements, which forms the film, and gaseous elements which are pumped to the exhaust and then burned in a scrubber. The simplified reaction can be written as follows:

R n I I I (v) + V R n (v) → (I I I -V )(s) + nRR (v) (2.1)
R et R represent the groups methyl (CH 3 ) et ethyl (C 2 H 5 ), III and V represent elements III and V respectively. If the compound is noted (v) it is in the vapour phase if noted (s) it is in the solid phase. The reaction was adapted from [START_REF] Zilko | Metal organic chemical vapor deposition[END_REF].

The gaseous compound nRR is a by-product of the reaction which is exhausted, whereas, the product III-V constitutes the solid thin deposited on top of the substrate.

However, the reaction is more complex than this simple equation as one can see from figure 2.3. Previous reactions to the one cited occur in the vapour phase as polymer formation and pyrolysis of the precursor.

Once the surface reaction has happened other processes come into play resulting in the incorporation of the molecule into the solid.

2.1.3.c Growth kinetics and growth rate dependency on process parameters

Indeed, the growth of thin layers involves a few steps, the adsorption and desorption of species at the surface of the substrate, surface reactions of the species, surface diffusion of the species, attachment to a nucleation site, incorporation into bulk and finally desorption of products and diffusion away from the interface. These parameters can be changed by changing the process parameters.

When using MOCVD several process parameters can affect the growth rate of the compound: the temperature, the flow rate of precursors, the deposition pressure and the choice of active and carrier gases. These parameters will influence arrival of the precursors molecules onto the substrate however, also the desorption of species present on the substrate. As a result one can observe three temperature dependent regimes in MOCVD as shown in figure 2.4.

A low temperature regime, also know as kinetic regime where the growth rate strongly depends on the temperature. This regime is reaction limited by the precursor's decomposition as well as the availability of free sites and by the desorption of the species which are on the surface, which is thermally activated. The deposition rate varies exponentially with the reverse temperature according to the Arrhenius equation.

A plateau regime, also know as diffusion regime between high and low temperature regimes: where the growth rate is limited by the transport of gaseous precursors to the substrate. It tends to saturate therefore, depending weakly on the temperature. The growth rate is only dependent on the precursor's flow.

A high temperature regime, also known as desorption regime. Due to the very high temperatures species start desorbing from the surface or react in the vapour phase. The growth rate is [START_REF] Kräutle | Investigations on low temperature MO-CVD growth of GaAs[END_REF], (c) [START_REF] Gottschalch | Epitaxial deposition of GaAs in the Ga(CH 3 ) 3 AsH 3 H 2 system (II). investigations on the hetero-epitaxy of GaAs on Ge[END_REF] and (d) [START_REF] Leys | A study of the growth mechanism of epitaxial GaAs as grown by the technique of metal organic vapour phase epitaxy[END_REF]. Reproduced from [START_REF] Zilko | Metal organic chemical vapor deposition[END_REF].

once again dependent on the temperature.

In this study the growth will mainly happen in the plateau regions around 550 → 650 °C.

Once the wafer has been processed in the epi chamber it is unloaded and taken back to the FOUP.

Eventually, between each epitaxy run an in-situ cleaning process is ran to etch the deposited coating on the quartz domes. Actually, when the wafer is heated at around 600 °C, the domes heat up to 400 °C, thus, some material is deposited onto them, leading to some specifications on the deposited layers.

Specifications on the deposited layers

When depositing material onto a substrate, the upper dome also becomes coated with material. This becomes an issue when depositing thick layers. Surely, the thicker the deposited material the harder it becomes for the top pyrometers to get an actual information of the real temperature of the wafer. This leads to variable growth results after a certain deposited thickness. As a consequence, in this chamber it is not possible to deposit more than 900 nm of III-As at once and for III-P the thickness is even lower at 300 nm. In order to be able to deposit sufficiently thick layers to envision the possibility of laser making, it is possible to decompose the epitaxy into several steps between which a clean of the chamber is done. This could allow us to get close to the thicknesses everyone uses for this type of device (between 2.5 and 5 microns as shown in figure 2.5). Obviously this thickness does not account for the buffer layers and the dislocation filters.

However, other concerns arise. First,when rotating between epitaxy and cleans the process becomes longer and longer as the clean lasts about 30 min. Last but not least, the V element precursor consumption becomes dramatic. Most of the precursors present in the gaspanel come in 1 kg bubblers. A GaAs epitaxy of 800 nm costs around 10 g of TBAs. If one needs to make a 2 µm thick layer one needs 25 g of precursor. Yet, The bubbler only has 1 kg of it hence, leading to the possibility of making only forty times 2 µm GaAs thick layers with one bubbler. This is unsustainable to say the least.

Consequently, it was hence decided as a major specification to use at most two epitaxy runs separated by a chamber clean. This demands devices heights no higher than a rounded 2 µm at most for arsenides compounds.

Moreover, quaternary alloys development was not the topic of this thesis and thus, were not studied.

Once the specifications on the deposited layers are given, one can imagine the stacks needed for the future devices.

Stacks definition for the different applications

From chapter 1, one could see that they were several improvements to laser diodes from double heterostructures to multiple quantum well heterostructures using either quantum wells or further on quantum dots. In the following sections the multiple quantum well option will be addressed as well as some quantum dot options. First, a brief review of the literature will be made for each range of emitting wavelengths. This will show that the structures where designed in regards to what already exists. However, those structures will be tuned afterwards to respond to the specificities of the epitaxy chamber used throughout this study. Afterwards, the simulations will be presented, while taking into account the need for specific thicknesses. Finally, the best structures will be presented with preliminary requirements necessary to the selective epitaxial growth.

Existing stacks in literature

As the MOCVD reactor imposes a specification on the deposited thickness, it is important to acknowledge the fact that it is a harsh, challenging requirement to respect. The following figure 2.5 presents an overview for different emission wavelengths of the different thicknesses that several devices exhibit.

As seen from figure 2.5, independently on the emission wavelength of the considered devices the stack thicknesses that exist are at leat 2.5 µm. Obviously, the thicknesses presented on figure 2.5 do not take into account the buffers and dislocation filters so as they are comparable if made on III-V or silicon substrates. Moreover, the thickness is not dependant on the active part materials use. Indeed, it does not appear directly in the figure but the references cover a wide range of III-V materials, from ternary and quaternary alloys in the form of quantum wells as well as quantum dots. The 500 nm difference that our stacks will have as compared to the thinner ones presented here will suffer from several burdens that are dependent on the design parameters chosen for the future devices.

Design parameters for the future devices

In the future devices the contacts will be integrated in a "standard" way, with a p-type contact taken at the top of the structure, and a bottom n-type contact taken on the side of the structure as illustrated in figure 2.6 or beneath the substrate as a second option if the substrate is doped.

Therefore, this will have an effect on the stack design. Concerning the n-contact the best option is to etch a mesa and be able to position it on the top of the n-contact layer to decrease the access resistance. For the simulations, this will be the used option. However, for the p-contact, there is a risk of contact shadowing that will disrupt the optical mode in the cavity and therefore, hinder the efficiency of the device. Indeed, usually thick layers are required between top contact and active layer to allow the current to spread out from under the top contact and reduce contact shadowing [START_REF] Steranka | Chapter 3 AlGaAs red light-emitting diodes[END_REF].

Undeniably, there is a need for cladding layers to confine the mode optically. Nonetheless, the structure needs to be thinner than 2 µm to respect the specifications. For that reason, the cladding layers were minimized as much as possible while keeping into account that they will serve as optical confinement layers as well as current spreading layers.

Obviously, an important application of lasers currently is the telecom and datacom industries in the 1310 nm and 1550 nm wavelength ranges. However, they are other applications that are of interest as it was previously explained in chapter 1. Two other applications are here of interest biophotonics [START_REF] Müller | Diode laser based light sources for biomedical applications[END_REF] in the red region of the spectrum in the 650 nm -750 nm range and lidar in the 900 -1000 nm range.

Two of those applications, biophotonics and lidar allow for a facilitated integration of the materials onto GaAs as the alloys used will be almost lattice matched to GaAs. This will not regenerate more dislocations than the ones already present during the GaAs buffer layer epitaxy. Hence, those two first wavelengths of interest present some interesting applications as well as an easier material integration. For the 1550 nm wavelength, two versions will be presented, a quantum well version and a quantum dot version. However, for the 1310 nm application only a quantum dot version will be shown.

Currently, in photonics most of the designs are historically based on intuition-based approaches from what the influential parameters are [START_REF] Molesky | Inverse design in nanophotonics[END_REF]. That is to say, that the need for new devices is developed from an a priori known physical effect, and then specific features are matched to suitable applications by tuning small sets of characteristic parameters [START_REF] Molesky | Inverse design in nanophotonics[END_REF]. As this approach has given rise to number of successful components over the years, the stacks designs will here be inspired from the literature.

Simulation parameters

The simulations were made using RSOFT-LaserMOD software. More precisions on the simulation flow are given in appendix 4.5. For all the simulations presented here the parameters were defined as follows:

• Ambient temperature of 300 K;

• Cavity width of 1 µm to reproduce the full-sheet grown layers and of 300 nm to reproduce the selectively area grown layers;

• Cavity length of 500 µm;

• Low reflectivity facet of 30%;

• High reflectivity facet of 90%

• Waveguide loss of 5 cm -1

• SCH of 50 nm;

• Barriers of 10 nm;

• Quantum well of 5 nm.

The thickness of barriers and quantum wells were set to specific dimensions as they mostly will not impact the challenges faced here. Their change will impact the wavelength of emission but not the overall mode confinement inside the structures as well as the contact shadowing.

Red emission, 650 -750 nm range

In order to make red laser diodes several optimizations were reported in literature over the years. The first visible light emitting diodes (LEDs) were made out of GaAsP grown on top of GaAs wafers. However, due to the large lattice mismatch with GaAs lots of defects were added to the layers. This is a non-existent concern with AlGaAs as it is almost completely matched to GaAs. Hence, AlGaAs double heterostructures were used at the beginning [START_REF] Yamamoto | Roomtemperature cw operation in the visible spectral range of 680-700 nm by AlGaAs double heterojunction lasers[END_REF]. Further on, AlGaAs and GaAs SQW structures were used [START_REF] Hayakawa | High reliability in AlGaAs laser diodes prepared by molecular beam epitaxy on 0.5°-misoriented (111)B substrates[END_REF]. Then, AlGaAs and GaAs multiple quantum well structures were grown [START_REF] Hayakawa | Lowthreshold room-temperature cw operation of (AlGaAs) m (GaAs) n superlattice quantum well lasers emitting at ∼680 nm[END_REF]. Nowadays, quaternary alloys as AlInGaP [START_REF] Streubel | High brightness visible (660 nm) resonant-cavity light-emitting diode[END_REF][START_REF] Kaspari | Growth parameter optimization of the GaInP/AlGaInP active zone of 635nm red laser diodes[END_REF] are used which allows for a bandgap tuning while, being lattice matched to the substrate. As quaternary alloys are out of scope for this study, AlGaAs alloys were of interest.

2.2.4.a First try at a structure

In a first step, it was intended to make structures with what was already developed. The inspiration for the stack came for numerous reports of multiple quantum well structures emitting at 850 nm with AlGaAs/GaAs MQW active layer [START_REF] Iwamura | Dynamic behaviour of a GaAs-AlGaAs MQW laser diode[END_REF][START_REF] Herrmann | Reduction of mirror temperature in GaAs/AlGaAs quantum well laser diodes with segmented contacts[END_REF]. First, with the simulation, it was indisputable that the material gain in the active part was inexistent as seen from figure 2.8(a). Indeed, it is at most equal to zero. This cannot allow for an emission to take place in the structure. Afterwards, the mode is split in two on each side of the active layer, as illustrated in figure 2.8(b) also rendering any emission impossible. Eventually, it is undeniable that even if the material gain and the mode were to be satisfying, the severe 2D electron (e -) and hole (h + ) gases at the edges of the active part, shown as saturation peaks in figure 2.8(c) could lead to sufficient radiative recombination inside the active part.

From all of these observations a total revision of the structure was compulsory.

2.2.4.b Revision of the structure

The first step was to understand from what the observed issues arose. Let us begin with the material gain issue. One can define the material gain per unit length as the proportional growth of the photon density as it propagates along some direction in the crystal, here along the ridge length, this can then be related to the net generation of photons per unit volume via the transition rate equations [START_REF] Coldren | Diode Lasers and Photonic Integrated Circuits[END_REF].

Moreover, 2D electron and hole gases were observed. Those gases are mostly due to the high energy barrier that has to be overcome by the carriers between the contact layers and the active part. By keeping such a high barrier this prevents the recombination of the electron hole pairs in the active layer highly hindering any possible emission. This leads to a low rate of photon generation. From what was said in subsection 2. This split mode profile shows that here only the GaAs contact layers guide the mode. This is easily explained by the bandgap of the structure. Indeed, GaAs contact layers which are directly in contact with the active part have a smaller bandgap than the active region. Thus, it favours a mode splitting in the GaAs contact layers. To counterbalance the short bandgap of the contact layers, cladding layers are crucial for the optical confinement.

Another information to take into account is that contact shadowing is increased when the mobility of the underlying layers are low. For example, when increasing the Al content in AlGaAs layers the mobility drops. This makes the lowering of Al content in the AlGaAs cladding layers important in order to decrease their size [START_REF] Steranka | Chapter 3 AlGaAs red light-emitting diodes[END_REF].

Therefore, from these underlying issues it is possible to adapt the structure for another one presented on figure 2.9. Obviously, this newly designed structure is thinner than 2 µm to respect the specifications previously given.

For the new structure inspiration was taken from Nemoto et al. [START_REF] Nemoto | Monolithic-integrated two-wavelength laser diodes for digital-versatile-disk/compact-disk playback[END_REF]. First, cladding layers were added, in order to minimize the total thickness yet, having sufficient optical confinement while, reducing contact shadowing. Hence, two p-doped and n-doped Al 0.45 Ga 0.55 As cladding layers were added on each side of the active part. The active part was made of Al 0.30 Ga 0.70 As Figure 2.9 -Revised structure used for the optimization of the number of quantum wells for red emission.

QWs and Al 0.45 Ga 0.55 As barriers. The size of quantum wells and barriers was not optimized, due to them mostly impacting the emission wavelength. However, the number of quantum wells was optimized for the presented structure of figure 2.9.

2.2.4.c Optimization of the structure

For any simulated structure first the mode distribution and the gain calculation are to be computed. If they converge, one can run the full laser simulation. These individual steps allow to see if a mode is present inside the cavity and if the active part exhibits material gain before running the laser simulation.

The revised structure illustrated in figure 2.9 was used to optimize the number of quantum wells needed to enhance the laser output parameters. To discriminate the different results the two following parameters were used: mode confinement factor and the ratio between the power output and the injected current for a constant voltage: P out /I . Indeed, the simulation gives a series of discrete points at a given voltage with tiny variations in the injected current, that is why the ratio P out /I is presented rather than just P out for a constant voltage.

Starting with figure 2.10(a) the confinement factor follows an obvious linear rise when the number of quantum wells rises. However, the ratio P out /I is at first nought, from 1 to 5 QWs, then increases to a plateau value of 0.025, for 6 and 7 QWs, to eventually drop back for 8 QWs. Accordingly, the best point would be the integration of 7 QWs inside the structure which maximizes the confinement of the mode as well as the exhibiting one of the highest P out /I ratios. However, the thickness is a huge constraint hence, the chosen number of QWs was 6.

After optimizing the number of quantum wells in a given structure, a full laser simulation was done using the best point.

From the computation of mode and material gain exhibited in figure 2.11, one can naturally see that there is a mode present in the cavity and which is centred on the active part layer. The material gain is also highest around 1.82 eV or 681 nm and a spontaneous emission of the structure around 1.83 eV or 677 nm is observed. Thus, it is possible to run the full laser simulation. After running the full laser simulation one has access to a number of graphs.

Here, modal gain, carrier distribution as well as light-current-voltage and optical spectrum are presented for a constant voltage of 2V.

From figure 2.12(a) one can actually see that the highest point for the modal gain is around 1.82 eV. Compared to the material gain which also is around 1.82 eV, one can expect an emission of structure around 1.82 eV. It is also possible to notice from figure 2.12 that there is an important carrier injection in the quantum wells of the active region of the device. Furthermore, 2D gases have almost disappeared, apart from the interface with the GaAs contacts. However, during growth an aluminium concentration gradient can be made from GaAs to Al 0.45 Ga 0.55 As to replace the steep bandgap interface by a gradual bandgap change. The carriers will have an easier way of overcoming the change in bandgap. Afterwards, it was important to see how the mode would propagate inside a full structure grown either on a standard unpatterned wafer or on a patterned wafer. Contrary to the full laser simulation, the thickness of the contact layers was increased. Their size was raised up to the point of no-confinement of the mode in the structure. Thus, here are presented the maximum sized contact layers one can allow before the leakage of the mode. In figure 2.14 the fundamental mode is displayed. For both the integrations, one can see that there is almost no leakage of the mode inside the GaAs contact layers. In the ridge option presented in figure 2.14(b) the mode is really confined inside the structure, and seems to exhibit better characteristics than in the blanket structure. Indeed, it exhibits higher mode intensity in the quantum wells and lower leakage in the GaAs contact layers than in the blanket case. Yet, one can, observe a bit of leakage on the sides of the active layer in the air. However, this effect should be highly hindered with the selective epitaxial growth as the quantum wells will exhibit a special characteristic, which will be discussed in chapter 3.

For the following applications the same analysis was performed, nonetheless, only the mode distribution inside the cavities is shown. More information is presented in appendix 4.5.

Near-infrared emission, 900 -1000 nm range

As previously stated emission within the 900 nm -1000 nm range is interesting, mostly for lidar applications for example which in addition of using the 1550 nm wavelength also use 905 nm and 940 nm wavelengths. Indeed, those two wavelengths seem to exhibit better characteristics in terms of weather resistance [START_REF] Wojtanowski | Comparison of 905 nm and 1550 nm semiconductor laser rangefinders' performance deterioration due to adverse environmental conditions[END_REF] and lower prices [START_REF] Zhao | Recent development of automotive LiDAR technology, industry and trends[END_REF]. And even though 1550 nm lasers are presented as eye-safe due to the absorption by the cornea, lens, and aqueous and vitreous humours in the eye, it is only an emitted power perspective [START_REF] Mccally | Corneal endothelial injury thresholds for exposures to 1.54 µm radiation[END_REF][START_REF] Zuclich | Wavelength dependance of ocular damage thresholds in the near-IR to far-IR transition region: proposed revision to MPES[END_REF]. Furthermore, the longer the wavelength, the more possible scattering from atmospheric humidity there is, hence 1550 nm may require higher power for a given range [START_REF] Hecht | Automotive lidar: Safety questions raised about 1550 nm lidar[END_REF]. Hence, the arguments are not as straightforward as they seem. Therefore, there is still a major interest for shorter wavelengths.

A lot of literature was found for structures using InGaAs quantum wells with low In content [START_REF] Choi | InGaAs/AlGaAs strained single quantum well diode lasers with extremely low threshold current density and high efficiency[END_REF][START_REF] Bour | Low degradation rate in strained InGaAs/AlGaAs single quantum well lasers[END_REF][START_REF] Moser | High-power operation of strained InGaAs/AlGaAs single quantum well lasers[END_REF][START_REF] Hu | Lateral carrier diffusion and surface recombination in InGaAs/AlGaAs quantum-well ridge-waveguide lasers[END_REF][START_REF] Groenert | Monolithic integration of room-temperature cw GaAs/AlGaAs lasers on Si substrates via relaxed graded GeSi buffer layers[END_REF][START_REF] Groenert | Improved room-temperature continuous wave GaAs/AlGaAs and InGaAs/GaAs/AlGaAs lasers fabricated on Si substrates via relaxed graded GeSi buffer layers[END_REF]. The structure used here is very similar to the red emitting structure, with materials change. Demonstration of laser effects by optical pumping in the case of selective epitaxial growth also happen to exist [START_REF] Shi | Optical pumped InGaAs/GaAs nano-ridge laser epitaxially grown on a standard 300 mm Si wafer[END_REF].

The simulated structure is shown in figure 2.15. As for the red emitting structure, this one is also thinner than 2 µm to respect the specifications previously given. In figure 2.16 the distribution of the fundamental mode is shown for the blanket and SEG cases. For the full sheet case as compared to the red emission case there is more loss in GaAs contact layer, 5 decades of intensity more. In the ridge option presented in figure 2.14(b) the mode does not leak in GaAs contact layers. There is more leakage for the full sheet case, 5 decades more than the selective epitaxial case, even though it is significant, there still is a 10 decade difference in intensity compared to the maximum value. However, contrary to the red emission case there is a much more pronounced leakage in the surrounding air. However, this effect should be reduced as in the red emission case with the selective epitaxial growth as the quantum wells will exhibit the same special characteristic as the ones for the red emission, which will be discussed in chapter 3.

Short wavelength infrared emission, 1530 -1625 nm range

From chapter 1, emission around 1550 nm is really important for telecom and datacom applications, which are driving the change for photonic integrated circuits. Currently, quantum well options are a must [START_REF] Temkin | InGaAs/InP quantum well lasers with sub-mA threshold current[END_REF][START_REF] Zhu | Room-temperature electrically-pumped 1.5 µm InGaAs/InAlGaAs laser monolithically grown on on-axis (001) Si[END_REF][START_REF] Kawamura | InGaAs/InGaAlAs/InAlAs/InP SCH-MQW laser diodes grown by molecular-beam epitaxy[END_REF], but quantum dots [START_REF] Cornet | Impact of the capping layers on lateral confinement in inas/inp quantum dots for 1.55 µm laser applications studied by magnetophotoluminescence[END_REF][START_REF] Shi | Continuous-wave optically pumped 1.55 µm InAs/InAlGaAs quantum dot microdisk lasers epitaxially grown on silicon[END_REF][START_REF] Wan | Low-threshold continuous-wave operation of electrically pumped 1.55 µm InAs quantum dash microring lasers[END_REF] are becoming a new paradigm for this wavelength. SEG growth of such structures has been demonstrated [START_REF] Wang | Room-temperature InP distributed feedback laser array directly grown on silicon[END_REF]157,[START_REF] Megalini | 1550-nm InGaAsP multi-quantum-well structures selectively grown on v-groove-patterned SOI substrates[END_REF] and recently, the first optically pumped demonstrators have started to emerge [START_REF] Han | Continuous-wave lasing from InP/In-GaAs nanoridges at telecommunication wavelengths[END_REF][START_REF] Han | Room-temperature InP/InGaAs nano-ridge lasers grown on si and emitting at telecom bands[END_REF][START_REF] Han | Telecom InP/InGaAs nanolaser array directly grown on (001) silicon-on-insulator[END_REF].

Figure 2.17 -Revised structure used for the optimization of the number of quantum wells for L-band emission.

The simulated structure is shown in figure 2.17. As for the two previous simulated structures, this one is also thinner than 2 µm to respect the specifications previously given. In figure 2.18 the fundamental mode is displayed. For both the integrations, one can note that there is much more leakage in the contact layers in the full sheet case than in the two previous cases. For the full sheet epitaxy presented in figure 2.18(a), it is not possible to consider that the mode is well confined inside the stack. Yet, for the ridge option presented in figure 2.14(b) things improve for the same stack. Though, some minor leakage is seen in the air and in the contact layers. One can similarly hope as in the two previously presented cases that with the real selective epitaxial growth the leakage into air will be decrease due to the quantum wells growth, which will be showed in chapter 3. For this case, one could substitute the quantum wells by InAs quantum dots. Thus exhibiting similar optical characteristics while being less sensitive to defects.

For all the presented stacks, it is interesting to note that the SEG growth is much more favourable in terms of optical confinement. Yet, from all the previous defined stacks there are still some requirements to attain and some materials to develop.

Definition of the prerequisites

Here are only briefly presented what is needed to be able to grow the full stacks previously defined by simulation.

First, doping levels have to be on point, to get a good p-i-n structure. Most of the doping points were already developed in R. Alcotte's work [START_REF] Alcotte | Metalorganic vapour phase epitaxy of III-As semiconductors on silicon substrate and formation of ohmic contacts for photonic and radiofrequency applications on silicon[END_REF]. Still, AlGaAs:Si and AlGaAs:Zn doping levels are lacking to form the cladding layers. The data will just be completed to show that the wanted doping levels can be achieved.

Then, the contact resistivity for the metallizations that will be further used will be tested on the GaAs contact layers to be sure that it is low enough to consider diodes and laser diodes realization.

Eventually, compositional gradients will be developed to decrease the 2D electron and hole gases that were highlighted before. Added to that, quantum dot growth will be presented as a way to substitute to quantum wells for a lesser defect sensitivity.

Preliminary requirements

Most of the developments concerning the doping of the layers such as GaAs:Si and GaAs:Zn were already developed in a previous thesis [START_REF] Alcotte | Metalorganic vapour phase epitaxy of III-As semiconductors on silicon substrate and formation of ohmic contacts for photonic and radiofrequency applications on silicon[END_REF]. In this section the work which was done and the one described in the above mentioned manuscript [START_REF] Alcotte | Metalorganic vapour phase epitaxy of III-As semiconductors on silicon substrate and formation of ohmic contacts for photonic and radiofrequency applications on silicon[END_REF] will be briefly completed. Some doping points and contact resistivity measurements will be presented. This aims at showing that the contacts which will be further used in chapter 4 are of sufficient quality to not be the ones to hinder the efficiencies of the devices made.

Doping of AlGaAs and InP layers 2.3.1.a AlGaAs:Si and AlGaAs:Zn doping for n and p type cladding layers

The method used here to characterize the doping levels of the layers is the Van der Pauw Hall effect measurement [START_REF] Schroder | Semiconductor Material and Device Characterization[END_REF]. The method consists of two stages: a resistivity measurement and a carrier concentration measurement using Hall effect. For the resistivity measurement, from the schematics shown on figure 2. .

(-π R a R SH ) + exp(-π R b R SH ) = 1.
V H = ∆V AC + ∆V B D 4 = 1 n s q × B I t (2.2)
By using equation 2.2 with e being the electron charge, one can compute the carrier concentration n s .

This leads eventually to the mobility calculation, µ with the following equation:

µ = 1 qn s R SH (2.3)
For more insight on this method one can refer to Schroder's book [START_REF] Schroder | Semiconductor Material and Device Characterization[END_REF].

The characterizations of the doping levels were made on 300 nm thick Al 0.3 Ga 0.7 As layers deposited on top of 4" GaAs semi insulating wafers. A thin nid-GaAs buffer of 20 nm was first deposited before the AlGaAs doped layer. The layers were deposited solely at 650 °C, it will be shown later in table 2.3 that with a higher growth temperature layers exhibit a smoother surface required for device making.

p-type doping To dope the p-type layers presented here the DEZ precursor was used to incorporate zinc into the layers. From the simulations, one needs doping levels as high as 6 × 10 18 cm -3 for the p-type contact layer. From the figure 2.20, it is possible to see that there is no issue getting such doping levels. Moreover, as previously stated in the literature the amount of aluminium has no direct influence on the zinc incorporation into the layer [START_REF] Hageman | Pressure and temperature dependence of zn incorporation in metalorganic chemical vapour deposition grown GaAs and AlGaAs using diethylzinc as precursor[END_REF]. Thus it seems possible to obtain such levels for Al x Ga 1-x As with x ≤ 0.45.

n-type doping

To dope the type n layers presented here disilane gas was used. However, one could have used silane gas just as much as it only changes the incorporation rate of Si into the layer due to the decomposition of the precursors.

Si 2 H 6 → Si H 4 + Si H 2 (2.4) Si H 4 → Si H 2 + H 2 (2.5)
Indeed, the decomposition mechanism of silane follows equation 2.5 and disilane follows equation 2.4 but the resulting SiH 4 molecule then decomposes once again following equation 2.5. As it was found that the silylene, SiH 2 species is the only one to adsorb at the surface of the growing GaAs layer [START_REF] Hageman | Pressure and temperature dependence of silicon doping of GaAs using Si 2 H 6 in metalorganic chemical vapour deposition[END_REF][START_REF] Furuhata | Heavily si-doped GaAs grown by metalorganic chemical vapor deposition[END_REF] and as disilane has a faster decomposition rate than silane this explains the difference in incorporation rate. Yet, with the high enough flux of silane one can expect the same doping levels as with disilane. In figure 2.21 a bell like behaviour can be observed. This is very similar to the findings of Beainy et al. [START_REF] Beainy | Direct examination of Si atoms spatial distribution and clustering in GaAs thin films with atom probe tomography[END_REF] in GaAs. Which confirms that the same mechanism controls silicon incorporation in both GaAs and AlGaAs layers [START_REF] Kikkawa | Differences in si doping efficiency in tertiarybutylarsine, monoethylarsine and arsine for GaAs and AlGaAs grown by MOVPE[END_REF]. This bell shape graph happens after a certain amount of silicon has been incorporated into the layer. Indeed, silicon continues integrating the layer, however, it precipitates. Hence the degradation of the electrical characteristics can be directly linked to the evolution of the silicon content in the material. Yet, one can see from figure 2.21 that it is possible to get to the 4 × 10 17 cm-3 doping level required.

Contact resistivity for GaAs contact layers

The contact resistivity, ρ c , for different metallizations was measured with the Transfer Length Method (TLM) [START_REF] Schroder | Semiconductor Material and Device Characterization[END_REF]. Figure 2.22 depicts a typical TLM structure. First, the resistance between two adjacent metal strips is measured and the resistance is plotted as a function of contact spacing as illustrated in the inset of figure 2.22. A linear fit to the data gives the transfer length, L T , and the contact resistance, R c from which sheet resistance R SH = R c W L T and ρ c = 2R SH L T are extracted, with W the width of the structure [START_REF] Shayesteh | N-type doped germanium contact resistance extraction and evaluation for advanced devices[END_REF].

For more information on the method one can refer to Schroder's book [START_REF] Schroder | Semiconductor Material and Device Characterization[END_REF].

For the n-doped GaAs contact layer the best result was obtained for a Ni/Ge/Au contact with the following thicknesses 10/10/20 nm. For the p-doped GaAs contact layer the best result was obtained for a Ti/Pt/Au contact with the following thicknesses 50/75/250 nm. The metals were Figure 2.22 -Schematic of the Transfer Length method for measuring the resistivity between two contacts. In grey is the underlying contact layer and the metal is shown in blue. Reproduced from [START_REF] Shayesteh | N-type doped germanium contact resistance extraction and evaluation for advanced devices[END_REF].

deposited inside an Eva450 from Alliance Concept. The contacts were then thermally annealed for 15 s at 395 °C. Indium tin oxide (ITO) contact was also tested due to its transparency for a use on the p-doped GaAs contact layer. The contact resistivity where measured on 300 nm doped GaAs layers deposited on top of semi-insulating GaAs wafers. The contact resistivity can be found in table 2.1. One can see that the Ti/Pt/Au has a resistivity which is one order better than for the ITO contact. However, even though it has a lesser resistivity it won't cause contact shadowing. Hence, only the testing and comparison of those two contacts on a real emitting device will allow to make a choice as to which is the more adapted.

Material Doping level [cm

-3 ] Contact ρ c [Ω.cm 2 ] n-
Once those preliminary requirements are set, one can develop the materials needed to make the active parts of the devices.

Development of the materials on III-V substrates and 300 mm silicon (100)

One very important aspect of MOCVD growth is the possibility of providing very abrupt interfaces while growing thin layers. This aspect is of utmost importance for the active layer. This was demonstrated as early as in the 1980's [START_REF] Dupuis | Abrupt Ga 1-x Al x As-GaAs quantum-well heterostructures grown by metalorganic chemical vapor deposition[END_REF][START_REF] Brown | Monolayer heterointerfaces and thin layers (∼ 10 Å) in Al x G a 1-x As -G a As superlattices grown by metalorganic chemical vapour deposition[END_REF]. We will here illustrate the different developments which were needed in order to get all the materials bricks for the future SEG. The emphasis will be made on the abruptness one can get from the MOCVD reactor.

Growth of AlGaAs layers on GaAs

For the device emitting in the red region of the spectrum, it is of importance to develop Al x Ga 1-x As layers for x ≤ 45% in order to keep the direct gap of the alloy. Good homogeneity across the wafer and abrupt transitions are also of utmost importance to get the best active part possible.

2.4.1.a Process point for x up to 45%

The process points were developed on 4" GaAs semi-insulating wafers in order to benefit from the perfect template , which allows not to worry about dislocations in a first step approach.

To grow Al x Ga 1-x As layers for x ≤ 45%, GaAs growth was taken as a starting point to which the partial pressure of TMAl, P T M Al was changed. The constant parameters of the growth are the partial pressure of TBAs and TMGa as well as the total pressure kept at 20 Torr, the temperature fixed at 620 °C and a carrier gas flux of 10 standard litre per minute (SLM). As shown in figure 2.23(b), the growth rate vary linearly between 1.25 nm/s to almost 2 nm/s with the partial pressure of the Al precursor. This shows that with these growth parameters the growth happens in the plateau regime, where the growth is limited by the precursor's supply in the chamber.

Homogeneity of the deposited layers on the wafer

The MOCVD tool used in this thesis processes 300 mm wafers. However, it is possible to process 4" wafers by using a specifically designed holder schematized on figure 2.24. From the concentric position of the wafers inside the chamber required by the holder design, the homogeneity one can obtain on the 4" wafers is representative of the radial homogeneity on a 300 mm wafer.

Homogeneity was characterized on the previously described samples of section 2.4.1.a. Ellipsometry and PL measurements were made across the 4" wafers along the blue line shown in figure 2.24. The positions on the wafer described in figure 2.25 are taken along the blue line, positive numbers being towards the centre of the chamber, negative ones being on the outskirts of the chamber. From figure 2.25, it is possible to see that ellipsometry and PL measurements are very similar to each other. This similarity allowed to extract the composition of the layers both by PL and ellipsometry measurements. It is possible to notice that there is a very slight increase in Al incorporation towards the centre of the chamber. Yet, the increase is very low and the homogeneities obtained from these growths are very good.

However, growing AlGaAs layers is only part of the response. In order to eradicate completely the 2D e -and h + gases one can make gradient composition layers. In the first devices made a significant problem of carrier injection inside the active part was highlighted by simulation.

The simulation allowed us to get to a new structure. Yet, one could still see that even though the 2D gases where dramatically reduced, they still exhibited a small overpopulation at the interface between the GaAs contact layer and the AlGaAs cladding layer. Even though, it is not possible to simulate compositional gradients, one can imagine that they will lead to a further decrease of these 2D gases at the interface.

2.4.2.a Gradients definition to eliminate 2D e -and h + gases

As the aluminium incorporation in the AlGaAs layer has a linear dependence on the partial pressure of TMAl in the chamber it is easy to envision growing a smooth composition gradient from GaAs → Al 0.45 Ga 0.55 As. Moreover, the growth rate also varies linearly as a function of the partial pressure of Al precursor present in the chamber. Two types of gradients were studied: one going from G a As → Al 0.30 Ga 0.70 As and the other GaAs → Al 0.45 Ga 0.55 As. Both of those gradients were deposited on top of a 400 nm GaAs buffer layer grown upon a 300 mm Si(001) wafer.

First, thick compositionally graded layers were tested and characterized by Time-of-Flight Secondary Ion Mass Spectrometry ToF-SIMS. Two gradients of 600 nm height were deposited with means of making linear gradients. Figure 2.26 illustrates the ToF-SIMS results obtained. The composition profile is shown as a function of the sputtering time. It would seem as seen in the figure 2.26 that the gradient is not linear. However, there is no means of knowing if the gradient is linear or not as the speed of etching could change as a function of the aluminium percentage in the AlGaAs layers. However, the driving idea beneath the realization of a compositional gradient was to make an easier transition for the carriers to have a softer energy barrier to get upon. Hence, the fact that a gradient is added even if not completely linear is already a benefit.

Eventually, it is of importance to check the roughness of the layer to ensure that it is low enough to integrate thin, sub 10 nm quantum wells. It will be considered that a roughness beneath 1 nm is of sufficient quality to do so. As a reference, a 400 nm GaAs buffer on Si (001) exhibits a RMS roughness around 0.6 nm. x in Al x Ga As growth rate gets fast very quickly even going up to 2 nm/s when growing Al 0.45 Ga 0.55 As, the first thought was lowering the growth rate, while, it allowed for a significant reduction of the roughness it was not yet sufficient. The second option which proved very effective to work was increasing the temperature. Indeed, by increasing the temperature adatom surface mobility is maximized while minimizing surface roughness. As described in table 2.3 by combining the two options it was possible to reduce significantly the roughness to sub 1 nm values very close to the 0.7 nm RMS roughness exhibited by a 400 nm GaAs buffer grown upon Si(001).

After being able to control the growth of AlGaAs alloys a closer look at the material quality is taken.

AlGaAs layer quality on silicon

X-ray diffraction was performed to have an idea of the AlGaAs quality on top of GaAs. Three samples were deposited and measured. First, a reference sample was grown, consisting of a 600 nm GaAs layer on top of a silicon substrate. Then, two other samples were deposited, they contained the same 600 nm GaAs layer, on top of which were added a 200 nm Al x Ga 1-x with

x ∈ {0.1, 0.3} and a 15 nm GaAs capping layer for oxidation protection. Rocking curves were then measured, as shown in figure 2.27. From figure 2.27, the FWHM were extracted and are as follows: 636 arsec for the GaAs sample, 641 arcsec for the Al 0.1 Ga 0.9 sample and 636 arcsec for the Al 0.3 Ga 0.7 sample. The FWHM obtained from these curves are very similar to the ones presented in R. ALcotte's thesis [START_REF] Alcotte | Metalorganic vapour phase epitaxy of III-As semiconductors on silicon substrate and formation of ohmic contacts for photonic and radiofrequency applications on silicon[END_REF]. Moreover, they can be compared to the ones previously measured for As-deposited GaAs on silicon of such thickness [START_REF] Yodo | GaAs heteroepitaxial growth on si substrates with thin si interlayers in situ annealed at high temperatures[END_REF][START_REF] Bolkhovityanov | GaAs epitaxy on si substrates: modern status of research and engineering[END_REF].

The resolution of the sampling does not allow to separate GaAs and AlGaAs layers as their bragg angles are very close to each other. From the look at the curves it seems as if the two materials are lattice matched. To get more information on the AlGaAs layer and the strain within one would need to do a reciprocal space mapping. From the rocking curves presented in figure 2.27, it could be expected that the AlGaAs quality matches the GaAs quality one can obtain with the applied materials MOCVD epi chamber.

Abruptness of the transitions

To verify that the process is well master FIB-SEM lamellae were prepared on a full structure to observe the transitions for AlGaAs layers. The growth of AlGaAs will be more detailed afterwards. Therefore, more information on the abruptness of the transitions will be given in chapters 3 and 4 in order not to repeat the same information several times.

Growth of InGaAs layers on GaAs

InGaAs layers were previously developed in R. Cipro's thesis. Thus, for more insight on their growth one can refer to his PhD thesis [START_REF] Cipro | Metalorganic vapour phase epitaxy and characterization of III-As semiconductors on silicon substrate in a microelectronic platform[END_REF]. Here, the focus was made on the abruptness of the transitions. From figure 2.29, it is possible to notice that the variations for very thin quantum wells, here, 8 nm encapsulated inside 10 nm barriers are very abrupt. Indeed, the ToF-SIMS graph presented in figure 2. 29(a) shows that between each quantum well, here the three peaks with with an indium content around 20%, the indium composition reaches almost zero. This is an evidence that there is between each quantum well a layer where the indium composition is almost nonexistent. However, as the relationship between the etching time and the indium composition is unknown it is difficult to have more information on the real transition abruptness. In addition, if one observes the SEM cross-section presented in figure 2.29(b), the atomic contrast allows to observe that the transitions between quantum wells, in a darker contrast, and barriers, in a lighter grey, are well defined because no blurry transition can be seen.

InAs quantum dots

As previously stated, the dislocation densities on Si(001) without dislocation filters or annealing steps, remain very high at about 10 9 dislocations.cm -2 for GaAs buffers of less than 800 nm. For GaAs buffers of less than 400 nm it can reach 10 10 dislocations.cm -2 . Therefore, growing quantum wells on top of that will result in poor characteristics. However, one can grow quantum dots, as they are unique objects they are less sensible to defects. First, growth of quantum dots on InP was started as a means to replace the InP/In 0.53 Ga 0.47 As barrier/quantum well couple by an InP/InAs quantum dot couple. The stack was not simulated, as quantum dots are not part of the options given by the software. For that reason, the stack is kept identical apart from quantum wells which are exchanged with quantum dots.

2.4.6.a Growth on InP sublayer

In literature, it is easy to find InAs quantum dots grown on InP substrates however, there are very few InAs quantum dots grown directly on an InP layer. Actually, most of the InAs quantum dots are grown between InGaAs layers [START_REF] Zongyou | MOCVD Growth and Characterization od Quantum Dots for Mid-infrared Emission[END_REF], InGaAsP [START_REF] Barik | Comparison of InAs quantum dots grown on GaInAsP and InP[END_REF] or even InGaAlAs [START_REF] Khan | Self-assembled InAs/InP quantum dots and quantum dashes: Material structures and devices[END_REF]. Some papers with direct growth of InAs quantum dots on an InP sublayer are listed in table 2.4.

As noticed in table 2.4, InAs quantum dots were not only grown using MOCVD. Though, for similar sized quantum dots the characteristics are similar. Stranski-Krastanov growth seems to happen at around 2 MLs. The emission for Marchand et al. [START_REF] Marchand | Metalorganic vapor phase epitaxy of coherent self-assembled InAs nanometersized islands in InP(001)[END_REF], Poole et al. [START_REF] Poole | Chemical beam epitaxy growth of self-assembled InAs/InP quantum dots[END_REF] and Barik et al. [START_REF] Barik | Comparison of InAs quantum dots grown on GaInAsP and InP[END_REF] quantum dots have an emission around 1550 nm, thus being suitable at replacing In 0.53 Ga 0.47 As quantum wells.

InP substrate

The work on the growth of quantum dots on the InP sublayer was started from an existing process point which is presented hereafter. This reference was grown on top of an InP regrowth step on a 2" InP(001) substrate. The InAs step happened at 520 °C at 5 Torr, with a deposition time of 30s with P T M I n = 4 × 10 -3 mTorr and P T B As = 0.32 mTorr and a post-step of 30s with no other gas apart from the carrier gas. Afterwards, the sample was unloaded and taken back to the FOUP.

From figure 2.30, one can see that they are two types of populations, a population of small structures and larger structures. From 2.31(a) the small structures are considered to be the ones with a mean height of 18 nm, while, the larger ones are about 35 nm to 40 nm. From figure 2.31(b), the small structures are considered to be the ones with a mean radius of 35 nm -40 nm, while, the larger ones are about 100 nm to 120 nm. Therefore, the smaller population has a size similar in radius and twice as high as compared to the sizes of quantum dots presented in the literature as seen from table 2.4. However, the bigger population is attributed to a longer time of growth than the smaller population. Therefore, as the bigger population will have a longer growth time thus, a larger size, it will relax and hence, generate dislocations. From those observations the smaller population will be referred to as quantum dots, and the larger population as relaxed quantum dots (RQDs). Before, doing the PL measurement one can see from figure 2.33(c), that the InP surface is smooth and exhibits a RMS roughness of 0.28 nm. This can be justified by the flattening of the structures when capped. It would hence be possible to stack several layers of quantum dots on top of each other.

From the figure 2.33(d), one can see that the emission wavelength is around 1600 nm as compared to the quantum dots from the literature which are much smaller. As a consequence, with bigger quantum dots comes a red-shift in emission therefore a longer wavelength [START_REF] Schmidt | Size quantization effects in InAs self-assembled quantum dots[END_REF].

This process point was used as the reference process point to start the developments on silicon substrates.

Silicon substrate

The growth on silicon substrates was done on a InP(200nm)/GaAs(400 nm)/Si(001) template with no antiphase boundaries. The InAs growth was started using the previous process point: 520 °C, 5 Torr, deposition time of 30s with P T M I n = 4 × 10 -3 mTorr and around 15 to 30 nm, which is closer to what was obtained on the InP substrate. It seems as if the 420 °C grown layer has larger dots than the 500 °C grown sample, which should not be happening as it is expected from the temperature that the growth is occurring in the kinetic regime. However, this can simply be a localized effect of the growth. Nonetheless, the 500 °C grown sample has the highest dot density, 4.6×10 9 dots.cm -2 , and a very centred height mean value of 16 nm. When the temperature is radically decreased there is no observation of a decrease in the size of quantum dots as there is still a double population of dots but, one observes a very steep reduction in density. Hence, one can suppose that with a higher growth rate, new dots are created, yet, the ones already present do not absorb more material, thus, increasing the density. Still, on the 500 °C grown sample also a double population of dots can be observed, large dots, with a height starting at 25 nm are still present with a density of 1.1 ×10 9 dots.cm -2 . In order to get a better statistical overview of the formed quantum dots on the 500 °C grown sample four 5x5 µm 2 AFM images taken at different positions along the radius of the wafer were analysed. The histograms and box charts obtained from these analysis are From the analysis presented on figure 2.36, the values are pretty much centred around 18 nm. Though, it appears that there is a slight increase in the mean and median values from centre to edge. One can also observe that they are some outliers in three of the four tested positions, which recalls the double population that was previously established in figure 2.35(b). Then, a PL measurement was made using the same growth point and capping it with a 20 nm InP layer.

From the SEM cross-sections displayed in figure 2.37(a) and figure 2.37(b) , it is possible to notice that the quantum dots become thinner when capped as it was previously the case on the InP substrate. Their heights also decrease to around 10 nm when capped with InP.

Similarly, to the analysis made on the InP substrate, one can see from figure 2.37(c) that the InP surface is smooth and exhibits a RMS roughness of 0.77 nm. It would hence be possible to stack several layers of quantum dots on top of each other. Likewise, from figure 2.37(d) one can recognize an emission wavelength around 1500 nm. Naturally, with the same characteristics as on InP wafer, the emission wavelength stays the same independently on the substrate it was grown upon. However, as the PL spectra was made using the same parameters, it is possible to notice that the emission peak has a three times lower intensity than on the InP substrate. This could be explained by the fact that dislocations (around 1.10 10 dislocations/cm 2 )are present when growing on the Si substrate. Hence, it means that there is a one decade difference between the dislocation density and the quantum dot density. It is easy to imagine that some of the dots are cut across by dislocations. Therefore, as dislocations are non-radiative recombination centres it hinders the optical response of the dots.

With the success of the growth of InAs quantum dots on InP, it was decided that the same could be tried with InAs upon InGaP. Indeed, the growth upon InP and InGaP seems to be much closer to one another that the growth upon InP and GaAs. Actually, growth on InP seems to differ from growth on GaAs for several reasons, one of them being the reported As/P exchange between the InAs quantum dots and the underlying and capping layers made of InP [START_REF] Yoon | Effects of As/P exchange reaction on the formation of InAs/InP quantum dots[END_REF][START_REF] Poole | Using As/P exchange processes to modify InAs/InP quantum dots[END_REF][START_REF] Yuan | InAs quantum dot growth on planar InP (100) by metalorganic vapor-phase epitaxy with a thin GaAs interlayer[END_REF]. As the As/P exchange was also reported in InAs dots grown upon GaInAsP and GaInP [START_REF] Barik | Comparison of InAs quantum dots grown on GaInAsP and InP[END_REF][START_REF] Forbes | OMVPE of InAs quantum dots on an InGaP surface[END_REF] it is assumed that the processes developed on InP can be easily adapted on an In 0.5 Ga 0.5 P layer matched to GaAs. However, a major difference arises: the compressive strain difference. Indeed, the compressive strabetween InAs and InP is 3.7% and between InAs and GaAs or In 0.5 Ga 0.5 P it is 7.8%.

2.4.6.b Growth on InGaP sublayer on GaAs substrate

In order to envision the possibility of using those quantum dots in the O-Band rather than in the L-band as it was obtained with the growth between InP layers, it is possible to imagine capping them with a GaAs layer. As a matter of fact it was reported in the literature that the capping of InAs QDs with In 0.5 Ga 0.5 P leads to emission wavelengths rather close to 1 µm as seen from table 2.5, to which a solution with In 0.2 Ga 0.7 As quantum wells was already provided.

In order for the InGaP layer to be lattice matched to GaAs it needs to have a composition of In 0.5 Ga 0.5 P. In the following pages when referring to InGaP one will remember that the composition of the layer is fixed so as it is lattice matched to GaAs.

We started from the InAs point developed at the paragraph 2.4.6.a on the InP substrate.

From figure 2.38(a), one can see that it is possible to observe two populations of structure. However, when zooming in it almost seems as if they are three types of population. Indeed as shown in figure 2.38(b), it is possible to see that they are very small dots in the background. As the eye can be misleading an analysis is necessary.

From the analysis provided in figure 2.39, one can see that they are indeed very small structures with a height not exceeding 10 nm as well as with a radius not surpassing 20 nm. These structures or quantum dots represent the majority of structures found in the background in Table 2.5 -Some parameters of InAs quantum dots grown on an In 0.5 Ga 0.5 P sublayer found in literature. here all the references use In 0.5 Ga 0.5 P as a capping layer for PL measurements. the AFM image of figure 2.38(b) with a density of 3 ×10 9 dots/cm 2 . Though, they are also much larger structures with a lesser density of 1.2 ×10 9 structures/cm 2 . However, compared to the InP case the structures grown here are thinner and shorter. This can be explained by the difference in compressive strain. Indeed, as the compressive strain is twice as high in the InGaP sublayer case as compared to the InP sublayer the deposited thickness to observe SK growth is much thinner in the higher compressive strain situation. Therefore, this leads to thinner structures which are observed here, hence higher confinement therefore a blue shift in emission [START_REF] Sugawara | Self-Assembled InGaAs/GaAs Quantum Dots[END_REF][START_REF] Bimberg | Quantum Dot Heterostructures[END_REF]. The PL spectra was obtained at 300 K using a 532 nm excitation laser with a power of 0.325 kW.cm -2 with a 4 s acquisition time.

From figure 2.40(a) and figure 2.40(b), one can see the very small structures that were described before, as well as bigger structures. From those bigger structures, it is possible to notice that there always is regeneration of dislocations due to their size. For instance, a dislocation can be seen on figure 2.40(b) originating from the larger dot hence the relaxed quantum dot, while, no such defect originates from the small quantum dot next to it. Contrary to the InP case, there is no flattening of the quantum dots when capped. This can explain why the RMS roughness of the capped structure, shown in figure 2.40(c), is this high at a value of 3.61 nm which was different for the InP case. This large roughness renders the stacking of InAs quantum dots challenging. From a photoluminescence point of view, one can observe two peaks a main peak at 1276 nm and a second peak at 1175 nm. The first peak can be attributed to the quantum dots emission, and the second peak could be attributed to the wetting layer. One can also compare this PL spectra to the one obtained on the InP sublayer on the InP substrate. The intensity of the main peak is similar to the one on the InP substrate. However, the pump intensity of the used laser is 4 times higher in the InP situation. As the density is similar in both sample it cannot explain the significant difference. The difference in dislocation density, one decade, could be the one to pinpoint that even though QDs are less prone to defects, lessening the dislocation density is still of the utmost importance.

By going further into details, the PL shift observed between the InAs QDs grown onto InP and InGaP obviously comes from a combination of effects: size of QDs, composition of QDs, strain, composition of the sublayer and composition of the capping layer. Evidently, all those effects are correlated and cannot be considered separately. For instance, the composition of the sublayer might impact the composition of the QDs hence, producing a shift in the PL spectra. Therefore, as all these parameters are intertwined, PL shifting trends are given for each parameter, however one needs to recall that it is the accumulation of all the parameters that leads to the observed PL spectra.

The easiest parameters to understand are composition and size of quantum dots. Concerning the composition, any given semiconductor alloy has a given bandgap energy, thus, changing the composition of the alloy changes its bandgap energy. Regarding the size, by solving the Schroedinger equation in the tridimensional case, it is possible to notice that the energy changes as a function of 1/size 2 . In figure 2.41, the particle considered here is presented. After

E (n,p,q) = ħ 2 2m π 2 ( n 2 a 2 + p 2 b 2 + q 2 c 2 ) (2.6)
with (n,p,q) ∈ N * . Hence, the relationship to the size is obvious as shown in equation 2.6, the smaller the size, the bigger the energy thus, the lower the wavelength of emission.

Both size and composition of quantum dots can be changed by tuning growth parameters but, they also depend on the type of sublayer and capping layer. Indeed, the composition of the sublayer as well as the capping layer can impact the composition of the quantum dots. For InAs quantum dots grown on a GaAs(001) surface, it was demonstrated that at temperatures higher than 400 °C, there is a partial consumption of the formed wetting layer [START_REF] Joyce | Composition of InAs quantum dots on GaAs(001): Direct evidence for (In,Ga)As alloying[END_REF]. Moreover, the wetting layer is not a pure InAs layer but an alloyed InGaAs covering the GaAs surface [START_REF] Belk | Surface alloying at InAs/GaAs interfaces grown on (001) surfaces by molecular beam epitaxy[END_REF]. Therefore, QDs are rather an alloy than a pure binary InAs [START_REF] Hatami | Growth of low-dimensional semiconductors structures[END_REF]. It might also be the case for the quantum dots presented in this work. The overgrowth process also has an impact both on size and composition [START_REF] Costantini | Universal shapes of self-organized semiconductor quantum dots: Striking similarities between InAs/GaAs(001) and Ge/Si(001)[END_REF]. As explained previously, for the InAs quantum dots grown upon InP case there is an As-P exchange on both interfaces. For the InP/InAs interface, it leads to the creation of an InAs QW at the top of InP, which changes the critical transition thickness to get from 2D to 3D [START_REF] Wang | Self-organized InAs quantum dots formation by As/P exchange reaction on (001) InP substrate[END_REF][START_REF] Yang | Formation of quantum wires and dots on InP(001) by As/P exchange[END_REF]. For the InAs/InP interface an As-P exchange happens, resulting in the flattening of structures as presented before [START_REF] Yoon | Effects of growth interruption on the evolution of InAs/InP self-assembled quantum dots[END_REF]. These phenomena can thus impact the composition and size of the dots, hence, impacting their emission.

Eventually, the strain between the underlying layer and the quantum dot material changes the transition from 2D growth to 3D growth. The more strain there is, as in InAs on InGaP or GaAs (7.8 % compressive strain), the lower the critical thickness compared to the InAs on InP case (3.7 % compressive strain) hence, the transition from 2D to 3D is way more abrupt [START_REF] Krzyzewski | Ripening and annealing effects in InAs/GaAs(001) quantum dot formation[END_REF]. This leads to a form and size change depending on the strain, thus, impacting the emission wavelength.

Composition of the sublayers and capping layers as well as the strain impacting QDs growth are further detailed in Hatami and Bierwagen review [START_REF] Hatami | Growth of low-dimensional semiconductors structures[END_REF].

Therefore, even though the impact of the parameters on quantum dots size and composition were presented for specific cases, one can imagine that they can be generalized to the structures grown in this study. Moreover, the impact of the various parameters described above, are all going towards the conclusion that the InAs QDs on InGaP compared to InAs QDs on InP should exhibit a much shorter emission wavelength. Which is what was observed from the experiments conducted above.

Conclusion to chapter 2

This chapter has allowed to tackle the basis that form the developments of the whole thesis towards the realization of selective epitaxial grown structures for light emitting structures realization. First, MOCVD specifics were discussed, following by the stacks definition, eventually some preliminary developments for materials and contacting layers were discussed.

After discussing the details of MOCVD deposition, major information was given for the deposition of layers in the Applied Materials reactor. The specifics came from the design of the chamber itself and realization constraints. From that, it came to light that the future devices could not be thicker than a total 2 µm for arsenide compounds. Yet, as shown by the literature, this was not an obvious task, as challenges coming from the optical guiding of the mode and contact shadowing are fatal to any optical emitter. Hence, all the structures coming from publications that are referred to in this chapter are all thicker that at least 2.5 µm. Not allowing to reproduce them as is.

Yet, with the use of a first non-working structure and with the help of LaserMOD simulation, some satisfying progress was made. Using simulation and inspiration from the stacks described in literature, it was possible to define several stacks to answer to different applications ranging from red to L-band emission. As the end goal is to integrate the stacks using selective epitaxial growth, an optical comparison between stacks grown on full sheet wafers and selective epitaxial growth was shown. This demonstrated that the selectively area grown option was more favourable for the optical guiding.

Then, some preliminary requirements concerning contacting layers, contact layer and contacts themselves, were proved to be reaching the expectations to realize a future working device.

Eventually, lacking materials were developed to be able to have stacks adaptable for several ranges of wavelengths. Hence, allowing to cover a full range of applications: biophotonics, lidar, telecom and datacom. AlGaAs layers with x ≤ 0.45 were developed and optimized. InAs quantum dot growth was investigated on InP sublayers as well as In 0.5 Ga 0.5 P sublayers. They showed emission wavelength around 1600 nm when grown and capped by InP and around 1280 nm when grown on an InGaP sublayer and capped with GaAs. Further developments were made with selective epitaxial growth and will be presented in the next chapter. Once the guidelines and the preliminary developments are set, one can go on towards integrating said materials using SEG.

In the next chapter, the selective epitaxial growth method will be tackled. First, the impact of the experimental parameters on GaAs growth will be discussed. Then, the use of aspect ratio trapping will be addressed as a way of reducing dislocations. Eventually, the active parts integration inside selectively grown ridges will be depicted.

Selective epitaxial growth and use of aspect ratio trapping method for III-V materials growth

This chapter aims at showing that the previously presented structures of chapter 2 can be integrated by using selective epitaxial growth in ridges.

Impact of experimental parameters on the GaAs buffer

The morphologies obtained using selective epitaxial growth have been widely discussed over the years. This is true whatever the used growth technique or the material. For instance, CVD for Si-Ge deposition [START_REF] Pribat | Si and SiGe faceting during selective epitaxy[END_REF][START_REF] Dutartre | Faceting and nanostructure effects in si and SiGe epitaxy[END_REF][START_REF] Dutartre | Facet propagation in si and SiGe epitaxy or etching[END_REF][START_REF] Vescan | Facet investigation in selective epitaxial growth of si and SiGe on (001) si for optoelectronic devices[END_REF], HVPE for III-V material deposition either GaAs [START_REF] Gil-Lafon | Selective growth of GaAs by HVPE: keys for accurate control of the growth morphologies[END_REF][START_REF] Tourret | A complete crystallographic study of GaN epitaxial morphologies in selective area growth by hydride vapour phase epitaxy (SAG-HVPE)[END_REF][START_REF] Napierala | Control of the growth morphologies of GaAs stripes grown on patterned substrates by HVPE[END_REF] or InP [START_REF] Lourdudoss | Morphological modifications during selective growth of InP around cylindrical and parallelepiped mesas[END_REF][START_REF] Lourdudoss | Temporally resolved regrowth of InP[END_REF][START_REF] Messmer | Hydride vapour phase epitaxy for nanostructures[END_REF][START_REF] Sun | Temporally resolved selective area growth of InP in the openings off-oriented from [110] direction[END_REF], MBE for III-As III-P material growth [START_REF] Heiß | Growth mechanisms and optical properties of GaAs-based semiconductor microstructures by selective area epitaxy[END_REF][START_REF] Albani | Growth kinetics and morphological analysis of homoepitaxial GaAs fins by theory and experiment[END_REF][START_REF] Aseev | Selectivity map for molecular beam epitaxy of advanced III-v quantum nanowire networks[END_REF] present a wide reference panel concerning the study of growth parameters. For MOVPE, the impact of growth parameters has also been extensively studied. From mask effect on the selective epitaxial growth [START_REF] Olsson | Large mask area effects in selective area growth[END_REF][START_REF] Hirota | Selective growth of (001) GaAs using a patterned graphene mask[END_REF], via group V partial pressure effect [START_REF] Oh | The effect of group V precursor on selective area MOVPE of InP/GaAs-related materials[END_REF][START_REF] Song | Effect of group V partial pressure on the kinetics of selective area MOVPE for GaAs on (100) exact and misoriented substrate[END_REF][START_REF] Song | Non-linear kinetic analysis on GaAs selective area MOVPE combined with macro-scale analysis to extract major reaction mechanism[END_REF], or chlorine effect [START_REF] Kuech | Selective epitaxy of MOVPE GaAs using diethyl gallium chloride[END_REF][START_REF] Azoulay | Selective growth of GaAs and GaAlAs by Cl-assisted OMVPE at atmospheric pressure[END_REF][START_REF] Nordell | Influence of MOVPE growth conditions and CCl 4 addition on InP crystal shapes[END_REF][START_REF] Korte | Selective area growth of GaAs and AlGaAs with TMGa, TMAl, AsH 3 and HCl by atmospheric pressure MOVPE[END_REF][START_REF] Yokoyama | Selective epitaxial growth of GaAs using dimethylgalliumchloride by multi-wafer low-pressure metal organic vapor phase epitaxy (LP-MOVPE)[END_REF] to the morphology inside the trenches [START_REF] Jiang | Evolution of (001) and (111) facets for selective epitaxial growth inside submicron trenches[END_REF][START_REF] Jiang | Growth rate for the selective epitaxial growth of III-V compounds inside submicron shallow-trench-isolation trenches on Si (001) substrates by MOVPE: Modeling and experiments[END_REF] a lot of studies clarify what happens during MOVPE selective epitaxial growth. Moreover, some models either to predict thickness profiles and compositional variations [START_REF] Dupuis | AlGaInAs selective area growth by LP-MOVPE: experimental characterisation and predictive modelling[END_REF][START_REF] Décobert | Modeling and characterization of AlGaInAs and related materials using selective area growth by metal-organic vapor-phase epitaxy[END_REF][START_REF] Dupuis | Intégration par épitaxie sélective d'un Modulateur Electro-Absorbant et d'un Amplificateur Optique à base de puits quantiques AlGaInAs[END_REF] or to predict theoretically the self-limited behaviour of facet size inside the trenches [START_REF] Jiang | Evolution of (001) and (111) facets for selective epitaxial growth inside submicron trenches[END_REF][START_REF] Jiang | Growth rate for the selective epitaxial growth of III-V compounds inside submicron shallow-trench-isolation trenches on Si (001) substrates by MOVPE: Modeling and experiments[END_REF] were made. However, up to now, there are not a lot of articles giving insight on the faceting of the layers outside of the dielectric [START_REF] Kamon | Selective epitaxial growth of GaAs by low-pressure MOVPE[END_REF][START_REF] Xu | Surface morphology and growth rate variation of InP on patterned substrates using tertiarybutylphosphine[END_REF][START_REF] Shen | Selective area growth of GaN on GaAs(001) substrates by metalorganic vapor-phase epitaxy[END_REF][START_REF] Albani | Growth kinetics and morphological analysis of homoepitaxial GaAs fins by theory and experiment[END_REF]. Recently, an article in compound semiconductor [START_REF] Kunert | Gaining an edge with nano-ridges[END_REF] showed images of several growth morphologies for GaAs selective epitaxial growth but without giving any growth parameters. As it is of importance to understand the possibilities one has to tune a growth process. Here, are presented the morphologies possible to attain by changing the stripe orientation on the substrate, the temperature in the range 560 °C to 660 °C as well as the TMGa partial pressure (P T MG a ) in the range 1.88 mTorr to 6.89 mTorr.

For the growth studies, a specific design of mask was used. On this mask, one can find several widths or ridges inside the dielectric, from 150 nm to 1000 nm. All those lines are oriented along two directions <110> and and <100>. The dielectric mask used on these wafers is an oxide, nitride, oxide (ONO) stack. The mask used in this chapter has an 80 % opening ratio.

First, one needs to be reminded that the chosen device structure is the one of a ridge, to be as close as possible to laser standards for silicon photonics [START_REF] Justice | Wafer-scale integration of group III-V lasers on silicon using transfer printing of epitaxial layers[END_REF][START_REF] Guo | Recent advances of heterogeneously integrated III-V laser on Si[END_REF]. Therefore, we look forward to deposit vertical rectangular structures as shown in figure 3.1. To investigate the various dependencies and be able to grow the type of upright structures described in figure 3.1 an analysis of the impact of growth parameters was necessary. Therefore, four temperatures and four partial pressures were investigated using In 0.2 Ga 0.8 As markers deposited at identical time intervals inside a GaAs matrix. This allows to follow the deposition as it unfolds. For the following sections mostly SEM cross-sections of the growths will be shown as the growth is identical along the length of the ridge.

Stripe orientation influence on morphology

Growth kinetics and morphological analysis depending on the crystallographic orientation along which the lines lie was already performed in the case of homoepitaxial growth of GaAs horizontal wires and heteroepitaxial growth on silicon [START_REF] Albani | Growth kinetics and morphological analysis of homoepitaxial GaAs fins by theory and experiment[END_REF]. This paper provides simulations confirmed by SEM pictures of the morphologies obtained by MBE for GaAs horizontal wires grown on oxide slits by selective epitaxial growth. The underlying substrates used were a GaAs (111)B and a Si [START_REF] Akiyama | Growth of high quality GaAs layers on Si substrates by MOCVD[END_REF]. Another paper discussing the geometry of III-V materials on top of InP (111) can be cited [START_REF] Aseev | Selectivity map for molecular beam epitaxy of advanced III-v quantum nanowire networks[END_REF]. However, the growth was also realized by MBE.

In our case, two crystallographic directions were at our disposal: one along <110> and one along <100>. It was found that for the whole process window studied hereafter (from 560 °C to 660 °C using Partial pressures of TMGa ranging from 1.88 mTorr to 6.89 mTorr with a constant P T B As /P T MG a ratio at 5.51) no change was observed in the morphology along the <100> direction. The morphology observed in the <100> direction is presented on figure 3.2.

From figure 3.2(b), it is possible to notice that the growth exhibits one (001) facet on top and two {110} on the sides of the epitaxy. The top facet and the two side facets can also be seen from the SEM top-view in figure 3.2. When the width of ridge inside the dielectric is smaller than the one presented on figure 3.2, there is no observation of the (001) plane for an identical growth time. On figure 3.2(a), the antiphase boundaries can be seen on top of facet (001) as well as on the sides really impacting the morphology by creating pits. While, it would be imaginable to suppress the APBs [START_REF] Alcotte | Epitaxial growth of antiphase boundary free GaAs layer on 300 mm Si(001) substrate by metalorganic chemical vapour deposition with high mobility[END_REF], the fact that the morphology never changes whatever the conditions is not really interesting for the realisation of the vertical structure presented in figure 3.1.

Indeed, in our case, the epitaxies are supposed to be used in future laser devices. Thus, the choice made here, is to keep a large enough section, with at least 300 nm as simulated in chapter 2, for the active part. Therefore, the morphology presented here is not optimal. A full study along the [START_REF] Akiyama | Growth of GaAs on Si by MOVCD[END_REF] direction was hence done.

Morphology dependence as a function of temperature

The temperature dependency for SEG of GaAs and of In 0.53 Ga 0.47 As was already highlighted by R. Cipro in his thesis for a given set of partial pressures inside the dielectric ridge [START_REF] Cipro | Metalorganic vapour phase epitaxy and characterization of III-As semiconductors on silicon substrate in a microelectronic platform[END_REF]. One can also find evidence of the influence of the temperature for SEG of InP [START_REF] Lee | Effects of growth temperature on surface morphology of InP grown on patterned Si (001) substrates[END_REF]. Both of these references show that while growing from lower to higher temperatures one goes from a larger horizontal rectangle to a pyramidal shape.

Here, the temperature dependency is investigated outside the of the dielectric.

From figure 3.3, six cross-sections of SEG structures deposited at the same partial pressures with a span of 100 °C are displayed. For the lowest temperatures presented in figure 3.3(a) and figure 3.3(b) the growths are very horizontal. It can also be seen that these growths are filled with defects which render the description of the facets difficult. This can be explained by the fact that the growth is in contact over large areas with the dielectric which leads to the defect generation. Therefore, no data will be extracted for the realization of the following graphs. For temperatures ranging from 600 °C to 620 °C shown in figure 3.3(c) and figure 3.3(d) the shape is also rectangular but the growth is rather vertical as compared to the two lower temperatures. A top (001) facet is present as well as two {111} As , also known as {111} B , facets. The growth rate of the {111} As is so low that it cannot be quantified from the figures, this will be the case throughout the study. However, the {111} As facets are longer at 600 °C and the III-V deposited ridge is larger at 600 °C than at 620 °C for the same deposition time. However, when the temperatures get higher than 640 °C shown in figure 3.3(e) and figure 3.3(f) the shape becomes completely pyramidal. Both of the pyramids presented in figure 3.3(e) and figure 3.3(f) exhibit {111} G a , also known as {111} A , facets at the top of the III-V ridge. Yet, in the final deposited structure, which here have a 360 s deposition time in total no (001) plane can be seen. However, the (001) plane was present for some time at the beginning of the deposition as it can be seen from the In 0.2 Ga 0.8 As markers present inside the GaAs deposition in figure 3.3(e) and figure 3.3(f). These observations confirm that what is already happening within the dielectric [START_REF] Cipro | Metalorganic vapour phase epitaxy and characterization of III-As semiconductors on silicon substrate in a microelectronic platform[END_REF] continues outside of it: at high temperature a pyramidal shape appears.

By plotting the growth rate of the different facets onto a graph displayed in figure 3.4, one can evidence the appearance and disappearance of some facets. For the following graphs, both right side, indicated by letter R, and left side, indicated by letter L, of the III-V ridge, along the axis separating the oxide slit in its centre, will be plotted. This will show that the evolution on both sides is symmetrical. Indeed, as shown in figure 3.4(a) the growth rate on (001) plane is rather constant for this set of partial pressures in this temperature range. The growth rate upon {111} A facets is very pronounced above 620 °C (1.12 × 10 3 K -1 ) and nonexistent before. Eventually, growth rate upon {110} facets exists beneath 640 °C (1.10 × 10 3 K -1 ) and gets higher when getting towards low temperatures. Even though the growths at 560 °C and 580 °C are very defective they are in continuance with the evolution presented on the graph of figure 3.4. When the growth rate is too high the facet is not present in the end morphology presented in figure 3.3. However, the presence of a growth rate does not mean that the facet is present in the end morphology. For instance, at 640 °C (1.10 × 10 3 K -1 ) and 660 °C (1.07 × 10 3 K -1 ) the (001) facet is not present in the end morphology as shown in figure 3.3(e) and figure 3.3(f). This gives informations on the conditions of appearance and disappearance of facets. To look closer at it growth rate ratios GR (001) /GR {X X X } are plotted in figure 3.4(b).

By plotting the GR ratios as shown in figure 3.4(b) it can be evidenced that with a lower temperature the growth upon facets {111} A and {110} gets faster. The disappearance of the (001) facet happens for GR (001) /GR {111}A > 2.5 at 640 °C (1.10 × 10 3 K -1 ) GR (001) /GR {111}A > 7 at 660 °C (1.07 × 10 3 K -1 ).

In the following images different sets of partial pressures for temperatures in the range 600 °C (1.15 × 10 3 K -1 ) up to 660 °C will be shown. All the partial pressures used in this section exhibit a P T B As /P T MG a ratio of 5.51.

In figure 3.5 the partial pressure of TMGa is lowered to 1.88 m Torr which is about half of the previously presented value of 3.65 mTorr in figure 3.3. In figure 3.5, four cross-sections of SEG structures deposited at the same partial pressures with a span of 60 °C are displayed. From figure 3.5(a), the growth is rectangular and vertical. A top (001) facet is present as well as To summarize, with P T MG a = 1.88 mTorr the deposition starts by being rectangular horizontal. However, as soon as the deposition is realized at 620 °C the shape is pyramidal an stays that way up to 660 °C. To summarize with P T MG a = 5.32 mTorr the shape evolves as follows: first, at 600 °C the horizontal rectangular shape can be seen and at 620 °C the shape transforms into an vertical rectangle. Afterwards, for temperatures higher than 640 °C the shape becomes an octahedron cross-section. To summarize with P T MG a = 6.89 m the shape evolves as follows: first, at 600 °C (1.15 × 10 3 K -1 ) the horizontal rectangular shape can be seen and at 620 °C the shape transforms into an vertical rectangle. Afterwards, at a temperature of 660 °C the shape becomes pyramidal. For all the growths done above, the ones that present at vertical rectangular shape are the most interesting for the realization of future emitting devices hence, more insight is therefore given on this type of shape for various partial pressures.

Morphology dependence as a function of partial pressure

With an increasing partial pressure of TMGa the growth rate upon all the facets increases as presented in figure 3.8(a). The ratio P T B As /P T MG a is kept constant at a value of 5.51. Data is extracted for a constant ridge width inside the dielectric of 300 nm.

As seen in figure 3.8(a), the growth upon {110} and (001) facets follows a pretty linear trend over the whole range of partial pressures, from 1.88 mTorr to 6.89 mTorr. For the {111} A facets there is not enough information to give a trend at this temperature of 620 °C. The only thing that can be noticed for the {111} A is that they disappear above 3.65 mTorr. Hence, from this observation, one can image the morphology change when changing the partial pressure. At first, for P T MG a = 1.88 mTorr the structure exhibits two top {111} A facets as was shown in figure 3.5(b). Then, when increasing partial pressure to P T MG a = 3.65 mTorr the structure looses its top {111} A facets to only exhibit the top (001) facet and two side {110} facets as displayed in figure 3.3(d). Going on to P T MG a = 5.32 mTorr and P T MG a = 6.89 mTorr, the growth rates upon (001) and {110} raise this leads to higher and larger structures shown respectively in figure 3.6(b) and 3.7(b). From figure 3.8(b), one can look at the growth rate ratios between GR (001) /GR {110} . The ratio GR (001) /GR {110} follows an S shape. This evidences that the lateral expansion of the III-V material is more pronounced with higher partial pressures at 620 °C. This confirms the observations from figure 3.8(a).

From all the above images and graphs, it can be considered that the growths are symmetrical.

They exhibit an axial symmetry along the axis separating the oxide slit in its centre. Now, that an overview of the morphological changes within the temperature range 600 °C to 660 °C, with partial pressures ranging from P T MG a = 1.88 mTorr to P T MG a = 6.89 mTorr, was given it is interesting to look more into details at the changes for the different planes. To do so, the growth rates for each plane for the whole range studied here are plotted on renderings depending on the partial pressure and temperature.

Growth rate change for the (001) plane

Due to the growth evolutions being symmetrical along the axis separating the oxide slit in its centre, only the right side evolution of the facets will be considered for the following graphs. This will allow an easier representation. As the (001) plane is present at some point in all of the growths presented here, it is the first one introduced. In order to analyse the growth upon the (001) facet, the graph presented in figure 3.9 is used to have an overview of the different parameters and their impact on the (001) facet evolution.

Figure 3.9 presents the evolution of the growth rate upon (001), the dark blue squares present the data for samples grown with P T MG a = 1.88 mTorr, in light blue the samples grown with P T MG a = 3.65 mTorr, in pink the samples grown with P T MG a = 5.32 mTorr and in green the samples grown with P T MG a = 6.89 mTorr. The first possible observation is that for each temperature when increasing the partial pressure of TMGa the GR (001) increases as well. However, there is no clear tendency when looking at a specific partial pressure. The GR (001) at a certain partial pressure for all temperatures studied stays in a certain range: around 1.7 nm.s -1 for P T MG a = 1.88 mTorr, around 3.3 nm.s -1 for P T MG a = 3.65 mTorr, around 3.6 nm.s -1 for P T MG a = 5.32 mTorr and around 3.6 nm.s -1 for P T MG a = 6.89 mTorr. Which is consistent with a growth happening in the mass-transport limited regime, similarly to what would happen for a blanket growth of GaAs on top of Si (001). Yet, even though the growth rate is similar at a given partial pressure, for all the studied temperatures, it is not always at the same given temperature, for all partial pressures considered, that the growth rate is highest. For example, at a given partial pressure, the growth rate is highest at 640 °C (1.10 K -1 ) for Figure 3.9 -Growth rate for facet (001) as a function of temperature and TMGa partial pressure.

The ratio P T B As /P T MG a is kept constant at a value of 5.51. Data is extracted for a constant ridge width inside the dielectric of 300 nm.

P T MG a = 1.88 mTorr, at 620 °C (1.12 K -1 ) for P T MG a = 3.65 mTorr and P T MG a = 5.32 mTorr and at 660 °C (1.07 K -1 ) for P T MG a = 6.89 mTorr.

Growth rate change for the {110} planes

As for the (001) plane, here is presented the growth upon the {110} planes using the graph presented in figure 3.10. This allows to have an overview of the different parameters and their impact on the {110} facets evolution.

Figure 3.10 presents the evolution of the growth rate upon {110}, the colours used are the same as previously used for the (001) plane: the dark blue triangles present the data for samples grown with P T MG a = 1.88 mTorr, in light blue the samples grown with P T MG a = 3.65 mTorr, in pink the samples grown with P T MG a = 5.32 mTorr and in green the samples grown with P T MG a = 6.89 mTorr. Similarly to the (001) plane, for each temperature when increasing the partial pressure of TMGa GR {110} increases as well. Yet, contrary to, the (001) plane GR {110} increases while the temperature lowers. However, this does not lead to a disappearance of the facet at This leads to the disappearance of {110} planes at high partial pressures and low temperatures as the cross-section display it in figure 3.6(a) and figure 3.7(a).

One can then look at the growth rate ratio between planes {110} and (001) as displayed on figure 3.11. From figure 3.11, it can be seen that for all the partial pressures the growth ratio GR {110} /GR (001) increases with a decreasing temperature. This can be matched to the previously observed forms of the presented cross-sections. Indeed, with a lower temperature the shape of the III-V ridge becomes rather rectangular first vertical and with an even lower temperature horizontal. This will be explained in further details in section 3.1.7. However, there is no growth rate ratio that is linked to a specific morphology, it is rather dependent on the partial pressure and temperature. For instance, for GR {110} /GR (001) =0.2 at 600 °C (1.15 × 10 3 K -1 ), with P T MG a = 6.89 mTorr the morphology is vertical rectangular as shown in figure 3.7(a), at 620 °C (1.12 × 10 3 K -1 ), with P T MG a = 3.65 mTorr the morphology is vertical rectangular as displayed in figure 3.3(d) but when P T MG a = 1.88 mTorr the morphology is pyramidal as shown in figure 3.5(b). Therefore, this growth rate ratio between facets {110} and (001) cannot alone explain the obtained morphologies. One has also to look at the growth rate ratio between facets {111} and {110} and {111} and (001).

Growth change for the {111} planes

Only the {111} A are discussed in this section as the growth rate of the {111} B planes is too low to be adequately analysed. As for the previously displayed planes, here is presented the growth upon the {111} A planes using the graph shown in figure 3.12 this allows to have an overview of the different parameters and their impact on the {111} A facets evolution. When looking at the growth rate ratios between the facets more insight can be given. 3.13(a) that for GR {111} /GR (001) < 0.5 the shape is pyramidal and that for GR {111} /GR {110} > 1 the shape is also pyramidal.

Discussion on the obtained morphologies

The growth ratios between the different planes lead to the above observed SEG faceting. For the whole studied range, the faceting can take four different morphologies presented in figure 3.14.

From the morphologies obtained in figure 3.14, it can be seen that the shape of the GaAs grown ridges results of a simple geometrical construction. This can be explained by the fact that growth kinetics anisotropy is the root cause for SEG faceting [START_REF] Gil-Lafon | Selective growth of GaAs by HVPE: keys for accurate control of the growth morphologies[END_REF][START_REF] Dutartre | Facet propagation in si and SiGe epitaxy or etching[END_REF]. Hence, some very simple criteria can be given for the evolution from the rectangular horizontal morphology presented in figure 3.14(a) to the Octahedron cross-section morphology shown in figure 3.14(d). The criteria are extracted with the help of the growth schematic presented in figure

3.14(e).

When, transitioning from the horizontal rectangular shape of figure 3.14(a) to the vertical rectangular shape of figure 3.14(b) the geometrical criterion corresponds to the appearance of the {111} B planes and is expressed as follows: GR {110} >GR {111} B /si n(θ {111} ).

Afterwards, the shift from the vertical rectangular shape shown in figure 3.14(b) to the cropped octahedron cross-section morphology presented in figure 3.14(c) depends on the appearance of {111} A planes while, keeping the top (001) plane. Therefore, the criterion is GR {111} A < GR {110} si n(θ {111} ) for the appearance of {111} A planes added to GR (001) > GR {111} A /cos(θ {111} ) which allows the top (001) plane to still be present. This can be linked to the observed growth ratios presented in figure 3.13(a) and figure 3.13(b) where it was extracted that to observe a pyramidal shape GR {111} /GR (001) < 0.5 and GR {111} /GR {110} > 1. Indeed, form the geometrical relationship obtained here to get a pyramidal shape one has to get GR {111} /GR (001) < cos(θ {111} ) with GR {111} A < GR {110} si n(θ {111} ) and cos(θ {111} ) = 0.58 and si n(θ {111} ) = 0.81. Therefore, the two experimental conditions obtained from figure 3.13 are verified geometrically.

Finally, the disappearance of the top (001) plane leads to the transformation of the cropped octahedron cross-section morphology displayed in figure 3.14(c) to the octahedron crosssection morphology shown in figure 3.14(e). Thus, the criterion for the disappearance of the top (001) plane is GR (001) > GR {111} A cos(θ {111} ) [1 + t an 2 (θ {111} )].

Appearance of {111} B planes Appearance of {111} A planes Disappearance of (001) plane

GR {110} >GR {111} B /si n(θ {111} ) GR {111} A <GR {110} si n(θ {111} ) with GR (001) >GR {111} A /cos(θ {111} ) GR (001) >GR {111} A cos(θ {111} ) [1 + t an 2 (θ {111} )]
Table 3.1 -Geometrical conditions for the appearance and disappearance of planes for GaAs ridges grown on top of Si (001) along the <110> direction.

All of these criteria are reported in table 3.1.

Those results allow to conclude that the SEG faceting is controlled solely by the growth rate anisotropy as it was previously demonstrated for selective epitaxies of Si and Si-Ge grown by CVD [START_REF] Dutartre | Facet propagation in si and SiGe epitaxy or etching[END_REF] as well as for selective epitaxies of GaAs grown by HVPE [START_REF] Gil-Lafon | Selective growth of GaAs by HVPE: keys for accurate control of the growth morphologies[END_REF][START_REF] Napierala | Control of the growth morphologies of GaAs stripes grown on patterned substrates by HVPE[END_REF]. The fact that SEG of GaAs by MOCVD is governed by the kinetics highlights the available tuning potential that one has to control the shape in order to engineer reproducible specific morphologies.

Now that an overview of the morphological dependencies on temperature and partial pressures was given, it is possible to focus the attention on the growth rate variations happening while the epitaxy is realized. Indeed, two other major effects of SEG independent on the growth parameters can be evidenced. First, there are growth rate changes during the deposition process. Moreover, depending on the width of the ridge inside the dielectric the growth rate also changes, which can be seen from the markers evolution in figure 3.3, figure 3.5, figure 3.6 and figure 3.7. However, it will be shown that the structuration of the ridge, either flat or V-grooved, does not affect the outer morphology of the III-V material.

Growth rate as a function of the deposition time

First of all, from figure 3.3, it is possible to notice a slight decrease of thickness between each marker for all the presented cross-sections. A closer look is taken at the growth at 620 °C, which has a vertical rectangular shape that is the most interesting for the targeted application. The growth is happening with P T MG a = 3.65 mTorr and P T B As = 20.1 mTorr and it is possible to extract the growth evolution over time as displayed in figure 3.15, thank to the use of In 0.2 Ga 0.8 As spacers.

From figure 3.15, it is obvious that the growth upon (001) and {110} facets is dramatically decreasing with the cumulated time of epitaxy. This has to do with the volume of the III-V grown ridge. Indeed, the volume increases as the deposition goes on. Yet, if one extracts from the cross-section the total volume of deposited material onto the structure, it stays constant during the whole deposition window. Hence, in order for it to have a constant incorporation into the solid the growth rate has to decrease. This is in compliance with a growth happening in the mass-transport limited regime as was discussed previously in section 3.1.5. This is of utmost importance when thinking about growing multiple quantum well structures. Indeed, the decrease in growth rate will have to be impacted so as to have quantum wells with the same thicknesses hence a single emission wavelength. This is in accordance with previous observations [START_REF] Kunert | III/V nano ridge structures for optical applications on patterned 300 mm silicon substrate[END_REF]. Yet, by looking at the growth ratios presented in figure 3.15(b) the morphology can change during the growth. Indeed, the growth ratios are not constant, in the case of GR (001) /GR {110} the ratio decreases over time, yet in the case of GR (001) /GR {111} the ratio increases over time. Hence, the growth first exhibits a (001) facets with two {111} facets on the sides and after some time the (001) facet disappears and a {110} facet appears and becomes more prominent over time.

The fact that the overall growth rate diminishes during the growth is also true for the other temperatures and partial pressures studied in this section.

Obviously, as the growth rates change during the deposition, all the growth rates presented here are mean growth rates. They are computed by averaging the different growth rates throughout the deposition time.

Growth rate fluctuation as a function of ridge width

Secondly, depending on the ridge width in the dielectric pattern the growth rate also varies. Here, a one step deposition was made after the nucleation step. Here, the high temperature growth step was realized at 600 °C with P T MG a = 3.65 mTorr and P T B As = 20.1 mTorr. Hence, from the previous figure 3. 3(d) the growth has a rectangular shape and can be analysed easily using AFM measurement for the height of the structure and SEM for the width of the structure.

From the graph displayed in figure 3.16, it is possible to discern 3 width ranges. Beneath 250 nm the growth rate increases. From 250 nm and up to 600 nm the growth rate upon (001) exhibits a plateau value of about 1.20 nm.s -1 . Eventually, for larger widths the growth rate drastically decreases. For the growth upon {110} the variations are smaller due to a three times lower GR. However, the variations are similar with a plateau value at 0.35 nm.s -1 . By looking at the the growth rate ratio GR (001) /GR [START_REF] Akiyama | Growth of GaAs on Si by MOVCD[END_REF] the value is almost constant at 3.3 which emphasizes the fact that the growth rate variations for the two facets presented here are similar identical whatever the ridge width inside the dielectric.

Last but not least, all the growths presented previously were deposited on flat seed areas of silicon. Yet, it can be of advantage in defect filtration to have a "V-groove" structuration of the silicon, as will be shown in section 3.2.3. Therefore, it is important to compare how this structuration affects the growth.

Morphology dependence on bottom ridge structuration

The growth inside the cavity is dependent on the form of it, however once the growth has flattened outside the dielectric, the growth happens in the same way. Indeed, as one can see in figure 3.2 in the flat case displayed in figure 3.2(a) the growth is "flat" and exhibits a (001) facet as well as two {110} facets after sometime. However, in the V-groove case, the growth is first parallel to the {111} facets and then flattens to exhibit solely a (001) facet and the two {110} side facets.

Some differences can be noticed in terms of growth rate as shown in table 3.2. This is due to the change in the mask opening ratio. Indeed, when performing the dipping into the TMAH solution to obtain the V-groove structuration a certain number of very small patterns where lifted. Thus, leaving a larger bare silicon surface. As previously, stated the deposition takes place in the mass-transport regime. Therefore, with a higher opening ratio the growth evidently decreases. Nonetheless, the growth ratio between the facets is almost identical. Thus, the two depositions can be considered similar. What is observed here for a specific set of temperature and partial pressures was also observed in all the rectangular shaped cases. It might also be the case for the pyramid shaped cases nevertheless it was not part of the study presented here.

Those two important changes, growth rate change during deposition time as well as the growth rate change depending on the ridge width inside the dielectric, have to be taken into account when growing thick layers. Indeed, growth rate variation has more and more impact the thicker the layers.

From the study provided here, it is possible to know how to obtain a vertical rectangular shape and how to control it during the deposition. While, it is important to understand morphology and kinetics in SEG growth, another important parameter when one intends to grow stacks for emitting devices is the dislocation reduction. In the following section the dislocation reduction will be tackled using the ART method.

Dislocation reduction strategies

As defects, be it APBs or TDs or SFs, have a disastrous impact on the performance of optical emitters [START_REF] Liu | Origin of defect tolerance in InAs/GaAs quantum dot lasers grown on silicon[END_REF]. Many techniques are of interest to reduce or even annihilate them as presented in chapter 1. Here, the interest is the use of the aspect ratio trapping method. Currently, there is only one paper to date on III-V SEG that gives quantified results on the effectiveness of this technique [START_REF] Kunert | How to control defect formation in monolithic III/v hetero-epitaxy on (100) Si? a critical review on current approaches[END_REF]. In order to do so, the paper uses the Electron Channelling Contrast Imagery (ECCI) technique which has been used for a long time in metals [234] to characterize twins and dislocations. Several uses of the ECCI technique on III-V as well as Si-Ge layers and heterostructures have been made over the years [START_REF] Picard | Electron channeling contrast imaging of atomic steps and threading dislocations in 4h-SiC[END_REF][START_REF] Picard | Nondestructive analysis of threading dislocations in GaN by electron channeling contrast imaging[END_REF][START_REF] Naresh-Kumar | Rapid nondestructive analysis of threading dislocations in wurtzite materials using the scanning electron microscope[END_REF][START_REF] Carnevale | Rapid misfit dislocation characterization in heteroepitaxial III-V/Si thin films by electron channeling contrast imaging[END_REF][START_REF] Carnevale | Applications of electron channeling contrast imaging for the rapid characterization of extended defects in III-V/Si heterostructures[END_REF][START_REF] Yaung | Threading dislocation density characterization in III-V photovoltaic materials by electron channeling contrast imaging[END_REF][START_REF] Deitz | Characterization of encapsulated quantum dots via electron channeling contrast imaging[END_REF]. Nonetheless, the analysis were made on blanket depositions. The first report on the use of ECCI on SEG, was done on SiGe ridges [START_REF] Schulze | Non-destructive characterization of extended crystalline defects in confined semiconductor device structures[END_REF] and afterwards used by B. Kunert's group [START_REF] Kunert | How to control defect formation in monolithic III/v hetero-epitaxy on (100) Si? a critical review on current approaches[END_REF]. Thus, we provide measurements of the dislocations densities attained on our samples and compare them to the measurements provided on B. Kunert's paper as well as standard dislocation densities exhibit on blanket grown layers.

ECCI technique

As described in chapter 1 the ECCI technique has been proved efficient to observe and quantify III-V defects including dislocations. As the technique is fairly new for defect observations in III-V materials [START_REF] Picard | Nondestructive analysis of threading dislocations in GaN by electron channeling contrast imaging[END_REF][START_REF] Carnevale | Rapid misfit dislocation characterization in heteroepitaxial III-V/Si thin films by electron channeling contrast imaging[END_REF][START_REF] Carnevale | Applications of electron channeling contrast imaging for the rapid characterization of extended defects in III-V/Si heterostructures[END_REF][START_REF] Yaung | Threading dislocation density characterization in III-V photovoltaic materials by electron channeling contrast imaging[END_REF], here are provided some points of comparison between a SEM top-view and an ECCI image taken at the same place. To be able to observe the same zones, platinum localization points were deposited inside a FIB-SEM. Then the ECC image was realized and afterwards the top-view lamella was harvested from the previously observed zone. The characterizations were made on a blanket epitaxial layer of GaAs on Si (001) with quantum dots of InAs grown on top.

Obviously, from both figures 3.18 the analysis of defects is complicated by the presence of the InAs quantum dots on top of the layer. However, one can still compare both techniques by taking a closer look at the images.

First, one has to know what is being observed. From the SEM image presented in figure 3.18(a), one can retrieve the thickness of the lamella by looking at the stacking faults indicated with rectangles. As seen in figure 3.18(a) they seem very large. Yet, this is due to the way they propagate inside the layer. Indeed, they lie along the {111} planes [START_REF] Volz | Growth of III/Vs on silicon[END_REF]. Hence, they make an angle of 54.7 °when originating from a (001) surface. Therefore, here the lamellae presented here is calculated to be 40 nm thick in average. This means that on this image one can see the defects that were present in the top 40 nm of the epitaxial layer. Now, if one looks at the ECCI image in figure 3.18(b), it is not possible to know precisely the depth of analysis obtained here. Hence, the comparison with the SEM top-view is needed to have an accurate idea of what is imaged.

When comparing the images in figure 3.18 most of the defects can be imaged with both techniques. The different colours are here to show the differences present between the two techniques: green no difference, blue the ECCI technique images the defect but not the topview lamella one and vice-versa for the orange. The green circles represent 77% of the total of dislocations, the blue circles 20% and the orange circles 3%. From these ratios it seems that even though most dislocations are discernible with both techniques the ECCI technique seems more precise. By looking closer at the location of the blue circles in figure 3.18(a), it can be noticed that they are mostly present where the contrast differs from the location of the green circles. This can be explained by the need to slim the lamella using ions. Hence, even on such small scales, it is difficult to keep a similar thickness on the whole lamella. Thus, the thickness is not the same throughout the lamella which can affect the observations. For instance, in figure 3.18(a) the blue circles appear in a darker zone hence a thicker zone, which possibly hinders the contrast and does not allow for a good observation. However, this is not the case with the ECCI technique as it does not require any preliminary sample preparation. Therefore, the only important information is to know the width which is probed in the sample with the technique. From the previous observations, it is safe to assume that it only probes the emerging defects as most of the defects that are seen in both cases are seen in the thinner part of the lamella. Moreover, the stacking faults are not thick as they are in the lamella case, pointing that they are imaged at 1 point in the layer, here the emerging part.

Therefore, it can be safely assumed that the ECCI technique used with our observation conditions (the acceleration voltage is 30 KV and the current probe is of the order of the nA) only probes the top surface of the epitaxial layer. Consequently, this technique gives precise information to account for the emerging defects on top of the epitaxial layer. As no sample preparation is required to observe those defects with this technique, it is perfect for the

Dislocation reduction strategies

observation of defects on selective epitaxial growths.

Main peculiarity of dislocation quantification on selective epitaxial growths

When, observing dislocations on blanket epitaxial layers, the dislocation density is obviously given as a function of a surface. However, with SEG one can evidently give the dislocation density, but this is not a sufficient information. Let us take the example of two ridges with a different width inside the dielectric. For the same growth time and thus the same epitaxial layer thickness the top surface will not exhibit the same surface for a given length due to differences in GR previously studied. Therefore, it is most important to add another key indicator: the linear dislocation density. In the upcoming characterizations the following parameters will hence by given:

• Surface dislocation density;

• Linear dislocation density;

• Width of the ridge inside the dielectric, W d i el ect r i c ;

• Aspect ratio (AR) trapping defined as h d i el ect r i c W d i el ect r i c ;

• Height of the epitaxial layer outside the dielectric along the <001> direction, h out .

The different parameters are shown on the schematic cross-sections displayed in figure 3.19.

Comparison of flat and V-groove shaped ridges on dislocation propagation

From a simple geometrical point of view and the type of dislocations that propagate in III-V materials grown upon silicon, 60°dislocations, one can already assume that the v-groove openings on the bottom of the ridges will have a benefit allowing for lower aspect ratios, and thinner buffers compared to flat ridges. This becomes very straight forward when characterizing the ridges with ECCI. Indeed, as seen from figure 3.20 it seems that for the same aspect ratio they are much more defects in the flat ridge case compared to the V-grooved case. Obviously, the images presented here, are not representative of a large enough surface to extract a density of dislocations. However, when looking at large enough surfaces one can acknowledge that the images displayed in figure 3.20 are somewhat informative of what the observations can be like, along the direction of the wire.

For the sample presented in figure 3.20(a), a total surface of 2.4 ×10 -8 cm -2 was analysed along a 9.8 µm wire section. The total linear density of dislocations was 2.8 dislocations.µm -1 , and for stacking faults 0.8 SFs.µm -1 . For the analysed surface the total surface density was hence 9.5 ×10 8 dislocations.cm -2 and 3.3 ×10 8 SFs.cm -2 . For the sample presented in figure 3.20(b), a total surface of 1.6 ×10 -8 cm -2 was analysed along a 10 µm wire section. The total linear density of dislocations was 0.8 dislocations.µm -1 , and for stacking faults 0.4 SFs.µm -1 . For the analysed surface the total surface density was hence 4.7 ×10 8 dislocations.cm -2 and 2.4 ×10 -8 SFs.cm -2 . These vlues are reported in table 3.3.

As assumed at the beginning of the section the V-groove option is much more effective at filtering the defects for identical aspect ratios and similar deposited layers. In the following section the impact of the aspect ratio will be analysed solely on V-groove structured ridges.

Impact of the aspect ratio

Several samples were analysed, either simple GaAs layers or for the thicker ones heterostructures containing AlGaAs and InGaAs layers. Yet, the samples are still comparable as there is no relaxation of the AlGaAs and InGaAs layers grown on GaAs. In table 3.3, the need for a linear dislocation density can be evidenced clearly. Indeed, for similar dislocation densities the linear density can be reduced up to three times. The best dislocation densities that were obtained on the samples are of the order of a dislocation every 2 µm along the direction of the oxide slit.

From the few samples presented in table 3.3, it seems for the bottom four samples that the higher the aspect ratio trapping the lower the linear dislocation density. However, by comparing the second and last sample that have the same aspect ratio of 0.9 it is not as straightforward. Moreover, for the two last samples the linear dislocation is the same however one the 0.9 aspect ratio is half more important than the 0.6 aspect ratio. Hence, as these depositions were made using the same surface preparations, only the underlying silicon quality could impact as much the deposition. Therefore, for such nano-ridges the quality of the underlying silicon as well as its preparation before the growth is of utmost importance.

By taking some of our best samples and comparing them with the literature one can obtain the graph presented in figure 3.21.

For small aspect ratios the dislocation density is very close to what one can obtain with Ge buffers on silicon [START_REF] Richter | GaAs on 200 mm Si wafers via thin temperature graded Ge buffers by molecular beam epitaxy[END_REF][START_REF] Bogumilowicz | Anti-phase boundaries-free GaAs epilayers on "quasi-nominal" Ge-buffered silicon substrates[END_REF]. However, with high aspect ratios, higher than 1.4 [START_REF] Cipro | Metalorganic vapour phase epitaxy and characterization of III-As semiconductors on silicon substrate in a microelectronic platform[END_REF][START_REF] Kunert | How to control defect formation in monolithic III/v hetero-epitaxy on (100) Si? a critical review on current approaches[END_REF], the defect filtration becomes interesting for thin layers. Hence, the aspect ratio technique is very interesting to attain dislocation densities of the order of 10 6 dislocations.cm -2 . Thus, this would allow to diminish the thick buffer layers required to make the filtration of defects used nowadays. Usually, such buffers are around 2 µm, here one could envision to diminish the buffer layer to beneath 500 nm with very high aspect ratios.

What would be the best obtainable structure for a horizontal light emitting device ?

From all the preceding developments it is possible to determine the parameters to have the best possible ridge structuration to grow a rectangular ridge as well as the best possible substrate structuration to lessen, to the maximum, the dislocation density.

First, it is very important to lessen the dislocation density as it has a real impact on the performances of the devices [START_REF] Liu | Origin of defect tolerance in InAs/GaAs quantum dot lasers grown on silicon[END_REF]. Therefore, from the references presented in the previous section [START_REF] Cipro | Metalorganic vapour phase epitaxy and characterization of III-As semiconductors on silicon substrate in a microelectronic platform[END_REF][START_REF] Kunert | How to control defect formation in monolithic III/v hetero-epitaxy on (100) Si? a critical review on current approaches[END_REF], it would be best to have an aspect ratio at least of 1.4. Hence, as it is best to have a dielectric which has the lowest thickness possible for etching considerations a slit width of 100 nm with a 140 nm dielectric height, up to a 200 nm slit width with a 280 nm dielectric seems easily attainable with standard etching techniques to open the various patterns. Then, as the future integration is envisioned on standard SOI wafers [START_REF] Norman | Perspective: The future of quantum dot photonic integrated circuits[END_REF][START_REF] Liu | Photonic integration with epitaxial III-V on silicon[END_REF] this has to be taken into account for the dielectric thickness. However, buried oxide (BOX) thicknesses in silicon on insulator wafers can be produced in several thicknesses depending on the application. Therefore, not requiring harsh specific dimensions on the dielectric thickness. Thus, the given dielectric thicknesses and slit widths are coherent with what can be made nowadays in silicon platforms.

Next, the size of the emitting light source has to be defined. Currently, standard laser diodes demonstrated by bonding techniques are around 1 -3 µm in width and several hundreds of microns in length. Evidently, it is better to have a vertical ridge as presented in the beginning of this chapter in figure 3.1. Obviously, with the possible faceting of the ridge that has been shown in the previous sections, it is easy to attain 1 µm in width where the active part lies if the growth exhibits large {111} B planes as shown in figure 3.22. This would be rendered possible using the process point at 600 °C and P T MG a = 3.65 mTorr with a given growth time for W d i el ec t r i c = 100 nm or using a 5% lower growth time for W d i el ect r i c = 200 nm from what is shown in figure 3.22.

Figure 3.22 -Schematics of the optimal obtainable structure for a horizontal light emitting device.

However, from the simulation made in chapter 2, it seems possible to have sufficient mode confinement from W I I I -V = 300 nm. And optical pumping of SEG III-V ridges have been demonstrated for even smaller widths [START_REF] Wang | Room-temperature InP distributed feedback laser array directly grown on silicon[END_REF][START_REF] Kunert | III/V nano ridge structures for optical applications on patterned 300 mm silicon substrate[END_REF][START_REF] Shi | Optical gain characterization of nano-ridge amplifiers epitaxially grown on a standard Si wafer[END_REF][START_REF] Han | InGaAs/InP quantum wires grown on silicon with adjustable emission wavelength at telecom bands[END_REF][START_REF] Han | Telecom InP/InGaAs nanolaser array directly grown on (001) silicon-on-insulator[END_REF][START_REF] Ng | Mechanism of wavelength tuning over 200 nm range from InP/InGaAs nano-lasers grown on SOI[END_REF].

Therefore, it seems the most important thing is the rectangular shape of the ridge to be able to integrate the contact on the top of the ridge as it will be presented in the perspectives. Thus the vertical rectangular shape is attainable for all temperatures considered in the previous study by changing the TMGa partial pressure. This could be of use for the integration of AlGaAs layers for example. Indeed, they were shown to exhibit very high roughness at 620 °C but this was suppressed at temperatures of 650 °C as displayed in chapter 2 in table 2.3.

Finally, it is important to consider how the mode of horizontal light-emitting structure will be coupled to the chip's circuitry as will surely impact the efficiency of the coupling. Yet, this is not the primary purpose of this work, therefore, this will be discussed in the perspective part of the report.

Study of quantum wells integration inside selectively grown fins

In this section, it will be shown that it is possible to address a range of applications by using several materials in selective epitaxial grown ridges.

Series

AlGaAs/AlGaAs active part for red emission

The heterostructure presented here is the one that was defined in chapter 2 with the RSoft-LaserMOD software to obtain red emission. The Al composition of the barriers, cladding layer and quantum wells were calculated to be 45% and 30% respectively. The thickness and composition of the bottom cladding layer is estimated to be around 400 nm to avoid the optical losses in the underlying GaAs buffer and silicon substrate as well as with the GaAs capping layer. The ideal structure is presented in figure 3.1.

The growth of this structure by SEG-ART has been studied. To reduce the structural defects density [START_REF] Cipro | Low defect InGaAs quantum well selectively grown by metal organic chemical vapor deposition on Si(100) 300 mm wafers for next generation non planar devices[END_REF] in the active part of the device, a 400 nm GaAs buffer layer is grown inside the SiO 2 cavity before the growth of the AlGaAs cladding layer and multiple quantum wells out of the cavity. To avoid air exposure of Al containing layers, a GaAs capping was deposited at the top of the vertical structure. The relevant growth parameters for this study are reported in table 3.4 and have been calibrated on blanket wafers to match the right composition.

The typical ART process starts with the direct growth of a GaAs layer on the Si {111} planes using a standard two steps process (LT+HT) [START_REF] Cipro | Low defect InGaAs quantum well selectively grown by metal organic chemical vapor deposition on Si(100) 300 mm wafers for next generation non planar devices[END_REF]. The growth temperature, T g r ow t h , for the HT step has been varied from 600 °C to 650 °C. Figure 3.23 presents cross-sections of samples A1 and B1 after the complete heterostructure growth. If we focus solely on the GaAs buffer layer, the impact of T g r ow t h on the GaAs shape is obvious. For A1 sample (600 °C), presented in figure 3.23(a), a rectangular GaAs buffer made of one (001) top plane and two {110} facets at the sidewalls is formed. For B1 sample (650 °C), shown in figure 3.23(b), a pyramidal GaAs buffer made of two {111} and two {110} facets is obtained. A third shape called nailhead structure, sample C2, is formed as growth proceeds at 650 °C but with a shorter growth time than samples from series B. This growth temperature effect on morphology during SEG was previously discussed in section 3.1.2 and will not be discussed further. We wanted to point out the fact that for device purpose, the rectangular shape with a flat top surface is desirable for the growth of QWs. Each GaAs buffer appears as the darker region in the image. We will now show that the cladding layer (between the GaAs buffer and the QWs) properties grown with the same conditions depends strongly on the shape of the GaAs buffers. At a first order, different zones labelled 2, 3, 4, corresponding to AlGaAs growth on various facets, namely (001), {110}, {111}, present different Al contents. The various grey levels seen in these figures can be associated with various degrees of Al content, as STEM is sensitive to the atomic weight. As Al is a light element the lighter the grey level, using a BF detector, the more Al incorporation there is in the AlGaAs layer. A strong dependence of Al incorporation with the crystalline nature of facets is demonstrated.

Furthermore, the chemical composition of each zone has been analysed by EDX. Linear profiles have been extracted at three different vertical positions corresponding approximately to the bottom, the middle and the top of the cladding layers. As a typical example, figure 3.24 presents the chemical profiles on three different lines along the cross-section of sample C2.

At the basis of the nailhead, labelled 1 in figure 3.24(a), the AlGaAs growth occurred on the {110} facets and reached a uniform composition of about 15%. From the second profile, (green line), we notice two distinct regions with an Al composition of 25% (zones 4a and 4b) and 15% (zones 3a and 3b) as growth proceeds on {111} and (001) facets respectively. The zones have symmetrical percentages of Al along the centre of the ridge. Two zones (2 and 3) remain at the top of the cladding layer with a composition of 15% and 25%. For all the samples, the growth rates are from highest to lowest obtained in the following order {111} > (001) > > {110}. From table 3.5, the Al incorporation is from highest to lowest grown upon the following facets (001) > {111} > {110}. It is possible to notice that for samples with number 2, which are grown with doubled partial pressures compared to samples with number 1, the aluminium incorporation in each zone is approximately doubled compared to the same zone in samples with number 1, which is consistent with the increase of the TMAl flux. From these observations, it is not easy to correlate the growth rate with the incorporation of Al in the different zones as it was previously shown for In incorporation in In x Ga 1-x As alloys grown on different orientations by Elsner et al. [245].

However, similar findings to our structures were also shown by Borg et al. They report the growth of InGaAs horizontal structures using Template Assisted Selective Epitaxy (TASE) [246]. Their structures were grown inside a horizontal template having the same shape as our finished structures. Their structures exhibit two compositional regions comparable to our series A samples. Due to their use of TASE the main mechanism explaining the incorporation differences are reaction limited. This allows to govern the growth by a facet-dependent chemical reaction [246]. In our case we should not be limited by chemical rate but rather by mass transport as our AlGaAs growth occurs outside the patterned trenches hence, entering in a regime where one should start exhibiting similar growth as on planar substrates. Nonetheless, we also seem to be in the limited reaction regime. Indeed, similar structures grown on nonplanar substrates exhibiting compositional variations depending on the crystallographic planes they are grown upon were presented by Biasiol and Kapon [247]. They referred to them as "self-limiting" due to the appearance of a growth front between the various compositions. Their self-limiting evolution depends on growth rate anisotropy exhibited on the different facets and capillarity induced diffusion. Here, we observe that the different growth rates that we have on the various facets plays a critical role. We will also show that we exhibit capillarity induced diffusion.

Schematic scenarios for the growth of AlGaAs on the different shaped GaAs buffer layers are drawn in figure 3.25. Faster growth rate upon {111} facets always leads to its disappearance, leaving room for growth only on (001) and {110} facets. A similar effect was depicted for silicon SEG at high temperatures [START_REF] Dutartre | Facet propagation in si and SiGe epitaxy or etching[END_REF]. The zone grown on the (001) facet allows for a smooth integration of quantum wells at the top of the structure with desired composition for red emission. The impact of the heterostructures grown on the {110} facets has to be evaluated. between zone 2 and 3a can be observed. From the zoom shown in figure 3.26(b), one can see a very dark contrast at the junction of the two growth fronts of zones 2 and 3a. A closer look can be taken by paying closer attention at the transition between the GaAs buffer and the cladding layer, where growth starts both on (001) and {111} planes as displayed in figure 3.26(c). Actually, one can see a curved GaAs structure where one could expect an edge between (001) and {111} facets. On each side of the curvature the two zones 2 and 3a can be well identified.

Added to that, one can recognize the very dark contrast at the growth front and notice that it starts close to the curvature of the GaAs. This almost black contrast can be attributed to a fluctuation of Al content.

This singularity was also documented in corner-overgrown GaAs/AlGaAs core-shell nanowires [START_REF] Steinke | Nanometer-scale sharpness in corner-overgrown heterostructures[END_REF][START_REF] Mancini | Three-dimensional nanoscale study of al segregation and quantum dot formation in GaAs/AlGaAs core-shell nanowires[END_REF]. It was associated with curvature-induced capillarity effects, leading to ternary alloy segregation and hence allowing aluminium fluctuation [START_REF] Rudolph | Spontaneous alloy composition ordering in GaAs-AlGaAs core-shell nanowires[END_REF][START_REF] Loitsch | Suppression of alloy fluctuations in GaAs-AlGaAs core-shell nanowires[END_REF]. In our case segregation of aluminium from high Al-content to low Al-content zone could explain this effect. Indeed, from Biasol and Kapon's paper [247] the non-uniformity of the chemical profile and the strong bonds exhibited by Al towards As compared to Ga bonds to As boosts Al incorporation at the convex edges. Therefore, we can safely assume that the specific growth we obtain can be explained solely by the growth rate anisotropy and the capillarity induced effects on the convex edges.

To investigate the impact of the various Al incorporation in function of the GaAs shaped buffer, cathodoluminescence (CL) experiments were made at 10 K in cross-section and in top-view. In regards to the A1 sample, shown in figure 3.27(d), the contribution from the GaAs is very low which is attributed to the geometry of Al incorporation inside the structure. One can find similar contributions as the one seen in B1 sample. Quantum wells emit around 700 nm +/-5 nm, the underlying AlGaAs region emits between 760 nm and 825 nm. The barriers have an emission around 675 nm +/-10 nm.

For both samples the emission from the quantum wells and the barriers are localized at the centre of the ridge. As shown in figure 3.26(b), the quantum wells curvature observed between zone 2 and 3 allows to have a particularly well confined emission zone on the centre part of the structure. This phenomenon has already been reported by Kunert et al. [START_REF] Kunert | III/V nano ridge structures for optical applications on patterned 300 mm silicon substrate[END_REF].

However, the signal intensity is much higher in sample A1 than in sample B1. From this, it is then possible to see that the underlying morphology of the samples seems to play a key role in the optical response of the structure. Therefore, it is of utmost importance to understand how the facet growth happens in order to get the best emitting structure for a future integration. CL taken in top view reveals the presence of dark spots which could be attributed to crystalline defects. Indeed, although ART method has been used to prevent the propagation of defects outside of the cavities, the aspect ratio height of our sample's cavities is 0.35 whereas, a value above 1.43 is required to be really effective [START_REF] Kunert | How to control defect formation in monolithic III/v hetero-epitaxy on (100) Si? a critical review on current approaches[END_REF]. Accordingly, some defects should still propagate to the top part of the structure. A defect analysis was then performed to see if the registered number of dark spots could be connected to a measured defect density. The presence of crystalline defects inside our heterostructures has been analysed by SEM in cross section perpendicularly to the wire (figure 3.29(a)) and along the wire direction (figure 3.29(b)). The images reveal that most of the dislocations are confined in the bottom part of the ridge. The top view image taken using a backscattered electron detector inside a SEM, allows to image existing defects at the surface by ECCI technique on a relevant total area of around 1.8 × 10 -7 cm 2 .

In a 2 µm long section only, one twin is observed and the defects density beneath the quantum wells position is evaluated to be 2.8×10 8 cm -2 . Half of the defects are linear ones and the other half are planar ones. The total number of defects can also be accounted as a linear density, here 1.6 defects/µm. As a comparison, it is possible to observe around 42 extinction points in CL analyses for a 30 µm long wire. The linear density is hence 1.4 dark spots/µm which is consistent with the crystalline defect linear density. Thus, it highlights the importance of mastering the propagation of the defects to confine them in the trench part. Our results are consistent with the ones from Kunert's group [START_REF] Kunert | How to control defect formation in monolithic III/v hetero-epitaxy on (100) Si? a critical review on current approaches[END_REF] obtained for similar sized trenches.

We have presented an analysis of compositional variation in the case of selective growth of AlGaAs multilayers on GaAs using selective epitaxial growth inside V-groove SiO 2 stripes on (001) silicon 300 mm. We can acknowledge the specific type of growth depending on crystallographic orientation that happens with AlGaAs alloys using EDX measurements and TEM microscopy. We confirmed that our structures show higher Al incorporation upon the (001) facet. Moreover, the "self-limiting" growth phenomenon favours the expansion of the top facet. This allows a planar integration of quantum wells. We also demonstrated that the underlying morphology highly impacts the optical response. One needs to favour the simpler underlying structure. Indeed, by lessening the number of compositional areas the better the optical response of the structure is. We also emphasize the importance of decreasing the defect density as they hinder drastically the luminescence of parts of the sample. From all the above characterizations the rectangular shaped GaAs configuration, made of one (001) top plane and two {110} facets at the sidewalls, seems much more adapted for an optical emitter, which would require adding a top AlGaAs cladding layer for the optical guiding. The results emphasize the promise of those aspect selective epitaxial grown structures for future optical emission on an integrated silicon platform.

Therefore, as seen from the conclusions taken from this structure, we will only use the standard flat GaAs buffer to develop the other stacks. For the remaining quantum well stacks the SEM cross-sections will be shown as well as PL. This will provide sufficient information on the realization of those structures.

InGaAs/AlGaAs MQWs for near-infrared emission

As explained in chapter 2, the choice to use InGaAs QWs inside AlGaAs barriers is driven by the emission wavelength, which for low indium containing alloys, around 20%, is in the range 900 -1000 nm. This range, allows to attain two wavelengths here, 905 nm and 940 nm that are of particular interest to lidar applications. As the stack to get to those wavelengths was previously defined by simulation in chapter 2, the integration of such a stack using SEG is demonstrated in this subsection.

The QWs were developed on a GaAs buffer that grows outside the ridge. Here, the high quality growth of thin In 0.2 Ga 0.8 As quantum wells inside Al 0.1 Ga 0.9 As barriers is shown.

In figure 3.30, are presented two cross-sections, one perpendicularly to the ridge direction, the second along the ridge direction. In both figure 3.30(a) and figure 3.30(b), it is possible to see that most of the defects are confined in the V-groove structuration and in the oxide slit part of the structure. Indeed, in the upper part of the III-V ridge no defect is observable here. For this structure a linear dislocation density of around 0.6 dislocations.µm -1 was characterized by ECCI.

A lamella is never infinitely thin and in this work most lamellae studied are between 70 nm up to 130 nm thick. Here, the lamella presented in figure 3.30(b) is about 100 nm thick. Hence, some materials superposition can be seen. At the bottom, moiré patterns can be seen as shown in figure 3.30(e), these result in the superposition of silicon with GaAs, and is directly due to the V-groove structuration of the ridge. Added to that, some oxide can be seen and one can see a defect "in" this region as shown in figure 3.30(d). Obviously, the defect is not propagating inside the oxide but in the III-V material which is superposed to it. Finally, the active part made of thin In 0.2 Ga 0.8 As quantum wells inside Al 0.1 Ga 0.9 As barriers is displayed in figure 3.30(c) and looks as abrupt as the blanket developed layers of chapter 2. Thus, in order to compare the MQW quality PL measurements were made on III-V SEG ridges and on the same active part grown on blanket Si and GaAs wafers.

The PL spectra of the SEG structure is displayed on figure 3.31. The peak that can be seen at 872 nm is a contribution from the underlying GaAs buffer. When fitting the PL spectra presented in 3.31 the obtained FWHM of the peak at 977 nm is 50 nm or 78 meV. Compared to the same stacks on blanket wafers were the FWHM obtained for the QWs emission are 40 meV on GaAs and 95 meV on Si. This confirms the better structural quality of the depositions done by SEG compared to blanket silicon. The PL spectra was obtained at 300 K by a CCD detector using a 532 nm excitation laser with a power of 5.14 kW.cm -2 with a 0.1 s acquisition time.

InGaAs/InP MQWs for infrared emission

In the previous chapter 2, the choice to use InGaAs QWs lattice matched to the surrounding InP barriers is driven by the emission wavelength, which is in the L-band range and centred around 1550 nm. This particular wavelength exhibits a real importance for the telecom and datacom applications that were described in chapter 1. As the stack to get to those wavelengths was previously defined by simulation in chapter 2, the integration of such a stack using SEG is demonstrated in this subsection.

The QWs were developed on a GaAs buffer that grows outside the ridge. Indeed, InP can only be grown with very thin buffers before needing a chamber cleaning. Proof is provided that it is possible to grow high quality thin In 0.53 Ga 0.47 As inside InP barriers. In order to test the quality of the multiple quantum well structure, also known as the active part, the designed active part of chapter 2 was deposited directly on top of a GaAs buffer. Indeed, InP has very limited thicknesses in the Applied Materials epitaxy chamber used, therefore the InP bottom cladding layer was not deposited for the study of this MQW structure.

In figure 3.32 are presented two cross-sections, one perpendicularly to the ridge direction, the second along the ridge direction. As presented before, a lamella is always tenth of nanometres thick, here the lamella presented in figure 3.32(b) is 70 nm thick, but is well centred inside the pattern, thus, no oxide is seen. Yet, the position of the dielectric is indicated by two dotted lines on figure 3.32(b). It can be seen from 3.32(b) that not as much defects are filtered by the bottom structuration and the aspect ratio trapping method. Indeed, many defects can still be seen on the upper part of the structure. Added to that, the MQW structure is directly deposited on the GaAs buffer as shown in figure 3.32(c). Therefore as InP and GaAs have a mismatched lattice parameters, this will lead to even more dislocations being generated just beneath the active part. As before, for the previous structures, the Moiré patterns are still present at the bottom due to the V-groove structuration of the ridge. In order to compare the MQW quality, PL measurements were made on III-V SEG ridges and on the same active part grown on blanket Si and GaAs wafers.

Figure 3.33 -PL spectra of the structure presented in figure 3.32. The PL spectra was obtained at 300 K by an InGaAs detector using a 532 nm excitation laser with a power of 390 kW.cm -2 with a 2 s acquisition time.

The PL spectra of the SEG structure is displayed on figure 3.33. When fitting the PL spectra two peaks appear, one at 1200 nm and the other at 1377 nm, very close to each other which can be observed and attributed to the emission of the quantum wells. They could come from an intermixing between the barriers and the quantum wells. Indeed, as seen from figure 3.32(c) the MQW part seems less abrupt than for the two previously presented active parts for red emission and for near-infrared emission. The greater excitation power used here as compared to the other presented active parts, can explain a decrease in material quality as well. When fitting the PL spectra presented in 3.33 the obtained FWHM of the peak at 1377 nm is 120 meV. Compared to the same stacks on blanket wafers were the FWHM obtained for the QWs emission are 65 meV on GaAs and 130 meV on Si. If they are compared to the values obtained in the InGaAs MQW with AlGaAs barriers, this shows that the proximity of the GaAs/InP interface that regenerates dislocations is detrimental to the material quality. However, it still confirms the better structural quality of the depositions done by SEG compared to blanket silicon.

QDs integration onto selectively grown buffers

One of the major advantages for growing quantum dots is their robustness to defects. Although, reports of MOCVD quantum dots grown via selective area epitaxy exist using lithography techniques to control the position of quantum dots [START_REF] Elarde | Nanoscale selective area epitaxy for optoelectronic devices[END_REF], they are few records of InAs QDs grown through selective area growth. Most of them were grown on 5 µm large stripes using the mask size as a tuning parameter for the QDs size [START_REF] Tatebayashi | Area-controlled growth of InAs quantum dots by selective MOCVD[END_REF]254,[START_REF] Mokkapati | Controlling the properties of InGaAs quantum dots by selective-area epitaxy[END_REF]. However, Ge quantum dots on such nano-ridges of silicon were already demonstrated [START_REF] Nguyen | Selective epitaxial growth of Ge quantum dots on patterned SiO 2 /Si (001) surfaces[END_REF][START_REF] Nguyen | Formation and optical properties of Ge quantum dots selectively grown on patterned Si (001) substrates[END_REF][START_REF] Pascale | Ge quantum dots growth on nanopatterned Si (001) surface: Morphology and stress relaxation study[END_REF][START_REF] Leroy | Controlled surface nanopatterning with buried dislocation arrays[END_REF], we believe it is not the case with III-V alloys. Nonetheless, we believe that by combining both ART technique and selective epitaxial growth of quantum dot that we can get the best of both worlds.

Before, the growth of quantum dots an thin InGaP layer matched to the underlying GaAs was deposited. For the InAs quantum dot step the same fluxes were used for all samples only the deposition time was changed. Eventually for the photoluminescence measurements a GaAs capping layer was used.

The growth of InAs structures was adapted from the pre-existing developments made on blanket silicon wafers in chapter 2. From figure 3.34, it is possible to see from the three images that all the QDs grow on the sides of the ridge. This can be explained by the form of the ridge. Indeed, by making a profile perpendicular to the ridge direction one sees that the ridge is curved and slightly higher on the sides compared to the middle of the ridge. This growth rate enhancement that is present on the sides of the ridges is well known in selective epitaxial growth. It is dependent mostly on the mask width and on the opening width. Here, the growth rate enhancement, is believed to be due to interfacet mass transport from sidewalls to top surfaces [START_REF] Xiang | Interfacet mass transport and facet evolution in selective epitaxial growth of Si by gas source molecular beam epitaxy[END_REF][START_REF] Sakata | Surface migration effect and lateral vapor-phase diffusion effect for InGaAsP/InP narrow-stripe selective metal-organic vapor-phase epitaxy[END_REF][START_REF] Jiang | Evolution of (001) and (111) facets for selective epitaxial growth inside submicron trenches[END_REF] due to the small width of the ridge (around 500 nm) and of the mask (around 2 µm). For very large masked regions of the order of 5 µm -10 µm this mass accumulation on the edge of the top surfaces is mostly due to the lateral vapour phase diffusion which can lead to migration of species from the masked regions [START_REF] Sakata | Surface migration effect and lateral vapor-phase diffusion effect for InGaAsP/InP narrow-stripe selective metal-organic vapor-phase epitaxy[END_REF][START_REF] Dupuis | AlGaInAs selective area growth by LP-MOVPE: experimental characterisation and predictive modelling[END_REF]. Moreover, it is acknowledged that by tuning the form of the underlying layer one can control the growth of quantum dots [START_REF] Bavard | Controlled Ge quantum dots positioning with nano-patterned Si (001) substrates[END_REF][START_REF] Nguyen | Formation and optical properties of Ge quantum dots selectively grown on patterned Si (001) substrates[END_REF]. Hence, the curvature present at the side could be of notable use to control the localization of such structures. From figure 3.34, one can count a linear density of around 9.5 dots.µm -1 . However, from previously published results on such structures we have a defect density of 1.6 defects.µm -1 [START_REF] Touraton | Selective epitaxial growth of AlGaAs/GaAs heterostructures on 300 mm Si(001) for red optical emission[END_REF]. Hence, the linear density of quantum dots is 6 times more important than the defect density. Thus, even if all the dislocations impact a dot, they still are 5 dots out of 6 that are left unaffected. Therefore, quantum dots are a good option to reduce the defect impact when compared to quantum wells [START_REF] Liu | Origin of defect tolerance in InAs/GaAs quantum dot lasers grown on silicon[END_REF]. To make PL measurements three layers of quantum dots where stacked. The growth of the quantum dots is done on an InGaP sublayer, however, the capping layer is made out of GaAs as shown on figure 3.35(a) and figure 3.35(b). It is possible to notice from the displayed SEM cross-section that the dots grow upon each other. This is a well known phenomenon largely documented in literature. Indeed, it has been extensively reported that the strain fields generated by quantum dots inside the layer allows the growth of vertically stacked quantum dots [264,[START_REF] Zundel | Structural and optical properties of vertically aligned InP quantum dots[END_REF].

Besides, as shown in figure 3 growth rate on facet (001) decreases. This leads to a large dispersion in quantum dots sizes. In turn, this induces a very large photoluminescence spectra covering the whole 1050 nm to 1350 nm range as displayed on figure 3.35(c). Moreover, even though a large range of excitation powers was used to excite the sample no clear peak parts from the rest. However, one can observe that the signal coming from the larger structures (at higher wavelengths), surely the first ones deposited onto the ridge is lower than the one from the smaller structures (at lower wavelengths). As observed in figure 3.35(b) the bigger structures seem to relax and generate dislocations which in return can hinder their emission. The PL spectra displayed in figure 3.35(c) exhibits several contributions from the large quantum dots height distribution. Therefore, any non-homogeneous height distribution broadens the PL response very rapidly. Hence, major optimization of the quantum dot growth step has to be taken to narrow the PL spectra.

PL Therefore, by keeping a low enough deposition time, it is possible to limit the expansion of the size distribution. Accordingly, by keeping a short enough distribution and impacting the growth rate decrease we are able to demonstrate a centred PL emission. One can notice that with increasing pump power several photoluminescence peaks can be distinguished. In order to get a better understanding of what is happening in this sample simulations were done. As Gaussian fitting of the PL spectra was not possible the curve peaks and shoulderings were used for the calculations. It was found from the calculations, that it was possible to render almost identical curves to the PL spectra using a single form of quantum dots representing the majority of the quantum dots population . The curve peaks and shoulderings used for the calculations are indexed in figure 3.36 and summarized in table 3.7 . From the calculations it is obtained that the fundamental emission is the peak centred at 1312 nm the other higher energy or lower wavelength peaks are the next levels of energy. Indeed, once the fundamental level has been completed/saturated, the following electronic orbitals are completed one after the other. Moreover, as there is an increasing number of electrons in the next levels of energy, the associated intensity of the peaks gets higher. This correlates very well with what was obtained experimentally. Eventually, one can look more into detail at the quantum dot form. The simulated quantum dots that allowed to have such a good correlation between the PL spectra and the calculations are presented in figure 3.37. It can be noted that the quantum dot is flatter than the one described in the AFM measurements. Indeed, the dot is calculated to be 4.65 nm in height whereas by AFM (prior to capping) the dots had an average value of 10 nm in height. The capping layer could be the one flattening them. Finally, it would seem from the simulations that the thickness of the underlying InGaP layer does not impact the emission spectra.

These calculations, allow to confirm that with a centred height distribution of the quantum dots a fundamental emission around 1300 nm can be obtained.

An approach to integrate quantum dots on nano-ridges by selective epitaxial growth with MOCVD was introduced. The linear dislocation density and linear dot density exhibit a sixfold difference in favour of the quantum dots. In addition, it was shown that an optimized quantum dot distribution allowed to exhibit a fundamental exited state around 1300 nm. Thus, the combination of a decreased dislocation density as well as the growth of quantum dots on selective epitaxial ridges stresses the potential of this association for future optical applications on a silicon platform.

Conclusion to chapter 3

In this chapter, the possibilities that one has with SEG were demonstrated. Due to the need of making an emitting device out of those selective area growths, by having vertical rectangular shaped structures, a morphological study was first done. Then, the aspect ratio trapping method was analysed to tackle the dislocation reduction inside such structures. Eventually, several active parts where shown to be integrable using SEG.

The morphological study allowed to see what major variations one can access by only varying the temperature and partial pressure inside the chamber. Four main morphologies where shown to exist in the parameter range studied here. A horizontal rectangular shape, a vertical

Depositions for red emission

The stack deposited for red emission is the one simulated as the best stack in chapter 2. This structure is reminded in figure 4.1. was obtained. The value is as high as the values presented in chapter 1 for simple 600 nm GaAs buffers. This is a consequence of the lack of defect dislocation filters and annealing steps. Indeed, without those, there is no possibility to annihilate the dislocations apart from having very thick layers, which was not possible here. However, one has to note that the silicon wafer endured the H 2 pre-treat to avoid having any APB in the layers [START_REF] Alcotte | Epitaxial growth of antiphase boundary free GaAs layer on 300 mm Si(001) substrate by metalorganic chemical vapour deposition with high mobility[END_REF]. Thus, the only difference

3D deposition on patterned wafer

Even though, no device was made using a selective epitaxial grown structure, a structural and optical comparison is provided between full-sheet grown layers and a SEG stack. From what was discussed in section 3.3.1, it can be an undeniable advantage for the optical properties. Thus, PL measurements were also carried out.

PL spectra

In order to extract the optical properties of the stacks, PL measurements were performed. PL measurements were made on samples with no top cladding layer. Indeed, the laser used for excitation was a 532 nm Nd-YAG laser. With such a laser, the signal would be totally absorbed in the first 400 nm if the full stack used to make the devices was to be tested. Hence, it would be absorbed in the top-cladding layer. Consequently, the measurements could only be done on un-cladded stacks.

Figure 4.4 -PL spectra of the deposited structures without the upper cladding. PL spectra of the stacks deposited on GaAs, Si and Si patterned substrates. The PL spectra were obtained at 300 K using a 532 nm excitation laser with a power of 5.14 kW.cm -2 with a 1 s acquisition time.

The PL spectra are shown in figure 4.4. First, from figure 4.4 one can see that the emissions are centred around 750 nm which is more than the expected 650 nm from the simulations, therefore, some shifts in the Al incorporation inside the quantum wells or in their thicknesses are expected to have happened. The simulations where realized for 5 nm QWs whereas, they are rather of the order of 8 nm in the depositions made on the three different substrates.

As they are thicker, the emission red-shifts. Moreover, the aluminium incorporation could be a bit lower than the 30% that were simulated, which would also red-shift the emission wavelength. However, this is still in the red region of the spectrum, hence it still qualifies to test the optical emission. Now, if one takes a look at the silicon and GaAs substrates the intensities are in the same range. However, in the SEG case the intensity is four times higher. This could be explained by the specificity of the selectively grown quantum wells which are localized inside the layer. Due to this localization, the carrier recombination has a higher probability to happen close to the excitation point. Indeed, as opposed to the blanket growths where the quantum wells can be considered as infinite if we compare them to the excitation spot size, in the selective area case the quantum wells can be considered infinite in the ridge's length however, they are of comparable size in width to the excitation spot. Therefore, allowing for more carriers to recombine close to the excitation point thus getting a higher intensity. In figure 4.4, it is also possible to notice that the GaAs peak (at 872 nm) only appears in the silicon case. This might be due to the dislocation density that allows the carriers to recombine in the upper part of the layer.

FWHM can also be extracted to have an idea of the material quality. The extracted FWHM are

4.2.1.a Device realization

In figure 4.6, the first steps from the III-V material deposition to the bottom contact deposition are presented. Afterwards, two more steps are necessary to deposit the metal on each side of the ridge structure. A negative photoresist is applied and developed, after a lithography process, displayed in figure 4.6(e). Then Ni/Ge/Au metals are deposited on top of the n-GaAs contact layer. This is followed by a lift-off step process to form a pattern metallization on top of the n-GaAs contact layer presented in figure 4.6(f). The Ni/Ge/Au contact is chosen due to the low contact resistivity with an ohmic characteristic it exhibits on the n-GaAs contact layer that was presented in chapter 2. In figure 4.9, are presented the following steps that lead to the deposition of the top contact as well as the electrodes.

After having deposited the bottom metal contact on the n-GaAs contact layer, the electrical p-i-n junction needs to be passivated. To realise this passivation, the use of a thick dielectric film was chosen and spread by a spin coating process. The choice was set on a polymer film: BCB, indeed, it enables to fully encapsulate the ridge structure as shown in figure 4.9(a). Moreover, it has a planarization effect which will allow an easier integration of the electrodes later on. The BCB is then kept in a vacuum oven for 70 h at 200 °C for it to polymerise. Then, to reach the bottom contact a positive photoresist is deposited and developed as displayed in figure 4.9(b) and afterwards an opening through the BCB to the bottom contact is made by using the photoresist as an etch mask as shown in figure 4.9(c). The last steps require to deposit the top contact as well as the electrodes on both contacts. Thus, another positive photoresist is deposited and developed to serve as a mask for the opening of the top contact layer as displayed in figure 4.9(c), this allows to have after the etching process and the stripping the two contacts opened, as illustrated in figure 4.9(e). Then ITO is deposited as the contact for the p-GaAs contact layer and as electrodes for both n and p contacts. Eventually, the manufacturing process ends with a final annealing at 400 °C. This allows to obtain ohmic contacts on both the n-GaAs bottom layer and p-GaAs top layer. Moreover, it can be seen that the end of the ridge with the etched facet is not "opened", therefore the electrode will be farther away from the extracted light not to impact it. In the centre in dark green, the ridge can be seen. With a yellow highlight the n-metallization is also observed. It is also possible to see how the electrodes are actually deposited on each side of the III-V ridge.

4.2.1.b Discussion on the choices made for device realization

As presented in chapter 2, the n-contact was the best for a Ni/Ge/Au metallization with a contact resistivity of 8.1 × 10 -5 Ω.cm -2 and the p-contact was the best for a Ti/Pt/Au metallization with a contact resistivity of 3.8 × 10 -5 Ω.cm -2 . However, as it was previously explained in chapter 2 using an ITO contact allows to limit the absorption effect of the metal contact. This is not needed in the case of the n-contact as the contact is deported on the side of the device But this is necessary for the top p-contact, which is very close to the optical mode due to the thin AlGaAs cladding layer. However, the contact resistivity of the ITO contact on p-GaAs is one decade lower at a value of 2.3 × 10 -4 Ω.cm -2 compared to the Ti/Pt/Au metallization. Moreover, from the PL spectra presented before, the emission of the two structures grown on GaAs as well as on Si substrates will happen in the red region of the spectra, and ITO has very interesting properties for these wavelengths as it is transparent above 500 nm as seen in figure 4.12(b).

In order to deposit the ITO in one step, a previous BCB encapsulation was made. The BCB As shown in figure 4.14(a) and figure 4.14(b), it is possible to see that there are three regimes in the curves. A reverse regime for V < 0 V, an exponential regime for V > 0.5 V and a last regime after the barrier potential value. The reverse regime is flat and allows to extract the reverse saturation current also know as the leakage current. The leakage current should be the lowest possible, thus, demonstrating that the device realization did not incorporate defects, the device was well passivated and above all that there is no leakage inside the p-i-n junction.

The exponential regime allows us to get the ideality factor, n, of the p-i-n heterojunction. Indeed, the exponential relationship between I and V is described by the following equation:

I = I S × exp( qV nkT -1) (4.1)
Where I is the diode current, I S is the reverse saturation current, q is the elementary charge, V is the input voltage, k is the Boltzmann constant, and T is the temperature.

The last regime is the saturation current regime; it is affected mostly by the series resistance of the n-type and p-type regions. What can be stated from figure 4.14(a) and 4.14(b), is that the barrier potential obtained here is approximately 1.7 V -1.8 V which is consistent with a bandgap with a value of 700 nm -750 nm which can be very well correlated to the PL spectra showed in section 4.1.1. One can also see that whatever the length of the ribbon diode the I-V characteristics are identical.

As the ribbon length does not impact the I-V characteristic when the p-i-n heterojunction is grown on the same substrate, the impact of the substrate remains to be studied.

Comparison of ribbon diodes on GaAs and Si

To compare the substrate impact, the I-V characteristics of the longest ribbons (980x3 µm 2 ) are compared in the following section. From figure 4.15, it is still possible to observe the different regions that where previously described. That is to say, a first flat region in the reverse regime, afterwards an exponential regime and a saturation regime which tend to flatten the curves towards the end of the curves presented here at 3 V. As shown by the curves presented in figure 4.15, several small differences can be seen between the p-i-n junctions grown on GaAs and on Si substrates. First, in the reverse regime as displayed by the graphs plotted in semilog scale for the current it can be noted that the leakage current is slightly higher for the diode grown on GaAs, at a value of 6.4 ×10 -6 , than the one on silicon , at a value of 2.6 ×10 -6 . The lower leakage current for the ridge grown on silicon could come from the dislocations contained in the epitaxial layer. They could generate recombination centres for minority carriers and lower the reverse saturation current. Yet, the difference between the two leakage currents is slight and these values can be considered as similar. Thus, this does not give enough information to settle on a physical explanation. For the exponential regime, the ideality factor of the junction can be extracted using equation 4.1. On the GaAs substrate n is extracted to be 2.46 and on the silicon substrate n is extracted to be 2.42. Still, as in the reverse regime the change is not that flagrant. Eventually, in the last regime, which one can refer to as the forward saturation regime the ribbon grown on silicon seems to have a lower current saturation than the ribbon grown on GaAs. This is confirmed by the graphs displayed in the insets of Usually, the ideality factor gives insight into the type of physical mechanism that is happening inside the junction and varies in the range 1-2. For n = 1 which is the factor for an "ideal" diode diffusion is the dominant current mechanism. If 1.5<n<2 the dominant mechanism is the recombination in the depletion region therefore, in the intrinsic region. Finally, for n=2 the series resistance of the n-type and p-type regions become non-negligible and ohmic effects start happening. Yet, in our case the diodes exhibit ideality factors of 2.4, which compared to the theory seems out of specs. However, it has previously been reported in literature that lab-grown diodes and commercial blue diodes exhibited ideality factors higher than 2 and up to 7 [START_REF] Dmitriev | GaN based p-n structures grown on SiC substrates[END_REF][START_REF] Perlin | Lowtemperature study of current and electroluminescence in InGaN/AlGaN/GaN doubleheterostructure blue light-emitting diodes[END_REF][START_REF] Shah | Experimental analysis and theoretical model for anomalously high ideality factors (n 2.0) in AlGaN/GaNp-njunction diodes[END_REF]. However, no explanation is given as to why the ideality factors are this high. An article tackling this issue was published in 2011 [START_REF] Masui | Diode ideality factor in modern light-emitting diodes[END_REF]. From this article, it becomes clear that the usual range of ideality factor does not apply in the case of light emitting structures. Indeed, net recombination rate was shown to be dominated by local minority carriers due to the carrier confinement structure, leading to ideality factors as large as 3 [START_REF] Masui | Diode ideality factor in modern light-emitting diodes[END_REF]. This is in accordance to the ideality factor of 2.4 that is observed here.

As they are no significant differences in the I-V characteristics shown in the previous graphs, there is not enough significant information that can be explained by the dislocation density for example.

Optical emission

Due to the particular circumstances of the CoViD-19 pandemic the electroluminescence experiments could not be made. However, as the top contact was made from ITO top-view observations were made possible. In the next figures only the ridge grown upon silicon is shown, but the ones grown on top of GaAs also emit light.

As shown in figure 4.16, the powered ridge emits red light. Yet, the red region of the spectrum is pretty large, therefore, it is not possible to compare the emission obtained here to the PL spectra presented in section 4.1.1. To look at what part of the device emits light closer images were taken.

The ridge is powered via two tips, that can can be seen in black in figure 4.17(a), they are in contact with the ITO electrodes which are the greener part of figure 4.17(a). When current flows through the junction one can see that the whole ridge lights up as displayed in the black and white figure 4.17(b).

Obviously, the previous figures only allow to conclude that the emission happens in the red region of the spectrum. Yet, it is necessary to make further electro-optical characterizations to have access to light-current and light-wavelength characteristics.

Conclusion to chapter 4

This chapter focused on the realization of red-emitting demonstrators made from 2D-grown stacks. From this chapter, it was demonstrated that the characteristics, either optical or current-voltage, of the stacks grown on GaAs and silicon substrates are very close. The PL spectra, exhibited small shifts in emission, however, the current-voltage characteristics allowed to get similar trends in both stacks. Thus the dislocation impact was not seen from the physical parameters showed previously. Both stacks exhibited red emission, yet no characterization was shown. Having access to light-current and light-wavelength characteristics might allow to see the impact of the dislocation density on the emission. Once plotted, those characteristics will allow to retrieve a number of parameters of importance.

Eventually, when those 2D-grown structures are completely characterized it will allow to compare them to devices made from SEG stacks. Thus, in the perspectives some clues are given for the realization of light-emitting structures from selective epitaxial growths on silicon substrates.

Conclusion and perspectives

An increasing demand in data stream has paved the way towards new technologies. As the call for data is exploding optics are the new way of thinking. Optics are already common on large scales, but with the increasing requirements in volume and speed there is a need to scale them further down for the inter and intra chips connections. Most of the technological bricks have already been developed, waveguides and modulators for instance. However, the laser source still remains challenging. Actually, laser sources have been demonstrated mostly using bonding techniques. In this thesis another kind of integration of the laser source is tackled. This study provides several technological clues on how to integrate an optical source by selective epitaxial growth on silicon.

In this work, several technological bricks were studied in order to get closer to the integration of a horizontal light-emitting structure by selective epitaxial growth.

First, different stacks to tackle the specificities of the applied materials reactor used in this work were defined using simulations. These simulations bring out the fact that the selective epitaxial grown option is more favourable for the optical guiding than the full-sheet deposition.

Then some preliminary requirements concerning contacting layers, contact layers and contact themselves were proved to be reaching expectations to make working devices.

Then, a full study concerning the selective epitaxial growth was done. A morphology study allowed to get the working couples of partial pressure and temperature to get to rectangular selectively grown ridges. The use of selective epitaxial grown ridges in combination with the aspect ratio technique was analysed via the ECCI method. By comparing the obtained results with the literature this technique is deemed performant enough to diminish the dislocation density drastically above an aspect ratio of 1.4. Eventually, the different simulated stacks were grown using selective epitaxy. This showed that the PL spectra at room temperature could be easily obtained. Moreover, the quantum well emission peaks exhibited FWHM better than for full-sheet grown layers on silicon, confirming a better structural quality, hence, a defect diminution in the active part.

Finally, light-emitting devices from full-sheet grown layers were successfully made. This shows that the simulated stacks that were provided in chapter 2 are working and provide references for future devices that could be realized by selective epitaxial growth with the same stacks.

Obviously, lots of developments remain to be done, to get a fully integrated selective epitaxial grown light-source onto silicon. Hereafter, some proposals are made to get to the demonstrator. Afterwards, some prospects on the integration of such a source with other devices. Short term prospects are first described. They encompass the realization of light-emitting structures made from selective epitaxial grown structures. Indeed, during this work, a set of lithography masks were made to anticipate the possibility of making an electrically pumped demonstrator using the selective epitaxial grown ridges. In order to do so, the main concern was the contacts integration. Indeed, from the devices made from full-sheet grown layers the top contact can also be taken on the top part of the ridge. However, the bottom contact cannot be taken on the side as the growth happens within a dielectric slit with an aspect ratio of at least 0.6 in our case. Thus, it was decided to integrate the bottom contact on two large areas present on both side of the ridge as shown in figure 5.1(a).

By doing that, the side of the ridge can be etched while opening the III-V contact areas to deposit the bottom contact. Afterwards, a similar device realization can be made compared to the one done on full-sheet grown layers using a BCB encapsulation and afterwards ITO contacts and electrodes. It could lead very schematically to the displayed contacts integration in figure 5.1(b). Yet, to allow an easier contact integration a lot of space is needed, this leads to an opening ratio on the substrates of 30 %, which is 2.7 times less than the opening ratio of 80 % used for the morphology analysis of GaAs selective epitaxial growth of chapter 3. Consequently, the process points were highly impacted.

From what was studied in chapter 3, using a temperature of 620 °C and P T MG a = 3.65 mTorr allows to get a vertical ridge structure. However, as seen in the cross-section shown in figure 5.2(a) the deposition is pretty different from the expected morphology. Two cross-sections were made perpendicularly to the ridge direction and along the ridge direction, the zones were they were extracted are indicated in pink in figure 5.2(d). Those two cross-sections allow to have indications on what is happening for this growth. As seen in the perpendicular cross-section of the ridge in figure 5.2(a), the growth starts in a "known" way, structured as an inverse pyramid. Yet, the faceting at the top is not favourable to integrate quantum wells on a flat (001) surface. Moreover, when looking at the top cladding layer, it grew with a horizontal rectangular form, leading to defect generation which could be very detrimental to the optical response. Furthermore, when calculating the growth rate of the cladding layers along the (001) surface it is around 5 nm.s -1 which is five times more than the observed growth rate along the (001) surface at a temperature of 620 °C and P T MG a = 3.65 mTorr when the opening rate was 80%. This very high growth rate leads to a roughness so high the active part is undulating as seen from the cross-sections along the ridge length shown in figure 5.2(b) and in the active part zoomed cross-section in figure 5.2(c). From figure 5.2(c), this leads to quantum well thicknesses that vary along the length of the ridge. Added to that, if one takes a closer look at figure 5.2(b), antiphase boundaries can be seen, even though the H 2 pretreat was realized to impeach their formation. It can be seen from figure 5.2(b), that the antiphase boundaries have a negative impact on the quantum wells lying just upon the APBs. From all of these observations, made from figure 5.2, they are several things to master:

• lower the growth rate by lowering the partial pressures, this will help in decreasing the roughness and retrieve a rectangular vertical shape,

• observe how the silicon steps are arranged inside the ridges, this will help understand why the H 2 pretreat did not work, the etching process might be the one to impact the effectiveness of the process.

Once the shape, growth rate and APBs are mastered, the technological steps towards making a light emitting device will be possible to be realized.

Longer term prospects can also be considered once the light-emitting device from the selective epitaxial growth is demonstrated.

A thermal analysis in such devices is essential. Indeed, the chips on which those devices are to be integrated will exhibit working temperatures around 80 °C. First and foremost, a thermal investigation needs to be done to account for the current dependency on temperature operation as explained in chapter 1 in equation 1.11. Then, it will be important to see how the temperature is dissipated in such a selective epitaxial grown structure. From simulations provided in the literature [START_REF] Liu | Photonic integration with epitaxial III-V on silicon[END_REF] it would seem as if heteroepitaxy has the best thermal dissipation compared to bonding and homoepitaxy techniques as silicon is a better natural heat sink [START_REF] Liu | Photonic integration with epitaxial III-V on silicon[END_REF]. Therefore, the thermal budget of selective epitaxial grown structures needs to be verified.

Once this has been done, co-integration within a chip with other devices needs to be considered. For the co-integration to be possible the coupling of the signal to the waveguides has to be mastered.

Butt coupling is not as straightforward as one would imagine, indeed, there is a significant mode mismatch between the III-V and the waveguides that imposes a strict alignment requirement [START_REF] Song | 3D Hybrid integration for silicon photonics[END_REF]. Several types of edge couplers have already been demonstrated. For instance, inverted lateral tapers and a poly-silicon overlays [START_REF] Bates | Gaussian beams from variable groove depth grating couplers in planar waveguides[END_REF][START_REF] Jia | Analysis of the polarization rotation effect in the inversely tapered spot size converter[END_REF]. However, they require intricate realizations. But, they could be implemented to co-integrate the light-emitting device inside a fully-functioning silicon photonics chip. Depending on the waveguide material used, silicon or Si 3 N 4 for example, depending on the wavelength of emission of the light-emitting device, the calculation will determine how the tapers have to be designed. One of the advantages of implementing a butt-coupling structure is also the thermal budget as it should be lowered compared to the standard evanescent coupling [START_REF] Song | 3D Hybrid integration for silicon photonics[END_REF].

The growing interest for silicon photonics and the needs it has created is a driving force that will surely lead to major advances in the next years. Indeed, new integration approaches for laser integration, for example, are appearing, using regrowth on bonding templates for instance [START_REF] Hu | III/V-on-Si MQW lasers by using a novel photonic integration method of regrowth on a bonding template[END_REF] or selective epitaxial growth as was studied in this manuscript. Moreover, III-V selective epitaxial growth has been recently demonstrated to be of use for heterojunction bipolar transistors (HBTs) [START_REF] Vais | First demonstration of III-V HBTs on 300 mm Si substrates using nano-ridge engineering[END_REF]. These new integration concepts are paving the way towards new scalable designs.

Introduction et objectifs

La demande accrue de performances en termes de transmission de données, que ce soit pour les liaisons à distance, les interconnexions inter ou intra puces, est un défi majeur pour la microélectronique et les industries des télécommunications. C'est grâce à cela que le domaine des télécommunications a convergé vers le domaine de la microélectronique via la technologie silicium. La photonique sur silicium est donc apparue comme un nouveau paradigme au cours de la dernière décennie. La nécessité de réduire les coûts de fabrication et donc d'optimiser l'intégration des fonctions optiques a poussé le développement de circuits basés sur des matériaux III-V intégrés sur des wafers de silicium. Pour l'industrie des télécommunications, le silicium offre un guide optique miniaturisé, système qui sera alimenté par des sources laser infrarouges III-V intégrées. En parallèle, d'autres domaines d'applications, comme la biophotonique et les systèmes de conduite autonomes par exemple, bénéficient de cette approche.

En général, l'approche choisie consiste à coller un composant à base de semi-conducteurs III-V sur un substrat de silicium sur isolant (SOI) préalablement structuré pour guider la lumière. L'onde optique circule ainsi de la cavité III-V vers le circuit photonique en silicium. Récemment, une nouvelle intégration est en cours d'élaboration par plusieurs laboratoires. Cette nouvelle méthode d'intégration nécessite d'intégrer les composants III-V directement sur le substrat de silicium par hétéroépitaxie. Cependant, il faut résoudre les problèmes liés à l'intégration d'une source lumineuse III-V directement épitaxiée sur silicium.

En effet, un prérequis va être de réduire la densité de défauts se propageant aux couches actives permettant la génération de lumière. La génération de défauts résulte des différences de paramètres de maille, de coefficient de dilatation thermique et de polarité entre les matériaux III-V et le silicium. Dans ce travail, l'approche choisie pour minimiser l'impact de ces défauts est d'utiliser l'épitaxie sélective combinée à la méthode de piégeage par rapport d'aspect.

Afin de réaliser une structure émettrice de lumière directement intégrée sur silicium, ce travail présente les briques technologiques rendant cette intégration possible.

Cette annexe a pour vocation à n'être qu'un résumé en français de la thèse. De plus amples informations et détails pourront donc être trouvés dans le manuscrit rédigé en anglais. Ce résumé aborde les axes principaux de la thèse. Les simulations, les développements d'épitaxie préliminaires à la croissance sélective ainsi que la réalisation des dispositifs ne seront pas présentés ici.

Dans une première section la problématique de la croissance III-V sur silicium est détaillée ainsi que la méthode de croissance choisie dans ce travail. Enfin, le cahier des charges de cette étude sera présenté, y compris les principales exigences.

Dans une deuxième section, les particularités du bâti utilisé dans cette étude seront présentées ainsi que le contraintes qui en découlent sur les couches déposées.

La troisième section, traite de l'épitaxie sélective. Tout d'abord, une étude concernant la morphologie des croissances est présentée. Cela permet de connaître les paramètres pour réaliser un plot rectangulaire de GaAs. Ensuite, la réduction des dislocations à l'aide de la méthode de piégeage par rapport d'aspect est présentée. Enfin, la croissance sélective de puits et de boites quantiques sera montrée.

La quatrième et dernière section, est consacré à la caractérisation des structures émettrices de lumière rouge réalisées dans cette thèse à partir d'épitaxies pleines plaques. Afin de conclure ce résumé quelques perspectives donnent des pistes pour réaliser des structures émettrices de lumière à partir de ces épitaxies sélectives.

.

Cible, description et état de l'art des lasers III-V sur silicium

Le circuit photonique intégré

La photonique est en développement depuis 40 ans, mais la dernière décennie a vu des améliorations majeures. En effet, de nos jours, l'intégration de composants photoniques à l'intérieur .

Cahier des charges et approche proposée

Pour obtenir une structure émettrice de lumière directement intégrée sur silicium plusieurs briques sont à étudier.

Chambre SiCoNi

Avant toute épitaxie, il est de la plus haute importance d'assurer une surface atomiquement propre. En effet, toute contamination entraînera des défauts majeurs dans la couche épitaxiée. Lorsque la plaque de silicium est en contact avec l'air un oxyde de silicium natif va se former à la surface du wafer. Il faut donc enlever cet oxyde natif de la surface de la plaque de silicium pour faire une reprise d'épitaxie dans de bonnes conditions. Il existe de nombreux moyens pour éliminer cet oxyde natif, par exemple les traitements à base de HF. Toutefois, ici un module SiCoNi, breveté en 2005 [START_REF] Kao | In-situ dry clean chamber for front end of line fabrication[END_REF], sera utilisé. L'avantage de ce processus de nettoyage est qu'après le traitement SiCoNi, la plaque reste dans l'environnement contrôlé de l'outil et n'entre plus en contact avec l'air avant épitaxie. Cela permet donc, de garantir la meilleure désoxydation possible comme l'épitaxie est effectuée immédiatement après le passage dans la SiCoNi. Finalement, comme le procédé à lieu à basse température, cela permet la conservation de la morphologie des motif pour les plaques présentant des motifs en diélectrique.

Lorsque la plaque a fini d'être nettoyée, elle passe à la chambre d'épitaxie par la chambre de transfert.

Chambre d'épitaxie

Le réacteur MOCVD est formé de deux dômes de quartz, un supérieur et un inférieur entre lesquels la plaque est insérée. La plaque repose sur un suscepteur en graphite recouvert d'une couche de carbure de silicium, SiC, tournant à 32 rotations par minute (RPM). Le suscepteur est chauffé par un banc de lampes situé sous le dôme inférieur.

Le chauffage est réalisé par un module contenant jusqu'à 200 lampes placées en 6 anneaux concentriques. L'utilisation de lampes permet des rampes de température rapides à partir de 5 °C/s. Des températures de 350 °C à 980 °C peuvent être atteintes avec ce système. La température est mesurée par quatre pyromètres: deux situés sur le dôme supérieur mesurant l'émission de la plaque, deux situés sous le dôme inférieur, mesurant l'émission de l'arrière du suscepteur. La température est contrôlée par les pyromètres du bas par le biais d'une boucle de contrôle basée sur un système proportionnel-intégral-dérivé (PID).

La chambre fonctionne dans une plage de pression allant de 1 Torr à la pression atmosphérique.

Figure C.7 -Dépendance de la vitesse de croissance de GaAs avec utilisation du précurseur de TMGa. La vitesse de croissance est normalisée par rapport au flux molaire entré dans le bulleur de TMGa . Les données proviennet de (a) [START_REF] Manasevit | The use of metal-organics in the preparation of semiconductor materials[END_REF], (b) [START_REF] Kräutle | Investigations on low temperature MO-CVD growth of GaAs[END_REF], (c) [START_REF] Gottschalch | Epitaxial deposition of GaAs in the Ga(CH 3 ) 3 AsH 3 H 2 system (II). investigations on the hetero-epitaxy of GaAs on Ge[END_REF] and (d) [START_REF] Leys | A study of the growth mechanism of epitaxial GaAs as grown by the technique of metal organic vapour phase epitaxy[END_REF]. Reproduit de [START_REF] Zilko | Metal organic chemical vapor deposition[END_REF].

Dans cette étude, la croissance sera réalisée principalement dans les régions du plateau autour de 550-650 °C comme montré sur la figure C.7. Les précurseurs utilisés seront exclusivement des métalo-organiques à l'exception des précurseurs pour le dopage de silicium qui seront du silane ou du disilane.

Une fois que la plaque a été traitée dans la chambre d'épitaxie, elle est déchargée et ramenée au FOUP.

Enfin, entre chaque épitaxie, un processus de nettoyage in situ est mis en oeuvre pour graver les dépôts sur les dômes de quartz. Lorsque la plaque est chauffée à environ 600 °C, les dômes chauffent à environ 400 °C, ce qui fait qu'une certaine quantité de matière est déposée sur eux, cela entraîne certaines spécifications sur les couches déposées.

Spécifications sur les couches déposées

Lorsque l'on dépose de la matière sur un substrat, le dôme supérieur est également recouvert de matière. Cela devient un problème lors du dépôt de couches épaisses. Il est certain que plus les couches déposées sont épaisses plus il est difficile pour les pyromètres supérieurs d'obtenir une information réelle sur la température réelle de la plaque. Cela conduit à des résultats de croissance variables après croissance d'une certaine épaisseur de matière, variable selon les matériaux. Par conséquence, dans cette chambre, il n'est pas possible de déposer plus de 900 nm de matériaux III-As à la fois et pour les matériaux III-P l'épaisseur est encore plus faible à 300 nm. Afin de pouvoir déposer des couches suffisamment épaisses pour envisager la possibilité de faire des émetteurs de lumière, il est possible de décomposer l'épitaxie en plusieurs étapes entre lesquelles un nettoyage de la chambre est effectué. Cela nous permet de nous rapprocher des épaisseurs que tout le monde utilise pour ce type de dispositifs (entre 2,5 et 5 microns comme le montre la figure C.8). Il est évident que cette épaisseur ne tient pas compte de la couche tampon et des filtres de dislocations. Hormis le nettoyage de la chambre qui dure 30 min pour éviter la dérive de l'épitaxie, la consommation de précurseur est relativement importante notamment pour l'élément V. La plupart des précurseurs présents dans le panneau de gaz sont disponibles en bulleurs de 1 kg.

Une épitaxie au GaAs de 800 nm coûte environ 10 g de TBAs. Pour faire une couche de 2 µm d'épaisseur, il faut donc 25 g de précurseur. Or, le bulleur n'en contenant qu'un kg, cela donne la possibilité de faire seulement quarante fois 2 µm de GaAs. Ce qui est insoutenable en terme de consommation de précurseur et donc aussi en changement de bouteille de gaz. Il a donc été décidé, comme spécification majeure, d'utiliser au maximum deux passages d'épitaxie séparés par un nettoyage de chambre. Cela exige des dispositifs dont la hauteur ne dépasse pas 2 µm tout au plus pour les composés d'arséniures.

De plus, le développement des alliages de quaternaires n'était pas le sujet de cette thèse et n'a donc pas été étudié.

Maintenant que les spécifications des couches pouvant être réalisées ont été précisées, il a été possible par simulation de définir quels étaient les meilleurs empilements possibles à atteindre avec ce bâti d'épitaxie.

Empilements définis par simulation pour les différentes applications

Suite à la réalisation des simulations, trois empilements pour atteindre les différentes gammes de longueur d'onde présentées au début du chapitre ont été définis. Ils sont présentés à la figure C.9. .

Épitaxie sélective de III-V et utilisation du piégeage géométrique des défauts

Cette section vise à montrer que les structures présentées précédemment peuvent être intégrées en utilisant l'épitaxie sélective.

.

Impact des paramètres expérimentaux sur la croissance du GaAs

Les morphologies obtenues par épitaxie sélective ont été largement étudiées au fur et à mesure des années. Cela est vrai quelle que soit la technique de croissance utilisée ou le matériau. Par exemple, en CVD pour les dépôts de Si-Ge [START_REF] Pribat | Si and SiGe faceting during selective epitaxy[END_REF][START_REF] Dutartre | Faceting and nanostructure effects in si and SiGe epitaxy[END_REF][START_REF] Dutartre | Facet propagation in si and SiGe epitaxy or etching[END_REF][START_REF] Vescan | Facet investigation in selective epitaxial growth of si and SiGe on (001) si for optoelectronic devices[END_REF], en HVPE pour le dépôt de matériaux III-V soit GaAs [START_REF] Gil-Lafon | Selective growth of GaAs by HVPE: keys for accurate control of the growth morphologies[END_REF][START_REF] Tourret | A complete crystallographic study of GaN epitaxial morphologies in selective area growth by hydride vapour phase epitaxy (SAG-HVPE)[END_REF][START_REF] Napierala | Control of the growth morphologies of GaAs stripes grown on patterned substrates by HVPE[END_REF] soit InP [START_REF] Lourdudoss | Morphological modifications during selective growth of InP around cylindrical and parallelepiped mesas[END_REF][START_REF] Lourdudoss | Temporally resolved regrowth of InP[END_REF][START_REF] Messmer | Hydride vapour phase epitaxy for nanostructures[END_REF][START_REF] Sun | Temporally resolved selective area growth of InP in the openings off-oriented from [110] direction[END_REF], ou encore en MBE pour la croissance des matériaux III-As et III-P [START_REF] Heiß | Growth mechanisms and optical properties of GaAs-based semiconductor microstructures by selective area epitaxy[END_REF][START_REF] Albani | Growth kinetics and morphological analysis of homoepitaxial GaAs fins by theory and experiment[END_REF][START_REF] Aseev | Selectivity map for molecular beam epitaxy of advanced III-v quantum nanowire networks[END_REF]. Toutes les publications mentionnées cidessus, présentent des études extensives concernant les paramètres de croissance. Concernant la croissance par MOCVD, l'impact des paramètres de croissance a aussi été largement étudié: des effets du masque diélectrique [START_REF] Olsson | Large mask area effects in selective area growth[END_REF][START_REF] Hirota | Selective growth of (001) GaAs using a patterned graphene mask[END_REF], en passant par l'effet de la pression partielle de l'élément V [START_REF] Oh | The effect of group V precursor on selective area MOVPE of InP/GaAs-related materials[END_REF][START_REF] Song | Effect of group V partial pressure on the kinetics of selective area MOVPE for GaAs on (100) exact and misoriented substrate[END_REF][START_REF] Song | Non-linear kinetic analysis on GaAs selective area MOVPE combined with macro-scale analysis to extract major reaction mechanism[END_REF] ou encore de l'utilisation de chlore [START_REF] Kuech | Selective epitaxy of MOVPE GaAs using diethyl gallium chloride[END_REF][START_REF] Azoulay | Selective growth of GaAs and GaAlAs by Cl-assisted OMVPE at atmospheric pressure[END_REF][START_REF] Nordell | Influence of MOVPE growth conditions and CCl 4 addition on InP crystal shapes[END_REF][START_REF] Korte | Selective area growth of GaAs and AlGaAs with TMGa, TMAl, AsH 3 and HCl by atmospheric pressure MOVPE[END_REF][START_REF] Yokoyama | Selective epitaxial growth of GaAs using dimethylgalliumchloride by multi-wafer low-pressure metal organic vapor phase epitaxy (LP-MOVPE)[END_REF], jusqu'à la morphologie du matériau dans la tranchée de diélectrique [START_REF] Jiang | Evolution of (001) and (111) facets for selective epitaxial growth inside submicron trenches[END_REF][START_REF] Jiang | Growth rate for the selective epitaxial growth of III-V compounds inside submicron shallow-trench-isolation trenches on Si (001) substrates by MOVPE: Modeling and experiments[END_REF]. En outre, des modèles existent pour prédire les profils d'épaisseur et les variations de composition [START_REF] Dupuis | AlGaInAs selective area growth by LP-MOVPE: experimental characterisation and predictive modelling[END_REF][START_REF] Décobert | Modeling and characterization of AlGaInAs and related materials using selective area growth by metal-organic vapor-phase epitaxy[END_REF][START_REF] Dupuis | Intégration par épitaxie sélective d'un Modulateur Electro-Absorbant et d'un Amplificateur Optique à base de puits quantiques AlGaInAs[END_REF], et prédisent même théoriquement le comportement autolimité de la taille des facettes à l'intérieur des tranchées [START_REF] Jiang | Evolution of (001) and (111) facets for selective epitaxial growth inside submicron trenches[END_REF][START_REF] Jiang | Growth rate for the selective epitaxial growth of III-V compounds inside submicron shallow-trench-isolation trenches on Si (001) substrates by MOVPE: Modeling and experiments[END_REF]. Pourtant, il n'y a pas énormément d'articles qui donnent un aperçu des facettes présentées par la croissance du matériau III-V en dehors du diélectrique [START_REF] Kamon | Selective epitaxial growth of GaAs by low-pressure MOVPE[END_REF][START_REF] Xu | Surface morphology and growth rate variation of InP on patterned substrates using tertiarybutylphosphine[END_REF][START_REF] Shen | Selective area growth of GaN on GaAs(001) substrates by metalorganic vapor-phase epitaxy[END_REF][START_REF] Albani | Growth kinetics and morphological analysis of homoepitaxial GaAs fins by theory and experiment[END_REF]. Récemment, un article sur les semi-conducteurs [START_REF] Kunert | Gaining an edge with nano-ridges[END_REF] a montré des images de plusieurs morphologies de croissance pour l'épitaxie sélective du GaAs mais sans donner les paramètres de croissance associés. Comme il est important de comprendre les possibilités que l'on a pour jouer sur le facettage de ces couches en sortant. L'étude suivante présente ici les morphologies qu'il est possible d'atteindre en changeant l'orientation des tranchées ouvertes dans le diélectrique sur le substrat, la température dans la plage de 560 °C à 660 °C ainsi que la pression partielle de TMGa (P T MG a ) dans la fourchette de 1,88 mTorr à 6,89 mTorr.

Pour les études de croissance, un modèle spécifique de masque a été utilisé. Sur ce masque, on peut trouver plusieurs largeurs d'ouverture dans le diélectrique: de 150 nm à 1000 nm. Toutes les les ouvertures sont des lignes orientées dans deux directions : <110> et et <100>.

Le masque diélectrique utilisé sur ces plaques est un oxyde nitrure oxyde (ONO). Le masque utilisé dans ce chapitre a un taux d'ouverture de 80 %. Ces résultats, permettent de conclure que le facettage de l'épitaxie sélective est contrôlé uniquement par l'anisotropie de croissance, comme cela a été démontré précédemment pour les épitaxies sélectives de Si et de Si-Ge réalisées par CVD [START_REF] Dutartre | Facet propagation in si and SiGe epitaxy or etching[END_REF] ainsi que pour les épitaxies sélectives de GaAs cultivées par HVPE [START_REF] Gil-Lafon | Selective growth of GaAs by HVPE: keys for accurate control of the growth morphologies[END_REF][START_REF] Napierala | Control of the growth morphologies of GaAs stripes grown on patterned substrates by HVPE[END_REF]. Le fait que l'épitaxie sélective en MOCVD de GaAs est régie par la cinétique démontre la faisabilité de l'obtention de différentes formes qui doivent être contrôlées pour la mise au point de morphologies spécifiques et reproductibles.

Une fois les modifications de morphologie connues, il a été possible de mettre en évidence les effets se produisant durant la croissance sur un ruban rectangulaire vertical.

Autres effets se produisant durant l'épitaxie sélective

Deux autres effets majeurs de l'épitaxie sélective, indépendants des changements des paramètres de croissance peuvent être mis en évidence. Tout d'abord, il y a des changements de taux de croissance dus à l'augmentation du volume du ruban pendant la croissance de ce dernier. Ainsi qu'une indépendance de forme quelque soit la structuration de la cavité diélectrique soit plate soit en V.

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Stratégies de réduction des défauts

Suite à cette étude morphologique permettant la compréhension des phénomènes de croissance, il était important de se focaliser sur le phénomène de réduction des dislocations permis par l'utilisation de la technique de piègeage des défauts par facteur d'aspect.

Les défauts, qu'il s'agisse d'APB, de TD ou de SF, ont un impact désastreux sur les performances des systèmes optiques [START_REF] Liu | Origin of defect tolerance in InAs/GaAs quantum dot lasers grown on silicon[END_REF]. De nombreuses techniques sont intéressantes pour les réduire, voire les annihiler. Ici, l'intérêt s'est porté sur l'utilisation de la méthode de piégeage par rapport d'aspect. Actuellement, il n'y a à ce jour qu'une seule publication qui donne des résultats quantifiés sur l'efficacité de cette technique pour des couches de semi-conducteurs III-V [START_REF] Kunert | How to control defect formation in monolithic III/v hetero-epitaxy on (100) Si? a critical review on current approaches[END_REF] Grâce au récapitulatif de mesure présenté dans le tableau 4, la nécessité d'une densité de dislocation linéaire peut être clairement mise en évidence. En effet, pour des densités surfaciques de dislocation similaires, la densité linéaire peut être réduite jusqu'à trois fois. Les meilleures densités de dislocation obtenues sur les échantillons sont de l'ordre d'une dislocation tous les 2 µm dans la longueur du ruban.

Il est possible de constater que la structuration dite en V-groove est la structuration qui permet d'obtenir les plus faibles densités de défauts dans la partie supérieure de la couche. Aussi, parmi les quelques échantillons présentés dans le tableau 4, il semble que pour les quatre derniers échantillons plus le rapport d'aspect piégeant est élevé, plus la densité de dislocation linéaire est faible. Cependant, si l'on compare le deuxième et le dernier échantillon qui ont le même rapport d'aspect de 0,9, cela ne semble plus évident. En effet, pour les deux derniers échantillons, la dislocation linéaire est la même, mais un le rapport d'aspect de 0,9 est une fois et demie plus important que celui de 0,6. Par conséquent, comme ces dépôts ont été effectués en utilisant les mêmes préparations de surface, seule la qualité du silicium sousjacent pourrait avoir autant d'impact sur le dépôt. Par conséquent, pour ces nano-rubans, la qualité du silicium sous-jacent ainsi que sa préparation avant la croissance est de la plus haute importance. Les densités de dislocations décrites plus haut sont comparables avec ce qui est présenté dans la publication du groupe de B. Kunert ??. Il est donc possible d'envisager la technique du piégeage par rapport d'aspect comme intéressante pour remplacer les épaisses couches tampon contenant des filtres à dislocations utilisées de nos jours.

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Intégration des parties actives préalablement définies par SEG

Une fois la faisabilité de réglage de la morphologie et l'intérêt du piègeage des défauts par rapport d'aspect démontrées il est possible d'envisager d'intégrer des structures plus complètes pour in-fine réaliser un structure émettrice de lumière.

Quatre structures différentes ont été intégrées sur ces buffers de GaAs rectangulaires verticaux. Seuls deux exemples sont montrés dans ce résumé une structure puits pour une émission dans le proche infrarouge et une structure boites quantiques.

Multipuits quantiques InGaAs/AlGaAs pour émission dans le proche infrarouge

Comme expliqué précédemment, le choix d'utiliser les puits quantiques d'InGaAs à l'intérieur de barrières AlGaAs est motivé par la longueur d'onde d'émission, qui pour les alliages à faible teneur en indium, environ 20 %, se situe dans la plage 900 -1000 nm. Cette plage, permet d'atteindre ici deux longueurs d'onde, 905 nm et 940 nm qui présentent un intérêt particulier pour les applications lidar. L'empilement défini par simulation précédemment est ici intégré par épitaxie sélective. Les puits quantiques ont été développés sur un buffer de GaAs qui sort de la crête. Ici, la tranchée. Les puits quantiques sont constitués d'In 0.2 Ga 0.8 As à l'intérieur de barrières Al 0.1 Ga 0.9 As est montrée.

On peut voir sur la figure C.12 les puits quantiques ainsi que les barrières. La structure à pu être caractérisée en photoluminescence et émet à 977 nm comme montré en figure C.13. La longueur d'onde pourra donc être modulée avec la composition des puits des puits et barrières Reste qu'il est montré que l'intégration est possible.

Boites quantiques pour émission dans le proche infrarouge

Des boites quantiques ont aussi pu être intégrées en épitaxie sélective sur des rubans de GaAs.

Les boites quantiques sont intéressantes pour être moins sensibles aux défauts du fait de leur ponctualité.

il y a peu de publications répertoriant des boites quantiques InAs réalisées par épitaxie sélective. La plupart des boites quantiques ont été réalisées sur des ruban de 5 5 µm de large en utilisant la largeur du masque de diélectrique comme paramètre de réglage de la taille des boites quantiques [START_REF] Tatebayashi | Area-controlled growth of InAs quantum dots by selective MOCVD[END_REF]254,[START_REF] Mokkapati | Controlling the properties of InGaAs quantum dots by selective-area epitaxy[END_REF]. Cependant, des boites quantiques de Ge sur des nano-rubans de silicium ont déjà été démontrées [START_REF] Nguyen | Selective epitaxial growth of Ge quantum dots on patterned SiO 2 /Si (001) surfaces[END_REF][START_REF] Nguyen | Formation and optical properties of Ge quantum dots selectively grown on patterned Si (001) substrates[END_REF][START_REF] Pascale | Ge quantum dots growth on nanopatterned Si (001) surface: Morphology and stress relaxation study[END_REF][START_REF] Leroy | Controlled surface nanopatterning with buried dislocation arrays[END_REF]. En combinant les deux techniques de piégeage des défauts par rapport d'aspect et l'épitaxie sélective des boites quantiques nous pouvons obtenir le meilleur des deux mondes. On pourra remarquer que les boites ne se développent que sur les bords des rubans.

Cela peut s'expliquer par la forme du ruban. En effet, en faisant un profil perpendiculaire à la direction du ruban, on voit que le ruban est courbé et légèrement plus haut sur les côtés par rapport au centre du ruban. L'augmentation locale de la vitesse de croissance sur les côtés des rubans est bien connu dans l'épitaxie sélective. Cette augmentation dépend principalement de la largeur du masque et de la largeur de l'ouverture. Ici, l'augmentation de la vitesse de croissance, serait due au transport de masse entre les parois latérales et la surface supérieure [START_REF] Xiang | Interfacet mass transport and facet evolution in selective epitaxial growth of Si by gas source molecular beam epitaxy[END_REF][START_REF] Sakata | Surface migration effect and lateral vapor-phase diffusion effect for InGaAsP/InP narrow-stripe selective metal-organic vapor-phase epitaxy[END_REF][START_REF] Jiang | Evolution of (001) and (111) facets for selective epitaxial growth inside submicron trenches[END_REF]. En raison de la faible largeur du ruban (environ 500 nm) et de la grande largeur de masque (environ 2 µm),l'accumulation de masse sur le bord des surfaces supérieures est principalement due à la diffusion latérale en phase vapeur latérale qui peut entraîner la migration d'espèces depuis les régions masquées [START_REF] Sakata | Surface migration effect and lateral vapor-phase diffusion effect for InGaAsP/InP narrow-stripe selective metal-organic vapor-phase epitaxy[END_REF][START_REF] Dupuis | AlGaInAs selective area growth by LP-MOVPE: experimental characterisation and predictive modelling[END_REF]. Il est connu qu'en réglant la forme de la couche sous-jacente, on peut contrôler la croissance de points quantiques [START_REF] Bavard | Controlled Ge quantum dots positioning with nano-patterned Si (001) substrates[END_REF][START_REF] Nguyen | Formation and optical properties of Ge quantum dots selectively grown on patterned Si (001) substrates[END_REF]. Ainsi, la courbure présente sur le côté pourrait être d'une utilité notable pour contrôler la localisation de ces structures.

Une structure optimisée de trois niveaux de boites quantiques à pu être testée en photoluminescence, le spectre est présenté en figure C.15.

La figure C.15 montre les spectres de la croissance optimisée.On peut remarquer qu'avec l'augmentation de la puissance de pompe, plusieurs pics de photoluminescence peuvent être distingués. Afin de mieux comprendre ce qui se passe dans cet échantillon des simulations ont été faites. Comme l'ajustement gaussien des spectres PL n'était pas possible, les pics de la courbe et les épaulements ont été utilisés pour les calculs. Il ressort des calculs qu'une population homogène de boites est à l'origine de cette émission. Il est donc envisageable d'utiliser des boites quantiques pour émettre à une longueur d'onde précise tout en étant moins sensible aux défauts.

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Dispositifs, résultats

Suite à la mise en place des différentes briques, des rubans tests obtenus par gravure à partir d'épitaxie pleines plaques ont été réalisés afin d'avoir des références de caractérisation. Des rubans de taille différente ont été réalisés sur substrats de GaAs et de silicium pour se retrouver dans le meilleur et le pire cas en terme de densité de dislocations. Pour ces tests seule l'épitaxie avec une émission dans le rouge à été regardée.

Il a pu être constaté dans un premier temps que sur un même substrat la longueur du ruban n'a pas d'influence sur les caractéristiques I-V. On compare donc les caractéristiques sur des rubans identiques mais réalisés sur substrats différents. pour le ruban sur silicium alors qu'I est égal à 600 A.cm -2 pour le ruban sur GaAs pour la même tension d'entrée de 3 V, ce qui est trois fois plus important. Les paramètres extraits de ces courbes sont données dans le tableau 5.

Habituellement, le facteur d'idéalité donne un aperçu du type de mécanisme physique qui se produit à l'intérieur de la jonction et varie dans la fourchette 1-2. Pour n = 1, qui est le facteur dit "idéal" le mécanisme de courant dominant est la diffusion. Pour 1,5<n<2, le mécanisme dominant est la recombinaison dans la région de déplétion dans notre cas la région intrinsèque. Enfin, pour n=2, la résistance en série des régions de type n et de type p devient non négligeable et les effets ohmiques commencent à apparaître. Pourtant, dans notre cas, les diodes présentent des facteurs d'idéalité de 2,4, qui ne semblent pas coller à la théorie. Néanmoins, il a déjà été rapporté dans la littérature que les diodes épitaxiées en laboratoire et les diodes bleues commerciales présentaient des facteurs d'idéalité supérieurs à la raison pour laquelle les facteurs d'idéalité étaient aussi élevés. Un article traitant de cette question a été publié en 2011 [START_REF] Masui | Diode ideality factor in modern light-emitting diodes[END_REF]. Il ressort de cet article que la gamme du facteur d'idéalité habituel ne s'applique pas dans le cas des structures émettrices de lumière. En effet, le taux de recombinaison net est dominé par les porteurs minoritaires locaux du fait de la structure de confinement des porteurs, ce qui conduit à des facteurs d'idéalité aussi importants que 3 [START_REF] Masui | Diode ideality factor in modern light-emitting diodes[END_REF]. Nos facteurs d'idéalité de 2,4 observés ici sont donc conformes à ce qui a pu être rapporté par la littérature dans le cadre de diodes émettrices de lumière.

Comme il n'y a pas de différences significatives dans les caractéristiques I-V indiquées dans les graphiques précédents, il n'est pas possible d'associer la présence de dislocations à un effet sur la caractéristique électrique de ces dispositifs.

Émission optique

En raison des circonstances particulières dues à la pandémie de CoViD-19, les caractérisations d'électroluminescence n'ont pas pu être faites. Cependant, comme le contact du haut a été réalisé en oxyde d'indium-étain qui il est transparent et permet les observations en vue de dessus. Dans les figures suivantes, seul un ruban réalisé sur le substrat de silicium est présenté mais il est n'est pas le seul à fonctionner et ceux réalisés sur substrat de GaAs émettent également de la lumière.

Comme le montre la figure C.17 Évidemment, les caractérisations précédentes permettent seulement de conclure que l'émission se produit dans la région rouge du spectre visible. Cependant, il sera nécessaire de procéder à d'autres caractérisations électro-optiques pour avoir accès à la caractéristique émissioncourant.

La réalisation de démonstrateurs à émission rouge, réalisés à partir de l'empilement précédemment simulé à donc été démontré. Cela a permis de montrer que les caractéristiques, soit optiques, soit courant -tension, des empilements épitaxiés sur des substrats de GaAs et de silicium sont très proches. Ainsi, l'impact des dislocations n'a pas été constaté avec les paramètres étudiés ci-dessus. Les deux rubans présentaient une émission rouge, mais aucune caractérisation électro-optique n'a pu être réalisée. Avoir accès aux caractéristiques du courant et de la longueur d'onde d'émission pourrait permettre de constater l'impact de la densité de dislocation sur l'émission. Une fois tracées, ces caractéristiques permettront de récupérer un certain nombre de paramètres importants.

Enfin, à terme, lorsque ces structures 2D seront complètement caractérisées, cela permettra de les comparer aux dispositifs fabriqués à partir des mêmes empilements mais réalisés en épitaxie sélective. Ainsi, dans les perspectives, certains indices sont donnés pour la réalisation de structures émétrices à partir d'épitaxies sélectives sur substrats de silicium.

Conclusion et perspectives

Conclusion et perspectives

Dans ce travail, plusieurs briques technologiques ont été étudiées afin d'envisager l'intégration d'une structure horizontale émettrice de lumière par épitaxie sélective.

Après avoir définit les briques de base en s'appuyant sur des simulations pour connaitre les matériaux nécessaires à la réalisation de dispositifs. Des épitaxies sélectives permettant de connaitre les morphologies de croissance et de démontrer l'intégration de parties actives on pu être abordées. Enfin, les premiers dispositifs émetteurs de lumière ont été fabriqués à partir de couches réalisées sur pleines plaques grâce au bâti MOCVD Aplied Materials. Cela permet de montrer que les empilements définis par simulation fonctionnent et fournissent une base de travail pour les futurs dispositifs qui seront réalisés par épitaxie sélective en utilisant les briques développées dans cette thèse.

Title of the thesis: Direct epitaxy of III-V semiconductors on silicon substrate for photonic devices.

Abstract:

Due to the increased demand for performance in terms of data transmission, silicon photonics has become a new paradigm. However, other fields of applications, such as biophotonics and autonomous driving systems for instance, take advantage of this approach. In order to meet this demand for circuits with integrated optical interconnections, this work shows the possibility of integrating an optical source directly on a silicon platform. The technological bricks enabling the integration of light sources, emitting from the red region of the spectra to the L band, by selective epitaxy of various III-V materials is studied. The integration of III-V materials stacks in the form of ridges is therefore demonstrated for various wavelength ranges.

A first version of electrically pumped components, here ribbon diodes, on GaAs and silicon substrates were manufactured and characterized.

Key words: Epitaxy, Semiconductors, III-V, Heterostructures, Selective epitaxial growth, Light emitting diodes.

Titre de la thèse:

Épitaxie directe de semiconducteurs III-V sur substrat de silicium pour dispositifs photoniques.

Résumé:

De par la demande croissante de performance en termes de transmission de données, la photonique sur silicium est devenue un nouveau paradigme. Cependant, d'autres domaines d'applications, comme la biophotonique et les systèmes autonomes de conduite pour n'en citer que deux profitent de cette approche. Afin de répondre à cette demande de circuits à interconnexions optiques intégrées ce travail de thèse montre la possibilité d'intégrer une source optique directement sur une plateforme silicium. Les briques technologiques rendant possible l'intégration de sources lumineuses, émettant du rouge à la bande L, par épitaxie sélective sur silicium ont été étudiées. L'intégration de divers matériaux III-V sous forme de rubans est donc démontrée pour diverses gammes de longueur d'onde. Une première version de composants de type diodes ruban à injection électrique sur substrats GaAs et silicium ont été fabriqués et caractérisés pour une émission dans la zone rouge du spectre.

Mots clefs:

Epitaxie, Semiconducteurs, III-V, Hétérostructures, Croissance par épitaxie sélective, Diodes électroluminescentes.

List of Figures 1 . 1

 11 Evolution of global internet traffic since 1970 and the projection until 2020. Reproduced from [1]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Global data centre traffic by destination in 2021. Reproduced from [2]. . . . . . 1.3 Absorption spectra of a standard optical fibre in the Infra-Red (IR) region. . . . 1.4 Characteristics of mainstream single mode and multi mode fibres manufactured today. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 Main PIC platforms and their corresponding optical functionalities. Reproduced from [3]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 Materials applied in integrated optics and their corresponding transparency ranges. Reproduced from [4]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7 Schematic of a photonic integrated circuit. . . . . . . . . . . . . . . . . . . . . . . 1.8 Schematic view of a 2-level system describing (a) absorption, (b) spontaneous emission, (c) stimulated emission of a photon phenomena. Reproduced from [5]. 1.9 Schematic illustration of direct, here InP, and indirect bandgap, here Si, materials. Reproduced from [6]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.10 Schematic view of (a) double heterostructure (b) bandgap and refractive index variation in the double heterostructure presented on the left. Both Reproduced from [7]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.11 Schematic illustration of a Fabry-Pérot cavity. . . . . . . . . . . . . . . . . . . . . 1.12 Schematic view of (a) DFB cavity and (b) DBR cavity. . . . . . . . . . . . . . . . . 1.13 Schematic view of laser characteristics, output power or light, marked P out as a function of (a) the injected current, I and (b) the wavelength, λ. . . . . . . . . . 1.14 (a) Process flow of the device fabrication with the III-V/SOI die-to-wafer bonding technology. Reproduced from [8]. (b) Outline of the DVS-BCB adhesive die-towafer bonding process (top) and the molecular adhesion die-to-wafer bonding process (bottom). Reproduced from [9]. . . . . . . . . . . . . . . . . . . . . . . . . 1.15 (a) III, IV and V Mendeleiv's columns intersection with 2 nd , 3 r d , 4 t h and 5 t h lines, (b) bandgap energies of III-V semiconductors as a function of their lattice parameter at 300 K, Si and Ge are also indicated as comparisons. . . . . . . . . . 1.16 (a) Thermal expansion coefficients of Si, Ge, and GaAs as functions of temperature. (b) Optical micrograph of a crack array for a GaAs/Si sample with a GaAs layer thickness of 8.1 mm. Both reproduced from [10]. . . . . . . . . . . . . . . . 1.17 Lattices of silicon and III-V materials. . . . . . . . . . . . . . . . . . . . . . . . . . xiii List of Figures 1.18 (a) Schematic description of APB formation e.g. while growing GaAs on Si.

1. 23 (

 23 a) Dark-field cross-sectional TEM image of three layers of InGaAs, GaAs, SLSs DFLs b-bright-field TEM cross-sectional image of DFLs on GaAs buffer and Si substrate. Reproduced from [20] (b) Cross-sectional SEM images of (a) InP on planar Si with a single InGaAs interlayer and (b) InP on planar Si inserted with two periods of 5-layer InAs/InP QD DFLs. Reproduced from [21]. . . . . . . . . 1.24 Schematics of (a) defect-necking effect and (b) ELOG, Reproduced from [22] . . 1.25 (a) Schematic showing the crystallography of threading dislocations and their projections onto the (111) plane. (b) The trapping capability of ART for dislocations and planar defects. Both reproduced from [23]. . . . . . . . . . . . . . . . . 1.26 (a) Cross-sectional scanning transmission electron microscopy (STEM) image on a single trench, (b) low magnification cross-sectional STEM image of a GaAs layer grown in 140 nm wide SiO 2 trenches on ( 100 )-oriented Si substrate showing a good uniformity of the selective epitaxial growth. The trenches are oriented along the [ 011 ] direction and are 180nm deep. Reproduced from [24]. . . . . . 1.27 Left: Cross-section high resolution (HR) TEM of the GaAs buffer. Right: Combined bright filed (BF)(002) images of a transverse section along the trench. The vertical lines visible in the Si substrate are caused by the image combination. Threading dislocations are clearly visible by the dark blurred contrast, whereas planar defects such as micro twins cause a straight dark line in < 111 > directions. Reproduced from [25]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.28 (a) Schematics and bright-field scanning TEM images showing the interaction between QDs and threading dislocations. Reproduced from [26]. (b) Schematic illustration of quantum confinement and density of states in quantum wells and dots. Reproduced from [27]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiv 2.

  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.28 (a)SEM image of a full red emitting structure on top of Si(001). (b) Zoomed SEM image on the transitions in the active part region made of Al 0.30 Ga 0.70 As quantum wells between Al 0.45 Ga 0.55 As barriers. . . . . . . . . . . . . . . . . . . . 2.29 (a) Indium atomic concentration as a function of sputtering time in the structure presented in (b) with on top the cross-section imaged via SEM and the schematic of the structure at the bottom. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.30 5x5 µm 2 AFM image of InAs structures grown (at 520 °C, 30 s, P T M I n = 4 × 10 -3 mTorr) on top of an InP regrowth layer on InP(001) wafer. . . . . . . . . . . . . . 2.31 Distribution in height (a) and in radii (b) for the sample grown (at 520 °C, 30 s, P T M I n = 4 × 10 -3 mTorr) on top of an InP regrowth layer on an InP(001) wafer. . 2.32 (a) 1x1 µm 2 AFM image and (b) SEM image of InAs structures grown (at 520 °C, 30 s, P T M I n = 4 × 10 -3 mTorr) on top of an InP regrowth layer on InP(001) wafer.

xvi 2 . 75 3. 1

 2751 [START_REF] Deppe | Stability of 300 K continuous operation of p-n Al x G a 1-x As -G a As quantum well lasers grown on Si[END_REF] (a) SEM cross-section, (b) zoom on the pink circled area of (a), (c) 5x5 µm2 AFM image with an exhibited RMS roughness of 0.28 nm, (b) SEM cross-section and (d) PL spectra of InAs structures grown (at 520 °C, 30 s, P T M I n = 4 × 10 -3 mTorr) on top of an InP regrowth layer on InP(001) wafer, with an InP capping layer. The PL spectra was obtained using a 532 nm excitation laser with a power of 1.3 kW.cm -2 with a 4 s acquisition time. . . . . . . . . . . . . . . . . . . . . . . . . . . 68 2.34 5x5 µm 2 AFM images of InAs structures grown at 520 °C and P T M I n = 4 × 10 -3 mTorr with a growth time of (a) 30 s, (b) 10 s and (c) 5 s, on top of an InP/GaAs template on Si(001) substrate. (d) Histogram bar chart of the height distribution of the InAs structures shown in (a), (b) and (c). . . . . . . . . . . . . . . . . . . . . 69 2.35 5x5 µm 2 AFM images of InAs structures grown for 10 s with P T M I n = 4 × 10 -3 mTorr at a growth temperature of (a) 520 °C, (b) 500 °C, and (c) 420 °C, on top of an InP/GaAs template on Si(001) substrate. (d) Histogram bar chart of the height distribution of the InAs structures shown in (a), (b) and (c). . . . . . . . . . . . . 70 2.36 (a) Histogram bar chart of the height distribution and (b) box chart of the distribution of the InAs quantum dot at different positions grown, at 520 °C for 10 s with P T M I n = 4 × 10 -3 mTorr, on top of an InP/GaAs template on Si(001) substrate. The different positions were taken from centre (1st position) to edge (4th position) of the wafer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 2.37 (a) SEM cross-section, (b) zoom on the pink circled area of (a), (c) 5x5 µm 2 AFM image with an exhibited RMS roughness of 0.77 nm, (b) SEM cross-section and (d) PL spectra of InAs structures grown (at 520 °C, 10 s, P T M I n = 4 × 10 -3 mTorr) on top of a InP/GaAs/Si(001) template capped with an 20 nm InP layer. The PL spectra was obtained using a 532 nm excitation laser with a power of 1.3 kW.cm -2 with a 4 s acquisition time. . . . . . . . . . . . . . . . . . . . . . . . . . . 71 2.38 (a) 5x5 µm 2 AFM image and (b) zoomed 2x2 µm 2 AFM image of InAs structures grown at 520 °C, 10 s, P T M I n = 4 × 10 -3 mTorr on top of an InGaP sublayer on a GaAs(001) substrate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 2.39 Distribution in height (a) and in radii (b) for the sample grown at 520 °C, 10 s and P T M I n = 4 × 10 -3 mTorr on top of an InGaP sublayer on a GaAs(001) substrate. 73 2.40 (a) SEM cross-section, (b) zoom on the pink circled area of (a), (c) 5x5 µm 2 AFM image with an exhibited RMS roughness of 3.61 nm, (d) PL spectra of InAs structures grown (at 520 °C, 10 s, P T M I n = 4 × 10 -3 mTorr) on top of a InGaP sublayer capped with an 20 nm GaAs layer. The PL spectra was obtained at 300 K using a 532 nm excitation laser with a power of 0.325 kW.cm -2 with a 4 s acquisition time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 2.41 Schematic of the particle considered to solve Schroedinger's equation. . . . . . Descriptive diagram of the wanted ridge structures. Showing the contact and cladding layers as well as the active part, here displayed with a multiple quantum well (MQW) structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 xvii 3.2 (a) 52°SEM tilted top-view image and (b) cross-section of a line along the <100> direction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 SEM cross sections of SEG grown at (a) 560 °C, (b) 580 °C, (c) 600 °C, (d) 620 °C, (e) 640 °C and (f ) 660 °C with P T MG a = 3.65 mTorr and P T B As = 20.1 mTorr. The GaAs deposition time between each marker is 30s. The ridge width inside the dielectric is 300 nm for all growths. (g) Crystallographic planes orientation on images (a), (b), (c), (d), (e) and (f). . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4 (a)Growth rate on the different facets as a function of the temperature. (b) Growth rate ratios. The selective epitaxial growths presented on this graph were realized with P T MG a = 3.65 mTorr and P T B As = 20.1 mTorr. Data is extracted for a constant ridge width inside the dielectric of 300 nm. . . . . . . . . . . . . . . . 3.5 SEM cross-sections for an identical P T MG a = 1.88 mTorr and P T B As = 10.4 mTorr at different temperatures. (a) 600 °C, (b) 620 °C, (c) 640 °C, and (d) 660 °C. The GaAs deposition time between each marker is 60s. The lamellae were all extracted from 300 nm ridge inside the dielectric. (e) Crystallographic planes orientation on images (a), (b), (c) and (d). . . . . . . . . . . . . . . . . . . . . . . . 3.6 SEM cross-sections for an identical P T MG a = 5.32 mTorr and P T B As = 29.3 mTorr at different temperatures. (a) 600 °C, (b) 620 °C, (c) 640 °C, and (d) 660 °C. The GaAs deposition time between each marker is 45s. The lamellae were all extracted from 300 nm ridge inside the dielectric. (e) Crystallographic planes orientation on images (a), (b), (c) and (d). . . . . . . . . . . . . . . . . . . . . . . . 3.7 SEM cross-sections for an identical P T MG a = 6.89 mTorr and P T B As = 38.0 mTorr at different temperatures. (a) 600 °C, (b) 620 °C, (c) 640 °C, and (d) 660 °C. The GaAs deposition time between each marker is 15s. The lamellae were all extracted from 300 nm ridge inside the dielectric. (e) Crystallographic planes orientation on images (a), (b), (c) and (d). . . . . . . . . . . . . . . . . . . . . . . . 3.8 (a) Growth rate on the different facets as a function of partial pressure. (b)

3. 10

 10 Growth rate upon facets {110} as a function of temperature and partial pressure of TMGa. The ratio P T B As /P T MG a is kept constant at a value of 5.51. Data is extracted for the right facet and for a constant ridge width inside the dielectric of 300 nm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.11 Growth rate ratio of facet {110} on facet (001) as a function of temperature and partial pressure of TMGa. The ratio P T B As /P T MG a is kept constant at a value of 5.51. Data is extracted for the right facet and for a constant ridge width inside the dielectric of 300 nm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xviii 3.12 Growth rate upon facets {111} A as a function of temperature and partial pressure of TMGa. The ratio P T B As /P T MG a is kept constant at a value of 5.51. Data is extracted for the right facet and for a constant ridge width inside the dielectric of 300 nm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 3.13 Growth rate ratios of (a) facet {111} on facet (001) and of (b) facet {111} on facet {110} as a function of temperature and partial pressure of TMGa. The ratio P T B As /P T MG a is kept constant at a value of 5.51. Data is extracted for the right facet and for a constant ridge width inside the dielectric of 300 nm. . . . . . . . 91 3.14 Possible attainable morphologies in the range 600 °C < T < 660 °C and 1.88 mTorr < P T MG a < 6.89 mTorr. The morphologies are presented in evolution order. (a) Horizontal rectangular morphology. (b) Vertical rectangular morphology. (c) Cropped octahedron cross-section morphology. (d) Octahedron cross-section morphology. From (a) to (d) one has to increase the temperature at a given partial pressure or, one one has to decrease the partial pressure at a given temperature. (e) Growth rate directions for the different planes considered in images (a), (b), (c) and (d). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 3.15 (a) Growth rate as a function of the cumulated deposition time once outside the dielectric. (b) Growth rate ratios. The epitaxy was realized at 620 °C with P T MG a = 3.65 mTorr and P T B As = 20.1 mTorr. Data is extracted from a single wafer. 94 3.16 (a) Growth rate as a function of the stripe width inside the dielectric. (b) Growth rate ratios. The SEGs presented here were deposited at the same time on a single wafer. The local opening rate is identical for all the lines. The epitaxy was realized at 600 °C with P T MG a = 3.65 mTorr and P T B As = 20.1 mTorr. . . . . . . . . . . . . 95 3.17 SEM cross-section for a GaAs epitaxy done on a (a) flat and on a (b) V-groove structured silicon. The epitaxies were realized at 600 °C with P T MG a = 3.65 mTorr and P T B As = 20.1 mTorr. Data is extracted for a constant ridge width inside the dielectric of 300 nm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 3.18 (a)SEM top-view and (b) ECCI images of the same zone on a 400 nm GaAs layer grown on Si(001) with quantum dots grown on top. In green are circled defects that can be easily observed with both techniques. The defects circled in blue, respectively orange, are easily observed in ECCI, respectively SEM, and not by SEM, respectively ECCI. The circles display the dislocations and the rectangles display the stacking faults. Images courtesy of Sylvain David. . . . . . . . . . . . 98 3.19 Schematic cross-sections of the different important parameters in the case of selective epitaxial growth for a (a) flat structuration and a (b) V-groove structuration. 99 3.20 ECCI top view of two selective epitaxial growths with an AR = 0.9 and W r i d g e = 200 nm done on a bottom (a) flat ridge (b) V-grooved ridge. The growth done on both samples was identical. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 xix 3.21 Comparison of the dislocation obtained for blanket grown layers and using SEG growth.

  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.22 Schematics of the optimal obtainable structure for a horizontal light emitting device. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.23 Cross-sectional Brigth-Field (BF) STEM images of (a) sample A1, the GaAs/Al-GaAs ridge perpendicular to the ridge's direction showing three AlGaAs QWs embedded inside an AlGaAs matrix with GaAs grown at 600 °C and (b) sample B1, the 650 °C GaAs/AlGaAs ridge perpendicular to the ridge's direction showing three AlGaAs QWs embedded inside an AlGaAs matrix, with GaAs grown at 650 °C. The different zones of Al incorporation are indicated with numbers ranging from 1 to 4b. The three colour lines show where the EDX profiles where realized. 3.24 (a) Cross-sectional HAADF-STEM image of sample C2 the different zones of Al incorporation are indicated with numbers ranging from 1 to 4b. (b) EDX profiles of Al in sample C2. (c), (d) and (e) EDX mapping of Al, Ga and As elements in the sample. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.25 Schematic illustration in three growth steps (GS) of the combined growth on the various facets leading to the final compositional structure. The left hand-sight represents samples from series A the right hand-sight samples from series B and C. The growth upon facets (001), {110} and {111} are shown in orange, blue and green. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.26 (a) TEM microscopy of the interface zone on sample A2. (b) TEM microscopy of the interface zone on sample A2 zoomed on the QW zone. (c) Concave faceting of GaAs stud. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.27 10 K panchromatic CL mapping superposed to the FIB-SEM cross-section to visualize the different contributions. (a) GaAs and low containing Al in the AlGaAs layers between 800 and 850 nm for sample B1. (b) Barriers contribution at 664 nm for sample B1. (c) QWs contribution at 690 nm for sample B1. (d) QWs contribution at 700 nm for sample A1. . . . . . . . . . . . . . . . . . . . . . . . . . 3.28 (a) Top-view SEM image of the mapped ridge. (b) 10 K panchromatic CL mapping of quantum wells, at 700 nm, contribution in sample A1. . . . . . . . . . . . . . . 3.29 (a) Cross-sectional SEM image of the A1 GaAs/AlGaAs ridge perpendicular to the ridge's direction. The limit between the dielectric and the silicon is shown by a grey line. (b) Cross-sectional STEM image of the A1 GaAs/AlGaAs ridge along the <110> direction. (c) ECC top View of a section of A2 ridge. . . . . . . . . . . . xx 3.30 SEM cross-section (a) perpendicularly to the ridge section and (b) along the direction of the ridge. The blue dotted rectangle in (a) indicates the position of the observed section in (b). Zoomed SEM cross-sections of (c) the MQW, (d) superposition of III-V material with a dislocation and SiO 2 and (e) the Moiré pattern due to the superposition of the Silicon and III-V material. . . . . . . . . 3.31 PL spectra of the structure presented in figure 3.30. The PL spectra was obtained at 300 K by a CCD detector using a 532 nm excitation laser with a power of 5.14 kW.cm -2 with a 0.1 s acquisition time. . . . . . . . . . . . . . . . . . . . . . . . . . 3.32 SEM cross-section (a) perpendicularly to the ridge section and (b) along the direction of the ridge. The blue dotted rectangle in (a) indicates the position of the observed section in (b). (c) Zoomed SEM cross-section of the MQW showing the GaAs-InP transition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.33 PL spectra of the structure presented in figure 3.32. The PL spectra was obtained at 300 K by an InGaAs detector using a 532 nm excitation laser with a power of 390 kW.cm -2 with a 2 s acquisition time. . . . . . . . . . . . . . . . . . . . . . . . 3.34 (a) 3D rendering of the AFM scan presented in (c). (b) SEM image of quantum dots grown on top of a InGaP/GaAs selective epitaxial grown template on top of Si (001). (c) Top-view AFM scan of a 4 µm long section of the ridge. All the images were made on the same ridge with an InAs deposition time of 9s. . . . . 3.35 (a) SEM image of quantum dots grown on top of a InGaP/GaAs selective epitaxial grown template on top of Si (001. (b) SEM zoom on the stacked quantum dots on the side of the ridge.(c) Photoluminescence at room temperature of the shown structure in (a). The InAs deposition time was 11 s.) . . . . . . . . . . . . . . . . 3.36 PL spectra at room temperature of a three-layered InAs quantum dot optimized growth. The indexed peaks were used for simulations purposes. The mean height of the quantum dots on the three layers was around 10 nm. . . . . . . . 3.37 Form of the simulated quantum dot . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1 Best simulated structure for red emission. . . . . . . . . . . . . . . . . . . . . . . 4.2 SEM cross-sections of the deposited stacks on (a) GaAs and (b) Si substrates for the device realization. Zoomed cross-sections on the active part for the depositions on (c) GaAs and (d) Si wafers. The dotted lines in (c) and (d) indicate the transition between the doped cladding layers and the SCH. . . . . . . . . . . 4.3 SEM cross-sections of a SEG structure with 6QW, the upper cladding and contact layers were not deposited on this structure. . . . . . . . . . . . . . . . . . . . . . 4.4 PL spectra of the deposited structures without the upper cladding. PL spectra of the stacks deposited on GaAs, Si and Si patterned substrates. The PL spectra were obtained at 300 K using a 532 nm excitation laser with a power of 5.14 kW.cm -2 with a 1 s acquisition time. . . . . . . . . . . . . . . . . . . . . . . . . . 4.5 Photographs of one of the 4 inch wafers used for device realization. (a) Wafer after epitaxy and (b) wafer after all the technological steps are made. . . . . . . xxi 4.6 Cross-section schematics of the first steps processes to pattern the ridge structure and the bottom metal n-contact. (a) III-V deposited stack, (b) SiN deposition, (c) after lithography and etch of the SiN, (d) definition of the ribbon by dry-etch, (e) Lithography on negative photoresist, (f ) metal deposition by lift-off. . . . . 4.7 SEM image of one of the etched facets at one end of a ridge. . . . . . . . . . . . 4.8 (a) SEM image of one end of the ridge with the deposited bottom contact. (b) Zoomed SEM image of the blue highlighted area shown in (a). . . . . . . . . . . 4.9 Cross-section schematics of the last steps necessary for the deposition of the top contact as well as the electrodes. (a) BCB encapsulation,(b) Positive photoresist deposition and development, (c) opening of the bottom contact, (d) positive photoresist deposition and development, (e) top contact opening and stripping, (f ) deposition of the top contact and of the electrodes. . . . . . . . . . . . . . . . 4.10 Optical microscopy top-views after the definition of the vias. (a) Large area picture and (b) zoomed picture of the blue highlighted area shown in (a). . . . 4.11 Optical microscopy top-view of several finished devices. . . . . . . . . . . . . . 4.12 Optical properties of BCB. Reproduced from DOW Chemicals data sheets. . . . 4.13 Light extraction from an optical cavity schematic. . . . . . . . . . . . . . . . . . 4.14 I-V characteristics shown in semilog scale as well as linear scale in the insets. Comparison of short (480x3 µm 2 ) ribbon diodes and long (980x3 µm 2 ) ribbon diodes grown on (a) GaAs substrate and (b) Si substrate. . . . . . . . . . . . . . . 4.15 I-V characteristics shown in semilog scale as well as linear scale in the inset. Comparison of long (980x3 µm 2 ) ribbon diodes grown on GaAs substrate and Si substrate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.16 Top view through a camera of a ridge with current flowing through it and emitting red light. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.17 Optical microscopy top views through a camera of the long (980x3 µm 2 ) ribbon tested on silicon as seen in (a) an illuminated room without current flowing through the structure and in (b) a dark room with current flowing through the structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.1 (a) SEM top view of the disposition of the contact areas for the bottom contact. (b) Schematic of the disposition of the contact metallization . . . . . . . . . . . 5.2 (a) Cross-section perpendicularly to the ridge direction, (b) cross section in the middle of the oxide slit along the ridge direction, (c) zoomed cross section on the MQW part along the ridge direction and (d) top-view of the III-V ridge and contact areas, the pink lines indicate the zones were the cross-sections were made. All the images are taken from a single wafer. The deposition of the complete SEG structure was made using a temperature of 620 °C and P T MG a = 3.65 mTorr. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.1 Schematic laser simulation flow with LaserMOD tool. Adapted from [75]. . . . . B.1 Structures used for the optimization of the number of quantum wells for (a) NIR and (b) L-band emission. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxii B.2 (a) Mode confinement factor and P out /I ratio as a function of the number of quantum wells in the structure. (b) Laser frequency at 2V as a function of the number of quantum wells in the structure. . . . . . . . . . . . . . . . . . . . . . . B.3 (a) Light-current-voltage curve. (b) Optical spectrum of the structure at 2V. . . B.4 (a) Mode confinement factor and P out /I ratio as a function of the number of quantum wells in the structure. (b) Laser frequency at 1V as a function of the number of quantum wells in the structure. . . . . . . . . . . . . . . . . . . . . . . B.5 (a) Light-current-voltage curve. (b) Optical spectrum of the structure at 1V. . . C.1 Schematics of the different mask levels in order of use. (a) First level for the definition of the III-V ridge. (b) Second level for the deposition of the n-contact. (c) Third level for the realization of the n-via. (d) Fourth level for the definition of the p-via. (e) Fifth and last level for the electrodes realization. . . . . . . . . . C.2 Trafic global dans les centres de données par destination en 2021. Reproduit de [2]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C.3 Principales plates-formes photoniques et leurs fonctionnalités optiques correspondantes. Reproduit de [3]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C.4 Matériaux utilisés en optique intégrée et leur gamme de transparence. Reproduit de [4]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C.5 Schéma d'un circuit intégré photonique. . . . . . . . . . . . . . . . . . . . . . . . C.6 Photographie du cluster tool utilisé dans cette étude. . . . . . . . . . . . . . . . .

  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C.9 Structures définies par simulation pour obtenir les meilleures caractéristiques possibles avec les limites fixées dans cette étude pour une émission (a) partie rouge du sceptre VIS, (b) NIR et (c) L-band. . . . . . . . . . . . . . . . . . . . . . . C.10 Schéma représentatif de la structure souhaitée.Les couches contact, de confinement ainsi que la partie active composée de puits quantiques sont indiquées. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxiii C.11 Morphologies atteignables dans la gamme 600 °C < T < 660 °C et 1,88 mTorr < P T MG a < 6,89 mTorr. Les morphologies sont présentées dans l'ordre de l'évolution. (a) Morphologie rectangulaire horizontale. (b) Morphologie rectangulaire verticale. (c) Morphologie d'une section d'octaèdre tronquée. (d) Morphologie d'une section d'octaèdre. Pour évoluer de (a) à (d), il faut augmenter la température à une pression partielle donnée ou, diminuer la pression partielle à une température donnée. (e) Directions de croissance pour les différents plans considérés dans les images (a), (b), (c) et (d). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 C.12 Section transverse au MEB (a) perpendiculairement à la section du ruban et (b) le long de la direction du ruban. Le rectangle en pointillés bleus en (a) indique la zone de la réalisation de la coupe transverse en (b

Figure 1 . 1 -

 11 Figure 1.1 -Evolution of global internet traffic since 1970 and the projection until 2020. Reproduced from [1].

Figure 1 . 2 -

 12 Figure 1.2 -Global data centre traffic by destination in 2021. Reproduced from [2].

Figure 1 . 3 - 1 -

 131 Figure 1.3 -Absorption spectra of a standard optical fibre in the Infra-Red (IR) region.

Figure 1 . 4 -

 14 Figure 1.4 -Characteristics of mainstream single mode and multi mode fibres manufactured today.

Figure 1 . 8 -

 18 Figure 1.8 -Schematic view of a 2-level system describing (a) absorption, (b) spontaneous emission, (c) stimulated emission of a photon phenomena. Reproduced from [5].

on in section 1 Figure 1 . 10 -

 1110 Figure 1.10 -Schematic view of (a) double heterostructure (b) bandgap and refractive index variation in the double heterostructure presented on the left. Both Reproduced from [7].

Figure 1 . 11 -

 111 Figure 1.11 -Schematic illustration of a Fabry-Pérot cavity.

Chapter 1 .Figure 1 . 12 -

 1112 Figure 1.12 -Schematic view of (a) DFB cavity and (b) DBR cavity.

Figure 1 . 13 -

 113 Figure 1.13 -Schematic view of laser characteristics, output power or light, marked P out as a function of (a) the injected current, I and (b) the wavelength, λ.

Figure 1 .

 1 Figure 1.14 -(a) Process flow of the device fabrication with the III-V/SOI die-to-wafer bonding technology. Reproduced from [8]. (b) Outline of the DVS-BCB adhesive die-to-wafer bonding process (top) and the molecular adhesion die-to-wafer bonding process (bottom). Reproduced from [9].

Figure 1 .

 1 Figure 1.15 -(a) III, IV and V Mendeleiv's columns intersection with 2 nd , 3 r d , 4 t h and 5 t h lines, (b) bandgap energies of III-V semiconductors as a function of their lattice parameter at 300 K, Si and Ge are also indicated as comparisons.

Figure 1 .

 1 Figure 1.16 -(a) Thermal expansion coefficients of Si, Ge, and GaAs as functions of temperature. (b) Optical micrograph of a crack array for a GaAs/Si sample with a GaAs layer thickness of 8.1 mm. Both reproduced from [10].

Figure 1 .

 1 Figure 1.18 -(a) Schematic description of APB formation e.g. while growing GaAs on Si. Dark Brown: Si, Black: As and Grey: Ga. 1 and 2 indicate monatomic and diatomic steps. The picture does not portray lattice mismatch between the two. Reproduced from [11]. (b) AFM image of a 400 nm thick GaAs layer grown on Si(001), exhibiting a high density of randomly oriented APBs. Reproduced from [12].

Figure 1 . 19 -

 119 Figure 1.19 -GaAs relaxed layer on silicon.

Figure 1 . 20 -

 120 Figure 1.20 -Results on Threading Dislocation Density (TDD) in strain-relaxed Ge and GaAs epitaxial films on Si( 100 ) by Wang et al.. The references presented here come from the following papers:[START_REF] Hartmann | Reduced pressure-chemical vapor deposition of intrinsic and doped Ge layers on Si(001) for microelectronics and optoelectronics purposes[END_REF][START_REF] Larsen | Epitaxial growth of Ge and SiGe on Si substrates[END_REF][START_REF] Fitzgerald | Dislocations in relaxed SiGe/Si heterostructures[END_REF][START_REF] Tamura | Rearrangement of misfit dislocations in GaAs on Si by post-growth annealing[END_REF][START_REF] Yamaguchi | Dislocation density reduction in heteroepitaxial III-V compound films on Si substrates for optical devices[END_REF]. Reproduced from[START_REF] Wang | A model of threading dislocation density in strain-relaxed Ge and GaAs epitaxial films on Si (100)[END_REF].

  APBs nucleate on the edges of nominal silicon monoatomic steps as seen in figure1.18.

Figure 1 .

 1 Figure 1.21 -(a) 5x5 µm 2 AFM image of a 400 nm thick GaAs growth on un-optimized Si(001): High density of randomly oriented APBs. Root mean square (RMS) roughness=1.6 nm. (b) 2x2 µm 2 AFM image of 0.15 °Si(001) after optimized preparation (800 °C-950 °Cannealing under H 2 ). The surface is therefore mainly double-stepped. (c) 5x5 µm 2 AFM image of an APBs-free 150 nm thick GaAs growth on optimized 0.15 °Si(001). RMS roughness is 0.8 nm. Reproduced from [12].

Figure 1 .

 1 Figure 1.22 -(a) Cross-sectional SEM image and (b) AFM image of approximately 300 nm coalesced GaAs thin film grown on a nanowire array. Reproduced from [19].

Figure 1 .

 1 Figure 1.23 -(a) Dark-field cross-sectional TEM image of three layers of InGaAs, GaAs, SLSs DFLs b-bright-field TEM cross-sectional image of DFLs on GaAs buffer and Si substrate. Reproduced from [20] (b) Cross-sectional SEM images of (a) InP on planar Si with a single InGaAs interlayer and (b) InP on planar Si inserted with two periods of 5-layer InAs/InP QD DFLs. Reproduced from [21].

Figure 1 . 24 -

 124 Figure 1.24 -Schematics of (a) defect-necking effect and (b) ELOG, Reproduced from[START_REF] Wang | III-Vs on Si for photonic applications-A monolithic approach[END_REF]

Figure 1 .

 1 Figure 1.25 -(a) Schematic showing the crystallography of threading dislocations and their projections onto the (111) plane. (b) The trapping capability of ART for dislocations and planar defects. Both reproduced from [23].

1. 3 .Figure 1 .

 31 Figure 1.26 -(a) Cross-sectional scanning transmission electron microscopy (STEM) image on a single trench, (b) low magnification cross-sectional STEM image of a GaAs layer grown in 140 nm wide SiO 2 trenches on ( 100 )-oriented Si substrate showing a good uniformity of the selective epitaxial growth. The trenches are oriented along the [ 011 ] direction and are 180nm deep. Reproduced from [24].

Figure 1 .

 1 Figure 1.27 -Left: Cross-section high resolution (HR) TEM of the GaAs buffer. Right: Combined bright filed (BF)(002) images of a transverse section along the trench. The vertical lines visible in the Si substrate are caused by the image combination. Threading dislocations are clearly visible by the dark blurred contrast, whereas planar defects such as micro twins cause a straight dark line in < 111 > directions. Reproduced from [25].

Figure 1 .

 1 Figure 1.28 -(a) Schematics and bright-field scanning TEM images showing the interaction between QDs and threading dislocations. Reproduced from [26]. (b) Schematic illustration of quantum confinement and density of states in quantum wells and dots. Reproduced from [27].

Figure 1 . 29 -

 129 Figure 1.29 -Graph representing the obtained threshold current densities for double heterostructure (DH), single quantum well (SQW), multiple quantum wells (MQW) and QDs active layers. The references presented here come from the following papers[START_REF] Windhorn | Room-temperature operation of GaAs/AlGaAs diode lasers fabricated on a monolithic GaAs/Si substrate[END_REF][START_REF] Sakai | Room-temperature laser operation of AlGaAs/GaAs double heterostructures fabricated on Si substrates by metalorganic chemical vapor deposition[END_REF][START_REF] Fischer | Low threshold laser operation at room temperature in GaAs/(Al,Ga)As structures grown directly on (100)Si[END_REF][START_REF] Van Der Ziel | Degradation of GaAs lasers grown by metalorganic chemical vapor deposition on Si substrates[END_REF][START_REF] Deppe | Room-temperature continuous operation of p-n Al x G a 1-x As -G a As quantum well heterostructure lasers grown on Si[END_REF][START_REF] Deppe | Stability of 300 K continuous operation of p-n Al x G a 1-x As -G a As quantum well lasers grown on Si[END_REF][START_REF] Razeghi | First cw operation of a G a 0.25 I n 0.75 As 0.5 P 0.5 -I nP laser on a silicon substrate[END_REF][START_REF] Chong | Low-threshold operation of AlGaAs/GaAs multiple quantum well lasers grown on Si substrates by molecular beam epitaxy[END_REF][START_REF] Sugo | Stable cw operation at room temperature of a 1.5 µm wavelength multiple quantum well laser on a Si substrate[END_REF][START_REF] Egawa | AlGaAs/GaAs laser diodes with GaAs islands active regions on Si grown by droplet epitaxy[END_REF][START_REF] Kazi | Growth of I n x G a 1-x As quantum dots by metal-organic chemical vapor deposition on Si substrates and in GaAs-based lasers[END_REF][START_REF] Mi | High-performance quantum dot lasers and integrated optoelectronics on Si[END_REF][START_REF] Wang | 1.3µm InAs/GaAs quantum-dot lasers monolithically grown on Si substrates[END_REF][START_REF] Liu | High performance continuous wave 1.3 µm quantum dot lasers on silicon[END_REF][START_REF] Tang | 1.3µm InAs/GaAs quantum-dot lasers monolithically grown on Si substrates using InAlAs/GaAs dislocation filter layers[END_REF][START_REF] Lee | Continuous-wave InAs/GaAs quantumdot laser diodes monolithically grown on Si substrate with low threshold current densities[END_REF][START_REF] Chen | Electrically pumped continuous-wave III-V quantum dot lasers on silicon[END_REF]. Reproduced from[44].

Figure 2 . 1 -

 21 Figure 2.1 -Photography of the cluster tool used in this study.

Figure 2 . 2 -

 22 Figure 2.2 -Schematic drawing of an organometallic cylinder. Reproduced from [45].

Figure 2 . 3 -

 23 Figure 2.3 -Schematic drawing of reaction regimes for the MOCVD process. Reproduced from [46].

Figure 2 . 4 -

 24 Figure 2.4 -Temperature dependence of the growth rate of GaAs using TMGa. The growth rate is normalized to the inlet TMGa molecular flow. Data are from (a) [47], (b)[START_REF] Kräutle | Investigations on low temperature MO-CVD growth of GaAs[END_REF], (c)[START_REF] Gottschalch | Epitaxial deposition of GaAs in the Ga(CH 3 ) 3 AsH 3 H 2 system (II). investigations on the hetero-epitaxy of GaAs on Ge[END_REF] and (d)[START_REF] Leys | A study of the growth mechanism of epitaxial GaAs as grown by the technique of metal organic vapour phase epitaxy[END_REF]. Reproduced from[START_REF] Zilko | Metal organic chemical vapor deposition[END_REF].

Figure 2 . 5 -

 25 Figure2.5 -Stack thicknesses, without considering the buffer and dislocation filters when on silicon, depending and the emission wavelength. The references are as follow A[START_REF] Nemoto | Monolithic-integrated two-wavelength laser diodes for digital-versatile-disk/compact-disk playback[END_REF], B[START_REF] Hayakawa | Lowthreshold room-temperature cw operation of (AlGaAs) m (GaAs) n superlattice quantum well lasers emitting at ∼680 nm[END_REF], C[START_REF] Hayakawa | High reliability in AlGaAs laser diodes prepared by molecular beam epitaxy on 0.5°-misoriented (111)B substrates[END_REF], D[START_REF] Nemoto | Monolithic-integrated two-wavelength laser diodes for digital-versatile-disk/compact-disk playback[END_REF], E[START_REF] Herrmann | Reduction of mirror temperature in GaAs/AlGaAs quantum well laser diodes with segmented contacts[END_REF], F[START_REF] Groenert | Monolithic integration of room-temperature cw GaAs/AlGaAs lasers on Si substrates via relaxed graded GeSi buffer layers[END_REF], G[START_REF] Iwamura | Dynamic behaviour of a GaAs-AlGaAs MQW laser diode[END_REF], H[START_REF] Choi | InGaAs/AlGaAs strained single quantum well diode lasers with extremely low threshold current density and high efficiency[END_REF], I[START_REF] Hu | Lateral carrier diffusion and surface recombination in InGaAs/AlGaAs quantum-well ridge-waveguide lasers[END_REF], J[START_REF] Liu | Electrically pumped continuous-wave 1.3 µm quantum-dot lasers epitaxially grown on on-axis (001)GaP/Si[END_REF], K[START_REF] Chen | Electrically pumped continuous-wave 1.3 µm InAs/GaAs quantum dot lasers monolithically grown on on-axis Si (001) substrates[END_REF], L[START_REF] Wang | Emerging technologies in si active photonics[END_REF],M[START_REF] Zhu | Room-temperature electrically-pumped 1.5 µm InGaAs/InAlGaAs laser monolithically grown on on-axis (001) Si[END_REF], N[START_REF] Kawamura | InGaAs/InGaAlAs/InAlAs/InP SCH-MQW laser diodes grown by molecular-beam epitaxy[END_REF] and O[START_REF] Temkin | InGaAs/InP quantum well lasers with sub-mA threshold current[END_REF].

Figure 2 . 6 -

 26 Figure 2.6 -Expected positions of the contacts on the future devices.

  For example, the structure developed by Herrman et al. presented in figure 2.7(a) uses three GaAs quantum wells embedded inside Al 0.35 Ga 0.65 As barriers. In order to shorter the wavelength to the red region of the spectrum the active part was modified. Al 0.30 Ga 0.70 As quantum wells were used with AlAs barriers. The non intentionally doped (NID) active part was sandwiched between GaAs contact layers.

Figure 2 . 7 -Figure 2 . 8 -

 2728 Figure 2.7 -(a)Structure of a GaAs/AlGaAs laser diode, reproduced from [54]. (b) Simulated stack of the first realized structure.

  2.4.a one needs to change the interface between the active part and the side layers. Then, one can tackle the mode profile obtained in figure 2.8(b).

Figure 2 .Figure 2 .

 22 Figure 2.10 -(a) Mode confinement factor and P out /I ratio as a function of the number of quantum wells in the structure. (b) Laser frequency at 2V as a function of the number of quantum wells in the structure.

Figure 2 .Figure 2 .

 22 Figure 2.12 -(a) Modal gain at 2V of the fundamental mode present in the cavity. (b) Carrier distribution at 2V inside the structure.

Figure 2 .

 2 Figure 2.14 -Mode [0,0] distribution inside full structure (a) in the case of a full sheet epitaxy and (b) for a selectively integrated structure for a ridge width of 300 nm. Only half of the structure is shown as it is symmetric along the axis X Direction = 0.

Figure 2 .

 2 Figure 2.15 -Revised structure used for the optimization of the number of quantum wells for near infra-red emission.

Figure 2 .

 2 Figure 2.18 -Mode [0,0] distribution inside full structure (a) in the case of a full sheet epitaxy and (b) for a selectively integrated structure for a ridge width of 300 nm. Only half of the structure is shown as it is symmetric along the axis X Direction = 0.

  19, one has to measure V C D with I AB and V AD with I BC and compute R a = V C D I AB and R b = V AD I BC . Afterwards, one can get the resistivity ρ of the layer by using ρ = R SH × t with t the thickness of the doped layer and R SH the sheet resistance obtained from the following equation exp

Figure 2 . 19 -

 219 Figure 2.19 -Schematics of the Van der Pauw method for measuring the sheet resistance. Reproduced from [65].

Figure 2 . 20 -

 220 Figure 2.20 -Evolution of the electrically active doping level of a zinc doped Al 0.3 Ga 0.7 As layer at 650 °C as a function of the partial pressure of DEZ, P DE Z , inside the chamber.

Figure 2 . 21 -

 221 Figure 2.21 -Evolution of the electrically active doping level of a silicon doped Al 0.3 Ga 0.7 As layer at 650 °C depending on Si 2 H 6 partial pressure.

Figure 2 .

 2 Figure 2.23 -(a) Evolution of the Al incorporation and of the (b) growth rate as a function of P T M Al inside the chamber.

Figure 2 . 24 -

 224 Figure 2.24 -Schematic of the 300 mm holder in light grey allowing to work on 4" wafers shown in dark grey.

Figure 2 . 25 -Table 2 . 2 -

 22522 Figure 2.25 -Homogeneity of Al incorporation across the diameter of 4" wafers with 300 nm deposited layers of Al x Ga 1-x As upon GaAs with x = {0.10, 0.30, 0.45}.

Figure 2 . 26 -

 226 Figure 2.26 -Evolution of the Al incorporation for two 600 nm gradients depending on the ToF-SIMS sputtering time. The layers were deposited at 620 °C, with constant P T B As and P T MG a with P T M Al varying between 0.25 mTorr and 2.18 mTorr for the blue gradient up to 30% Al and up to 3.71 mTorr for the violet gradient reaching 45% Al. Both gradients were deposited on top of a 400 nm GaAs buffer layer grown upon a 300 mm Si(001) wafer.

Figure 2 . 27 -

 227 Figure 2.27 -Rocking curves along the GaAs (004) reflection. All the samples are made of a 600 nm GaAs buffer on Si (001). For samples "Al x Ga 1-x " 200 nm of Al x Ga 1-x is added on top of the GaAs buffer as well as a 15 nm GaAs capping layer for oxidation protection.

Figure 2 .

 2 Figure 2.28 -(a)SEM image of a full red emitting structure on top of Si(001). (b) Zoomed SEM image on the transitions in the active part region made of Al 0.30 Ga 0.70 As quantum wells between Al 0.45 Ga 0.55 As barriers.

Figure 2 .

 2 Figure 2.29 -(a) Indium atomic concentration as a function of sputtering time in the structure presented in (b) with on top the cross-section imaged via SEM and the schematic of the structure at the bottom.

Figure 2 .

 2 Figure 2.30 -5x5 µm 2 AFM image of InAs structures grown (at 520 °C, 30 s, P T M I n = 4 × 10 -3 mTorr) on top of an InP regrowth layer on InP(001) wafer.

Figure 2 . 31 -Figure 2 .

 2312 Figure 2.31 -Distribution in height (a) and in radii (b) for the sample grown (at 520 °C, 30 s, P T M I n = 4 × 10 -3 mTorr) on top of an InP regrowth layer on an InP(001) wafer.

Figure 2 .

 2 Figure 2.33 -(a) SEM cross-section, (b) zoom on the pink circled area of (a), (c) 5x5 µm 2 AFM image with an exhibited RMS roughness of 0.28 nm, (b) SEM cross-section and (d) PL spectra of InAs structures grown (at 520 °C, 30 s, P T M I n = 4 × 10 -3 mTorr) on top of an InP regrowth layer on InP(001) wafer, with an InP capping layer. The PL spectra was obtained using a 532 nm excitation laser with a power of 1.3 kW.cm -2 with a 4 s acquisition time.

Figure 2 .

 2 Figure 2.34(d) displays the height distribution of structures grown with different deposition times. If one examines first the AFM images in figure2.34 there is no obvious growth that detaches itself from the rest. This is confirmed by the histogram bar chart presented on figure 2.34(d). The height of structures are all centred around 60 -80 nm, which is closer to the defined relaxed quantum dots of the growth on the InP substrate. This phenomenon can be naturally explained by the excess indium present in the chamber during the growth. To not decrease the deposition time under 5s the temperature was then changed.

Figure 2 .Figure 2 .

 22 Figure 2.35(d) displays the height distribution of structures grown with different temperatures. If one examines first the AFM images in figure 2.35 the growths happening at 500 °C and 420 °C seem much more promising than the growth at 520 °C. Undeniably, by lowering the temperature the growth rate is also lowered allowing for a better control on the deposited thickness for the same growth time. This observation is confirmed by the histogram bar chart presented on figure 2.35(d). The height of the 500 °C and 420 °C grown sample are centred

Figure 2 .

 2 Figure 2.35 -5x5 µm 2 AFM images of InAs structures grown for 10 s with P T M I n = 4 × 10 -3 mTorr at a growth temperature of (a) 520 °C, (b) 500 °C, and (c) 420 °C, on top of an InP/GaAs template on Si(001) substrate. (d) Histogram bar chart of the height distribution of the InAs structures shown in (a), (b) and (c).

Figure 2 .Figure 2 .

 22 Figure 2.36 -(a) Histogram bar chart of the height distribution and (b) box chart of the distribution of the InAs quantum dot at different positions grown, at 520 °C for 10 s with P T M I n = 4 × 10 -3 mTorr, on top of an InP/GaAs template on Si(001) substrate. The different positions were taken from centre (1st position) to edge (4th position) of the wafer.

Figure 2 .Figure 2 . 39 -

 2239 Figure 2.38 -(a) 5x5 µm 2 AFM image and (b) zoomed 2x2 µm 2 AFM image of InAs structures grown at 520 °C, 10 s, P T M I n = 4 × 10 -3 mTorr on top of an InGaP sublayer on a GaAs(001) substrate.

Figure 2 .

 2 Figure 2.40 -(a) SEM cross-section, (b) zoom on the pink circled area of (a), (c) 5x5 µm 2 AFM image with an exhibited RMS roughness of 3.61 nm, (d) PL spectra of InAs structures grown (at 520 °C, 10 s, P T M I n = 4 × 10 -3 mTorr) on top of a InGaP sublayer capped with an 20 nm GaAs layer.The PL spectra was obtained at 300 K using a 532 nm excitation laser with a power of 0.325 kW.cm -2 with a 4 s acquisition time.

Figure 2 . 41 -

 241 Figure 2.41 -Schematic of the particle considered to solve Schroedinger's equation.

Figure 3 . 1 -

 31 Figure 3.1 -Descriptive diagram of the wanted ridge structures. Showing the contact and cladding layers as well as the active part, here displayed with a multiple quantum well (MQW) structure

Figure 3 . 2 -

 32 Figure 3.2 -(a) 52°SEM tilted top-view image and (b) cross-section of a line along the <100> direction.

Figure 3 . 3 -

 33 Figure 3.3 -SEM cross sections of SEG grown at (a) 560 °C, (b) 580 °C, (c) 600 °C, (d) 620 °C, (e) 640 °C and (f) 660 °C with P T MG a = 3.65 mTorr and P T B As = 20.1 mTorr. The GaAs deposition time between each marker is 30s. The ridge width inside the dielectric is 300 nm for all growths. (g) Crystallographic planes orientation on images (a), (b), (c), (d), (e) and (f).

Figure 3 . 4 -

 34 Figure 3.4 -(a)Growth rate on the different facets as a function of the temperature. (b) Growth rate ratios. The selective epitaxial growths presented on this graph were realized with P T MG a = 3.65 mTorr and P T B As = 20.1 mTorr. Data is extracted for a constant ridge width inside the dielectric of 300 nm.

Figure 3 . 5 -

 35 Figure 3.5 -SEM cross-sections for an identical P T MG a = 1.88 mTorr and P T B As = 10.4 mTorr at different temperatures. (a) 600 °C, (b) 620 °C, (c) 640 °C, and (d) 660 °C. The GaAs deposition time between each marker is 60s. The lamellae were all extracted from 300 nm ridge inside the dielectric. (e) Crystallographic planes orientation on images (a), (b), (c) and (d).

Figure 3 . 6 -

 36 Figure 3.6 -SEM cross-sections for an identical P T MG a = 5.32 mTorr and P T B As = 29.3 mTorr at different temperatures. (a) 600 °C, (b) 620 °C, (c) 640 °C, and (d) 660 °C. The GaAs deposition time between each marker is 45s. The lamellae were all extracted from 300 nm ridge inside the dielectric. (e) Crystallographic planes orientation on images (a), (b), (c) and (d).

Figure 3 . 7 -

 37 Figure 3.7 -SEM cross-sections for an identical P T MG a = 6.89 mTorr and P T B As = 38.0 mTorr at different temperatures. (a) 600 °C, (b) 620 °C, (c) 640 °C, and (d) 660 °C. The GaAs deposition time between each marker is 15s. The lamellae were all extracted from 300 nm ridge inside the dielectric. (e) Crystallographic planes orientation on images (a), (b), (c) and (d).

Figure 3 . 8 -

 38 Figure 3.8 -(a) Growth rate on the different facets as a function of partial pressure. (b) Growth rate ratios. The selective epitaxial growths presented on this graph were realized at at 620 °C. The ratio P T B As /P T MG a is kept constant at a value of 5.51. Data is extracted for a constant ridge width inside the dielectric of 300 nm.

Figure 3 . 10 -

 310 Figure 3.10 -Growth rate upon facets {110} as a function of temperature and partial pressure of TMGa. The ratio P T B As /P T MG a is kept constant at a value of 5.51. Data is extracted for the right facet and for a constant ridge width inside the dielectric of 300 nm.

Figure 3 . 11 -

 311 Figure 3.11 -Growth rate ratio of facet {110} on facet (001) as a function of temperature and partial pressure of TMGa. The ratio P T B As /P T MG a is kept constant at a value of 5.51. Data is extracted for the right facet and for a constant ridge width inside the dielectric of 300 nm.

Figure 3 . 12 -

 312 Figure 3.12 -Growth rate upon facets {111} A as a function of temperature and partial pressure of TMGa. The ratio P T B As /P T MG a is kept constant at a value of 5.51. Data is extracted for the right facet and for a constant ridge width inside the dielectric of 300 nm.

Figure 3 .

 3 Figure3.12 presents the evolution of the growth rate upon {111} A , the colours used are the same as previously used for the other planes: the dark blue squares present the data for samples grown with P T MG a = 1.88 mTorr, in light blue the samples grown with P T MG a = 3.65 mTorr, in pink the samples grown with P T MG a = 5.32 mTorr and in green the samples grown with P T MG a = 6.89 mTorr. Similarly to the (001) plane, for each temperature when increasing

Figure 3 . 13 -

 313 Figure 3.13 -Growth rate ratios of (a) facet {111} on facet (001) and of (b) facet {111} on facet {110} as a function of temperature and partial pressure of TMGa. The ratio P T B As /P T MG a is kept constant at a value of 5.51. Data is extracted for the right facet and for a constant ridge width inside the dielectric of 300 nm.

Figure 3 . 14 -

 314 Figure 3.14 -Possible attainable morphologies in the range 600 °C < T < 660 °C and 1.88 mTorr < P T MG a < 6.89 mTorr. The morphologies are presented in evolution order. (a) Horizontal rectangular morphology. (b) Vertical rectangular morphology. (c) Cropped octahedron crosssection morphology. (d) Octahedron cross-section morphology. From (a) to (d) one has to increase the temperature at a given partial pressure or, one one has to decrease the partial pressure at a given temperature. (e) Growth rate directions for the different planes considered in images (a), (b), (c) and (d).

Figure 3 .

 3 Figure 3.15 -(a) Growth rate as a function of the cumulated deposition time once outside the dielectric. (b) Growth rate ratios. The epitaxy was realized at 620 °C with P T MG a = 3.65 mTorr and P T B As = 20.1 mTorr. Data is extracted from a single wafer.

Figure 3 .

 3 Figure 3.16 -(a) Growth rate as a function of the stripe width inside the dielectric. (b) Growth rate ratios. The SEGs presented here were deposited at the same time on a single wafer. The local opening rate is identical for all the lines. The epitaxy was realized at 600 °C with P T MG a = 3.65 mTorr and P T B As = 20.1 mTorr.

Figure 3 . 17 -

 317 Figure 3.17 -SEM cross-section for a GaAs epitaxy done on a (a) flat and on a (b) V-groove structured silicon. The epitaxies were realized at 600 °C with P T MG a = 3.65 mTorr and P T B As = 20.1 mTorr. Data is extracted for a constant ridge width inside the dielectric of 300 nm.

Figure 3 .

 3 Figure 3.18 -(a)SEM top-view and (b) ECCI images of the same zone on a 400 nm GaAs layer grown on Si(001) with quantum dots grown on top. In green are circled defects that can be easily observed with both techniques. The defects circled in blue, respectively orange, are easily observed in ECCI, respectively SEM, and not by SEM, respectively ECCI. The circles display the dislocations and the rectangles display the stacking faults. Images courtesy of Sylvain David.

Figure 3 . 19 -

 319 Figure 3.19 -Schematic cross-sections of the different important parameters in the case of selective epitaxial growth for a (a) flat structuration and a (b) V-groove structuration.

Figure 3 .

 3 Figure 3.20 -ECCI top view of two selective epitaxial growths with an AR = 0.9 and W r i d g e = 200 nm done on a bottom (a) flat ridge (b) V-grooved ridge. The growth done on both samples was identical.

Figure 3 . 21 -

 321 Figure3.21 -Comparison of the dislocation obtained for blanket grown layers and using SEG growth. The blanket grown layers are made of GaAs either directly grown onto of silicon or using a Ge buffer. The selective epitaxial growth shown here exhibit different aspect ratios indicated beneath the points. The dotted lines are here as a guideline to the eyes and do not represent any regression. The data comes from the following sources: A[START_REF] Alcotte | Epitaxial growth of antiphase boundary free GaAs layer on 300 mm Si(001) substrate by metalorganic chemical vapour deposition with high mobility[END_REF], B[START_REF] Widiez | 300 mm InGaAs-on-insulator substrates fabricated using direct wafer bonding and the smart cut™ technology[END_REF], C[START_REF] Orzali | GaAs on si epitaxy by aspect ratio trapping: Analysis and reduction of defects propagating along the trench direction[END_REF], D[START_REF] Wan | InAs/GaAs quantum dots on gaas-on-V-grooved-Si substrate with high optical quality in the 1.3 µm band[END_REF], E[START_REF] Richter | GaAs on 200 mm Si wafers via thin temperature graded Ge buffers by molecular beam epitaxy[END_REF], F[START_REF] Bogumilowicz | Anti-phase boundaries-free GaAs epilayers on "quasi-nominal" Ge-buffered silicon substrates[END_REF], G[START_REF] Daix | Towards large size substrates for III-V co-integration made by direct wafer bonding on Si[END_REF] and I[START_REF] Kunert | How to control defect formation in monolithic III/v hetero-epitaxy on (100) Si? a critical review on current approaches[END_REF]. Adapted from[START_REF] Gong | Targeting mm-wave communications with waferlevel integration of InGaAs HEMTs and silicon CMOS[END_REF].

Figure 3 . 23 -

 323 Figure 3.23 -Cross-sectional Brigth-Field (BF) STEM images of (a) sample A1, the GaAs/AlGaAs ridge perpendicular to the ridge's direction showing three AlGaAs QWs embedded inside an AlGaAs matrix with GaAs grown at 600 °C and (b) sample B1, the 650 °C GaAs/AlGaAs ridge perpendicular to the ridge's direction showing three AlGaAs QWs embedded inside an AlGaAs matrix, with GaAs grown at 650 °C. The different zones of Al incorporation are indicated with numbers ranging from 1 to 4b. The three colour lines show where the EDX profiles where realized.

Figure 3 . 25 -

 325 Figure 3.25 -Schematic illustration in three growth steps (GS) of the combined growth on the various facets leading to the final compositional structure. The left hand-sight represents samples from series A the right hand-sight samples from series B and C. The growth upon facets (001), {110} and {111} are shown in orange, blue and green.

Figure 3 .

 3 Figure 3.26 -(a) TEM microscopy of the interface zone on sample A2. (b) TEM microscopy of the interface zone on sample A2 zoomed on the QW zone. (c) Concave faceting of GaAs stud.

Figure 3 .

 3 Figure 3.26(a) presents the QWs and cladding regions where a clear and abrupt separation

Figure 3 .

 3 Figure 3.27(a), (b) and (c) show a 10 K panchromatic CL mapping of B1 sample taken in cross-section. The quantum wells emission shown in figure 3.27(c) is centred around 690 nm +/-5 nm as displayed in green. In contrast the barriers emit around 664 nm +/-10 nm as shown in blue in figure 3.27(b), and the AlGaAs cladding layer emitting between 800 nm and 850 nm as shown in red in figure 3.27(a). The barriers and cladding layers have a five to six times lower intensity as compared to the quantum wells. The same type of measurements has been done on the other samples and they exhibit the same characteristics.

Figure 3 .

 3 Figure 3.27 -10 K panchromatic CL mapping superposed to the FIB-SEM cross-section to visualize the different contributions. (a) GaAs and low containing Al in the AlGaAs layers between 800 and 850 nm for sample B1. (b) Barriers contribution at 664 nm for sample B1. (c) QWs contribution at 690 nm for sample B1. (d) QWs contribution at 700 nm for sample A1.

Figure 3 .

 3 Figure 3.28 -(a) Top-view SEM image of the mapped ridge. (b) 10 K panchromatic CL mapping of quantum wells, at 700 nm, contribution in sample A1.

Figure 3 .

 3 Figure 3.29 -(a) Cross-sectional SEM image of the A1 GaAs/AlGaAs ridge perpendicular to the ridge's direction. The limit between the dielectric and the silicon is shown by a grey line. (b) Cross-sectional STEM image of the A1 GaAs/AlGaAs ridge along the <110> direction. (c) ECC top View of a section of A2 ridge.

Figure 3 .

 3 Figure 3.30 -SEM cross-section (a) perpendicularly to the ridge section and (b) along the direction of the ridge. The blue dotted rectangle in (a) indicates the position of the observed section in (b). Zoomed SEM cross-sections of (c) the MQW, (d) superposition of III-V material with a dislocation and SiO 2 and (e) the Moiré pattern due to the superposition of the Silicon and III-V material.

Figure 3 .

 3 Figure 3.31 -PL spectra of the structure presented in figure3.30. The PL spectra was obtained at 300 K by a CCD detector using a 532 nm excitation laser with a power of 5.14 kW.cm -2 with a 0.1 s acquisition time.

Figure 3 . 32 -

 332 Figure 3.32 -SEM cross-section (a) perpendicularly to the ridge section and (b) along the direction of the ridge. The blue dotted rectangle in (a) indicates the position of the observed section in (b). (c) Zoomed SEM cross-section of the MQW showing the GaAs-InP transition.

Figure 3 .

 3 Figure 3.34 -(a) 3D rendering of the AFM scan presented in (c). (b) SEM image of quantum dots grown on top of a InGaP/GaAs selective epitaxial grown template on top of Si (001). (c) Top-view AFM scan of a 4 µm long section of the ridge. All the images were made on the same ridge with an InAs deposition time of 9s.

Figure 3 .

 3 Figure 3.35 -(a) SEM image of quantum dots grown on top of a InGaP/GaAs selective epitaxial grown template on top of Si (001. (b) SEM zoom on the stacked quantum dots on the side of the ridge.(c) Photoluminescence at room temperature of the shown structure in (a). The InAs deposition time was 11 s.)

Figure 3 .

 3 Figure 3.36 -PL spectra at room temperature of a three-layered InAs quantum dot optimized growth. The indexed peaks were used for simulations purposes. The mean height of the quantum dots on the three layers was around 10 nm.

Figure 3 . 37 -

 337 Figure 3.37 -Form of the simulated quantum dot

4

  Devices: design and processing of LEDs with 2D grown structuresThis fourth and last chapter is dedicated to the realization of light emitting structures. From the previously developed stacks, emphasis is given on the most mature stack emitting in the red region of the spectrum. Those structures are realized from full-sheet growths on silicon and GaAs wafers.

Figure 4 . 1 -

 41 Figure 4.1 -Best simulated structure for red emission.

4. 1 . 1 Figure 4 . 2 -

 1142 Figure 4.2 -SEM cross-sections of the deposited stacks on (a) GaAs and (b) Si substrates for the device realization. Zoomed cross-sections on the active part for the depositions on (c) GaAs and (d) Si wafers. The dotted lines in (c) and (d) indicate the transition between the doped cladding layers and the SCH.

4. 1 .

 1 Depositions for red emission between the deposition on GaAs and silicon wafers is the defects presence in the silicon case. Still, the active parts presented in figure 4.2(c) and figure 4.2(d) are very similar both on GaAs and silicon. Moreover, in figure 4.2(c) and figure 4.2(d) the 6QWs are well defined.

Figure 4 . 3 -

 43 Figure 4.3 -SEM cross-sections of a SEG structure with 6QW, the upper cladding and contact layers were not deposited on this structure.

Figure 4 . 5 -Figure 4 . 6 -

 4546 Figure 4.5 -Photographs of one of the 4 inch wafers used for device realization. (a) Wafer after epitaxy and (b) wafer after all the technological steps are made.

Figure 4 .

 4 Figure 4.6(a) presents the obtained stack after material deposition. Afterwards, three steps are necessary to obtain the ribbon structuration inside the III-V material.Figure4.6(b) presents the deposition of an SiN dielectric film which is patterned after submitting it to a lithography step and a dry-etch standard process using chlorinated gases. This allows to define lines between 500 µm and 800 µm long and 3 µm width in the SiN as shown in figure4.6(c). Then, a dry etch of the III-V material uncovered by the SiN is realized using a chlorinated fluorinated gas plasma to define the ribbon. This etch process is monitored in order to stop on the n-GaAs contact layer. It should be noted, that the etching of the ribbon induces the formation of facets at each end of the structure as shown in figure 4.7.

Figure 4 .

 4 Figure 4.6(a) presents the obtained stack after material deposition. Afterwards, three steps are necessary to obtain the ribbon structuration inside the III-V material.Figure4.6(b) presents the deposition of an SiN dielectric film which is patterned after submitting it to a lithography step and a dry-etch standard process using chlorinated gases. This allows to define lines between 500 µm and 800 µm long and 3 µm width in the SiN as shown in figure4.6(c). Then, a dry etch of the III-V material uncovered by the SiN is realized using a chlorinated fluorinated gas plasma to define the ribbon. This etch process is monitored in order to stop on the n-GaAs contact layer. It should be noted, that the etching of the ribbon induces the formation of facets at each end of the structure as shown in figure 4.7.

Figure 4 . 7 -

 47 Figure 4.7 -SEM image of one of the etched facets at one end of a ridge.

Figure 4 .

 4 Figure 4.7 displays the etched facet at one end of the ridge. The image is taken after the definition of the ribbon by dry-etch shown in figure 4.6(d).

Figure 4 . 8 -

 48 Figure 4.8 -(a) SEM image of one end of the ridge with the deposited bottom contact. (b) Zoomed SEM image of the blue highlighted area shown in (a).

Figure 4 .

 4 Figure 4.8 shows how the bottom Ni/Ge/Au contact is deposited. It is an illustration of the schematic presented in figure 4.6(f). From figure 4.7(a), one can see that the contact is deposited on both sides of the previously defined III-V ridge. A zoomed image is provided in figure 4.8(b), it displays one end of the ridge with the etched facet and the metal on both sides of the ridge.

Figure 4 . 9 -

 49 Figure 4.9 -Cross-section schematics of the last steps necessary for the deposition of the top contact as well as the electrodes. (a) BCB encapsulation,(b) Positive photoresist deposition and development, (c) opening of the bottom contact, (d) positive photoresist deposition and development, (e) top contact opening and stripping, (f) deposition of the top contact and of the electrodes.

Figure 4 .

 4 Figure 4.10 displays optical microscopy top-views after the definition of the vias that are schematised in figure4.9(e). In figure4.10(a), one can see that the n-via, in yellow, is opened fully on one of the sides of the ridge and just at the end of the n-metallization. The zoom in figure4.10(b) allows to spot the p-via superposed to the ridge. Moreover, it can be seen that the end of the ridge with the etched facet is not "opened", therefore the electrode will be farther away from the extracted light not to impact it.

Figure 4 .Figure 4 . 10 -

 4410 Figure 4.11 presents an optical microscopy top-view of several finished devices. Due to the

Figure 4 . 11 -

 411 Figure 4.11 -Optical microscopy top-view of several finished devices.

4. 3 . 4 . 3 . 1 Figure 4 .

 34314 Figure 4.14 -I-V characteristics shown in semilog scale as well as linear scale in the insets. Comparison of short (480x3 µm 2 ) ribbon diodes and long (980x3 µm 2 ) ribbon diodes grown on (a) GaAs substrate and (b) Si substrate.

Figure 4 .

 4 Figure 4.15 -I-V characteristics shown in semilog scale as well as linear scale in the inset. Comparison of long (980x3 µm 2 ) ribbon diodes grown on GaAs substrate and Si substrate.

  figure 4.15(a) and figure 4.15(b), showing the data plotted on a linear current scale. From those two graphs, one can see that at 3V, I is equal to 200 A.cm -2 for the ribbon grown on silicon whereas, I equals 600 A.cm -2 for the same

Figure 4 . 16 -Figure 4 . 17 -

 416417 Figure 4.16 -Top view through a camera of a ridge with current flowing through it and emitting red light.

Figure 5 . 1 -

 51 Figure 5.1 -(a) SEM top view of the disposition of the contact areas for the bottom contact. (b) Schematic of the disposition of the contact metallization

Figure 5 . 2 -

 52 Figure 5.2 -(a) Cross-section perpendicularly to the ridge direction, (b) cross section in the middle of the oxide slit along the ridge direction, (c) zoomed cross section on the MQW part along the ridge direction and (d) top-view of the III-V ridge and contact areas, the pink lines indicate the zones were the cross-sections were made. All the images are taken from a single wafer. The deposition of the complete SEG structure was made using a temperature of 620 °C and P T MG a = 3.65 mTorr.

Figure C. 2 -

 2 Figure C.2 -Trafic global dans les centres de données par destination en 2021. Reproduit de [2].

Figure C. 3 -

 3 Figure C.3 -Principales plates-formes photoniques et leurs fonctionnalités optiques correspondantes. Reproduit de [3].

Figure C. 4 -

 4 Figure C.4 -Matériaux utilisés en optique intégrée et leur gamme de transparence. Reproduit de [4].

  des circuits devient un processus industriel standard. Un exemple de circuit photonique est présenté dans la figure C.5. Un circuit photonique contient, des lasers générant de la lumière guidée par des guides d'ondes, la lumière générée va être encodée par l'intermédiaire d'un modulateur. Les guides d'ondes fusionnent ensuite dans un multiplexeur, La lumière est ensuite transmise par une fibre ou un autre guide d'ondes. Le signal est reçu par un démultiplexeur qui sépare les différentes longueurs d'onde mélangées. Finalement, la lumière est envoyée à des photodétecteurs qui la convertissent en un signal électrique envoyé à la partie électronique de la puce par des fils de cuivre. La majorité des dispositifs composant un circuit photonique ont été démontrés et leur industrialisation devient une pratique courante. La plupart des composants passifs tels que les coupleurs, les multiplexeurs et les démultiplexeurs pour les fonctions de multiplexage par répartition en longueur d'onde ou les composants actifs comme les modulateurs et les photodétecteurs sont arrivés à maturité[START_REF] Roelkens | III-V-on-silicon photonic devices for optical communication and sensing[END_REF][START_REF] Kish | System-on-chip photonic integrated circuits[END_REF]. Il n'en reste pas moins que l'intégration d'une source de lumière efficace directement sur un circuit existant reste un problème complexe.

Figure C. 5 -

 5 Figure C.5 -Schéma d'un circuit intégré photonique.

Figure C. 6 -

 6 Figure C.6 -Photographie du cluster tool utilisé dans cette étude.

Figure C. 8 -

 8 Figure C.8 -Epaisseur des empilements lasers sans considérer la couche tampon et les filtres à dislocations lorsque la croissance à lieu sur silicium en fonction de la longueur d'onde d'émission de la structure considérée. Les références sont les suivantes: A [51], B [52], C [53],D[START_REF] Nemoto | Monolithic-integrated two-wavelength laser diodes for digital-versatile-disk/compact-disk playback[END_REF], E[START_REF] Herrmann | Reduction of mirror temperature in GaAs/AlGaAs quantum well laser diodes with segmented contacts[END_REF], F[START_REF] Groenert | Monolithic integration of room-temperature cw GaAs/AlGaAs lasers on Si substrates via relaxed graded GeSi buffer layers[END_REF], G[START_REF] Iwamura | Dynamic behaviour of a GaAs-AlGaAs MQW laser diode[END_REF], H[START_REF] Choi | InGaAs/AlGaAs strained single quantum well diode lasers with extremely low threshold current density and high efficiency[END_REF], I[START_REF] Hu | Lateral carrier diffusion and surface recombination in InGaAs/AlGaAs quantum-well ridge-waveguide lasers[END_REF], J[START_REF] Liu | Electrically pumped continuous-wave 1.3 µm quantum-dot lasers epitaxially grown on on-axis (001)GaP/Si[END_REF], K[START_REF] Chen | Electrically pumped continuous-wave 1.3 µm InAs/GaAs quantum dot lasers monolithically grown on on-axis Si (001) substrates[END_REF], L[START_REF] Wang | Emerging technologies in si active photonics[END_REF],M[START_REF] Zhu | Room-temperature electrically-pumped 1.5 µm InGaAs/InAlGaAs laser monolithically grown on on-axis (001) Si[END_REF], N[START_REF] Kawamura | InGaAs/InGaAlAs/InAlAs/InP SCH-MQW laser diodes grown by molecular-beam epitaxy[END_REF] and O[START_REF] Temkin | InGaAs/InP quantum well lasers with sub-mA threshold current[END_REF].

Figure C. 9 -

 9 Figure C.9 -Structures définies par simulation pour obtenir les meilleures caractéristiques possibles avec les limites fixées dans cette étude pour une émission (a) partie rouge du sceptre VIS, (b) NIR et (c) L-band.

  Figure C.10 -Schéma représentatif de la structure souhaitée.Les couches contact, de confinement ainsi que la partie active composée de puits quantiques sont indiquées.

Figure C. 11 -

 11 Figure C.11 -Morphologies atteignables dans la gamme 600 °C < T < 660 °C et 1,88 mTorr < P T MG a < 6,89 mTorr. Les morphologies sont présentées dans l'ordre de l'évolution. (a) Morphologie rectangulaire horizontale. (b) Morphologie rectangulaire verticale. (c) Morphologie d'une section d'octaèdre tronquée. (d) Morphologie d'une section d'octaèdre. Pour évoluer de (a) à (d), il faut augmenter la température à une pression partielle donnée ou, diminuer la pression partielle à une température donnée. (e) Directions de croissance pour les différents plans considérés dans les images (a), (b), (c) et (d).

Figure C. 12 -

 12 Figure C.12 -Section transverse au MEB (a) perpendiculairement à la section du ruban et (b) le long de la direction du ruban. Le rectangle en pointillés bleus en (a) indique la zone de la réalisation de la coupe transverse en (b). Zoom sur (c) les puits quantiques, (d) la superposition du matériau III-V avec une dislocation et du SiO 2 et (e) du motif de Moiré du à la superposition du III-V et du Si.

Figure C. 13 -

 13 Figure C.13 -Spectres de photoluminescence de la structure présentée dans la figure C.12. Les spectres ont été obtenus à 300 K par un détecteur CCD utilisant un laser à excitation de 532 nm d'une puissance de 5.14 kW.cm -2 avec un temps d'acquisition de 0,1 s.

Figure C. 14 -

 14 Figure C.14 -(a) Rendu 3D du scan AFM présenté en (c). (b) Image MEB du des boites quantiques sur un buffer InGaP/GaAs réalisé en épitaxie sélective sur du Si (001). (c) Vue de dessus d'une section de la crête de 4 µm de long. Toutes les images ont été réalisées sur le même ruban avec un temps de dépôt de l'InAs de 9s.

Figure C. 15 -

 15 Figure C.15 -Spectres de photoluminescence à température ambiante de trois couches de boites quantique InAs avec croissance optimisée. Les pics indexés ont été utilisés à des fins de simulation. La hauteur moyenne des boites quantiques sur les trois couches était d'environ 10 nm.

. 4 . 1

 41 Comparaison des diodes ruban sur substrats de GaAs et SiPour comparer l'impact du substrat, les caractéristiques I-V des rubans les plus longs (980x3 µm 2 ) sont comparées dans cette section.

Figure C. 16 -

 16 Figure C.16 -Caractéristiques I-V en échelle semi-logarithmique ainsi que linéaire dans l'encart. Comparaison de longues diodes ruban (980x3 µm 2 ) réalisées sur substrats de GaAs et Si.

  , le ruban alimenté par une tension émet une lumière rouge sans savoir à quelle longueur d'onde exactement l'émission à lieu. Afin de d'observer quelle partie du ruban émet des photos plus proches ont été prises. Le ruban est alimenté par deux pointes, que l'on peut voir en noir sur la figure C.18(a), elles sont en contact avec les électrodes en ITO qui sont la partie la plus verte de la figure C.18(a).Lorsque le courant est appliqué on peut constater que tout le ruban s'illumine comme le montre le contraste blanc sur la photo en imagerie infrarouge de la figure C.17.

Figure C. 17 -

 17 Figure C.17 -Vue de dessus au travers d'une caméra d'un ruban contacté et éméttant de la lumière rouge.

Figure C. 18 -

 18 Figure C.18 -Vues de dessus en microscopie optique à travers une caméra d'un long (980x3 µm 2 ) ruban sur silicium dans (a) une pièce éclairée sans courant appliqué à la structure et dans (b) une chambre noire où un courant est appliqué à la structure.

  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.19 GaAs relaxed layer on silicon. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.20 Results on Threading Dislocation Density (TDD) in strain-relaxed Ge and GaAs epitaxial films on Si( 100 ) by Wang et al.. The references presented here come from the following papers: [13, 14, 15, 16, 17]. Reproduced from [18]. . . . . . . 1.21 (a) 5x5 µm 2 AFM image of a 400 nm thick GaAs growth on un-optimized Si(001): High density of randomly oriented APBs. Root mean square (RMS) roughness=1.6 nm. (b) 2x2 µm 2 AFM image of 0.15 °Si(001) after optimized preparation (800 °C-950 °Cannealing under H 2 ). The surface is therefore mainly double-stepped. (c) 5x5 µm 2 AFM image of an APBs-free 150 nm thick GaAs growth on optimized 0.15 °Si(001). RMS roughness is 0.8 nm. Reproduced from [12]. . . . . . . . . . .

1.22 (a) Cross-sectional SEM image and (b) AFM image of approximately 300 nm coalesced GaAs thin film grown on a nanowire array. Reproduced from

[START_REF] Li | Growing antiphase-domain-free GaAs thin films out of highly ordered planar nanowire arrays on exact (001) silicon[END_REF]

. . .

  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.20 Evolution of the electrically active doping level of a zinc doped Al 0.3 Ga 0.7 As layer at 650 °C as a function of the partial pressure of DEZ, P DE Z , inside the chamber. 2.21 Evolution of the electrically active doping level of a silicon doped Al 0.3 Ga 0.7 As layer at 650 °C depending on Si 2 H 6 partial pressure. . . . . . . . . . . . . . . . . 2.22 Schematic of the Transfer Length method for measuring the resistivity between two contacts. In grey is the underlying contact layer and the metal is shown in blue. Reproduced from [66]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.23 (a) Evolution of the Al incorporation and of the (b) growth rate as a function of P T M Al inside the chamber. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.24 Schematic of the 300 mm holder in light grey allowing to work on 4" wafers shown in dark grey. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

  ). Zoom sur (c) les puits quantiques, (d) la superposition du matériau III-V avec une dislocation et du SiO Usual Telecom bands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Weight comparison for semi insulating GaAs and InP standard wafers. Standard specifications of AXT wafers were used for the calculations. . . . . . . . . . . . .

2 et (e) du motif de Moiré du à la superposition du III-V et du Si. . . . . . . . 166 C.13 Spectres de photoluminescence de la structure présentée dans la figure C.12. Les spectres ont été obtenus à 300 K par un détecteur CCD utilisant un laser à excitation de 532 nm d'une puissance de 5.14 kW.cm -2 avec un temps d'acquisition de 0,1 s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167 C.14 (a) Rendu 3D du scan AFM présenté en (c). (b) Image MEB du des boites quantiques sur un buffer InGaP/GaAs réalisé en épitaxie sélective sur du Si (001). (c) Vue de dessus d'une section de la crête de 4 µm de long. Toutes les images ont été réalisées sur le même ruban avec un temps de dépôt de l'InAs de 9s. . . . . 168 C.15 Spectres de photoluminescence à température ambiante de trois couches de boites quantique InAs avec croissance optimisée. Les pics indexés ont été utilisés à des fins de simulation. La hauteur moyenne des boites quantiques sur les trois couches était d'environ 10 nm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168 C.16 Caractéristiques I-V en échelle semi-logarithmique ainsi que linéaire dans l'encart. Comparaison de longues diodes ruban (980x3 µm 2 ) réalisées sur substrats de GaAs et Si. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 C.17 Vue de dessus au travers d'une caméra d'un ruban contacté et éméttant de la lumière rouge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 C.18 Vues de dessus en microscopie optique à travers une caméra d'un long (980x3 µm 2 ) ruban sur silicium dans (a) une pièce éclairée sans courant appliqué à la structure et dans (b) une chambre noire où un courant est appliqué à la structure.172 xxiv List of Tables 1.1 2.1 Contact resistivity for the contacts which will be used on the devices presented in chapter 4. First, the Ni/Ge/Au with thicknesses of 10/10/20 nm, the Ti/Pt/Au with thicknesses of 50/75/250 nm and the ITO with a thickness of 350 nm are presented. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Mean values obtained from the measurements shown in figure 2.25. . . . . . . 2.3 RMS roughness comparison depending on the growth parameters for given layers of a constant thickness of 100 nm deposited on top of a 400 nm GaAs buffer layer grown upon a 300 mm Si (001) wafer. . . . . . . . . . . . . . . . . . . 2.4 Some parameters of InAs quantum dots grown on an InP sublayer found in literature. ML stands for monolayer, NS stands for not specified, ALMBE for atomic layer MBE and CBE for chemical beam epitaxy. . . . . . . . . . . . . . . .

2.5 Some parameters of InAs quantum dots grown on an In 0.5 Ga 0.5 P sublayer found in literature. here all the references use In 0.5 Ga 0.5 P as a capping layer for PL measurements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Geometrical conditions for the appearance and disappearance of planes for GaAs ridges grown on top of Si (001) along the <110> direction. . . . . . . . . . . 3.2 Growth rates for the flat and v-groove structuration. The epitaxies were realized at 600 °C with P T MG a = 14.6 mTorr and P T B As = 80.5 mTorr. Data is extracted for a constant ridge width inside the dielectric of 300 nm. . . . . . . . . . . . . . . . 3.3 Summary of the various samples and their associated dislocation densities presented in this section. The analysed length of ridge was always around 10 µm. . 101 3.4 Summary of the different grown samples. P T B As /P T MG a remained constant at a value of 5.51. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 3.5 Summary of Al incorporation inside the different zones. NB. stands for number. 107 3.6 Summary of the AlGaAs layers growth rate upon the various facets. . . . . . . . 107 3.7 Summary of the fitted peaks and shouldering of the PL spectra. . . . . . . . . . . 119 4.1 Summary of the extracted peak parameters for the different types of epitaxy. . . 127 xxv

[g /cm 3 ] Wafer weight for a 2", 350 µm thick wafer [g ] Wafer weight for a 4", 625 µm thick wafer [g ] Wafer weight for a 6", 675 µm thick wafer [g ] SI-GaAs 5.318 3.655 26.10 63.43 SI-InP 4.81 3.306 23.61

	Table 1.2 -Weight comparison for semi insulating GaAs and InP standard wafers. Standard
	specifications of AXT wafers were used for the calculations.

Table 2 .

 2

1 -Contact resistivity for the contacts which will be used on the devices presented in chapter 4. First, the Ni/Ge/Au with thicknesses of 10/10/20 nm, the Ti/Pt/Au with thicknesses of 50/75/250 nm and the ITO with a thickness of 350 nm are presented.

Table 2 .

 2 3 -RMS roughness comparison depending on the growth parameters for given layers of a constant thickness of 100 nm deposited on top of a 400 nm GaAs buffer layer grown upon a 300 mm Si (001) wafer.Yet, it can be noticed that by growing 100 nm Al 0.30 Ga 0.70 As layers that the RMS roughness was actually way above 1 nm and almost twice at 1.96 nm as presented on table 2.3. With a RMS roughness at almost 2 nm it is not possible to envision 5 nm quantum wells integration.

	30	0.50	620	1.96
	30	0.25	620	1.49
	30	0.25	635	0.97
	30	0.25	650	0.74
	0 to 30	0.06 to 0.50	620	6.2
	0 to 30	0.03 to 0.25	650	0.74
	0 to 45	0.06 to 0.82	620	5.2
	0 to 45	0.03 to 0.42	650	0.78

1-x As [%] P T M Al [mTorr] Growth temperature [°C] RMS [nm]

Table 2 .

 2 4 -Some parameters of InAs quantum dots grown on an InP sublayer found in literature. ML stands for monolayer, NS stands for not specified, ALMBE for atomic layer MBE and CBE for chemical beam epitaxy.

	Growth	e I n As	QD	Radius	Height	PL emission [nm]	Reference
	Method	[ML]	density	[nm]	[nm]
			[dots/cm 2 ]
	ALMBE	2.5	2×10 10	35	1.6 → 6.8 NS	Gonzalez
							et	al.
							[177]
	CBE	2.5	1×10 10	30 → 40	NS.	1590 at 4.2K	Poole et
							al. [176]
	MOCVD	2.4 → 2.8 3.5×10 10	30-35	NS	1570	Marchand
							et	al.
							[175]
	MOCVD	1 → 1.3	4.5×10 10	49	5	NS	Yoon et
							al. [178]
	MOCVD	NS	8.6×10 9	NS	10	1431 → 1460	Barik et
							al. [173]

Table 3 . 2

 32

	Structuration GR (001) [nm/s] GR {110} [nm/s] GR (001) /GR {110}
	Flat	3.0	1.1	2.8
	V-groove	2.2	0.69	3.2

-Growth rates for the flat and v-groove structuration. The epitaxies were realized at 600 °C with P T MG a = 14.6 mTorr and P T B As = 80.5 mTorr. Data is extracted for a constant ridge width inside the dielectric of 300 nm.

Table 3 .

 3 3 -Summary of the various samples and their associated dislocation densities presented in this section. The analysed length of ridge was always around 10 µm.

	Type	AR	W r i d g e [nm]	h out [nm]	Analysed surface [cm -2 ]	TDD [cm -2 ]	TDD [µm -1 ]
	Flat	0.9 200	230	2.4 ×10 -8	9.5 ×10 8	2.8
	V-groove 0.9 200	210	1.6 ×10 -8	4.7 ×10 8	0.8
	V-groove 0.35 310	626	1.8 ×10 -8	2.8 ×10 8	1.6
	V-groove 0.44 270	172	4.0 ×10 -8	1.21 ×10 8 0.78
	V-groove 0.6 150	166	2.0 ×10 -8	2.38 ×10 8 0.47
	V-groove 0.9 200	630	7.3 ×10 -7	4.8 ×10 7	0.58

Table 3 .

 3 4 -Summary of the different grown samples. P T B As /P T MG a remained constant at a value of 5.51.

		Sample	Obtained		GaAs,	P T M Al for barri-	P T M Al	for
		number	facets	on	T g r ow t h	ers and cladding	QWs [mTorr]
			GaAs ridge		[°C]	[mTorr]
	A	1 2	(001) & {110}	600	0.12 0.25	0.08 0.16
	B	1 2	{110} & {111}	650	0.12 0.25	0.08 0.16
	C	2	(001) & {110}		0.25	0.16
			& {111}

Table 3 .

 3 5 -Summary of Al incorporation inside the different zones. NB. stands for number.

	The intermediate region

Table 3 .

 3 6 -Summary of the AlGaAs layers growth rate upon the various facets.

Table 3 .

 3 7 -Summary of the fitted peaks and shouldering of the PL spectra.

	spectra [nm] 1305 1216 1158 1117 1097 1069
	Calculation [nm] 1312 1217 1146 1115 1096 1056

Table 4 .

 4 2 -Summary of the extracted parameters depending on the substrate for long ribbons (980x3 µm 2 ). input voltage of 3V for ribbon grown on GaAs, which is three times as much. The extracted parameters are given in table 4.2.

	4.4. Optical emission

1 Le nouveau paradigme des circuits photoniques intégrés

  De nos jours, quasiment tous les objets que nous utilisons au quotidien sont des objets connectés qui requièrent à un certain stade de leur utilisation un échange de données. Du fait de la croissance exponentielle du nombre d'objets connectés les échanges de données sont aussi en croissance exponentielle. Cela nécessite donc des vitesses de transfert plus élevées et donc l'apparition de nouvelles technologies pour y répondre. C'est pourquoi il devient nécessaire d'échanger le transfert de données électriques par un transfert optique, notamment au niveau des centres de données. En effet, la majeure partie des requêtes internet circulent par eux. Les centres de données vont donc porter la généralisation des circuits photoniques intégrés. De nombreuses autres applications vont pouvoir bénéficier de cette technologie. On peut citer les applications biomédicales et d'assistance à la conduite.La lumière est déjà utilisée dans le monde entier pour transporter des données sur plusieurs milliers de kilomètres. En effet, les fibres optiques après avoir été utilisées pour du transport intercontinental arrivent dorénavant jusqu'à dans nos maisons. Dorénavant avec l'augmentation du nombre de données échangées l'utilisation du transport optique est extrêmement important dans les centres de données comme cela peut être vu dans la figure C.2.

	.1.

  La photonique sur silicium est la plate-forme technologique dans laquelle les circuit photonique sont fabriqués à l'aide de la technologie des processus disponibles dans une salle blanche CMOS standard. Ainsi, à partir des processus que les fabs CMOS possèdent il est possible d'intégrer toute une série d'autres matériaux sur la plate-forme. En conséquence, cela rend la plateforme adaptable aux différentes longueurs d'onde d'intérêt, de 400 nm jusqu'à des longueurs d'ondes plus lointaines. Par exemple, en intégrant du nitrure de silicium sur une plate-forme photonique en silicium, on peut avoir accès aux applications visibles[START_REF] Romero-García | Silicon nitride CMOS-compatible platform for integrated photonics applications at visible wavelengths[END_REF][START_REF] Porcel | INVITED] silicon nitride photonic integration for visible light applications[END_REF][START_REF] Wilmart | A versatile silicon-silicon nitride photonics platform for enhanced functionalities and applications[END_REF].

3 qu'elle permet de répondre à toutes les applications présentées, allant des applications médicales aux télécoms voire capteurs de gaz. Par conséquent, les longueurs d'onde atteignables s'étendent de 400 nm à 1550 nm. Pourtant, la gamme de transparence du silicium ne commence qu'à 1.1 µm. Ce qui, en effet, est le plus adapté pour le transport optique des données, aux longueurs d'onde de 1.3 µm et 1.55 µm.

Développement des briques technologiques: de l'empilement aux matériaux

  Tout d'abord définir les empilements à réaliser par simulation. Etudier l'épitaxie sélective des matériaux nécessaires à leurs réalisation ainsi que les densités de défauts obtenues pour valider l'approche choisie dans cette thèse. Enfin, réaliser des dispositifs références sur des épitaxies pleines plaques afin de qualifier les empilements.Afin, de mettre au point les matériaux nécessaires à la réalisation des structures en épitaxie sélective, il s'agit d'abord de connaître les spécifités du réacteur MOCVD utilisé pour en définir les exigences que nous auront pour la réalisation des couches déposées. Ensuite, par simulation les meilleurs empilements réalisables avec le bâti à ma disposition. Ici les trois empilements pour aborder plusieurs applications: biophotonique, lidar, télécom et datacom seront présentés. Les gammes de longueur d'onde d'intérêt sont donc sur la gamme 650 nm à 1550 nm. Les plages d'intérêt pour répondre aux différentes applications concernées seront de 650-750 nm, 900-1000 nm, 1260-1360 nm et 1530-1625 nm. Pour chaque gamme de longueur d'onde, un couple de matériaux sera présenté.

	.2.

.

2

1 Spécificités de la croissance par MOCVD Il

  existe plusieurs méthodes pour déposer des matériaux, dans cette étude c'est la technique MOCVD qui a été choicie car elle est déjà largement répandue edans les environnements de salle blanche CMOS.Le cluster tool permet de traiter des wafers de 300 mm. Cet outil, se compose de 7 parties comme le montre la figure C.6. L'ensmeble est composé de: deux sas de chargement utilisés pour le chargement et le déchargement, une chambre de transfert par lequel un robot transfère les plaques dans les différentes chambres, une valise de transfert sous-vide Pfeiffer ex-Adixen qui permet comme son nom l'indique le transfert manuel sous vide vers d'autres équipements, une chambre de nettoyage SiCoNi, un réacteur d'épitaxie permettant le dépôt de matériaux III-V éventuellement dopés, un panneau de gaz contenant les précurseurs organométalliques et enfin une chambre à plasma supplémentaire.Ici, seuls la chambre de nettoyage SiCoNi et le réacteur d'épitaxie seront abordés.Il n'est possible de traiter qu'un seul wafer à la fois dans chacune des chambres, mais le système permet aux différentes chambres de fonctionner simultanément. Un wafer de silicium qui doit subir une épitaxie commence son voyage dans un FOUP (Front Opening Unified Pod) qui peut contenir jusqu'à vingt-cinq wafers 300 mm. Le FOUP est chargé sur l'un des sas de chargement, une plaque sélectionnée par l'utilisateur est alors emmenée dans la chambre SiCoNi pour le nettoyage de surface.

	Présentation de l'outil

L'équipement utilisé pour ce travail est un cluster tool d'Applied Materials.

  La chambre SiCoNi repose sur un plasma NH 3 /NF 3 déporté qui va générer des sous-produits NH 4 F et/ou NH 4 HF 2 . Lorsque ces espèces sont en contact avec l'oxyde de silicium, elles réagissent et forment une fine couche solide de (NH 4 F) 2 SiF 6 sur la surface du substrat et du NH 3 et H 2 0 gazeux. Cette fine couche solide de (NH 4 F) 2 SiF 6 est ensuite éliminée par sublimation à environ 100 °C. La sublimation transforme la fine couche solide en produits volatils NH 3 , HF et SiF 4 , qui sont évacués de la chambre.

Table 3 -

 3 COnditions géométriques d'apparition et de disparition des plans pour des rubans de GaAs crus sur du silicium (001) le long de la direction <110>.

	Apparition des plans {111} B	Apparition des plans {111} A	Disparition du plan (001)
	GR {110} >GR {111} B /si n(θ {111} )	GR {111} A <GR {110} si n(θ {111} ) with GR (001) >GR {111} A /cos(θ {111} )	GR (001) >GR {111} A cos(θ {111} ) [1 + t an 2 (θ {111} )]

Table 4 -

 4 . Pour ce faire, le groupe a utilisé la technique ECCI. Cette technique est celle qui a été utilisé dans ce travail pour pouvoir comparer les densités atteintes sur nos échantillons à celles de la publication du groupe de B. Kunert. Les résultats de ces caractérisations sont présentées dans le tableau 4. Résumé des différents échantillons présentés et des densités de dislocation associées dans les sections de ruban caractérisées. La longueur de section de ruban analysée était toujours d'environ 10 µm.

	Type	AR	W r i d g e [nm]	h out [nm]	Analysed surface [cm -2 ]	TDD [cm -2 ]	TDD [µm -1 ]
	Flat	0.9 200	230	2.4 ×10 -8	9.5 ×10 8	2.8
	V-groove 0.9 200	210	1.6 ×10 -8	4.7 ×10 8	0.8
	V-groove 0.35 310	626	1.8 ×10 -8	2.8 ×10 8	1.6
	V-groove 0.44 270	172	4.0 ×10 -8	1.21 ×10 8 0.78
	V-groove 0.6 150	166	2.0 ×10 -8	2.38 ×10 8 0.47
	V-groove 0.9 200	630	7.3 ×10 -7	4.8 ×10 7	0.58

Table 5 -

 5 Résumé des paramètres extraits en fonction du substrat pour les longs rubans (980x3 µm2 ).La figure C.16 permet encore d'observer les différents régimes d'une diode. Un première région plate qui correspond au régime inverse, une partie exponentielle et un régime de saturation qui tend à s'aplatir vers 3V. Comme le montrent les courbes présentées dans la figure C.16, plusieurs légères différences sont visibles entre les jonctions p-i-n réalisées sur les substrats de GaAs et de Si. Tout d'abord, en régime inverse, le courant de fuite est légèrement plus élevé pour la diode sur GaAs, 6,4 ×10 -6 , que celle sur silicium , 2,6 ×10 -6 . Le courant de fuite observé sur silicium pourrait provenir de la présence de dislocations. Ces dernières pourraient créer des centres de recombinaison pour les porteurs minoritaires et abaisser le courant de saturation inverse. Pourtant, la différence entre les deux courants de fuite est faible et on peut les considérer comme similaires. Ainsi, cela ne donne pas suffisamment d'informations pour faire une quelconque hypothèse de mécanisme physique qui donnerait cet écart. Pour le régime exponentiel, le facteur d'idéalité de la jonction peut être extrait à l'aide de l'équation 2.Sur le substrat de GaAs, n est égal à 2,46 et sur le substrat de silicium n est égal à 2,42. Comme dans la situation du régime inverse, le changement n'est pas significatif. Finalement, dans le dernier régime, que l'on peut qualifier de régime de saturation directe le ruban sur silicium semble avoir une saturation de courant plus faible que le ruban sur GaAs. Ceci est confirmé par les graphiques présentés en échelle linéaire dans les encarts de la figure C.16(a) et de la figure C.16(b). A partir de ces deux graphiques, on peut voir qu'à 3V, I est égal à 200 A.cm-2

	I = I S × exp(	qV nkT	-1)

  La demande croissante de flux de données a ouvert la voie aux nouvelles technologies. Comme les échanges de données explosent la photonique sur silicium est devenue le nouveau paradigme de cette décennie. L'optique est déjà courante à grande échelle, mais avec les exigences croissantes en termes de volume et de rapidité, il est nécessaire de l'utiliser pour les connexions inter et intra puces. La plupart des briques technologiques ont d'ores et déjà été développées, les guides d'ondes et les modulateurs par exemple. Cependant, l'intégration de la source laser reste un défi. Actuellement, les sources laser ont surtout été démontrées en utilisant des techniques de collage. Dans cette thèse, un autre type d'intégration de la source laser est abordé. Cette étude fournit plusieurs indices technologiques sur la manière d'intégrer une source optique par épitaxie sélective directe sur silicium.

De toute évidence, de nombreux développements restent à faire pour obtenir une épitaxie sélective émettrice de lumière totalement intégrée sur silicium. Les perspectives d'intégration des contacts, de réalisation de la structure ainsi que d'intégration dans une puce notamment pour le couplage sont détaillées dans la partie conclusion et perspectives du manuscrit rédigé en anglais.L'intérêt croissant pour la photonique sur silicium et les besoins qu'elle a créé sont une force motrice qui conduira certainement à des avancées majeures dans les prochaines années. En effet, de nouvelles approches d'intégration laser, apparaissent: croissance de matériaux III-V sur germe InP collé sur silicium aussi appelé InPoSi pour InP on Silicon[START_REF] Hu | III/V-on-Si MQW lasers by using a novel photonic integration method of regrowth on a bonding template[END_REF] ou la croissance épitaxiale sélective telle qu'elle a été étudiée dans ce manuscrit. De plus, il a été récemment démontré que la croissance épitaxiale sélective est utile pour la réalisation de transistors bipolaires[START_REF] Vais | First demonstration of III-V HBTs on 300 mm Si substrates using nano-ridge engineering[END_REF]. Ces nouveaux concepts d'intégration ouvrent la voie à de nouvelles évolutions. L'avenir n'en sera que plus lumineux.

Acknowledgements

The Al content for the different zone and each GaAs buffer shapes are summarized in table 3.5.

While considering all the geometries (flat, pyramidal, nailhead), the Al incorporation remains constant for a dedicated facet and the same AlGaAs growth conditions. In samples A2, B2 and C2 zone 2 has a 26% Al content, zones 3a and 3b contain 14% Al. Samples B2 and C2 exhibit two supplementary zones, 4a and 4b containing around 20% Al. In regards to sample A1 and B1 zone 2 holds a 14% incorporation of Al and zones 3a and 3b include 7% Al.

From figure 3.23 and figure 3.24, the AlGaAs growth rate on the different facets can be extracted.

For samples A1 and B1 the growth rates are respectively 1.1 nm/s along the (001) plane and 0.3 nm/s along the {110} planes. For B2 sample, the growth along the {111} planes is 1.2 nm/s. For samples A2, B2 and C2, the growth rates remain the same for the growth upon planes (001) and {111} and doubles to 0.6 nm/s for the growth upon {110} planes. Therefore, with a doubled TMAl precursor flux, the lateral expansion of the ridge is favoured. A summary of the different growth rates is presented in table 3.6.

rectangular shape, a flat pyramid shape and a full pyramid shape. It was also possible to highlight the fact that the width of the oxide slit has an impact on the growth as well as the cumulated deposition time. However, no impact was demonstrated of the underlying structuration of the silicon for the vertical rectangular shape.

Thus, the dislocation reduction with the use of those oxide slits was analysed. Contrary to the morphological study, the bottom structuration of the ridge has a high impact on the filtration of dislocations, the V-groove structuration is much better at it than the flat structuration. However, from the literature it is evident that the higher the aspect ratio the better the dislocation filtration. Yet, from the results presented here it is not as obvious and the silicon quality and preparation seem to have a very important impact on the quality of the grown material. However, the best dislocation densities where around 1 dislocation every 2 µm along the direction of the ridge. Those dislocation densities compare well with the results from the literature for comparable aspect ratios.

Once the dislocation reduction was well evidenced, different active parts were integrated on top of GaAs buffers to examine the possibility of future device making.

The three MQW options simulated in chapter 2 were demonstrated to exhibit PL at room temperature: Al 0.3 Ga 0.7 As/Al 0.45 Ga 0.55 As, In 0.2 Ga 0.8 As/Al 0.1 Ga 0.9 As and In 0.53 Ga 0.47 As/InP. The integration of quantum dots on small SEG structures was also demonstrated to have PL at room temperature. However, the emission wavelength needs further tuning to get to the telecommunication band of 1300 nm.

From all these developments, the next chapter will focus on the realization of red emitting devices, as the Al 0.3 Ga 0.7 As/Al 0.45 Ga 0.55 As is the more mature set of QW/barriers. First, the epitaxies will be discussed and then two set of devices will be made on blanket wafers. The SEG case will be discussed further in the perspectives of this thesis. What can be noticed from the extracted parameters presented in table 4.1, is that the FWHM is from lowest to highest for the growths on GaAs, patterned Si and Si substrates. This follows the trend of what was already noticed previously in chapter 3 for the other wavelengths. However, the values of the FWHM on silicon either blanket or patterned are pretty similar to the ones obtained for the InP/InGaAs case that was presented in chapter 3. Therefore, a very high dislocation density could explain such high values as was the case for the InP/InGaAs option.

Substrate

Yet, as the PL spectra are centred in the red region of the spectrum, demonstrators from the blanket sheet growths are realized.

III-V structuration and contact realization

Now that the stacks are deposited and their characteristics well known, one can get to the device realization for full-sheet grown layers. Here, the devices made were light-emitting diodes based on edge-emitting lasers structuration. The device fabrication done in this section is standard for this kind of devices. Hence, the steps for the realization are just briefly detailed and afterwards, the results obtained from these components are highlighted. The lithography masks used for the realization of the devices are detailed in appendix .2.

Steps for device realization

In order to manufacture the devices, several steps are necessary to define a typical waveguide ridge, also referred to as a ribbon due to its form, as well as to integrate the electrical contact metallization. will not impact too much the emission as it is almost completely transparent above 500 nm as is the ITO, its transmittance graph is provided in figure 4.12(b). Moreover, it has a refraction index of around 1.55 in the red region of the spectrum as illustrated in figure 4.12(a). As the refraction index is very different from the one of the III-V materials used here: around 3.8, and closer to the one of the dielectric, 1.2, or the one from the air, 1, the mode simulations provided in chapter 2, are still valid. Therefore the ribbon configuration chosen here, is very much adapted to guide the light generated by the recombination happening inside the quantum wells. This would likely favour light extraction from the etched facets. Indeed, the refraction index difference between the III-V ridge etched facets and the air creates a mirror like reflection of 30%. This, is compatible for the formation of an optical cavity, similar to the one presented in figure 4.13. Yet, the light would be extracted from both sides as the reflection at the facets is just partial. Now that the steps for device realization have been described, the electrical and optical results obtained on these ribbon structures will be described.

I-V Characteristics on GaAs and Si (001)

In this section, two types of ribbon structures were tested: short ones with a length of 480 µm and long ones with a length of 980 µm, both have widths of 3 µm.

LaserMoD simulations

LaserMOD simulations were made in order to have an overview on a number of parameters and allow to design the different structures. Here, only a summary of the simulation flow is given, one can find all the data concerning the simulation in LaserMOD's user guide [START_REF] Synopsys | Optical Solutions Group[END_REF].

LaserMOD is an active device platform for simulating semiconductor opto-electronic devices.

It solves the electro-thermal transport, optical properties, and carrier-photon interactions, using a fully coupled numerical scheme on a spatial discretization of the device geometry specified by the Computer Aided Design (CAD) layout [START_REF] Synopsys | Optical Solutions Group[END_REF].

For a laser simulation to go accordingly, it is useful to perform several design phases individually, before launching a complete, self-consistent simulation. This is why the optical problem and the material gain problem can be run independently.

In order to run the simulation, the following steps must be done, firstly, design the device, extract the profiles of interest (index, bandgap for example) to verify that the materials and the parameters are well defined before the simulation. Then, it is possible to calculate the mode. Here, we will use the Beam Propagation Method (BPM) based mode solver that can calculate the scalar or vector modes of the waveguide cross-section. The BPM method is versatile and can be used in 1D as well as 2D simulation. The mode solve is performed at the specified frequency. The default behaviour, is to track the gain peak for FP devices. Afterwards, it is possible to realize the material gain calculation. Eventually, If the mode solve and the gain calculation converged, one can run the full laser simulation. A bias table needs to be previously defined as all the bias points defined in the bias table are simulated in sequence once this simulation has begun.

Once the simulation has begun it cycles through the resolution of several equations as shown in figure A.

Simulation: additional information

Here, are presented the simulation results for emissions around 950 nm and 1550 nm The following structures were simulated and allowed to optimize the number of wells in the active regions of the stacks. For all the following results, material gain and mode dispersion inside the stack were always checked before running the full laser simulation.

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Near-infrared emission, 900 -1000 nm range

The revised structure illustrated in figure B.1(a) was used to optimize the number of quantum wells needed to enhance the laser output parameters. To discriminate the different results the two following parameters were used: mode confinement factor and the ratio P out /I for a constant voltage.

Starting with figure B.2(a), the confinement factor follows an evident linear rise when the number of quantum wells climbs. However, the ratio P out /I is highest from 1 to 3 QWs before dropping. Accordingly, the best point is the integration of 3 QWs inside the structure which maximizes the confinement of the mode as well as the exhibiting one of the highest P out /I ratios. After optimizing the number of quantum wells in a given structure, a full laser simulation was done using the best point. .

Infrared emission, 1500 -1600 nm range

The revised structure illustrated in figure B.1(b), was used to optimize the number of quantum wells needed to enhance the laser output parameters. As well as for the other simulations, the discrimination of results was made using the two following parameters were used: mode confinement factor and the ratio P out /I for a constant voltage. Starting with figure B.4(a), the confinement factor follows an evident linear rise when the number of quantum wells climbs. However, the ratio P out /I is highest from 3 to 5 QWs before dropping. Accordingly, the best point is the integration of 5 QWs inside the structure which maximizes the confinement of the mode as well as the exhibiting one of the highest P out /I ratios. After optimizing the number of quantum wells in a given structure, a full laser simulation was done using the best point.

Lithography mask schematics

The schematics of the lithography masks used for the realized devices of chapter 4 are presented in this appendix.