Yuri Polak
email: polak@cemi.rssi.ru

The History of Computers and Computing in Virtual Museums

Keywords: Computer, history, virtual museum

Online computer museums have large educational, cultural and aesthetic significance. They promote preservation of our historical and cultural heritage. Edward Proydakov"s Virtual Computer Museum launched in 1997 (http://www.computer-museum.ru) is the most representative and professional one in Russia. The unique feature of this project is active participation of outstanding scientists, engineers and designers who created the first Soviet computers. Many of them led projects that later came into legend. Different aspects of this museum"s activity are described in the article.

Introduction

As known, virtual museum is "a collection of digitally recorded images, sound files, text documents, and other data of historical, scientific, or cultural interest that are accessed through electronic media. A virtual museum does not house actual objects and therefore lacks the permanence and unique qualities of a museum in the institutional definition of the term" (Britannica Online). These collections take full advantage of the easy access, loose structure, hyperlinking capacity, interactivity, and multimedia capabilities of the World Wide Web.

Last years a huge quantity of virtual computer museums had appeared in Internet. In early summer 2006 Google returned above 21 million links by inquiry "Virtual Computer Museum" -naturally, mostly in English, but in other languages as well. Unlike traditional museums, museum in Internet is accessible any time irrespective of time zones, it doesn"t demand extensive areas and contains no bulky exhibits. It is especially important for Russia where there are no specialized museums of computer hardware, neither representative collections of mainframes or minicomputers samples. The largest in Russia collection of museum pieces on computer facilities development is available in Polytechnical Museum, Moscow (http://www.polymus.ru). Edward Proydakov"s project fills up this gap. His Virtual Computer Museum (http://www.computer-museum.ru) is the most representative and professional one in Russia. This project was launched in 1997, when Proydakov"s article "Let"s create a museum" was published in PC Week/Russian Edition #38, 1997. That time Edward was the Editor-in-Chief of PC Week/RE.

"Once a son of my employee, being the university student of second rate, has asked his mum, if there were any computers before Pentium processor. And I have understood, that the youth simply does not know history of computer facilities" explains Edward. Soon he got a real support from his colleagues and adherents. The unique feature of this project is active participation of outstanding scientists, engineers and designers who created the first Soviet computers. Now they form the Museum"s Advisory board. Despite of very respectable age and health problems, they take part in monthly sessions, write and discuss memoirs and textbooks. Here are the words from Museum"s welcome message: "We were driven by the intention to keep public the most unique documents portraying the 50 years of Russian computing, its success and withering. The materials we present, being kept secret for decades, are even now at times being obscured by those unwilling to remember the true history… The members of our Advisory board are well known for their achievements in computer science and electronics, many of them led projects that later came into legend. Our collection includes unique materials on the development of military, special-purpose and universal computers, systems and application software". The memoirs and scientific biographies of "pioneers", materials on histories of domestic computer facilities, specifications of many computers are placed on the museum site. This information is supplemented with English-Russian computer dictionary (by E.Proydakov and L.Teplitsky), one of the most authoritative in the country (11000+ terms). Other popular sections of a virtual museum are "Calendar of events", "Hall of Fame", "Documents and publications", "Calculations in pre-computer age", "History of domestic computer facilities", "History of computer facilities abroad", "History of software development", "Technology", "Computer games", "Books and press".

The activity of Museum is not limited to supporting a site, it often "goes to offline". Joint actions with the Polytechnical Museum took place. Members of Advisory board took part in exhibitions Softool at the All-Russia Exhibition Centre. The textbook on history of domestic computer facilities was prepared for edition.

In 2006 representative international conference was held in Petrozavodsk under IFIP. Virtual Computer Museum was one of the basic organizers of conference, and the Museum Council formed its Program Committee.

Other Russian Projects

Academician Ershov"s Archive for the History of Computing1 is a project of the A.P. Ershov Institute of Informatics Systems of Siberian Branch of Russian Academy of Science (Novosibirsk). Andrei Ershov has left a unique archive of approximately 500 thick office folders storing documents which reflect his scientific career and simultaneously the history of computer science in Russia and worldwide. After this project was started in 2000, a lot of materials were digitalized, and now archive contains about 35000 documents, 120000+ images and about 6000 persons described. It is a colossal collection of digitized documents connected with scientific, administrative, pedagogical work and daily activity of an outstanding Soviet researcher.

Some organizations -computer developers have created "corporative museums", web-pages with descriptions the history of their development. So, the Lebedev Institute of Precise Mechanics and Computer Engineering describes BECM, M-20, M-220, BECM-4, BECM-6, Elborus and other computers created in IPMCE 2 . Russian version 3 is more detailed and illustrated.

The Virtual Museum of informatics 4 was created and supported by teachers and pupils of a school #444, one of the best physical and mathematical secondary schools in Moscow. Part of information is borrowed in E. Proydakov"s museum. Most of other Russian virtual computer museums have poor original information. Some of them were launched by grant support and now have no renewal. The Museum of Soviet Computers history 5 was created by Associate Professor S.Tarkhov from Ufa with grant support from Soros Foundation in 1999. It contains descriptions of computers, their characteristics, pictures and photos. However this project is not developed now. The "Unofficial museum of computers in USSR" 6 (Denis Yakimov from Yaroslavl) has the similar destiny. A project "Virtual museum of computer technologies" was initially a mean for distance learning in the chair "Projecting and Technology of Computing and Telecommunication Systems" of Bauman State One more virtual "Museum of Soviet Calculators" was created by Andrew Davie, a collector of hand-held computing devices such as slide rules and electronic calculators. His project isn"t so representative as previous one, but the author is excused because he lives too far from Russia, on Tasmania island. By the way, Sergei Frolov has provided most of the images on this site. Its address is: http://www.taswegian.com/MOSCOW/soviet.html, where Moscow means Museum of Soviet Calculators on the Web. Former Soviet citizens often put into Web their reminiscences about hardware and software they dealt with. For example, Leonid A. Broukhis (now citizen of UK) presents his " BESM-6 Nostalgia Page" (1997-2005). This page is supposed to hold all sorts of information about great Soviet mainframe computer BESM-6. Address: http://www.mailcom.com/besm6.

The information on personal computer "Agat" 9 , a Soviet-made analog of "Apple-2" can be found among 950 computer descriptions of "Old-Computers.com", a project of Thierry Schembri and Olivier Boisseau. These two French men met in a pub in London in 1973. 25 years later they decided to launch this project (now hosted by NYI -New York Internet). Computer descriptions are available by name, by company or by year.

Computer Museums in Different Countries

Foreign virtual museums (abroad) could be divided into two main groups: a) network representations of real (off-line) museums; b) "pure" virtual collections exclusively accessible via the Internet. The first group is headed by Computer History Museum 10 , the world's largest and most significant history museum for preserving and presenting the computing revolution and its impact on the human experience. Established in 1996, the Computer History Museum is a public benefit organization dedicated to the preservation and celebration of computing history. It is home to one of the largest collections of computing artifacts in the world, a collection comprising over 13,000 objects, 20,000 images, 5,000 moving images, 4,000 linear feet of cataloged documentation and 5,000 titles or several hundred gigabytes of software. In 2005 Bill & Melinda Gates Foundation had pledged a $15 million gift to the Computer History Museum. This museum is located on 7.5 acres of land in Mountain View, the heart of Silicon Valley; its new home is a two-story, 119,000 square foot architecturally distinctive structure, designed and developed in 1994.

Computer museums in other countries are mainly parts of more common collections of artifacts and stories of the Scientific Age. Deutsches Museum in München 11 has a computer exhibition on the 3rd floor which presents some 700 objects on an area of 1020 sq.m. The site has German and English versions. London Science Museum 12 has a section "Computing and Information Technology" which covers the devices, machines and systems from 1623 (first mechanical calculator) to the present. Its scope includes electromechanical and electronic calculation, analog and digital computation, data management and processing, and cryptography. Science and Technique, a very large modern museum in Parque La Vilette (Paris, France) has now a special section on informatics on the second floor -"Musee d'Histoire Informatique" 13 . Computermuseum in Netherlands 14 is open to the public every third

  Started by Eduard Proydakov in 1997Our Sponsors [News] [About] [Articles] [Advisory board] [Contacts] [Russian version]© Russian Virtual ComputerMuseum, 1997Museum, -2006. .

Fig 1 .

 1 Fig 1. Virtual Computer Museum Home Page (2006) http://www.computer-museum.ru/english/

Fig. 2 .

 2 Fig. 2. A session of Advisory board. From left to right: Yuri Rogachov, Viсtor Przhiyalkovsky, Alexander Tomilin.

Fig. 3 .

 3 Fig. 3. A screenshot of Tasmanian "Museum of Soviet Calculators"

See http://ershov.iis.nsk.su/english

See http://museum.iu4.bmstu.ru/project.shtml

See http://www.xnumber.com/xnumber/russian_calcs.htm; http://rk86.com/frolov

See http://www.intel.com/museum

See http://www.thocp.net

See http://icom.museum/vlmp/computing.html

See http://www.computermuseum.it

See http://historia.adrem.pl

See http://www.fid.ru/museum

See http://www.nethistory.ru

See http://museum.uka.ru

nonprofit organization: History of Computing Foundation. It began in 1986 when somebody asked the original author (Cornelis Robat) during a course he gave: "Where do computers come from and who started with it". As we remember, the similar question gave birth to Edward Proydakov"s museum. This site contains a large list of hardware and its inventors; rich history of software and computer languages, a collection of historical papers by Pascal, Descartes, Turing, Shannon, Dijkstra and other ancient and modern authors. There are hundreds names in "Biographies Pioneers of computing". It also contains a good guide on other museums and even a collection of postage stamps with portraits of Babbage, Bernoulli, Ramanujan, Chebyshev etc.

Founded in 1995, the Virtual Museum of Computing 17 includes an eclectic collection of web-links connected with the history of computing and online computerbased exhibits available both locally and around the world.

The Italian Computer Museum 18 by Massimiliano Fabrizi contains mostly descriptions and characteristics of PCs from 1974 until the late 1980s as well as Polish site Historia Komputera 19 .

The exposition of Ukrainian "European Virtual Computer Museum" 20 mainly follows L. Malinovsky"s books The History of Computers in Faces, Essays on Computer Science and Technology in Ukraine and The Known and the Unknown in the History of Computer Technology in Ukraine. Some sections such as The Computer History Abroad are fulfilled in cooperation with E. Proydakov"s museum. We shall finish this list of the exotic countries with a mention about Mexican PC Museo 21 and the Latvian Core Memory Museum 22 .

Museums of the Internet

Internet became now not only environment and mean of information dissemination, but also an object of museum collecting. Let's specify some sources in Russia. Kurchatov Institute for Nuclear Research and Foundation for Internet Development


Yuri I Mitropolski
email: mitr@imvs.ru

Computer Architecture Development: From the BESM-6 Computer to Supercomputers

Keywords: Supercomputer architecture, heterogeneous multicomputer systems, pipelined vector processors, multi-architecture supercomputer systems, scalable heterogeneous chip multiprocessors

This work outlines the architecture and main features of the BESM-6 computer and data processing system AS-6. It also discusses the development of the "Electronika SS BIS-1" supercomputer system as well as the principle results of the research on multi-architecture (heterogeneous) supercomputer systems.

Introduction

The BESM-6 computer became the milestone of domestic computer development in the USSR. The chief designer of BESM-6 was academician S.A. Lebedev; the vicechief designer was academician V.A. Melnikov. This computer was oriented towards the solution of large-scale scientific and engineering problems. This fact was the major influence on the architecture, the logical design, and the construction of the machine.

The logical circuits were based on diode gates and transistor current switch amplifiers with a floating power supply. Due to the original construction with short wires between modules, it achieved a very high clock frequency of 10 MHertz. It used a pipeline on clock frequency in control and arithmetic units. The interleaving of banks of the main memory and non-addressed buffer memory with associative search maintained the proper speed of access to the memory. In fact, this design was similar to the cache memory of the IBM System 360 Model 85, which was introduced two years later. The BESM-6 computer had a simple and effective one-address instruction set, a floating-point arithmetic unit and registers for address modification. For multiprogramming, it used paged virtual addressing, a processor interruption system, a privileged instruction set, and a multi-user operational system. There were seven selector channels for magnetic drum, disk and tape memory, and multiplexer channel for input-output devices based on CPU multiprogramming. The original design methodology had two features: a formula description of logics and a table system with a table for each module describing all its wire connections [START_REF] Kuzmichev | The Principles of Design of Large-scale Computers[END_REF].

Developments

The beginning of the production was 1967. The BESM-6 computer set two records: the duration of production of fifteen years and the duration of use for more than twenty years. The impact of this computer on many generations of engineers and programmers was based mainly on the fruitful ideas of its original design.

The next major development produced under the leadership of chief designer V.A. Melnikov was the AS-6 data processing system. The installation and maintenance of the BESM-6 at the computer centers that processed large volumes of data from many abonents, in particular from the Space Flight Control Center, served as a stimulus for the AS-6 system development. A weak point in the BESM-6 design was the small number of external devices available for use and the low throughput of the input-output channels. At the first stage the main task was the design of the interface unit (in Russian Аппаратура Сопряжения -АС-6) between the BESM-6 machine and AS-6 machine with the capability of attaching a large number of telephone and telegraph channels, channels for telemetric data, and also increasing the number of peripheral devices. However, after experimental work with at the first stage it became clear that the system must contain more powerful means of processing data; most of all, it must be a scalable system with the ability of attaching additional computers and devices. In the end, the task was the design of multicomputer system with an advanced means for system reconfiguration.

The AS-6 System

The fundamental ideas were the creation of application-specific subsystems and devices, and a unification of channels for the whole system. Beside the BESM-6 the system included an AS-6 central processing unit, a peripheral computer PM-6 consisting of a peripheral multichannel processor, a multichannel exchange unit (channeler), additional units of main memory, magnetic disks controllers, and a telemetric controller. They connected all these components by a unified first-level channel.

Since 1973, the AS-6 system was in use for experimental purposes. At the same time its development was continued. In 1975, the system was in use during works on the joint Soviet-American "Apollo-Soyuz" mission. The complete system was ready in 1979.

In the AS-6 system design, they realized for the first time new ideas that became the basis for supercomputer development and research on advanced high-performance computer architecture. To begin, it is necessary to highlight the following features:

o The AS-6 was a heterogeneous multicomputer system; o The AS-6 central processing unit was problem-orientated for the tasks of complex objects control and effective translation; o The PM-6 peripheral computer was function-specific for input-output control; o The system used several specially designed unifying channels.

The BESM-10 and the Electronika

During the period of development and operation of the system, it became obvious that new architectural ideas and old electronic technology were not corresponding one to the other. In 1973, they worked out the BESM-10 system. They planned to develop the advanced computer system on high-speed ECL LSI chips. The Ministry of Radio Industry of the USSR did not support this project.

Further development in this direction under the leadership of academician V.A. Melnikov was the creation of the "Electronika SS BIS-1" supercomputer system. The aim of this development was to increase the performance of the new computer by two orders of magnitude. This led to the development of a new technology and appropriate architecture [START_REF] Melnikov | Requirements for Hardware Design of High Performance Computers and Problems of Their Development[END_REF].

It was planned on the first stage of design that the system would include the following problem-oriented subsystems: a main computer with a pipelined vector processor, a matrix computer, and a logical data processing machine. In addition to this, they planned the development of the following function-specific subsystems: a peripheral computer, an external solid-state memory controller, a magnetic disk controller, control computers, and front-end computers. Due to the shortage of resources, they decided to postpone the development of the matrix, logical and peripheral machines.

The two choices of architecture for the main computer came under review; namely, the AS-6 central processor as enhanced in BESM-10 project and the pipelined vector processor. The second one was more appropriate due to much higher performance and better utilization of synchronous pipelines. The feature of external solid-state memory was the development of intellectual controller intended for the realization of different access methods for the main computer and for joining up two vector machines in a single platform. The peak performance of two-processor system achieved 500 MFLOPS. The software included operational systems of main and front-end computers, programming systems for macro assembler, and the Fortran 77, Pascal, and C programming languages [START_REF] Melnikov | Designing the Electronica SS BIS Supercomputer[END_REF].

In 1991, they tested the "Electronika SS BIS-1" system. Four sets of system hardware were delivered to customers. In the same year, they developed the "Electronika SS BIS-2" multiprocessor system. The planned peak performance was 10 GFLOPS. Beside multiprocessor main machines, the system has included monitor machines for task preparation and system control as well as massively parallel subsystems. However, in 1993, they made the decision to discontinue all work on this effort.

Reflections

The experience gained during the development of these systems became the basis for the research on heterogeneous supercomputer systems. They showed that the most effective system was one with subsystems oriented toward different forms of parallelism, that is, those corresponding to different forms of parallelism of parts belonging to the very large problems. The processing of large data sets is connected with data level parallelism. This form of parallelism is used most effectively in vector processors. Another form of parallelism is parallelism of tasks, which is present in problems with great number of independent or weakly coupled subtasks. In this case, the best choice is a multiprocessing subsystem.

At the first stage of research, they developed the concept of heterogeneous supercomputer systems. In particular, they proposed to integrate in a single platform a vector uniprocessor and a multiprocessor, both having the access to the common memory [START_REF] Mitropolski | The Concept of Heterogeneous Supercomputer Systems Development[END_REF]. The whole system could have several such integrated platforms based on large system memory [START_REF] Anohin | The architecture of Heterogeneous Supercomputer System[END_REF].

The next stage of research concerned the analysis of advanced ULSI technologies with more than one billion transistors on a chip. They developed the original architecture of a scalable multi-pipelined vector processor. This processor had many parallel pipelined branches each having a chain of simple vector processor with several functional units and a local memory. A program having complex vector operations achieved the best results. The performance of such scalable processor was up to 1024 floating-point operations per cycle [START_REF] Mitropolski | Architecture of Multipipe-lined Module Scalable Uniprocessor[END_REF].

In accordance with these concepts, the research project of a multi-architecture supercomputer system had been developed [START_REF] Mitropolski | Multiarchitecture Supercomputer System[END_REF]. The system consisted of a computing subsystem, monitor-simulating subsystem, system memory and external subsystem. The computing subsystem includes a vector multiprocessor, a scalar multiprocessor, and a monitor computer. The productivity of this system can be very high, up to 90% of its peak performance. The performance depends on the level of technology and it could reach up to 10 PFLOPS.

Conclusion

The comparison of this project with foreign researches and developments shows that in theoretical and conceptual sense it is ahead of published results [START_REF] Mitropolski | Mutiarchitecture -New Paradigm for Supercomputers[END_REF]. On March 20 of 2006, Cray Inc. announced plans to develop supercomputers that will take the concept of heterogeneous computing to an entirely new level by integrating a range of processing technologies into a single platform. The second phase will result in a fully integrated multi-architecture system [START_REF] Will Leverage An | Adaptive Supercomputing" Strategy to Deliver the Next Major Productivity Breakthrough[END_REF]. The same concepts were published in 1995 [START_REF] Mitropolski | The Concept of Heterogeneous Supercomputer Systems Development[END_REF]. The term "multi-architecture" was proposed in 2003 [START_REF] Mitropolski | Multiarchitecture Supercomputer System[END_REF].

The design of the cell chip by Sony, IBM, and Toshiba began in 2001. Cell is a heterogeneous chip multiprocessor that consists of an IBM 64-bit Power Architecture™ core, augmented with eight specialized co-processors based on a novel single-instruction multiple data [START_REF][END_REF]. In a paper published in 1998 [START_REF] Mitropolski | Architecture of Multipipe-lined Module Scalable Uniprocessor[END_REF], one reads the following:

"The chains and parallel branches of the modules provide high performance due to their topology with the shortest links between functional units. In a maximum configuration, the uniprocessor might have up to 1024 modules and attain up to 4 thousands floating-point operations per cycle or 4 TFLOPS".


Jaroslav Khetagourov
email: tshe@bk.ru

Some Aspects on Computing Means Development Philosophy

Keywords: Computer facilities, software development, high-level languages, evaluation reliability, computer viruses

Some factors influencing computer facilities and programming development appear in this paper. The negative role of present tendencies and development influence is noted.

Introduction

Computing means (CM) as the unity of computing devices (machines) and programming have been developing in the world for more than a half-century. During this period, scientists achieved fantastic successes in creating computing devices (machines) and in the development of programming.

Computing means have received broadest application in various fields of our life. CM development experience provides us with many opportunities for analyzing accepted decisions and considering various construction rationality estimations. The last is mainly defined by developing conditions and the aims of CM application.

Let's consider the connection between CM application aims and their development conditions. At the initial stage, CM application sphere was restricted by scientific and (mainly) military aims. That is why there were rather simple estimations concerning the rationality of decision methods. In this situation, we take into account two factors: the time of decision-making and the expenses. Therefore, using of CM in various fields of modern society has been essentially expanded and it has become more complicated. In addition, we have increased requirements to CM and estimations concerning its application rationality.

Computing Means and Storage Capacity

The historical development of computing means has shown that it was much simpler to realize the increasing hardware production task than to supply its application areas with programs for problems solving. It has strongly influenced CM development. Developers have begun to improve the basic technical characteristics of computing means (such as speed, memory storage) and productivity of programming (high-level languages, HLL).

The increase of speed and memory storage capacity of computing devices was mainly provided by elements size reduction, which resulted in increasing its work frequency and reducing the sizes of devices in whole. It was also provided by increasing the number of simultaneously working circuits and computing devices.

The technological methods of increasing the fast-action processors apparently have reached a level of economic rationality. We estimate economic efficiency as the ratio between expenses for technological rigging and the output of a suitable design. On one hand, we can evaluate the market value and expenses for ensuring heat pipe-bend from big integration circuits (BICs) in connection with increasing of work frequency. On the other hand, we can compare the rigging of increased requirements concerning stability of BICs operating conditions for the reliability of the rigging. The increasing number of simultaneously working processors in connection with developing a crystal upon which some processors are placed, has received an additional benefit due to reduction of amount of external communications within the system.

Computing Means and Programming

The increasing of programming productivity provided by the large-scale application of high-level languages (HLL) takes into consideration the tasks and decision features for various application areas of computing means. The use of high-level languages essentially increases the output of programming tasks. However, the transformation of HLL program into the program for a computing device (i.e. program on the computer language, CL, program) led to substantial growth of its storage volume.

In summarizing the above information, it is possible to characterize the development of computing means as extensive. Accordingly, one could estimate its role in economic development of society. The extensive development of computing means has brightly revealed a positive feedback of its two principal parts: computing devices and programming. Therefore, the increase of program volumes targets an improved performance of computing devices; their perfection leads to the possibility of increasing the software. Thus, these two parts create conditions for each other's development that provides the existing parity in the distribution and development of works. At the same time, it generates economic interests of the sides.

As a result, the concepts of CM development keep the parity of income distribution between manufacturers of hardware and software. The extensive development of computing means negatively influences generation of new ideas and its introduction in CM construction.

Introspection

The important problem of computing means development is an estimation of a relationship between types and numbers of operations in HLL and CL and the choice of building computing means. Apparently, it is expedient to carry out analysis of movement from CL to HLL, assuming hardware realization of each step of this movement. The recognized advantages of HLL programming on the one hand, and the achievements in technology of element size minimization on a crystal on the other hand, plus the development of CAD tools that give conditions for the practical realization of complicated circuits of operation with HLL.

However, according to publications, this CM direction has not received essential development, apparently because of corporate reasons. On one hand, the marketing of software on CL was sharply limited, and on the other hand, the requirements of highspeed computing devices essentially changed (reduction of the number of CL commands more than an order, with the practical exception of operating systems).

It is necessary to note that application of CM with HLL hardware realization considerably reduces expenses of firms that create systems with computing devices for programming and debugging of programs of an entire system for its operation. However, these are problems for other groups or companies. Another important problem of CM development is the estimation of universality of computing devices for effective calculations of large-scale tasks.

For the overwhelming number of CM users (more than 80%), especially for CM working in various fields, the main thing is the minimization of operating cost. We can achieve this in two ways:

1. Application of universal computing devices and typical programs; 2. Application of specialized computing devices that effectively solve certain groups of tasks and apply the most convenient HLL. The modern level of technology of computing devices, CAD application, creation of basic technical solutions (basing crystals for microprocessors and controllers) changes the assessment of the feasibility toward specialized decisions.

Leading CM manufactures are interested in production of various universal CM that have large series. It keeps extensive development and provides certain profit level and parity between the CM parts. Actually, for CM users it leans toward an increase of expenses. However, the interaction of CM producers is organized in such a way. It is one of the important factors constraining realization of new ideas.

Multi-Processing

The use of crystals with several processors has created favorable conditions to increase the rate of calculations by increasing its number within systems in large-scale quantity. The decision problem to increase the output of many processors system has passed to algorithmers and programmers.

We can estimate the actual speed of system computing means by the ratio between the average of high-speed processor operations and the nominal sum of its action. We estimate the quantity of this ratio by a small number of peculiar properties that we determine by a kind of task and by the skill and intellect of the algorithmers and programmers.

The leading manufacturers of CM hardware and software support this direction; that is, it keeps parity of the income growth for these two groups. To reduce the influence of human factors, it is especially important to consider the direction of the automatic mis-paralleling of programs with the application of associative memory and current structures. (See the work of V. Bourtsev.)

Despite certain achievements, the problem of CM development regarding the task of ensuring the trustworthiness and reliability of output information continues to remain. As is known, we define trustworthiness of the information (absence of mistakes in output data) by the quality of used control methods of correctness of operating computing devices and the execution of the program by its testing.

It is necessary to note that we define the importance of requirements to trustworthiness of the information by the limited number of CM consumers (15-20%). However, the damage caused because of erroneous information could reach a quantity of nearly billion units. The way to achieve the requirements regarding CM trustworthiness and reliability is control. One way applies to hardware control methods (use of odd and even, module 3, codes, a majority method); the other way is applied to programming methods. Currently, hardware control methods extend the majority method by increasing the volume of the equipment and the consumption of CM energy by a factor of 3.5 to 4. Due to the use of universal CM, this decision is economically favorable to its producers. The application of programming methods based on the application of universal CM equipment, causes an increase of its performance by a factor of 2.5 to 3. This appears favorable for the manufacturer of the equipment and for the developer of software.

External Influences

Well-known methods of control state that neither the volume of equipment nor the increase of speed affects an increase in demand. These data again confirm that the existing economic relations between leading CM manufacturers constrain the creating and introducing new ideas of CM development. From a consumer's point of view, the cause of some incorrect information is the impact of viruses and various defects that cause damage to nearly a billion units.

Let's consider some features of the occurrence of viruses that break the order of program performance of any task. It is necessary to note that the occurrence of viruses within a program has not been connected with the infringement regarding the equipment operations of the computing device. The accepted measures concerning the elimination of a virus influence occur after its detection and they operate only on the virus. To predict the occurrence of a virus just now, according to the published data, is not possible.

In analyzing virus programs, we should note that within them, the commands transform the addresses and change the data in use. A possible number of similar combinations of commands within programs can cause practical harm beyond all bounds. Therefore, existing CM operating procedures are periodically broken by occurrence of the next virus whose influence is eliminated by the creation of the next anti-virus program associated with additional expenses for the user, plus the increasing of the program volume, and demands of speed requirements.

Conclusion

For elimination of viruses influence, it is necessary to enable the changes of the organization of a computing device and to stipulate the condition of the formation of a program. The realization of this direction demands essential processing, organization of work of computing devices, and programming methods that are associated with large expenses.

The economic relations between leading world companies have mainly determined the existing extensive order of CM development. Such relations constrain the application of basic and new ideas of development of computing systems. This situation can only change because of the appearance of new conditions and social needs.


Victor Zakharov
email: vzakharov@ipiran.ru

Yuri Lavrenjuk

Conception of New Generation Computer Systems -The Last Large-Scale Initiative in Computers of the COMECON Countries: A Glance after Twenty Years

Keywords: New generation computer systems, scientific project, research team, COMECON countries

The conception of a new generation of computer systems was developed by a team of scientists from USSR Academy of Sciences, academies of USSR republics, academies of COMECON countries in 1984-85. The conception contained main directions of computing technology and informatics development in the socialist countries. Additionally, it prescribed the main directions of research and development that should be performed to obtain new qualities of information and computer systems. The conception was supposed to be implemented within the framework of ten integrated scientific projects performed by the international research teams. The structure of these projects and the main results of their implementation are presented. A glance on these projects from today positions is also presented.

Introduction

In December 1983 in Sofia, the capital of Bulgaria, according to the recommendation of the meeting of the Academies of Sciences of the Socialist Countries representatives, the First Meeting of the Coordination Council for Computing Technology and Informatics of the Academies of Sciences of the Socialist Countries (CCCTI) took place. Academician Evgeny Velikhov, vice president of the USSR Academy of Sciences, headed this council. The representatives decided at this meeting to organize the Provisional Work Team (PWT) for working-out the "Conception of a new generation of computer systems" in the socialist countries. The proposals provided for directions of fundamental and applied research in computing technology and informatics.

Representatives of eleven Academies of Sciences of the socialist countries participated in PWT. They included the People's Republic of Bulgaria, Hungarian People's Republic, Socialist Republic of Vietnam, German Democratic Republic, Korean People's Democratic Republic, Republic of Cuba, Mongolian People's Republic, Polish People's Republic, Socialist Republic of Romania, Union of Soviet Socialist Republics, and the Czechoslovak Socialist Republic. Note that only three of these countries exist now with the same names (Vietnam, Korea, and Cuba). The director of the Institute of Informatics Problems of the USSR Academy of Sciences, Boris Naumov (at that time a corresponding member of the USSR academy, elected in 1984 a full member of the USSR academy), was appointed as the Chairman of PWT.

During 1984-85, a team of scientists from the USSR Academy, the academies of the Soviet republics, the academies of COMECON countries, after intense common activity, developed the "Conception of a new generation of computer systems" (CNGCS), which was approved in June 1985 in Prague on the third meeting of CCCTI [START_REF]Conception of New Generation Computers[END_REF]. That conception represented in some sense the answer of the socialist countries on the ESPRIT program of EEC and on the Japanese program of the fifthgeneration computers. The conception contained main directions of computing technology and informatics development in the socialist countries for the period up to 2010. Additionally, it prescribed the main directions of research and development that should be performed to obtain new qualities of information and computer systems. The conception became the important component of the Integrated Program of Scientific and Technical Progress of the COMECON countries, the base for carrying out unified technical policy in academies of sciences and industry of the socialist countries.

Fig. 1. Conception (photo of cover)

The conception was supposed to be implemented within the framework of ten integrated scientific projects (ISP) performed by the international research teams. They included: "Systems of knowledge processing" (ISP-1) "Image processing and computer graphics systems" (ISP-2) "CAD for computer systems" (ISP-3) "Computer Networks" (ISP-4) "Systems of personal computers" (ISP-5) "Fault-tolerant systems" (ISP-6) "New external storage devices" (ISP-7) "Software engineering for new generation computer systems" (ISP-8) "New algorithms and architectures for information processing" (ISP-9)

"Informatics for education" (ISP-10)

To guide the realization of the conception, CCCTI had arranged as its work institution the Commission on the New Generation Computer System (CNGCS) and academician Boris Naumov was appointed its Chairman. The main task formulated for CNGCS was to provide a practical realization of all projects using all efficient forms of international collaboration such as establishing international institutes and laboratories, arranging international conferences and symposia, creating a special journal, and publishing proceedings. Due to these decisions, in 1988 they launched the publication "Journal of new generation computer systems" by the "Akademie-Verlag Berlin" publishing house at the Central Institute for Cybernetics and Information Processes of the Academy of Sciences of the G.D.R. The course of the Conception fulfillment appeared in the issues of this journal. This journal was edited up to 1991 when the activity on the conception realization was practically terminated due to the well-known events in most of the participating countries; fourteen issues of the journal were published.

Fig. 2. Journal (photo of two cover pages of the journal)

We will now try to present in a short form the goals and content of the integrated scientific projects and give some comments about the confirmation and correctness of the ideas included to the conception, its achievements, and its hopes.

Systems of Knowledge Processing (ISP-1)

Responsible Country: Czechoslovakia Participating Countries: Bulgaria, Hungary, Germany, USSR Supervisor: Academician Ivan Plander (Czechoslovakia)

Working Goal

A step-by-step creation of artificial intelligence systems providing efficient implementation of the knowledge processing functions and basing on architecture with high level of concurrency and distributed data bases. Development by 1995 a knowledge processing computer with special concurrency means. It was planned to perform main joint researches in the base laboratory on artificial intelligence in Bratislava (Czechoslovakia). The ISP-1 included six projects described below.

Project "Expert Systems"

Lead by Hungary with USSR and Czechoslovakia as participants.

Goal: Creation of a modular "empty" hardware system with a flexible architecture (expert meta-system) Project Result: It created the universal environment for constructing expert systems for diagnostics and planning tasks.

Project "Main Tools for Knowledge Processing"

Lead by Germany with Hungary, USSR, and Czechoslovakia as participants.

Goal: A systematic creation of hardware and software means and specialized architecture models for knowledge processing.

Project Result: Development of the conception of the first release of a knowledgeprocessing computer.

Project "Systems of knowledge processing computers"

Lead by Czechoslovakia with Germany, Hungary, and USSR as participants.

Goal: Creation of efficient implementation for knowledge processing functions on system architecture with high level of concurrency and with the use of relational data base facilities.

Project Result: Developed relational data base computer and knowledge base system of SIMD type; a sample of knowledge processing system (SOZ-1) was created.

Project "Distributed knowledge base systems"

Lead by USSR with Hungary, Germany, and Czechoslovakia as participants.

Goal: Development of methods and tools for cooperative problem solving, using systems of distributed knowledge bases and mechanisms of distributed solutions of tasks.

Project Result: Created a "synthesis" knowledge integration system. Actively growing DATA GRID system represents in some degree an example of the tasks formulated in the project realization.

Project "Man-machine communication on natural language"

Lead by USSR with Germany and Czechoslovakia as participants.

Goal: Development of algorithms and methods for hardware-software implementation of input/output of natural language written texts and speech (partially, safe understanding of continuous speech without training on definite speaker).

Project Result: Developed a number of decent quality systems for output (pronouncing) of written texts. Understanding of written natural texts and especially continuous speech understanding happened to be too difficult tasks and are still not implemented in the full volume.

Project "Data base computer"

Lead by USSR with Germany and Czechoslovakia as participants.

Goal: Development of specialized computers for data base systems control.

Project Result: Limited progress on this effort.

Result of Performed Work

The projects developed a model of a database computer. Currently, a number of different companies in some countries are manufacturing database computers, which are operating within big information systems.

Image Processing and Computer Graphics Systems (ISP-2)

Responsible Country: Germany Participating Countries: Bulgaria, Hungary, Poland, Romania, USSR, Czechoslovakia Supervisor: Professor V. Vilhelmi (Germany)

Working Goal

The goal of this endeavor was the development of unified hardware and software facilities and standardized design solutions for the creation systems for image processing and computer graphics. The expectation by 1990 was the creation of a highly productive unified components and system of image processing with modular architecture. The ISP-2 supposed activity within three projects described below.

Project "Development of digital image processing systems"

Goal: Creation of universal systems to be used as the experimental basis for algorithms and solutions development; creation of unified components for specialized peripheral devices; prototypes development of highly productive components basing on new algorithms and new architectural solutions.

Project "Development of standard applications for automated image processing and analysis"

Goal: Creation of real time image processing systems (for industrial automation and scientific researches); creation of systems for 3-dimensional scenes analysis using knowledge bases; creation of "turnkey" systems for selected applications.

Project "Creation of computer graphics systems"

Goal: Development of efficient algorithms and basic components for threedimensional graphics processing; development of standard solutions for CAD systems in mechanical engineering, aviation engineering and other industrial areas.

Result of Performed Work

Within the integrated project, the results included a search of efficient specialized hardware solution oriented on semi-custom and custom VLSI that came to nothing more than experimental samples and models and they did not receive support from industry. Methods of software implementation were applied in some application systems based on general-purpose computers. Partially, it created a standard system for image processing on PC, a sample of intellectual controller for video databases, and a sample of system for images obtained from space processing.

Later, as a continuation of these works, the system for images analysis, understanding, and recognition named "Black square" came into existence in the Cybernetics Scientific Council of the Russian Academy of Sciences. Currently, powerful systems of 3-D graphics based on specialized graphical controllers are actively used in many applications.

CAD for Computer Systems (ISP-3)

Responsible Country: USSR Participating Countries: Germany, Bulgaria, Poland, Czechoslovakia Supervisor: Doctor of science, Efim Oihman (USSR)

Working Goal

The activity sought to create an integrated distributed CAD for computer systems, covering all stages of design from the level of system structure up to simulation, verification and testing of integrated circuits, image generators and testing procedures control, development of designer's documentation, control of manufacturing equipment and production planning. The system should allow describe and simulate IC's with the integration level up to 10 8 transistors on a chip using a high-level language of a "Silicon compiler" type that included a knowledge base and expert system. It was also to develop an experimental CAD system by 1990. ISP-3 included three projects described below.

Project "Systems for description and modeling architectural level of computers"

Lead by Poland with USSR and Czechoslovakia as participants.

Project "VLSI and ULSI CAD systems"

Lead by USSR with, Germany and Czechoslovakia as participants.

Project "CAD system for computers"

Lead by USSR.

Responsible Country: Bulgaria Participating Countries: Hungary, Germany, Mongolia, USSR Supervisor: Academician Blagovest Sendov (Bulgaria)

Working Goal

Creation of algorithmic, software and hardware means for informatics in education based on new generation computer systems (at first -on professional and educational personal computers) and carrying out large-scale experiments on means and methods of information technologies application in education. The main direction for this activity included the following. o Investigation of necessary modifications in learning programs and methodologies to bring them in correspondence with potentials of new information technologies; o Development of learning programs and manuals on informatics for all levels of education; o Development of software means for interaction with computer (language for primary education, information-logical languages, structural programming languages, languages for robots controlling and so on); o Creation of the models for teaching processes and tasks solving; o Integration of different means and methods for construction learning process models using methods of cognitive psychology and artificial intelligence; o Investigation and development of methods and tools for certification, replication and support of software for the area of educational informatics; o Development of software tools for learning courses and pedagogical programs preparation; o Creation of dialog teaching and consulting systems using methods of logical deduction, knowledge bases and modeling basing on the conception of computational experiment; o Development of architecture of simulator complexes for teaching popular professions bind with computer (microprocessor) devices manufacturing and application; o Organization of experimental centers of educational informatics for testing and tuning scientific and organizing forms of the research results familiarization.

Result of Performed Work

A considerable number of methodologies and software means ensured new information technologies usage in different levels teaching processes were developed. The active implementation of information technologies into the learning process took place in many countries. Special research Institute for Information Technologies in Education was established by the UNESCO (in Moscow, Russia).

Investigations in the area of wide implementation of information technologies to education process are continuing also at present in the most part of formulated in the project directions. In general the correctness of the formulated ides have been confirmed during passes twenty years.

From the above, we can see that in the process of its activity, the CNGCS headed by academician Boris Naumov succeed in detecting the main stream among many details and placed the emphasis on creation of new generation computer systems, not only on computer devices. Additionally, individual projects have been interconnected by joining them up in integrated scientific projects, which also have been closely interconnected. Finally, almost everything formulated in the conception projects looks today as obvious -exactly in such way modern information and computational systems are created. However, it is necessary to take into account that these projects have been prepared more than twenty years ago, where at that time many things were not so obvious as they are today; PCs, the internet, and mobile communications were not widespread technologies at that time.

A first version of a silicon compiler operating on 32-bit computer was developed and tested. Currently, there is a number of CAD computer systems, which include all functions described in the project. It provides all time parameters planned.

Computer Networks (ISP-4)

Responsible Country: Germany Participating Countries: Hungary, Bulgaria, USSR, Czechoslovakia Supervisor: Doctor of science, V. Heymer (Germany)

Working Goal

Development of methodology, standards on protocols, unified hardware and software components for the creation of local and global computer and data transmission networks, development tools for computer networks design, and tuning and exploiting automation. ISP-4 included four projects described below.

Project "Local networks"

Lead by Bulgaria with Hungary, USSR, Czechoslovakia, and Germany as participants. Supervisor: Professor Kiril Boyanov (Bulgaria).

Goal: Develop systems of protocols and create local networks providing transmission of data, sound, and images between different types of computers and devices, integrated into the united system; develop architecture of gateways between different networks taking into account upcoming international standards.

Project "Hardware and software components for network processors"

Lead by Germany with USSR and Czechoslovakia as participants. Supervisor: Doctor of science, V. Heymer (Germany).

Goal: Create a profitable, efficient, and safe multiprocessor computer system to perform functions of package switching in global data transmission networks (parameters: up to 1000 communication lines, carrying capacity: up to 1000 packages/sec, full operating time: 5-10 years); perform research of hardware and software solution for connecting computers and intelligent terminals to global data transmission networks with the goal to create a family of communication devices.

Project "Network of intelligent terminals"

Lead by Czechoslovakia with USSR and Germany as participants. Supervisor: Doctor of science, Miroslav Novak (Czechoslovakia).

Goal: Create an integrated network of terminals, independent on types of included hardware devices, which permit simultaneous connecting a great number of intelligent terminals (different types of personal computers, mini-computers, special processing devices for telecommunication equipment, for experiment control and so on) to mainframes and computer networks via communication processors.

Project "Distributed data processing"

Lead by Hungary with Bulgaria and Germany as participants. Supervisor: P. Bakoni (Hungary).

Goal: Develop principles of task distribution between elements and create distributed data processing systems in computer networks on the principles of ISO open systems; implement as the experiment a teleconference system.

Result of Performed Work

Some basic researches on conceptual level were performed, a number of LANs and package switching devices, network of intellectual terminals with communication processor were designed and provided for manufacturing.

Systems of Personal Computers (ISP-5)

Responsible Country: USSR Participating Countries: Bulgaria, Hungary, Germany, Korea, Mongolia, Poland, and Czechoslovakia Supervisor: Doctor Igor Landau (USSR)

Working Goal

Develop architectural and software solutions for prospective personal computers (PC) and their peripheral devices oriented on artificial intelligence tasks processing -both in the role of intellectual terminals of computer systems and as stand-alone intellectual workstations.

The project was based on the forecast about occurring everywhere usage of PCs and possibility of their connection to information and computer networks providing access to general use data and knowledge bases. Methods providing software portability have been investigated. They developed: tools for architecture description; structure and components of software for new generation PC; new man-machine interfaces providing input of tasks and requests to a system on language close to natural one.

Result of Performed Work

Models of 32-bit PC with microprocessor compatible with I80386 have been developed and delivered to the plants for manufacturing; microprocessors with RISC architectures and transputers were also developed. They also developed such software as a universal operating system UOS (those time it exceeded all existed on market OS for PC in some characteristics), a portable OS of UNIX type, standard packages of application programs for PC.

Passed time confirmed the correctness of the estimation regarding the role and place of the PC in new generation systems and surpassed the most audacious forecasts about the scale of PC expansion and applications.

7 Fault-Tolerant Systems (ISP-6)

Responsible Countries: USSR, Germany Participating Countries: Bulgaria, Czechoslovakia Supervisors: Academician Boris Naumov (USSR) and professor Dieter Hammer (Germany)

Working Goal

Develop experimental samples of new generation fault tolerant computer systems, with ability to reorganize automatically, practically without breaks in operating their structure with quick replacing of fault components after faults detecting. Develop methods to achieve "absolute" (during all system life period) reliability alternative to traditional methods of dubbing, tripling, etc. Expected ways of solving these problems include usage of self-timed schematics on the LSI and VLSI, fault-tolerant interfaces and system software supporting functions of failure parrying on the structural levels of complexes and systems.

Result of Performed Work

A number of works on the level of resolving conceptual items had occurred. Actuality of the formulated problem did not disappear up to present time. The investigations in self-timing technology only recently achieved practical stage -samples of simple microprocessors in chip designed within self-timed schematics were manufactured and tested. They demonstrated the correctness of theoretical proposals regarding considerable expansion of the operating environment area and efficiency of faulttolerant systems creation basing on self-timed schematics.

New External Storage Devices (ISP-7)

Responsible Country: Bulgaria Participating Countries: Hungary, Germany, USSR, Czechoslovakia Supervisor: Professor J. Kasabov (Bulgaria)

Working Goal

Development of new methods for recording and storing information on external storage devices (ESD), providing increase of capacity and reliability. Development of the methods for information protection in ESD and implementation of these methods in VLSI set. ISP-7 included five projects outlined below.

Project "External storage devices based on multi-layer medium with optical writing and electrical amplification; integral-optical modular ESD; hierarchical holographic ESD; associative ESD". Project "ESD based on multi-layer silicon structures". Project "ESD based on bubble memory". Project "Devices of ultra-thick magnetic recording of digital information". Project "Information protection in ESD".

Result of Performed Work

Some investigations and developments have been performed on the base of the Laboratory of new ESD in Bulgarian Academy of Sciences. The works performed within this ISP did not play sizeable role as they were behind the leading world investigations in this area.

Currently, the achieved parameters of ESD capacity and reliability greatly exceeded all forecasts and expectations announced more than twenty years ago. Thus, for example, it was formulated a task to achieve capacity 1 Gbytes on one magnetic disc; now 100 Gbytes capacity is usual for HDD in PCs. It was a task to achieve 1-5 Mbyte on semiconductor external memory, now flash-memory devices with more than four Gbytes are available.

Software Engineering for New Generation Computer Systems

(ISP-8)

Responsible Country: USSR Participating countries: Bulgaria, Germany, Mongolia, Czechoslovakia Supervisor: Doctor Valentin Semik (USSR)

Working Goal

Creation of scientifically substantiated programming technology for new generation professional personal computers, covering the whole "life cycle" of software product and setting up the basis for industrial software and software documentation manufacturing; development of new methods for increasing reliability of application computer programs. ISP-8 included three projects outlined below. Project "Experimental system of automated design, production, and support of software for new generations professional personal computers". Project "Development of the methods for software reliability improvement". Project "Technology of computer system architecture and software design".

Result of Performed Work

There were created instrumental-technological complexes of object-oriented programming for graphical systems development, for concurrent and pipeline calculations design and implementation.

It is reasonable to note that within this project it was paid special attention to the difference between technology of programming (tools, supporting program design, and coding in computer systems) and technology of tasks solution (designated for the end users of application systems). Such approach is obvious now and it is widely used in computer software development.

New Algorithms and Architectures for Information Processing

(ISP-9)

Responsible Countries: USSR, Bulgaria Participating Countries: Germany, Czechoslovakia Supervisors: Academicians Vladimir Pugachev and Alexander Samarsky (USSR) and academicians S. Markov, professors Kiril Boyanov and J. Mikloshko (Bulgaria)

Working Goal

The activity had four specific goals described as follows.

o Investigation and development of the common conceptual basis for evolution of mathematical modeling and computer experiment methods for solving tasks destined to creation of perspective computer hardware, its element base and software; o Development and investigations of methods for automated compilation on computers equations for statistical characteristics in the tasks of stochastic systems processes analysis and synthesis, implementation in practice corresponding application packages; o Development of algorithms and architectures for new types of computer systems including algorithms for concurrent calculations, implementation in practice corresponding application packages; o Creation of multi-processor systems of traditional and non-traditional architecture basing on concurrent data processing.

Result of Performed Work

Based upon a great number of performed fundamental researches there were developed application packages (including such as for the big tasks of linear algebra, stochastic systems, processes in electron-hole plasma, heat load on computer components, etc) oriented toward users and non-professional programmers; they developed special language tools destined to create software for data driven computers.

Currently, the process of development and accumulation of different methods and algorithms for different type programs solving is actively continuing. Most of the ideas formulated in these projects found their realization in large modern mathematical software systems.


B M Malashevich

D B Malashevich

Modular: The Super Computer

Keywords: The Super Computer Modular Arithmetic, RCCS, К-340А, 5E53, Yuditski, Akushskiy 1 Modular Arithmetic

scientifiques de niveau recherche, publiés ou non, émanant des établissements d'enseignement et de recherche français ou étrangers, des laboratoires publics ou privés.

of computing devices and, especially, of their application in the largest systems. He appreciated perspectives of this direction. Feodor Viktorovich was the main organizer and the patron of works on the development of modular arithmetic. His diligence received a robust and successful development in the country. The beginning of its demise coincides with his departure from life.

Notwithstanding, the Almaz was not an engagement in the design of a computer and F.V. Lukin had sent the inquiry to the scientific research institute of electronic machines (in Russian -NII EM). In 1953, he was their chairman of the state commission on acceptance of computer "Strela", whose first appearance had been established in the Almaz. The inquiry had interested the mathematician Israel Akushsky and his chief leading the design of computer Davlet Juditsky, to become the founders of modular arithmetic in the USSR. One of leading theorists in the RNS method and active participants of its practical application (Dr.Sci.Tech.), professor and academician Academy of Sciences of Kazakhstan, Viljan Amerbaev recollects:

"Israel Akushsky told to me, that first information about RNS he has received from F.V. Lukin in the form of the inquiry on works in the USA. According to Israel Jakovlevich, Feodor Viktorovich considered RNS as very perspective direction of development of computer facilities".

After this, the articles by A. Svoboda and M. Valach had arrived to I.J. Akushsky for preparation of its abstract. The initial information received (rather brief and superficial) has started the scientific research of I.J. Akushsky and D.I. Juditsky. The first attempt in the country to comprehend principles of construction modular computer was undertaken between 1957 and 1958 in NII EM by J.J. Bazilevsky, J.A. Shrejder, I.J. Akushsky, and D.I. Juditsky. However, it had not received uniform understanding and not all participants had taken a liking toward the essence of RNS.

Super-Computer "T-340А" and "K-340А"

In 1960, F.V. Lukin was recently nominated the director of the scientific research institute NII DAR (then the NII-37). He invited D.I. Juditsky and I.J. Akushsky to design the computer. D.I. Juditsky became the chief of the department and I.J. Akushsky became the chief of the laboratory in this department. Between 1960 and1963 in this department, the first modular super-computer in the country (the T-340A) was designed as an experimental model of the complicated system. (Here, a super-computer is understood as a computer with record-breaking high characteristics at that time). The theory and practice of variant modular arithmetic principles of construction of the computer was designed on this basis by I.J. Akushsky, D.I. Juditsky, and E.S. Andrianov. This computer had really worked for many years in the experimental system. The received results have been used in designing the K-340A computer, which has been mastered in a batch production and became the base for all systems designed in those years within NII DAR. In these computers, they released the principles of independent commands and data memory channels.

Operative memory was executed in the form of 16 blocks each with 1К-word capacity. Each block had two ports for input-output of information with subscribers (with an opportunity of a parallel exchange with any number of blocks) and with the processor. For speed increase, they realized program stratification of operative memory with alternation of the reference of the processor to blocks. In addition to the multiport, they applied buffer memory to two-operational commands. (Each command was carried out on two operations, each of which in other computers of that time was executed in the form of a separate command.) These features of memory system construction have provided high efficiency of the computer; delays were practically non-existent regarding the reference to memory of great volume (a scourge of the computer of those years). The speed of the T-340A and К-340А computers reached 1.2 million doubled, or 2.4 million single operations per second (OPS). Typical speed of the computer in those days was measured by tens or hundreds thousands OPS. By two factories it has been able to produce more than fifty К-340А computers, some of which in the structure of systems are still in operation until nowin 2006 it is forty years!! The bases: 2; 5; 23;63;17;19;29;13;31;61. Order of a word: 1;[2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31][32][33][34][35][36][37][38][39][40][41][42][43][44][45] 3 Super-Computer "Almaz"

In the beginning of 1963, F.V. Lukin was appointed director of the Center of microelectronics (CM), built in Zelenograd. One of its primary goals was:

"Design of construction principles of the radio-electronic equipment and the computer on the basis of microelectronics, the organization of their manufacture, transfer of this experience to the corresponding organizations of the country".

To perform this task, Feodor Viktorovich invited his well-known collective of the T340A and К340А computer founders led by D.I. Juditsky and I.J. Akushsky. By this time the T-340A computer had been designed, constructed, and modified. The design of the project of serial computer K-340A, its manufacturing and debugging on an experimental plant of NII DAR have been completed after leaving the group of specialists in Zelenograd by remained collective of employees under direction of Leonid Viktorovich Vasiljev. In 1964, they had formed a department of perspective computers in the enterprise known nowadays as scientific research institute of physical problems (NII FP). D.I. Juditsky was nominated the chief engineer of NII FP.

By the end 1965, three organizations were given the competitive task to design outline sketches of the high-performance super-computer with a release date of 30 March 1967. The organizations were (i) the center of microelectronics (the ministry of electronic industry (MEP), designer F.V. Lukin), (ii) the institute of exact mechanics and computer facilities (the ministry of the radio industry (MRP), designer S.A. Lebedev), and (iii) the institute of electronic operating machines (the ministry of apparatus making, designer M.A. Kartsev)

The computer was to include the following characteristics: data word length of 45

Figure 3. Davlet Islamovich Juditsky bits, performance of 2.5 to 3.0 million algorithmic OPS, complex functions in one command (one algorithmic operation on tasks of the customer on the average corresponded to the four usual operations of the computer), work with words of variable length, and a memory size of 2 17 45-bit words (5.625М bits). That is, the usual understanding that required a computer with speed nearby 10 (9 to 12) one million OPS. Best known, by the end of 1966 computers possessed speed in 4 to 12 times smaller demanded the following. So in Zelenograd, the design of the outline sketch of super-computer "Almaz", designer D.I. Juditsky had begun. All forces of CM were involved in creating the "Almaz" computer, shown if Figure 4. NII FP executed development of architecture and the processor of the computer; NII TM did the base construction, the power supply system, and input/output system; NII TT designed the integrated circuit (IC). In this aspect the project Almaz had conclusive advantage in comparison with S.A. Lebedev's and M.A. Kartsev's projects, since the newest element base was created here, in Zelenograd, and on this process it had great influence.

Alongside with the application of modular arithmetic, they found one more architectural way to obtain substantial growth of the general productivity of the computer. This was the decision widely applied in later systems of processing of signals by the introduction of a system of the processor of preliminary processing a signal. Soon, it became a new word in a science and technique. Into structure of the "Almaz" computer, they used three types of computing processors.

o A narrowly specialized non-programmable processor for preliminary processing the information acting in real time, named in the Almaz the Converter of the information (CI); o A programmable modular processor which is carrying out the basic data processing; o A programmable binary processor that carries out non-modular operations used for computer control procedures. The information from a source comes to CI, passes preliminary processing in real rate of receipt that excludes necessity of its intermediate storage. The results of this processing (their volume repeatedly less initial) act on the modular processor. Calculations have shown, that offered CI has the productivity equivalent about 4.0 million algorithmic OPS and allows to save about 3 megabits of memory. The modular processor of the "Almaz" computer has a productivity of 3.5 million algorithmic OPS. As a result, effective productivity of Almaz makes 3.5 + 4.0 = 7.5 million algorithmic OPS; that is, up to two to three times above requirements. See Table 2. These settlement data were confirmed by results of modeling on a universal computer and experimentally on the sample of the "Almaz" computer. The outline sketch has been designed and on March, 30th, 1967 is presented to the customer. Competition has won computer "Almaz". In May, 1967 CM has received the order for design of the high-performance super-computer "5E53" and a 5-machine complex on its basis with the organization of a batch production in Zagorsk city an electromechanical factory (ZEMZ) MRP. The main designer 5E53 had been nominated D.I.Juditsky. In October, 1969 the collective of designers of the computer has been allocated in the independent organization -Specialized computer center (SVC), director D.I.Juditsky, the deputy science on I.J.Akushsky.

While Almaz was designed, the customer has specified characteristics: the 40-bit computer with performance on tasks of the customer up to 10 million algorithmic ops (nearby 40 million usual ops), the RAM 7,0М bit, PROM 2,9М bit, external memory 3G bit, the equipment of data transmission on hundreds kilometers was required.

The architecture 5E53 had many progressive decisions: o commands (including preliminary and basic processing of the information) were carried out on modular processors, administrative -on binary. o -levels the conveyor organization. o Hardware block realization of arithmetic's: the block of addition/subtraction, the block of multiplication, the block of management of addresses, etc.), o Division of data RAM and commands PROM, o Division of trunks of commands bus and data bus, o Hardware stratification of memory on 8 blocks with an alternating addressing on blocks.

Special RAM based on the integrated carrier (cylindrical magnetic film) was designed for the 5E53. By the speed, dimensions, weight, power, and cost it was much more attractive than an adaptability to manufacture applied RAM on ferrite cores. See Figure 5. One more of the main problems was construction of PROM for storage of programs and constants which on tasks of the customer vary not often. Simple enough and fast constant memory, but supposing change of the information therefore was required. For 5E53 it is developed PROM with replaceable induction cards.

The storage on an optical type was designed as external memory of a large capacity. It had much in common with the cores at that time external memory on magnetic 35 mm tapes (a similar design, a drive, electronics), but differed in a data carrier and methods of record/reading of the information; it used photo/light-emitting diodes through an optical fiber on a film. As a result, the capacity of external memory increased by two orders of magnitude and attained 3G bits. The model of the storage was produced and it worked in the structure of the pilot model of the 5E53.

Attained reliability of the 5E53 was provided with self-corrected properties RNS in the arithmetic device, full majorization (2 of 3) all other systems of the computer's technology of installation intercell and interblock connections by a method turning and other means.

Table 3. Specifications for the "5E53" Super-Computer

The contract design: February 1971 Main designer: D.I. Juditsky Leading developers: V.M. Amerbaev, I.J. Akushsky V.M.

Radunsky, L.G. Rykov, M.N. Belova, P.F. Silantev, J.N. Cherkasov, V.S. Butuzov, V.A. Merkulov, P.V. Nesterov, V.N. Shugin The developer: Specialized computer center, MEP, Zelenograd The manufacturer of the pilot sample: Specialized computer center (SVC)

Word length: Data -20 bits and 40 bits Commands -72 bits Notation: Residue number system (RNS) with the additional basis The bases: 17;19;26;31;23;25;27;[6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31][32][33][34][35] In the beginning of 1971, the design of the documentation was completed. All necessary tests of cells and subassembly have been finished and the pilot model of the 5E53 was fabricated and tested. On 27 February of 1971, eight complete sets of the design documentation was produced. Preparation of manufacture had begun. However, in the beginning of 1972 when preparation of manufacture 5E53 already came to the end and there has been begun manufacturing of separate devices of the computer, work on creation of system for which it intended stopped. Simultaneously, work on the 5E53 stopped. There was no other consumer or other manufacturer in MRP. Although there was no demand for the 5E53, it appeared that in MEP the tasks for it continued. Low integration ICs could be designed with manual design; the time for large ICs and powerful systems of the automated designing has not yet arrived.

Destiny of Modular Arithmetic

In the 1960s and 1970s with respect to the designers of super-computer A-340A, К-340А, Almaz, and 5E53 in NII DAR, SVC and in the enterprises cooperating with them, serious scientific researches in the field of modular arithmetic were made. There were many publications on this theme in the open press, including and in the form of monographs. They had aroused serious interest at domestic and foreign specialists.

The true reasons for stopping the 5E53 project practically nobody knew. In fact, having received wide publicity in circles of experts and appreciated by them as a failure of the project, there began an independent life. There was an almost insuperable barrier on the further ways of introducing RNS in domestic computer facilities. Further use of modular arithmetic in the USSR energized enthusiasts, basically, in the theoretical plan and they were engaged only in the arithmetic. Foreign specialists of such shock have not gone though and there modular arithmetic has received more consecutive development. Figure 6 shows designers of the popular modular super-computers. Currently, activity is characterized by two moments. First, there appeared to be a sharp increase in demand for the decision of tasks with prevalence of modular operations such as in processing of signals, images, cryptography, and toponymy, in addition to a demand for high reliability and productivity. On these tasks, modular arithmetic is also effective. Secondly, change the principles of creation of integrated circuits; decomposition of this process on "front-end" stages (circuitry designing) and "back-end" (layout designing), development of technology of the IP-blocks, programmed logic integrated circuit (PLIC) and a line of other innovations in the microelectronics, new devices facilitating integrated construction. As a result, interest in modular arithmetic again increases. The volume of publications has considerably increased for this theme and many enterprises have begun researches in the field of modular arithmetic.

The year 2005 marks the fiftieth anniversary of RNS based on modular arithmetic. It is a good occasion for summarizing its development, an estimation of a modern condition and prospects of development. Therefore, a number of the enterprises from five countries (Russia, Kazakhstan, Ukraine, Belarus, and the USA) have made a decision on carrying out of anniversary special scientific international conference "50 years of modular arithmetic". The materials of the conference appear on the site of the Moscow Institute of Electronic Technology (Technical University) (MIET) 1 and the Virtual computer museum 2 also are published in the form of the collection of proceedings of "50 Years of Modular Arithmetic". The anniversary international scientific and technical conference took place within the program of the International scientific and technical conference "Electronics and computer science -2005". The collection of proceedings appear in Open Society "Angstrem", MIET, 2006, page 775 with ISBN 5-7256-0409-8.

The proceedings presented on conference testify that for fifty years, modular arithmetic has developed within independent scientific schools with various directions and real applications.

1 http://www.mocnit.miee.ru/oroks22W 2 http://www.computer-museum.ru/ and <http://www.computer-museum.ru/histussr/sokconf0.htm>

Figure

  Figure 1. Feodor Viktorovich Lukin

Figure

  Figure 2. Israel Jakovlevich Akushsky

Figure 4 .

 4 Figure 4. Super-computer "Almaz" engineering control console

Figure 5 .

 5 Figure 5. Fragment of the pilot sample super-computer's 5E53

Figure 6 .

 6 Figure 6. V.S. Kokotin, M.D. Kornev, M.N. Belova, L.G. Rikov, V.S. Khajkov. Designers of the modular super-computers T340A, K-340A, Almaz, and 5E53. (22 September 2004 in Zelenograd, for D.I. Juditsky's 75-year birthday)

Table 1

 1

	. Specifications for the "T-340A" and "K-340A" Computers
	The main designer: T-340А -D.I. Juditsky,
	K-340А -D.I. Juditsky,
	after L.V. Vasiljev.
	Development: NII DAR: T-340А -1960 … 1963
	K-340А -1963 … 1966
	Manufacturers: An experimental plant at NII DAR and the
	Sverdlovsk factory of radio equipment, per
	1966-1973 it is let produce more than 50
	complete sets.
	Word length of data and commands: 45 bit
	Notation: Residue number system (RNS)
	RNS -the bases and order

Table 2 .

 2 Specifications for the "Almaz" Super-Computer

	The outline sketch: March I968
	Main designer: D.I. Juditsky,
		Supervisor of studies I.J. Akushsky
	The developer: Center of microelectronics, Zelenograd
	Word length of data and commands: 45 bits
	Performance: 7.5 million algorithmic OPS (in the
		standard calculation, up to 30 million OPS)
	Notation: Residue number system (RNS) with the
		additional basis
	RNS -the bases and order
	of a word score by them:
	The bases: 2; 5; 23; 63; 17; 19; 29; 13; 31; 61.
	Order of a word: 1; 2-4; 5-9; 10-15; 16-20; 21-25;
		26-30; 31-34; 35-39; 40-45
	Detection of double and	Performance of operations in the arithmetic
	correction of single errors:	device, hardware majorization (2 from 3) in
		all other devices
	Calculation value of special functions: Used as an elementary command
	Memory size: 128К 45-digit words (5,898M bits)
	Fast buffer memory: 32 55-digit words
	Element base: IC series "Tropa"
	Power consumption: 5 KW
	The size of a rack cabinets: 550х800х1750 mm
	Volume of the equipment: 11 rack cabinets, an engineering control
		console, external devices
	The occupied area: 80,100 м 2
	4 Super-Computer "5E53"