Jordane Lorandel
email: jordane.lorandel@insa-rennes.fr

Jean-Christophe Prevotet
email: jean-christophe.prevotet@insa-rennes.fr

Maryline Helard
email: maryline.helard@insa-rennes.fr

Dynamic Power Estimation of FPGA-based Wireless Communication Systems

Keywords: FPGA, Dynamic power, Power estimation methodology, XPower, System modelling, SystemC, Wireless Communication, OFDM

The growing complexity of current and future wireless communication systems makes power estimation a challenging task for designers. Nowadays, it is required to estimate power very fast in order to explore and validate design choices as soon as possible in the design flow. In this paper, we propose a new dynamic power estimation methodology for FPGA-based systems. Our methodology aims to provide accurate and fast power estimations of an entire system prior to any implementation. It also aims at making design space exploration easier. We introduce a scenario-level in order to facilitate the comparison of domain-specific algorithms. This methodology relies on an IP power characterisation phase and a behavioural simulation of the modeled system using SystemC. We show the effectiveness of our approach on typical wireless communication systems which leads to a maximum absolute error lower than 6% compared to classic estimations.

I. INTRODUCTION

Nowadays, more than 12 billion internet-connected devices are already available worldwide. In a near future, a study in [START_REF]33 Billion Internet Devices by 2020: Four Connected Devices for Every Person in World[END_REF] shows that the number of such systems will explode in the context of the internet of things in which billions of devices (33 billion by 2020) will share information and communicate with each other, using different communication standards and protocols. The processing capabilities of such systems will also drastically increase due to the perpetual demand for higher throughput and increased functionality.

For several years, power has become one of the main topic for both academic and industrial companies. Although achieving a high level of performances still constitutes a primary objective, low-power design strategies are employed by designers to reduce power consumption. Indeed, embedded systems are generally relying on battery as unique power supply source and high performance systems cause heat dissipation, imposing a cooling process that can be very costly for small systems. In the wireless communication domain, power consumption is becoming a key metric in the context of green technologies.

Although ASICs (Application Specific Integrated Circuit) can achieve high performances in terms of speed and power consumption, these circuits usually require a time-consuming development and expensive costs. A current alternative solution is to make use of FPGA (Field Programmable Gate Array) devices. Such devices represent an attractive technology that increases flexibility while still achieving high performances [START_REF] Kuon | Measuring the Gap Between FPGAs and ASICs[END_REF]. They also make it possible to implement complex systems due to their high density of gates and heterogeneous resources. Being generally used for fast ASIC prototyping at low-cost or as hardware accelerators for realtime applications, FPGA-based systems are generally made of IP (Intellectual Property) cores. Such cores enhance design reuse and speed up development time. They also contribute to reduce the time-to-market significantly which is also a critical point for designers.

FPGA power consumption is generally divided into static and dynamic power. Static power comes from leakage currents whereas dynamic power is generated by transistors' switching activity.

The purpose of this paper is to propose a new power estimation methodology for FPGA-based wireless communication systems (with a focus on the base-band processing). In this work, we deliberately chose to focus on hardware design without any software considerations. This paper is organized as follows. Section II deals with the related works on high-level power consumption estimation. Section III promotes our proposed methodology. Section IV provides results obtained by the application of our methodology. Finally, we conclude and discuss about prospects in section V.

II. RELATED WORKS

Today, as designers want to implement a complete system into a FPGA, they usually follow a generic top-down design flow which is divided into several well-identified levels, starting from a high level behavioural description of the design to end at the layout or technology level (in case of an hardware-only implementation). These description levels are common to all hardware design flows and are obviously adapted to wireless communication designs.

In literature, there are a lot of works dealing with power estimation. Low-level power estimation methodologies and techniques are reviewed in [START_REF] Pedram | Design technologies for Low Power VLSI[END_REF][START_REF] Najm | A survey of power estimation techniques in VLSI circuits[END_REF]. Additional references dealing with low-power techniques for FPGA-based designs can be found in [START_REF] Lamoureux | An Overview of Low-Power Techniques for Field-Programmable Gate Arrays[END_REF]. From these studies, it can be noticed that estimating power using low abstraction level methodologies or tools is a time-consuming task. Furthermore, working at a low The International Conference on WIreless Technologies embedded and intelligent Systems ENSA of Fez 29-30 April 2015 level of abstraction does not allow designers to perform efficient design space exploration since too many choices may be considered at this level. In parallel, taking a decision very late in the design process may lead to expensive re-design costs if constraints are not met. As a conclusion, low-level approaches may not be suitable anymore for fast power estimation of future systems composed of billions of gates.

As related by the ITRS, International Technology Roadmap for Semiconductors a solution is to move up in abstraction [START_REF]Design Edition Report 2011[END_REF]. Nowadays, Electronic System Level (ESL) has emerged and seems to give the keys to make the design of future systems easier. At system level, early decisions can be taken and may have a more significant impact than lower-level decisions on the overall system performances. Although a lot of tools make it possible to work at this level, few of them consider early power and performance estimations for FPGAbased systems.

In the wireless communication domain, theoretical performances of the algorithms are usually evaluated at high level i.e. at the algorithmic level. Several tools and languages can be employed such as the Matlab software environment from Mathworks[6] which is widely used in the community. However, this tool requires an additional package to complete the FPGA chip development such as System Generator or DSP builder, respectively from Xilinx and Altera. This approach can be really time-consuming for large designs and DSE (Design Space Exploration) becomes limited due to the prohibitive number of subsequent implementations. The flow has to be rerun from scratch at each configuration of the system. Also based on Simulink/Matlab, an academic add-on tool called 'PyGen' is presented in [START_REF] Jingzhao | PyGen: a MATLAB/Simulink based tool for synthesizing parameterized and energy efficient designs using FPGAs[END_REF]. The proposed approach aims to feedback power and performance details of each module of the system from lower levels (the tool enables the synthesis of parametrized designs for FPGA using System Generator tool). Although power estimations are relatively accurate, the time spent during the implementation steps seems to be prohibitive and not convenient for DSE when considering large complex systems. Furthermore, when considering streaming application models, authors assume that all the modules are active throughout the processing which is not necessarily the case. For example, the activity may depend on the application behaviour and the synchronization elements between each module.

In [START_REF]The Ptolemy Project[END_REF][START_REF]LabVIEW System Design Software[END_REF][START_REF]System Development Suite[END_REF][START_REF] Website | SystemVue Electronic System-Level (ESL) Design Software[END_REF][START_REF]System Studio[END_REF] are listed the main behavioural level tools and EDA (Electronic Design Automation) environment for modelling, simulating, prototyping that are used in the signal processing and wireless communication domains. Although very powerful, these tools generally do not allow designers to get any information related to the energy spent by the algorithms.

In fact, since no implementation decision is taken at this level, it would be a total nonsense to think about obtaining accurate power results using some of such tools.

In general, as designers desire to get a first estimation of their circuits' consumption, they often make use of analytical power models or eventually spreadsheets if more hardwareoriented specifications are considered [START_REF] Desset | Flexible power modeling of LTE base stations[END_REF][START_REF] Deruyck | Modelling the power consumption in femtocell networks[END_REF][START_REF] Arnold | Power consumption modeling of different base station types in heterogeneous cellular networks[END_REF]. In all these works, power models are derived from datasheet values, real measurements or are possibly based on other works presented in the literature. The accuracy of the power estimation is generally not the priority and the main goals are to determine a global trend in terms of performances to achieve.

From a more hardware-oriented point of view, spreadsheets have been created by FPGA vendors such as XPE (Xilinx Power Estimator) from Xilinx [START_REF] Inc | XPower Estimator User Guide[END_REF] and Power Play from Altera [START_REF] Inc | PowerPlay Early Power Estimator User Guide[END_REF] to provide early power estimations prior to any implementation. These tools are based on the user design specifications and are dedicated to a FPGA vendor technology. This approach makes use of analytical formulas to determine the average power consumption based on given parameters such as the number of resources, the clock frequency, the signal activity, the voltage, etc. Spreadsheet estimations can be refined throughout the design implementation flow, right after the design synthesis as more implementation details are known. When considering a large and complex system, power consumption of the overall system is usually determined by summing the power contribution of each block. Although useful for quick power estimations of small hardware blocks (such as multipliers, adders, etc.) the spreadsheet approach may not be well appropriate to estimate the power consumption of larger complex systems. Moreover, it does not enable to consider time and dynamic effects that may occur during the execution of the application.

As Matlab/Simulink or LabVIEW, programming languages such as C/C++ or high level description languages such as System-Verilog are also widely used to model and determine theoretical performances of communication systems. At this level of description, designers often describe their system by connecting a set of custom building blocks that are able to exchange data in a concurrent way.

In literature, most of the approaches enabling power estimation at ESL are based on SystemC [START_REF]LabVIEW System Design Software[END_REF]. This modelling language consists of a C++ library and an associated simulation kernel. SystemC is widely used and allows designers to model a system by describing both hardware and software parts in a common language. It supports several degrees of refinement where implementation details can be represented or omitted. Models can also be either functional or pure performance models. In the last case, correct timing is usually ensured by some additional control. High-level simulation can be performed thanks to the SystemC kernel which makes it possible to run cycle-accurate simulation. Considering power, SystemC does not basically support the power estimation of the modeled system and power information has to be integrated.

So far, different techniques have been proposed in the literature in order to evaluate power. Some of them use power models which have been developed from either analytical or simulations results [START_REF] Hsu | PowerDepot: Integrating IP-based power modeling with ESL power analysis for multi-core SoC designs[END_REF][START_REF] Streubühr | ESL power and performance estimation for heterogeneous MPSOCS using SystemC[END_REF][START_REF] Rethinagiri | Hybrid system level power consumption estimation for FPGA-based MPSoC[END_REF]. In [START_REF] Bergamaschi | State-based power analysis for systems-on-chip[END_REF], power is estimated using power state machine (PSM). In [START_REF] Abdelli | High-Level Power Estimation of FPGA[END_REF] a methodology is presented to estimate power of FPGA designs using power models that are available at different levels of description.

Estimating power using macro-models is another solution described in [START_REF] Damasevicius | Estimation of Power Consumption at Behavioral Modeling Level Using SystemC[END_REF] where SystemC is used to model the system while macro-models link power consumption values to signals'

The International Conference on WIreless Technologies embedded and intelligent Systems ENSA of Fez 29-30 April 2015 Fig. 1. Introduction of the scenario-level statistics. A tool called ORINOCO is also used in [START_REF] Reimer | Modelling Macromodules for High-Level Dynamic Power Estimation of FPGA-based Digital Designs[END_REF] for the macro-modelling of fine-grain components such as adders, multipliers. This tool finally performs a high-level power estimation of small combinatorial designs.

Most of the approaches that have been described previously are addressing high-level system modelling and simulation. These studies make it possible to estimate more or less accurately the power of a system. We can also notice that there is always a trade-off between guaranteeing a fast simulation and estimating the power accurately.

At low-level, power estimation is usually time-consuming and not adapted to large and complex systems. However, the power estimation is relatively accurate due to detailed information about the system. At high level, power estimation may be a hard task to perform due to the lack of information. Power can be estimated from analytical power models or from results coming from the literature. Although very interesting in practice, these results may not be well adapted to the design of large complex systems since available studies are generally performed on specific targets and are not easily scalable. Several approaches require dedicated tools to realize the design implementation of an system in order to estimate the power consumption accurately. This prevents an efficient design space exploration.

From our knowledge, there is also a lack of high-level tools that enable to perform an efficient comparison between several configurations of FPGA-based systems in terms of power consumption, especially in the wireless communication domain. To circumvent these issues, we propose a new methodology, dedicated to FPGA-based wireless communication designs, striving to provide the following key points:

 Provide fast feedback of accurate power estimations from low level components to the behavioural level.  Introduce the notion of scenario which enables to efficiently compare several algorithms

III. METHODOLOGY

Our proposed approach aims to rapidly provide accurate power estimations of an entire system only by focusing on each sub-element. This approach is performed in two steps: an IP characterisation phase and a global system modelling using SystemC.

The proposed methodology is also based on the definition of an additional scenario-level as described in the fig. 1. This level has been thought to facilitate the comparison of applications in the wireless communication domain in terms of performances and power consumption. Since it constitutes the first step in the design flow, designers may rapidly explore design choices for a FPGA target without entering the classic implementation flow that is often time consuming and error prone. With this approach, designers can easily compare various algorithms and validate hardware choices prior the implementation phase.

A. IP Characterisation

In the proposed approach, we made the assumption that a system can be fully represented by a set of high-level models connected to each other. Each model in the library consists of several hardware IP configurations (Ci) (i from 1 to n)

The International Conference on WIreless Technologies embedded and intelligent Systems ENSA of Fez 29-30 April 2015 corresponding to a given set of parameters (data width, clock frequency, etc.). For each Ci configuration, the library holds the corresponding synthesized RTL description whereas the high-level model implements its behaviour. The RTL description may be expressed using a hardware description language such as VHDL or VERILOG or directly taken from a vendor library. In the latter case, each IP requires an additional controller in order to configure and manage it.

As depicted in fig. 2, each hardware IP, which corresponds to a specific parameterization of its high-level model, is then fully characterised by the different steps that constitute the design process. Design implementation is performed throughout the synthesis, mapping, place and route steps. Note that these steps are performed for a specific FPGA device that has a given number of resources and specific timing properties. In this study, we make use of the Xilinx ISE 14.4 tool. The implementation settings that can have a significant impact regarding the power estimations have been set to a standardlevel in order to limit hardware optimizations. Power and performances optimizations are not the primary objectives of the methodology but it provides relative estimation values to perform algorithmic comparison.

After the IP design implementation, a post Place And Route (PAR) VHDL simulation model is generated. This file provides accurate information about delays and timing based on the final netlist. Furthermore, glitches can be recorded during its simulation. At this step, a low level power analyzer is used such as XPower Analyzer (XPA) from Xilinx. ModelSim 10.1c [START_REF]Mentor Graphics Website[END_REF] is used as simulator and generates the activity file (Value Change Dump file .vcd or .saif file) capturing all internal signal activities. Test-benches are configured according to the userdefined input parameters and generate appropriate signals in order to record the internal activity when the IP is active and when the IP is idle.

During the simulation, we consider input patterns which are either, randomly generated binary data, or typical data. The XPA tool delivers average power consumption estimation that is composed of several terms as described by equation 1: P DYNAMIC_IP = P CLOCK _ IP + P LOGIC_IP +P SIGNAL_IP + P I/Os_IP + P BRAMS_IP + P DSP_IP  With P CLOCK _ IP the average power consumed by the clock network (including buffer and routing resources), P LOGIC_IP the average power consumed by all CLBs, Configurable Logic Blocks (including LUTs, FFs), P SIGNAL_IP the average power consumed by the interconnect, P I/Os_IP the average power consumed by input/output pins (which may be suppress when considering internal IP), P BRAMS_IP and P DSP_IP the average powers consumed by specific memory and Digital Signal Processing (DSP) blocks respectively.

Note that the characterisation phase has to be performed ideally for each configuration of an IP and for a specific device. In practice, only a set of configurations is actually available in the library that already contains tenths of cores. To reduce the number of configurations to analyze, a current work aims to extrapolate the results from specific IP configurations to build a more global model by studying the trend of the power consumption according to several criteria (data size, frequency, IP specific parameters, etc.). In this way, designers will have the possibility to explore a large design space based on a minimum set of tests. Furthermore, the IP characterisation time effort is relatively moderate due to the automation of the design process with scripts. It is also possible for designers to use these scripts in order to estimate the power consumption of a custom IP configuration and then extend the library.

B. System Modelling using SystemC

During the second step of the proposed methodology, the system is entirely modeled using SystemC. We choose this library for the considerations mentioned in section II.

For each hardware IP, we have developed the corresponding high-level model with respect to its intrinsic parameters. Moreover, all of the high-level models were built around a specific implementation model which is generic and common to all components. The implementation model is composed of a control path and a data path.

Regarding the data path, the IP functionality is basically described at the algorithmic level, in SystemC. When no detailed information is available, this description only relies on an usual representation of the IP functionality. However, an interesting feature of SystemC is that it supports both floating point and fixed point data representation. Moreover, some IP vendors also provide bit-accurate C models of their hardware IPs. They can be easily integrated into high-level models in order to provide bit-accurate results. In this way, it allows designers to evaluate the impact of data quantization choices through bit-accurate simulations.

Each IP control path is modeled as a Finite State Machine (FSM). The FSM states evolve in function of both input control signals and user-defined IP configuration parameters. They deliver output control signals that can be connected to the inputs of the associated high-level models. Note that, no implementation details are required because we only focus on the IP behaviour which is generally governed by few key signals (clock enable, input data valid signal etc.). Basically, such information is available directly from IP data-sheets. By the introduction of key signals, cycle accurate behaviour can be modeled.

An additional module called 'Power Monitor' has been devised, which aims to compute the time-activity coefficients of every IP in the system. These coefficients represent the percentage of time during which the IPs are processing data or are in an idle state. They are computed according to the evolution of the control signals along the behavioural simulation.

Finally, the dynamic power consumption of the entire system can be estimated by considering the power contribution of each IP that constitutes the system. This contribution has been quantitatively measured in the first step of the methodology and modulated according to the IP activity that has been measured in the second step during the high-level simulation.

The International

IV. USE CASES

In order to illustrate the use of the proposed methodology, we have developed a Single-Input Single-Output (SISO) OFDM communication chain in VHDL, depicted in fig. 3. It is a typical wireless communication scheme based on OFDM (Orthogonal Frequency Division Multiplexing) modulation which is a widely used modulation technique for transmitting data over wireless channels. The information is spread over several orthogonal sub-carriers at low data rate which makes transmission very robust to multipath fading. For example, OFDM is currently used in LTE or WiMAX technologies.

The transmitter is composed of a source which provides binary data to send. Data can be sent to the channel encoder if it is used or immediately processed by the QAM modulator. It aims to deliver complex I/Q QAM symbols according to the input binary symbols. The modulator supports QPSK, 16QAM and 64QAM modulations. The following module is called Carrier Mapper. It aims to allocate modulated symbols to the corresponding sub-carriers. Indeed, as in real systems, all of the sub-carriers are not used and can be canceled in order to avoid degradations in the corner band for example. Then, an OFDM modulation is performed using IFFT and a cyclic prefix is added. Output OFDM symbols from IFFT can be scaled by the DAC-Scaling module according to the Digital-to-Analog converter resolution. The last block of the transmitter realizes the time pilot insertion which will enable channel estimation at the receiver side.

The receiver performs the dual operation starting with removing the cyclic prefix and ADC data scaling. Then, FFT is computed and carrier un-mapping only keeps the data subcarriers. Finally, channel estimation is performed on every dedicated OFDM pilot symbol and then data sub-carriers are equalized according to channel coefficients. QAM demodulation is then performed to retrieve the binary data and channel turbo decoding can be performed if it is used.

All the communication chain was described in VHDL and some blocks are IP cores were taken from Xilinx. The chain is highly configurable in function of user-defined scenario. In this way, both hardware-specific and high-level parameters can be defined. As example, a user can set the data quantization (number of bits to represents the QAM complex symbols) of every modules, the Fast Fourier transform size, the modulation, the type of frame, the FPGA target, the frequency etc. Several parameters of interest were defined and 3 applications were implemented and then tested. They are summarized in Table I.

After applying the proposed methodology, average dynamic power consumption results have been obtained for the 3 applications. Estimations from our methodology are compared with XPA estimations for the entire design. Results are given in Table II and correspond to the average power estimations without considering IOs dynamic power and without dynamic power related to additional implementation buffers. Simulation length was set to 5ms.

Power estimations obtained with the proposed methodology are close to the overall power consumption. It demonstrates the effectiveness of the proposed methodology according to three user-defined applications.

The results also underline the benefit of the definition of the scenario level. This level facilitates the comparison of different applications in terms of power consumption by determining the common parameters between them in a formal way. Depending on the user-defined choices, these parameters can be related to both hardware-oriented and/or higher level parameters.

Another key advantage of the proposed methodology is to provide very fast power estimation. As an example, the gatelevel simulation of the SISO-OFDM communication chain can take several hours or even days to simulate few milliseconds for one configuration whereas it only takes few seconds or minutes using the system model. The gain is even more important during design space exploration when several configurations have to be tested.

V. CONCLUSION AND FUTURE WORKS

In this article, we have shown that the proposed methodology makes it possible to compare various algorithms in terms of power consumption at high level of abstraction. Additionally, the modularity of SystemC also allows designers to simulate those different configurations and schemes and validate their behaviours. Finally, one of the benefits of our methodology consists in speeding up the algorithms comparison without requiring a time-consuming development of the overall system. The major point of the methodology consists in characterising each IP individually in terms of power consumption and to make the results available at high level to take in account the activity time that is imposed by the user scenario.

The characterisation effort is not prohibitive thanks to the automation of the design process using scripts and power consumption results are saved into a specific power library that may obviously be re-used by the designer.

As future work, we will focus on algorithm comparison of MISO-OFDM and MIMO-OFDM systems in terms of power consumption.

Specific considerations of performance metrics such as BER (Bit Error Rate), throughput will be under study. Different standards such as 3GPP Long-Term Evolution (LTE) are currently being investigated. Another perspective of study will be to model the power amplifiers and RF stages which play a significant role in the power consumption of wireless communication systems.

Fig. 2 .

 2 Fig. 2. IP Characterisation phase using XPower

Fig. 3 .

 3 Fig. 3. Scheme of the developed SISO-OFDM communication chain

TABLE I .

 I USER-DEFINED PARAMETERS FOR THE SISO-OFDM

		APPLICATIONS
	Scenario Parameters	Application 1	Application 2	Application 3
	Channel Coding Rate Code Block Size	NO	1/3 1024	1/3 1024
	QAM Modulation		QPSK
	(I)FFT Size	256	256	2048
	Cyclic Prefix Length (in QAM Symbols)	32	32	256
	Used Sub-carriers	256/256	256/256	2048/2048
	Data Quantization	10 bits	14 bits	14 bits
	Frame Type	1 OFDM symbol pilot every 10 OFDM symbols of data
	FPGA	Xilinx Virtex-6 LX240T
	Clock Frequency		50 MHz

TABLE II .

 II POWER ESTIMATION RESULTS OF THE 3 SISO-OFDM APPLICATIONS

The International Conference on WIreless Technologies embedded and intelligent Systems ENSA of Fez 29-30 April 2015

			Proposed Methodology (mW)	XPower (mW)	Abs. Error (%)
	Application 1	TX	49.65	50.97	2.66
		RX	71.54	69.59	2.8
	Application 2	TX	68.76	65.48	5
		RX	266.84	263.52	1.26
	Application 3	TX	100.04	98.73	1.32
		RX	308.11	308.38	0.1


Jean Auriol

Florent Di Meglio

Minimum time control of heterodirectional linear coupled hyperbolic PDEs

We solve the problem of stabilizing a general class of linear first-order hyperbolic systems. Considered systems feature an arbitrary number of coupled transport PDEs convecting in either direction. Using the backstepping approach, we derive a full-state feedback law and a boundary observer enabling stabilization by output feedback. Unlike previous results, finitetime convergence to zero is achieved in the theoretical lower bound for control time.

I. INTRODUCTION

This article solves the problem of boundary stabilization of a general class of coupled heterodirectional linear firstorder hyperbolic systems of Partial Differential Equations (PDEs) in minimum time, with arbitrary numbers m and n of PDEs in each direction and with actuation applied on only one boundary.

First-order hyperbolic PDEs are predominant in modeling of traffic flow [START_REF] Amin | On stability of switched linear hyperbolic conservation laws with reflecting boundaries[END_REF], heat exchanger [START_REF] Xu | Exponential stability and transfer functions of processes governed by symmetric hyperbolic systems[END_REF], open channel flow [START_REF] Coron | A lyapunov approach to control irrigation canals modeled by saintvenant equations[END_REF], [START_REF] De Halleux | Boundary feedback control in networks of open channels[END_REF] or multiphase flow [START_REF] Di | Dynamics and control of slugging in oil production[END_REF], [START_REF] Djordjevic | Boundary actuation structure of linearized two-phase flow[END_REF], [START_REF] Dudret | Stability and asymptotic observers of binary distillation processes described by nonlinear convection/diffusion models[END_REF]. Research on controllability and stability of hyperbolic systems have first focused on explicit computation of the solution along the characteristic curves in the framework of the C1 norm [START_REF] James | The effect of boundary damping for the quasilinear wave equation[END_REF], [START_REF] Li | Global classical solutions for quasilinear hyperbolic systems[END_REF], [START_REF] Hu | Global smooth solutions of dissipative boundary-value problems for 1st order quasilinear hyperbolic systems[END_REF]. Later, Control Lyapunov Functions methods emerged, enabling the design of dissipative boundary conditions for nonlinear hyperbolic systems [START_REF] Coron | Control and nonlinearity[END_REF], [START_REF] Coron | Dissipative boundary conditions for one-dimensional nonlinear hyperbolic systems[END_REF]. In [START_REF] Coron | Local exponential hˆ2 stabilization of a 2\times2 quasilinear hyperbolic system using backstepping[END_REF] control laws for a system of two coupled nonlinear PDEs are derived, whereas in [START_REF] Castillo Buenaventura | Dynamic boundary stabilization of hyperbolic systems[END_REF], [START_REF] Coron | Dissipative boundary conditions for one-dimensional nonlinear hyperbolic systems[END_REF], [START_REF] Prieur | Iss-lyapunov functions for time-varying hyperbolic systems of balance laws[END_REF], [START_REF] Prieur | Robust boundary control of systems of conservation laws[END_REF], [START_REF] Valérie | Boundary control of open channels with numerical and experimental validations[END_REF] sufficient conditions for exponential stability are given for various classes of quasilinear first-order hyperbolic system. These conditions typically impose restrictions on the magnitude of the coupling coefficients.

In [START_REF] Vazquez | Backstepping boundary stabilization and state estimation of a 2× 2 linear hyperbolic system[END_REF] a backstepping transformation is used to design a single boundary output-feedback controller. This control law yields H2 exponential stability of closed loop 2-state heterodirectional linear and quasilinear hyperbolic system for arbitrary large coupling coefficients. A similar approach is used in [START_REF] Di Meglio | Stabilization of a system of coupled first-order hyperbolic linear pdes with a single boundary input, Automatic Control[END_REF] to design output feedback laws for a system of coupled first-order hyperbolic linear PDEs with m = 1 controlled negative velocity and n positive ones. The generalization of this result to an arbitrary number m of controlled negative velocities is presented in [START_REF] Hu | Control of homodirectional and general heterodirectional linear coupled hyperbolic pdes[END_REF]. There, the proposed control law yields finite-time convergence to zero, but the convergence time is larger than the minimum control florent.di meglio@mines-paristech.fr time, derived in [START_REF] Li | Strong (weak) exact controllability and strong (weak) exact observability for quasilinear hyperbolic systems[END_REF], [START_REF] Woittennek | Flatness based trajectory planning for a semi-linear hyperbolic system of first order pde modeling a tubular reactor[END_REF]. This is due to the presence of nonlocal coupling terms in the targeted closed-loop behavior.

The main contribution of this paper is a minimum time stabilizing controller. More precisely, a proposed boundary feedback law ensures finite-time convergence of all states to zero in minimum-time. This minimum-time, defined in [START_REF] Li | Strong (weak) exact controllability and strong (weak) exact observability for quasilinear hyperbolic systems[END_REF], [START_REF] Woittennek | Flatness based trajectory planning for a semi-linear hyperbolic system of first order pde modeling a tubular reactor[END_REF] is the sum of the two largest time of transport in each direction.

Our approach is the following. Using a backstepping approach (with a Volterra transformation) the system is mapped to a target system with desirable stability properties. This target system is a copy of the original dynamics with a modified in-domain coupling structure. More precisely, the target system is designed as an exponentially stable cascade. A full-state feedback law guaranteeing exponential stability of the zero equilibrium in the L 2 -norm is then designed. This full-state feedback law requires full distributed measurements. For this reason we derive a boundary observer relying on measurements of the states at a single boundary (the anti-collocated one). Similarly to the control design, the observer error dynamics are mapped to a target system using a Volterra transformation. Along with the full-state feedback law, this yields an output feedback controller amenable to implementation.

The main technical difficulty of this paper is to prove wellposedness of the Volterra transformation. Interestingly, the transformation kernels satisfy a system of equations with a cascade structure akin to the target system one. This structure enables a recursive proof of existence of the transformation kernels.

The paper is organized as follows. In Section II we introduce the model equations and the notations. In Section III we present the stabilization result: the target system and its properties are presented in Section III-A. In Section III-B we derive the backstepping transformation. Section IV contains the main technical difficulty of this paper which is the proof of well-posedness of the kernel equations. In Section IV-A we transform the kernel equations into an integral equation using the method of characteristics. In Section IV-B we solve the integral equations using the method of successive approximations. In Section V we present the control feedback law and its properties. In Section VI we present the uncollocated observer design. In Section VII we give some simulation results. Finally in Section VIII we give some concluding remarks

II. PROBLEM DESCRIPTION

A. System under consideration

We consider the following general linear hyperbolic system

u t (t, x) + Λ + u x (t, x) = Σ ++ u(t, x) + Σ +-v(t, x) (1) v t (t, x) -Λ -v x (t, x) = Σ -+ u(t, x) + Σ --v(t, x) (2)
with the following linear boundary conditions

u(t, 0) = Q 0 v(t, 0), v(t, 1) = R 1 u(t, 1) + U (t) (3)
where

u = (u 1 . . . u n ) T , v = (v 1 . . . v m ) T (4)
Λ + =    λ 1 0 . . . 0 λ n    , Λ -=    µ 1 0 . . . 0 µ m    (5)
with constant speeds :

-µ m < • • • < -µ 1 < 0 < λ 1 ≤ • • • ≤ λ n (6)
and constant coupling matrices as well as the feedback control input

Σ ++ = {σ ++ ij } 1≤i≤n,1≤j≤n Σ +-= {σ +- ij } 1≤i≤n,1≤j≤m (7)
Σ -+ = {σ -+ ij } 1≤i≤m,1≤j≤n Σ --= {σ -- ij } 1≤i≤m,1≤j≤m (8)
Q 0 = {q ij } 1≤i≤n,1≤j≤m R 1 = {ρ ij } 1≤i≤m,1≤j≤n (9)

B. Control problem

The goal is to design feedback control inputs U (t) = (U 1 (t), . . . , U m (t)) T such that the zero equilibrium is reached in minimum time t = t F , where

t F = 1 µ 1 + 1 λ 1 (10)

III. CONTROL DESIGN

The control design is based on the backstepping approach: using a Volterra transformation, we map the system (1)-(3) to a target system with desirable properties of stability.

A. Target system 1) Target system design: We map the system (1)-(3) to the following system α t (t, x) + Λ + α x (t, x) = Σ ++ α(t, x) + Σ +-β(t, x)

+ x 0 C + (x, ξ)α(t, ξ)dξ + x 0 C -(x, ξ)β(t, ξ)dξ (11) β t (t, x) -Λ -β x (t, x) = Ω(x)β(t, x) (12)
with the following boundary conditions

α(t, 0) = Q 0 β(t, 0) β(t, 1) = 0 (13)
where C + and C -are L ∞ matrix functions on the domain

T = {0 ≤ ξ ≤ x ≤ 1} (14)
while Ω ∈ L ∞ (0, 1) is an upper triangular matrix with the following structure

Ω(x) =       ω 1,1 (x) ω 1,2 (x) . . . ω 1,m (x) 0 . . . . . . . . . . . . . . . ω m-1,m-1 (x) ω m-1,m (x) 0 . . . 0 ω m,m (x)       (15)
This system is designed as a copy of the original dynamics, from which the coupling terms of (2) are removed. The integral coupling appearing in [START_REF] Dudret | Stability and asymptotic observers of binary distillation processes described by nonlinear convection/diffusion models[END_REF] are added for the control design but don't have any incidence on the stability of the target system.

Lemma 1: The zero equilibrium of ( 11), [START_REF] James | The effect of boundary damping for the quasilinear wave equation[END_REF] with boundary conditions [START_REF] Hochstadt | Integral equations[END_REF] and initial conditions (α 0 , β 0 ) ∈ L 2 ([0, 1]) is exponentially stable in the L 2 sense Proof: Consider the following candidate Lyapunov functional :

V (t) = 1 0 e -δx n i=1 α i (t, x) 2 λ i + le δx n i=1 β i (t, x) 2 µ i dx (16)
where l > 0 and δ > 0 are parameters to be determined. One should notice that √ V is equivalent to the L 2 norm. After differentiating V with respect to time and integrating by part we get :

V (t) = [-e -δx α(t, x) T α(t, x) + le δx β(t, x) T β(t, x)] 1 0 - 1 0 δe -δx α(t, x) T α(t, x)dx - 1 0 lδe δx β(t, x) T β(t, x)dx + 2 1 0 e -δx α(t, x) T (Λ + ) -1 Σ ++ α(x, t)dx + 2 1 0 e -δx α(t, x) T (Λ + ) -1 Σ +-β(t, x)dx + 2 1 0 x 0 e -δx α(t, x) T (Λ + ) -1 C + (x, ξ)α(t, ξ)dξdx + 2 1 0 x 0 e -δx α(t, x) T (Λ + ) -1 C -(x, ξ)β(t, ξ)dξdx + 2l 1 0 e δx β(t, x) T (Λ -) -1 Ω(x)β(t, x)dx (17) Let M > 0, ||q|| and > 0 be such that ∀i = 1, . . . , n ∀j = 1, . . . , n ∀k = 1, . . . , m ∀l = 1, . . . , m ∀x ∈ [0, 1] Σ ++ ij , Σ +- ik , C + ij , C - ik , Ω kl (x) < M ∀i = 1, . . . , n λ i > and µ i > ||q|| = max i=1,...,m,j=1,...,m q ij
Using Young's and Cauchy-Schwarz inequalities and the boundary conditions yields

V (t) ≤ β(t, 0) T (Q T 0 Q 0 -lI m×m )β(t, 0) - 1 0 e -δx α(t, x) T P α(t, x)dx - 1 0 le δx β(t, x) T Q(x)β(t, x)dx (18) with P = (δ - 2mM - nM - M n δ )I n×n -2(Λ + ) -1 Σ ++ and Q(x) = δ - pnM l e -δx - M n lδ e -δx I m×m - 2(Λ -) -1 Ω(x). Choosing l such that l > m||q|| ensures that β(t, 0) T (Q T 0 Q 0 -lI m×m )β(t, 0) ≤ sβ(t, 0) T β(t, 0
) for some s < 0. Taking δ large enough ensures that Q(x) and P are positive definite for all x ∈ [0, 1]. This concludes the proof Besides, the following lemma assesses the finite-time stability of the target system.

Lemma 2: The system (11), ( 12) reaches its zero equilib-

rium in finite-time t F = 1 µ 1 + 1 λ 1 Proof:
The proof of this lemma is straightforward using the proof of [START_REF] Hu | Control of homodirectional and general heterodirectional linear coupled hyperbolic pdes[END_REF]Lemma 3.1] 2) Volterra Transformation: In order to map the original system (1)-( 3) to the target system ( 11)-( 13), we use the following Volterra transformation

α(t, x) = u(t, x) (19) β(t, x) = v(t, x) - x 0 (K(x, ξ)u(ξ) + L(x, ξ)v(ξ))dξ (20)
where the kernels K and L, defined on

T = {(x, ξ) ∈ [0, 1] 2 |ξ ≤
x} have yet to be defined. Differentiating [START_REF] Hu | Global smooth solutions of dissipative boundary-value problems for 1st order quasilinear hyperbolic systems[END_REF] with respect to space and using the Leibniz rule yields

β x (t, x) = v x (t, x) -K(x, x)u(t, x) -L(x, x)v(t, x) - x 0 K x (x, ξ)u(t, ξ) + L x (x, ξ)v(t, ξ)dξ (21)
Differentiating with respect to time, using ( 1), ( 2) and integrating by parts yields

β t (t, x) = Λ -v x (t, x) + Σ -+ u(t, x) + Σ --v(t, x) - x 0 K(x, ξ)Σ ++ u(t, ξ) + K(x, ξ)Σ +-v(t, ξ) + L(x, ξ)Σ -+ u(t, ξ) + L(x, ξ)Σ --v(t, ξ) dξ + K(x, x)Λ + u(t, x) -K(x, 0)Λ + u(t, 0) -L(x, x)Λ -v(t, x) + L(x, 0)Λ -v(t, 0) - x 0 K ξ (x, ξ)Λ + u(t, ξ) -L ξ (x, ξ)Λ -v(t, ξ) dξ (22)
Plugging those expressions into the target system ( 19)-( 20), noticing that β(t, 0) = v(t, 0) and using the corresponding boundary conditions (3) yields the following system of kernel equations

0 =Σ -+ + K(x, x)Λ + + Λ -K(x, x) (23) 0 =Σ --+ Λ -L(x, x) -L(x, x)Λ --Ω(x) (24) 0 =K(x, 0)Λ + Q 0 -L(x, 0)Λ - (25) 0 =Λ -K x (x, ξ) -K ξ (x, ξ)Λ + -K(x, ξ)Σ ++ -L(x, ξ)Σ -+ + Ω(x)K(x, ξ) (26) 0 =Λ -L x (x, ξ) + L ξ (x, ξ)Λ --L(x, ξ)Σ -- -K(x, ξ)Σ +-+ Ω(x)L(x, ξ) (27)
We get the following equations for C -(x, ξ) and

C + (x, ξ) C -(x, ξ) = Σ +-L(x, ξ) + x ξ C -(x, s)L(s, ξ)ds (28) C + (x, ξ) = Σ +-K(x, ξ) + x ξ C -(x, s)K(s, ξ)ds (29)
Remark 1: One can notice that for each x ∈ [0, 1], equation ( 28) is a Volterra equation on [0, x] where C -(x, •) is the unknown. Assuming that K and L are well defined and bounded, so is C -. Using (29) yields explicitly C + as a function of C -and K.

Developing equation ( 23)-( 27) we get the following set of kernel PDEs :

for 1 ≤ i ≤ m, 1 ≤ j ≤ n µ i ∂ x K ij (x, ξ) -λ j ∂ ξ K ij (x, ξ) = n k=1 σ ++ kj K ik (x, ξ) + m p=1 σ -+ pj L ip (x, ξ) - i≤p≤m K pj (x, ξ)ω ip (x) (30) for 1 ≤ i ≤ m, 1 ≤ j ≤ m µ i ∂ x L ij (x, ξ) + µ j ∂ ξ L ij (x, ξ) = m k=1 σ -- kj L ik (x, ξ) + n p=1 σ +- pj K ip (x, ξ) - i≤p≤m L pj (x, ξ)ω ip (x) (31)
with the following set of boundary conditions

∀1 ≤ i ≤ m, ∀1 ≤ j ≤ n, K ij (x, x) = - σ -+ ij µ i + λ j = k ij (32) ∀1 ≤ i, j ≤ m, j < i L ij (x, x) = -σ -- ij µ i -µ j (33) ∀1 ≤ i, j ≤ m, µ j L ij (x, 0) = n k=1 λ k K ik (x, 0)q kj (34)
Besides, [START_REF] Beresford | Linear and nonlinear waves[END_REF] imposes

∀i ≤ j ω ij (x) = (µ i -µ j )L ij (x, x) + σ -- ij (35)
This induces a coupling between the kernels through equations (30) and (31) that could appear as non linear at first sight. However, as it will appear in the proof of the following theorem, the coupling has a linear cascade structure. More precisely, the well-posedness of the target system is assessed in the following theorem. Theorem 1: Consider system (30)-(34). There exists a unique solution K and L in L ∞ (T ). The proof of this theorem is described in the following section and uses the cascade structure of the kernel equations (which is due to the particular shape of the matrix Ω).

IV. WELL-POSEDNESS OF THE KERNEL EQUATION

To prove the well-posedness of the kernel equations we classically (see [START_REF] John | Continuous dependence on data for solutions of partial differential equations with a prescribed bound[END_REF] and [START_REF] Beresford | Linear and nonlinear waves[END_REF]) transform the kernel equations into integral equations and use the method of successive approximations.

By induction, let us consider the following property P (s) defined for all 1 ≤ s ≤ m :

∀ m + 1 -s ≤ i ≤ m the problem (30)-(34)
where Ω is defined by (35) has a unique solution K, L ∈ L ∞ (T ).

Initialization : For s = 1, system (30)-(34) rewrites as follow for 1 ≤ j ≤ n µ m ∂ x K mj -λ j ∂ ξ K mj = n k=1 σ ++ kj K mk (x, ξ) + m p=1 σ -+ pj L mp (x, ξ) -K mj (x, ξ)σ -- mm (36) for 1 ≤ j ≤ m µ m ∂ x L mj + µ j ∂ ξ L mj = m k=1 σ -- kj L mk (x, ξ) + n p=1 σ +- pj K mp (x, ξ) -L mj (x, ξ)σ -- mm (37)
with the following set of boundary conditions

∀1 ≤ j ≤ n, K mj (x, x) = - σ -+ mj µ m + λ j = k 1j (38) ∀1 ≤ j < m, L mj (x, x) = - σ -- mj µ m -µ j (39) ∀1 ≤ j ≤ m, µ j L 1j (x, 0) = n k=1 λ k K 1k (x, 0)q kj (40)
The well-posedness of such system has been proved in [START_REF] Di Meglio | Stabilization of a system of coupled first-order hyperbolic linear pdes with a single boundary input, Automatic Control[END_REF].

Induction : Let us assume that the property P (s -1)

(1 < s ≤ m -1) is true. We consequently have that ∀ m + 2 -s ≤ p ≤ m, ∀ 1 ≤ j ≤ n, ∀ 1 ≤ l ≤ m K pj (•, •) and L pl (•,
•) are bounded. In the following we take i = m + 1 -s. We now show that (30)-( 34) is well-posed and that

K ij (•, •) and L il (•, •) ∈ L ∞ (T )
A. Method of characteristics 1) Characteristics of the K kernels: For each 1 ≤ j ≤ n and (x, ξ) ∈ T , we define the following characteristic lines

(x ij (x, ξ, •), ξ ij (x, ξ, •)) corresponding to equation (30) dx ij ds (x, ξ, s) = -µ i s ∈ [0, s F ij (x, ξ)] x ij (x, ξ, 0) = x, x ij (x, ξ, s F ij (x, ξ)) = x F ij (x, ξ) (41)
dξ ij ds (x, ξ, s) = λ j s ∈ [0, s F ij (x, ξ)] ξ ij (x, ξ, 0) = ξ, ξ ij (x, ξ, s F ij (x, ξ)) = x F ij (x, ξ) (42)
These lines originate at the point (x, ξ) and terminate on the hypothenuse at the point (x F ij (x, ξ), x F ij (x, ξ)). Integrating (30) along these characteristics and using the boundary conditions (32) we get

K ij (x, ξ) = k ij + s F ij (x,ξ) 0 n k=1 σ ++ kj K ik (x ij (x, ξ, s), ξ ij (x, ξ, s)) + m k=1 σ -+ kj L ik (x ij (x, ξ, s), ξ ij (x, ξ, s)) - i≤p≤m K pj (x ij (x, ξ, s), ξ ij (x, ξ, s)) ((µ i -µ p )L ip (x ij (x, ξ, s), x ij (x, ξ, s)) + σ -- ip ) ds (43)
We can notice that the last sum uses the expression of K pj for i ≤ p ≤ m. This term is known and bounded for p > i (hypothesis of induction). For p = i, µ i = µ p and the term

(µ i -µ p )L ip (x ij (x, ξ, s), x ij (x, ξ, s) cancels.
2) Characterisitcs of the L kernels: For each 1 ≤ j ≤ n and (x, ξ) ∈ T , we define the following characteristic lines

(χ ij (x, ξ, •), ζ ij (x, ξ, •)) corresponding to equation (31) dχ ij dν (x, ξ, s) = -µ i ν ∈ [0, ν F ij (x, ξ)] χ ij (x, ξ, 0) = x, χ ij (x, ξ, ν F ij (x, ξ)) = χ F ij (x, ξ) (44)
dζ ij dν (x, ξ, s) = -µ j ν ∈ [0, ν F ij (x, ξ)] ζ ij (x, ξ, 0) = ξ, ζ ij (x, ξ, ν F ij (x, ξ)) = ζ F ij (x, ξ) (45)
These lines all originates from (x, ξ) and terminate at the point (χ F ij (x, ξ), ζ F ij (x, ξ)), i.e either at (χ F ij (x, ξ), χ F ij (x, ξ)) or at (χ F ij (x, ξ), 0). Integrating (31) along these characteristic and using the boundary conditions (33), (34) yields

L ij (x, ξ) = -δ ij (x, ξ) σ -- ij µ i -µ j + (1 -δ ij ) 1 µ j n k=1 λ k q kj K ik (χ F ij (x, ξ), 0) + ν F ij (x,ξ) 0 m p=1 σ -- pj L ip (χ ij (x, ξ, ν), ζ ij (x, ξ, ν)) + n k=1 σ +- kj K ik (χ ij (x, ξ, ν), ζ ij (x, ξ, ν)) - i≤p≤m L pj (χ ij (x, ξ, ν), ζ ij (x, ξ, ν)) ((µ i -µ p )L ip (χ ij (x, ξ, ν), χ ij (x, ξ, ν)) + σ -- ip ) dν (46)
where the coefficient δ ij (x, ξ) is defined by

δ i,j (x, ξ) = 1 if j < i and µ i ξ -µ j x ≥ 0 0 else (47)
This coefficient reflects the facts that, as mentioned above, some characteristics terminate on the hypothenuse and others on the axis ξ = 0. We can now plug (43) evaluated at (χ F ij (x, ξ), 0) into (46) which yields

L ij (x, ξ) = -δ ij (x, ξ) σ -- ij µ i -µ j +(1-δ ij ) 1 µ j n k=1 λ k q kj k ik +(1-δ ij ) 1 µ j n r=1 λ r q rj s F ir (χ F ij (x,ξ),0) 0 n k=1 σ ++ kr K ik (x ir (χ F ij (x, ξ), 0, s), ξ ir (χ F ij (x, ξ), 0, s)) + m k=1 σ -+ kr L ik (x ir (χ F ij (x, ξ), 0, s), ξ ir (χ F ij (x, ξ), 0, s)) - i≤p≤m K pr (x ir (χ F ij (x, ξ), 0, s), ξ ir (χ F ij (x, ξ), 0, s)) ((µ i -µ p )L ip (x ij ((χ F ij (x, ξ), 0, s), x ij ((χ F ij (x, ξ), 0, s))+σ -- ip ) ds + ν F ij (x,ξ) 0 m p=1 σ -- pj L ip (χ ij (x, ξ, ν), ζ ij (x, ξ, ν)) + n k=1 σ +- kj K ik (χ ij (x, ξ, ν), ζ ij (x, ξ, ν)) - i≤p≤m L pj (χ ij (x, ξ, ν), ζ ij (x, ξ, ν)) ((µ i -µ p )L ip (χ ij (x, ξ, ν), χ ij (x, ξ, ν)) + σ -- ip ) dν (48)

B. Method of successive approximations

In order to solve the integral equations ( 43), (48) we use the method of successive approximations. We define

∀1 ≤ j ≤ n φ 1 j (x, ξ) = k ij - s F ij (x,ξ) 0 i<p≤m K pj (x ij (x, ξ, s), ξ ij (x, ξ, s))σ -- ip (49) ∀1 ≤ j ≤ m φ 2 j (x, ξ) = -δ ij (x, ξ) σ -- ij µ i -µ j + (1 -δ ij ) 1 µ j n k=1 λ k q kj k ik -(1 -δ ij ) 1 µ j n r=1 λ r q rj s F ir (χ F ij (x,ξ),0) 0 i<p≤m K pr (x ir (χ F ij (x, ξ), 0, s), ξ ir (χ F ij (x, ξ), 0, s))σ -- ip - s F ij (x,ξ) 0 i<p≤m L pj (χ ij (x, ξ, ν), ζ ij (x, ξ, ν))σ -- ip (50)
Besides we denote H as the vector containing the kernels

H = K i1 . . . K in L i1 • • • L im (51) Ψ = φ 1 1 . . . φ 1 n φ 2 1 . . . φ 2 m ( 52
)
We now consider the following operators :

∀1 ≤ j ≤ n Φ 1 j (H)(x, ξ) = s F ij (x,ξ) 0 n k=1 σ ++ kj K ik (x ij (x, ξ, s), ξ ij (x, ξ, s)) + m k=1 σ -+ kj L ik (x ij (x, ξ, s), ξ ij (x, ξ, s)) - i<p≤m K pj (x ij (x, ξ, s), ξ ij (x, ξ, s)) ((µ i -µ j )L ip (x ij (x, ξ, s), x ij (x, ξ, s))) + σ -- ii K ij (x ij (x, ξ, s), ξ ij (x, ξ, s)) ds (53) ∀1 ≤ j ≤ m Φ 2 j (H)(x, ξ) = (1 -δ ij ) 1 µ j n r=1 λ r q rj s F ir (χ F ij (x,ξ),0) 0 n k=1 σ ++ kr K ik (x ir (χ F ij (x, ξ), 0, s), ξ ir (χ F ij (x, ξ), 0, s)) + m k=1 σ -+ kr L ik (x ir (χ F ij (x, ξ), 0, s), ξ ir (χ F ij (x, ξ), 0, s)) - i<p≤m K pr (x ir (χ F ij (x, ξ), 0, s), ξ ir (χ F ij (x, ξ), 0, s)) ((µ i -µ p )L ip (x ij ((χ F ij (x, ξ), 0, s), x ij ((χ F ij (x, ξ), 0, s))) -K ir (x ir (χ F ij (x, ξ), 0, s), ξ ir (χ F ij (x, ξ), 0, s))σ -- ii ds + ν F ij (x,ξ) 0 m p=1 σ -- pj L ip (χ ij (x, ξ, ν), ζ ij (x, ξ, ν)) + n k=1 σ +- kj K ik (χ ij (x, ξ, ν), ζ ij (x, ξ, ν)) - i<p≤m L pj (χ ij (x, ξ, ν), ζ ij (x, ξ, ν)) ((µ i -µ p )L ip (χ ij (x, ξ, ν), χ ij (x, ξ, ν))) -L ij (χ ij (x, ξ, ν), ζ ij (x, ξ, ν))σ -- ii dν (54) We set Φ[H](x, ξ) = [Φ 1 [H](x, ξ) T , Φ 2 [H](x, ξ) ]
We define the following sequence

H 0 (x, ξ) = 0 (55) H q (x, ξ) = Ψ(x, ξ) + Φ(H q-1 )(x, ξ) (56)
Consequently, if the sequence H q has a limit, then this limit is a solution of the integral equation and therefore of the original system. We define the increment ∆H q = H q -H q-1 (with ∆H 0 = Ψ). Provided the limit exists one has

H(x, ξ) = lim q→+∞ H q (x, ξ) = +∞ q=0 ∆H q (x, ξ) (57)
We now prove the convergence of the series. Remark 2: The proof of the convergence of the success approximations dries is similar to the one given in [START_REF] Di Meglio | Stabilization of a system of coupled first-order hyperbolic linear pdes with a single boundary input, Automatic Control[END_REF], since all the characteristic lines have the same direction along the x-axis.

C. Convergence of the successive approximation series

Similarly to [START_REF] Di Meglio | Stabilization of a system of coupled first-order hyperbolic linear pdes with a single boundary input, Automatic Control[END_REF], [START_REF] Hu | Control of homodirectional and general heterodirectional linear coupled hyperbolic pdes[END_REF] we want to find a recursive upper bound in order to prove the convergence of the series. We first define

Φ = max j max (x,ξ)∈T {|φ 1 i,j (x, ξ)|, |φ 2 ij (x, ξ)|} (58) σ = max k,j {σ ++ kj , σ +- kj , σ -+ kj , σ -- kj }, q = max k,j {q kj } μ = max p {|µ i -µ p |}, λ = max{λ n , µ n } λ = max{ 1 λ 1 , 1 µ 1 }, M λ = max j=1,...,m { 1 µ j }
We then define S = max p>i,1≤j≤n

{||K pj ||, ||L pj } which is well defined according to the hypothesis P (s -1). Moreover we set

M = (n λλ q + 1)[(n + m + 1)σ + mμ S]M λ (59)
We recall the following result from [9, Lemma 5.5] Lemma 3: For any integer q, (x, ξ) ∈ T and

s F ij (x, ξ), ν F ij (x, ξ), x ij (x, ξ, •), ξ ij (x, ξ, •), χ ij (x, ξ, •), ζ ij (x, ξ,
•) defined as in (41), ( 42), ( 44), (45) respectively, the following inequalities holds

∀1 ≤ k ≤ m, ∀1 ≤ j ≤ n s F kj (x,ξ) 0 (x kj (x, ξ, s)) q ds ≤ M λ x q+1 q (60) ∀1 ≤ k ≤ m, ∀1 ≤ j ≤ n ν F kj (x,ξ) 0 (χ ij (x, ξ, s)) q ds ≤ M λ x q+1 q (61)
Lemma 4: Assume that for some 1 ≤ q, one has, for all

(x, ξ) ∈ T ∀j = 1, ...m + n |∆H q j (x, ξ)| ≤ Φ M q x q q! (62)
where ∆H q j (x, ξ) is the j-th component of ∆H q (x, ξ). Then, one has

∀j = 1, ...m + n |∆H q+1 j (x, ξ)| ≤ Φ M q+1 x q+1 (q + 1)! (63)
Proof: Assume that (62) holds for some fixed 1 ≤ q. Let us consider 1 ≤ j ≤ (m + n).

Case j ≤ n |∆H q+1 j | = | s F ij (x,ξ) 0 n k=1 σ ++ kj ∆K q ik (x ij (x, ξ, s), ξ ij (x, ξ, s)) + m k=1 σ -+ kj ∆L q ik (x ij (x, ξ, s), ξ ij (x, ξ, s)) - i<p≤m K pj (x ij (x, ξ, s), ξ ij (x, ξ, s)) • (µ i -µ p )∆L q ip (x ij (x, ξ, s), x ij (x, ξ, s)) -∆K q ij (x ij (x, ξ, s), ξ ij (x, ξ, s))σ -- ii ds| (64)
Consequently, using (62) and ( 60)

|∆H q+1 j | ≤ s F ij (x,ξ) 0 ((n + m + 1)σ + m S μ) (65)
• Φ M q (x ij (x, ξ, s)) q q! ds ≤ ((n + m + 1)σ + m S μ) ΦM q q! M λ x q+1 q + 1 ≤ Φ M q+1 x q+1 (q + 1)! (66)
Case n < j ≤ n + m Using (62) we get

|∆H q+1 j | ≤ λλ q((n + m + 1)σ + m S μ) n r=1 • s F ir (χ F ij (x,ξ),0) 0 φ M q (x ir (χ F ij (x, ξ), 0, s)) q q! + ((n + m + 1)σ + m S μ) ν F ij (x,ξ) 0 Φ M q (χ ij ) q q! dν ≤ (n λλ q + 1)((n + m + 1)σ + m S μ) ΦM λ M q x q+1 (q + 1)! ≤ Φ M q+1 x q+1 (q + 1)! (67)
This concludes the proof Consequently, using similar procedures that the ones presented in [START_REF] Di Meglio | Stabilization of a system of coupled first-order hyperbolic linear pdes with a single boundary input, Automatic Control[END_REF], [START_REF] Vazquez | Local exponential h 2 stabilization of a 2× 2 quasilinear hyperbolic system using backstepping[END_REF], we get that (57) converges and thus the property P (s) is true. This concludes the proof by induction of Theorem 1.

V. CONTROL LAW AND MAIN RESULTS

We now state the main stabilization result as follows.

Theorem 2: System (1)-( 2) with boundary conditions (3) and the following feedback control law

U (t) = -R 1 u(t, 1) + 1 0 [K(1, ξ)u(t, ξ) + L(1, ξ)v(t, ξ)]dξ (68)
reaches its zero equilibrium in finite time t F = where t F is given by [START_REF] Djordjevic | Boundary actuation structure of linearized two-phase flow[END_REF]. The zero equilibrium is exponentially stable in the L 2 -sense.

Proof: Notice first that evaluating (20) at x = 1 yields (68). Besides, rewriting [START_REF] Hu | Global smooth solutions of dissipative boundary-value problems for 1st order quasilinear hyperbolic systems[END_REF] as follows

α(t, x) β(t, x) = u(t, x) v(t, x) - x 0 0 0 K(x, ξ) L(x, ξ) u(t, ξ) v(t, ξ) dξ (69)
It is a classical Volterra equation of the second kind. One can check from [START_REF] Hochstadt | Integral equations[END_REF] that there exists a unique function S such that

u(t, x) v(t, x) = α(t, x) β(t, x) - x 0 S(x, ξ) α(t, ξ) β(t, ξ) (70)
Applying Lemma 2 implies that (α, β) go to zero in finite time t F , therefore (u, v) converge to zero in finite time Remark 3: The time of convergence t F is smaller than the one given in [START_REF] Hu | Control of homodirectional and general heterodirectional linear coupled hyperbolic pdes[END_REF]. Nevertheless we have lost here some degrees of freedom in the kernel equations and thus in the controller gains.

VI. UNCOLLOCATED OBSERVER DESIGN AND OUTPUT FEEDBACK CONTROLLER

In this section we design an observer that relies on the measurements of v at the left boundary, i.e we measure

y(t) = v(t, 0) (71)
Then, using the estimates given by our observer and the control law (68), we derive an output feedback controller.

A. Observer design

The observer equations read as follows ût (t, x) + Λ + ûx (t, x) =Σ ++ û(t, x) + Σ +-v(t, x)

-P + (x)(v(t, 0) -v(t, 0)) (72) vt (t, x) + Λ -vx (t, x) =Σ -+ û(t, x) + Σ --v(t, x) -P -(x)(v(t, 0) -v(t, 0)) (73)
with the boundary conditions

û(t, 0) = Q 0 v(t, 0), v(t, 1) = R 1 û(t, 1) + U (74)
where P + (•) and P -(•) have yet to be designed. This yield the following error system ũt (t, x) + Λ + ũx (t, x) =Σ ++ ũ(t, x) + Σ +-ṽ(t, x) -P + (x)ṽ(t, 0) (75) ṽt (t, x) + Λ -ṽx (t, x) =Σ -+ ũ(t, x) + Σ --ṽ(t, x)

-P -(x)ṽ(t, 0) (76)
with the boundary conditions

ũ(t, 0) = 0, ṽ(t, 1) = R 1 ũ(t, 1) (77)
B. Target system We map the system (75)-(77) to the following system αt (t, x) + Λ + αx (t, x) = Σ ++ α(t, x)

+ x 0 D + (x, ξ)α(t, ξ)dξ (78) βt (t, x) -Λ - βx (t, x) = Σ -+ α(t, x) + Ω(x)β(t, x) + x 0 D -(x, ξ) α(t, ξ)dξ (79)
with the following boundary conditions

α(t, 0) = 0, β(t, 1) = R 1 α(t, 1) (80)
where D + , and D -are L ∞ matrix functions of the domain T and Ω ∈ L ∞ (0, 1) is an upper triangular matrix with the following structure

Ω(x) =       ω 1,1 (x) ω 1,2 (x) . . . ω 1,m (x) 0 . . . . . . . . . . . . . . . ω m-1,m-1 (x) ω m-1,m (x) 0 . . . 0 ω m,m (x)       (81)
Lemma 5: The system (78), (79) reaches its zero equilibrium in a finite time t F where t F is defined by [START_REF] Djordjevic | Boundary actuation structure of linearized two-phase flow[END_REF] Proof: The system is a cascade of α-system (that has zero input at the led boundary) into the β-system (that has zero input at the right boundary once α becomes null). The rigorous proof of the lemma follows the same step of the proof of Lemma 2 and is omitted here.

C. Volterra Transformation

In order to map the original system (75)-(77) to the target system (78)-(80), we use the following Volterra transformation

ũ(t, x) = α(t, x) + x 0 M (x, ξ) β(t, ξ)dξ (82) ṽ(t, x) = β(t, x) + x 0 N (x, ξ) β(t, ξ)dξ (83)
where the kernels M and N defined on T = {(x, ξ) ∈ [0, 1] 2 |ξ ≤ x} have yet to defined. Differentiating (82), (83) with respect to space and time yields the following kernel equations for

1 ≤ i ≤ n, 1 ≤ j ≤ m λ i ∂ x M ij (x, ξ) -µ j ∂ ξ M ij (x, ξ) = n k=1 σ ++ ik M kj (x, ξ) + m p=1 σ -+ ip N pj (x, ξ) - m p=1 M ip (x, ξ)ω pj (x) (84) for 1 ≤ i ≤ m, 1 ≤ j ≤ m µ i ∂ x N ij (x, ξ) + µ j ∂ ξ N ij (x, ξ) = - n k=1 σ -- ik N kj (x, ξ) - n p=1 σ +- ip M pj (x, ξ) + m p=1 N ip (x, ξ)ω pj (x) (85)
with the following set of boundary conditions :

∀1 ≤ i ≤ m, ∀1 ≤ j ≤ n, M ij (x, x) = - σ +- ij µ j + λ i = k ij (86) ∀1 ≤ i, j ≤ m, j < i N ij (x, x) = -σ -- ij µ j -µ i (87) ∀i ≤ j ω ij (x) = (µ j -µ i )N ij (x, x) + σ -- ij (88)
Evaluating ( 82), (83) at x = 1 yields

∀1 ≤ i, j ≤ m, N ij (1, ξ) = n k=1 ρ ik M kj (1, ξ) (89) while d + ij , d - ij are given by d + ij (x, , ξ) = - m k=1 M ik (x, ξ)σ -+ kj + x ξ m k=1 M ik (x, s)d - kj (s, ξ)ds (90) d - ij (x, , ξ) = - m k=1 N ik (x, ξ)σ -+ kj + x ξ m k=1 N ik (x, s)d - kj (s, ξ)ds (91)
provided the M and N kernels are well-defined. Finally the observer gains are given by

p + ij (x) = µ j M ij (x, 0) (92) p - ij (x) = µ j N ij (x, 0) (93)
Considering the following alternate variables

Mij (χ, y) = M ij (1 -y, 1 -χ) = M ij (x, ξ) (94) Nij (χ, y) = N ij (1 -y, 1 -χ) = N ij (x, ξ) (95) ωij (χ) = ω ij (x) (96) yields for 1 ≤ i ≤ n, 1 ≤ j ≤ m -λ i ∂ χ Mij (χ, y)+µ j ∂ y Mij (χ, y) = - n k=1 σ ++ ik Mkj (χ, y) - m p=1 σ -+ ip Npj (χ, y) + m p=1 Mip (χ, y)ω pj (χ) (97) for 1 ≤ i ≤ m, 1 ≤ j ≤ m µ i ∂ χ Nij (χ, y) + µ j ∂ y Nij (χ, y) = n k=1 σ -- ik Nkj (χ, y) n p=1 σ +- ip Mpj (χ, y) - m p=1 Nip (χ, y)ω pj (χ) (98)
with the following set of boundary conditions

∀1 ≤ i ≤ m, ∀1 ≤ j ≤ n, Mij (χ, χ) = - σ +- ij µ j + λ i = k ij (99) ∀1 ≤ i, j ≤ m, j < i Nij (χ, χ) = -σ -- ij µ j -µ i (100) ∀i ≤ j ωij (χ) = (µ j -µ i ) Nij (χ, χ) + σ -- ij (101)
Evaluating (82), (83) at x = 1 yields

∀1 ≤ i, j ≤ m, Nij (χ, 0) = n k=1 ρ ik M kj (χ, 0) (102)
This system has the same cascade structure as the controller kernel system. Using a similar proof we can asses its wellposedness.

D. Output feedback controller

The estimates can be used in a observer-controller to derive an output feedback law yielding finite-time stability of the zero equilibrium Lemma 6: Consider the system composed of ( 1)-(3) and target system (72)-(74) with the following control law

U (t) = 1 0 [K(1, ξ)û(t, ξ) + L(1, ξ)v(t, ξ)]dξ -R 1 û(t, 1) (103)
where K and L are defined by (30)-(35). Its solutions (u, v, û, v) converge in finite time to zero Proof: The convergence of the observer error states ũ, ṽ to zero for t F ≤ t is ensured by Lemma 5, along with the existence of the backstepping transformation. Thus, once t F ≤ t, v(t, 0) = v(t, 0) and one can use Theorem2. Therefore for 2t F ≤ t, one has (ũ, ṽ, û, v) ≡ 0 which yields (u, v) ≡ 0. The convergence of the observer error states ũ, ṽ to zero for t F ≤ t is ensured by Lemma 5, along with the existence of the backstepping transformation. Thus, once t F ≤ t, v(t, 0) = v(t, 0) and one can use Theorem2. Therefore for 2t F ≤ t, one has (ũ, ṽ, û, v) ≡ 0 which yields (u, v) ≡ 0.

VII. SIMULATION RESULTS

In this section we illusttrate our results with simulations on a toy problem. The numerical values of the parameters are as follow.

n = m = 2, µ 1 = λ 1 = 1, µ 2 = λ 2 = 2 (104)
Σ ++ = Σ +-= 1 0 0 1 Σ -+ = 1 1 1 0 (105)

Σ --= 0 1 1 0 Q 0 = 1 0 0 0 R 1 = 0 (106)
Figure 1 pictures the L 2 -norm of the state (u, v) in open loop, using the control law presented in [START_REF] Hu | Control of homodirectional and general heterodirectional linear coupled hyperbolic pdes[END_REF] and then using the control law (68) presented in this paper. Using the backstepping approach we have presented a stabilizating boundary feedback law for a general class of linear first-order system. Moreover, contrary to [START_REF] Hu | Control of homodirectional and general heterodirectional linear coupled hyperbolic pdes[END_REF], the zeroequilibrium of the system is reached in minimum time t F .

The presented design raises several important questions that will be the topic of future investigation. In [START_REF] Hu | Control of homodirectional and general heterodirectional linear coupled hyperbolic pdes[END_REF], the proposed control law does not yield minimum time convergence, but features several degrees of freedom that may be useable to handle transients. A comparison of the transient responses of both designs, as well as their comparative robustness, should be performed.

Besides, the presented result narrows the gap with the theoretical controllability results of [START_REF] Li | Strong (weak) exact controllability and strong (weak) exact observability for quasilinear hyperbolic systems[END_REF]. These results, although they do not provide explicit control law, ensure exact minimum-time controllability with less control inputs than what is currently achievable using backstepping. More generally, this raises the question of the links between stabilizability and stabilizability by backstepping.

Fig. 1 .

 1 Fig. 1. Time evolution of the L2-norm in open loop and using two different controlers

  While the system in open loop is unstable (the L 2 -norm diverges)

	it converges in minimum time t F = controller (68) is applied as expected from Theorem 2. The 1 λ 1 + 1 = 2 when µ 1
	controller presented in [14] converges in a larger time which is equal (as mentioned in [14]) to 1 λ 1 + 1 µ 1 + 1 µ 2 = 2.5.

Time [s]

Jean Auriol is with MINES ParisTech, PSL Research University, CAS -Centre automatique et systèmes, 60 bd St Michel 75006 Paris, France.jean.auriol@mines-paristech.fr

Florent Di Meglio is with MINES ParisTech, PSL Research University, CAS -Centre automatique et systèmes, 60 bd St Michel 75006 Paris, France.