Jérémie Kreiss
email: jeremie.kreiss@univ-lorraine.fr

Marc Bodson
email: bodson@eng.utah.edu

Romain Delpoux

Jean-Yves Gauthier

Jean-François Trégouët

Xuefang Lin-Shi

Jérémie Kreiss

Optimal Control Allocation for the Parallel Interconnection of Buck Converters

Keywords: Control allocation, quadratic optimization, constraints management, robust control, parallel interconnection of power converters

This paper presents a control algorithm for the parallel interconnection of heterogeneous power converters. A single resistive load is assumed to be fed by an arbitrary number of buck converters via a common DC bus. The approach is based on control allocation theory and a constrained quadratic optimization algorithm. The strategy achieves a fast voltage response with an optimal current distribution among the converters, while taking into account the current limits, the dynamic response, and the efficiency of the individual converters. An interesting by-product of the approach is the ability to put converters in and out of service through trivial adjustments of the code. The benefits of the approach are assessed through simulations and an experimental evaluation.

Introduction

Recent applications such as microgrids (see [START_REF] Guerrero | Hierarchical control of droop-controlled ac and dc microgrids a general approach toward standardization[END_REF][START_REF] Baranwal | A distributed architecture for robust and optimal control of dc microgrids[END_REF][START_REF] Hua | Stochastic optimal control for energy internet: A bottom-up energy management approach[END_REF] for example) or low-voltage/high-current power supplies are composed of several power converters connected to a single load. This structure benefits from several advantages as a consequence of the distribution of the load current on multiple converters. Thereby, it is possible to improve the reliability [START_REF] Thottuvelil | Analysis and control design of paralleled dc/dc converters with current sharing[END_REF], increase the ease of repair, improve the thermal management [START_REF] Huang | Circuit theoretic classification of parallel connected dc /dc converters[END_REF], reduce the output ripple by interleaving phases of the pulse-width modulation (PWM) [START_REF] Cid-Pastor | Interleaved converters based on sliding-mode control in a ring configuration[END_REF], and increase the system efficiency [START_REF] Delpoux | New framework for optimal current sharing of nonidentical parallel buck converters[END_REF].

The main control objective on such systems is to regulate the output voltage. This objective sets the steady-state value of the total current, while the current distribution between the converters remains free, even though the converters are coupled through the output voltage dynamics. One of the most widespread strategies for firstname.lastname@insa-lyon.fr the determination of the current distribution is the so-called droop-control method. Although its implementation is straightforward, this approach deals with current distribution and voltage regulation as competing objectives. If priority is given to voltage regulation, the current distribution is deteriorated and vice versa. As a result, an optimal current distribution can only be obtained by allowing a static error on the output voltage (see [START_REF] Mazumder | Masterslave current-sharing control of a parallel dc-dc converter system over an rf communication interface[END_REF]). A recent extension of such method for a DC microgrid and with a distributed architecture [START_REF] Baranwal | A distributed architecture for robust and optimal control of dc microgrids[END_REF] still presents this static error for the output voltage.

Instead of compromising between voltage regulation and current distribution, the so-called balanced current sharing method gives priority to the voltage regulation and ensures an effective control of the output voltage. To this end, this well-known strategy imposes that every converter shares the same fraction of the total current (see [START_REF] Huang | Circuit theoretic classification of parallel connected dc /dc converters[END_REF][START_REF] Cid-Pastor | Interleaved converters based on sliding-mode control in a ring configuration[END_REF][START_REF] Moayedi | Distributed cooperative load sharing in parallel dc-dc converters[END_REF][START_REF] Sadabadi | A distributed control strategy for parallel dc-dc converters[END_REF] for instance). If this strategy seems to be justified when the converters are identical, it is not expected to be optimal when the converters have different characteristics (in particular, in terms of rate of response and efficiency). Moreover, strategies used for balanced current sharing such as the master-slave or democratic architecture expose the system to a single point-of-failure risk [START_REF] Moayedi | Distributed cooperative load sharing in parallel dc-dc converters[END_REF][START_REF] Iu | Bifurcation in parallel-connected buck converters under a democratic current sharing scheme[END_REF]. Finally, deriving conditions for closedloop stability in this framework is not straightforward, as highlighted by [START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF] where a detailed anal-ysis of parallel interconnection of buck converters is provided.

Both droop-control and balanced current sharing methods consider voltage regulation and current distribution as competing objectives. However, the fact that current distribution remains free when the voltage value is set is an intrinsic property of the studied system. Then, it is possible to consider the two objectives as complementary and not competing ones. Consequently, it is possible to satisfy them simultaneously.

Recently, [START_REF] Delpoux | New framework for optimal current sharing of nonidentical parallel buck converters[END_REF][START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF][START_REF]Parallel interconnection of buck converters revisited[END_REF][START_REF] Kreiss | Hamiltonian point of view on parallel interconnection of buck converters[END_REF] propose control methods for the parallel interconnection of buck converters that achieve simultaneously the two control objectives, i.e. the voltage regulation and the current distribution. Those results are based on the observation that the interconnection of multiple converters in parallel to a single load belongs to the class of over-actuated systems [START_REF] Johansen | Control allocationa survey[END_REF][START_REF] Oppenheimer | Control allocation[END_REF].

Controlling over-actuated systems becomes challenging when constraints and optimization criteria are considered. Control allocation theory is an appealing solution for over-actuated systems (see [START_REF] Johansen | Control allocationa survey[END_REF][START_REF] Oppenheimer | Control allocation[END_REF] for instance) and has recently been used for power electronics applications (see i.e. [START_REF] Bouarfa | An optimization formulation of converter control and its general solution for the four-leg two-level inverter[END_REF]). For the parallel interconnection of buck converters, this solution takes into account the distinct converter characteristics when distributing the total current. The resulting methods design the controller in two steps: (i) an external controller is designed to ensure the regulation of the output (or voltage in our case) using a global control variable or pseudo-effector, and (ii) a control allocation algorithm distributes the desired effort (or load current in our case) among the actuators, considering the constraints and other optimization criteria [START_REF] Johansen | Control allocationa survey[END_REF].

Several methods can be found in the control allocation literature and can be classified as follows: (i) the static approach for which the effort distribution is optimal instantly and at each time instant [START_REF] Johansen | Control allocationa survey[END_REF][START_REF] Oppenheimer | Control allocation[END_REF], (ii) the dynamic approach where the effort distribution is only optimal for the steady state [START_REF] Johansen | Constrained nonlinear control allocation with singularity avoidance using sequential quadratic programming[END_REF] and (iii) the geometric approach which separates the current distribution management from the total current generation by changes of coordinates [START_REF] Serrani | Output regulation for over-actuated linear systems via inverse model allocation[END_REF][START_REF] Galeani | On dynamic input allocation for fat plants subject to multi-sinusoidal exogenous inputs[END_REF].

Typically, for the static approach, actuators are assumed to be fast enough to consider them as static devices in the design of the external loop ( [START_REF] Johansen | Control allocationa survey[END_REF][START_REF] Bodson | Evaluation of optimization methods for control allocation[END_REF][START_REF] Oppenheimer | Control allocation[END_REF] to cite a few). However, [START_REF] Oppenheimer | Control allocation[END_REF][START_REF] Luo | Model predictive dynamic control allocation with actuator dynamics[END_REF] extend this approach to take dynamical actuators into account, with an open-loop inversion approach where robustness is considered [START_REF] Oppenheimer | Control allocation[END_REF] and using model predictive control for [START_REF] Luo | Model predictive dynamic control allocation with actuator dynamics[END_REF], where state and input constraints are taken into account.

For the dynamic approach, dynamical actua-tors can be taken into account (see [START_REF] Zaccarian | Dynamic allocation for input redundant control systems[END_REF][START_REF] Tjønnås | Adaptive control allocation[END_REF] and also [START_REF] Delpoux | New framework for optimal current sharing of nonidentical parallel buck converters[END_REF] for the case of parallel interconnection of converters) in a way that the total effort distribution converges slowly to the optimal value. Even though [START_REF] Zaccarian | Dynamic allocation for input redundant control systems[END_REF] deals with input constraints, incorporating state constraints is still an open problem.

The geometric approach has been applied to the parallel interconnection of buck converters in [START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF], extended in the Hamiltonian framework in [START_REF] Kreiss | Hamiltonian point of view on parallel interconnection of buck converters[END_REF], and combined with an input constraints management in [START_REF] Kreiss | A new framework for dealing with input constraints on parallel interconnection of buck converters[END_REF]. Note that (i) the exact knowledge of parameters is required to perform the change of coordinates and (ii) dealing with state constraints is still an open problem.

For the studied system, since dealing with current constraints is essential for the system safety, the most relevant method for this paper is the static one. Furthermore, it provides an optimality of the current distribution not only for the steady state but also for transients.

As a new contribution regarding the control allocation theory, the strategy of this work optimizes the current distribution for all time by exploiting the specific actuator dynamics. Rate saturations are taken into account as suggested in [START_REF] Luo | Model predictive dynamic control allocation with actuator dynamics[END_REF][START_REF] Hanger | Dynamic model predictive control allocation using cvxgen[END_REF]. Stability proofs are also provided in this paper, considering constraints and uncertainties.

The main contribution of this paper is to propose a new method, based on the static approach of control allocation, to control multiple heterogeneous buck converters connected in parallel. Most of the existing methods are not able to deal freely with the current distribution, and consequently, performance is restricted. Furthermore, stability of the existing controllers is rather involved. Papers [START_REF] Delpoux | New framework for optimal current sharing of nonidentical parallel buck converters[END_REF][START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF][START_REF] Kreiss | A new framework for dealing with input constraints on parallel interconnection of buck converters[END_REF] provide stability conditions with a free management of current distribution, but the current limits are not taken into account. With respect to those methods, the one presented in this paper: (i) ensures a fast response while maximizing efficiency by a free distribution of currents, including transients unlike previous methods (ii) guarantees stability under certain conditions with consideration to load uncertainty, converter dynamics, and input and current limits, and (iii) facilitates the predictable connection and disconnection of converters in real-time to accommodate large load variations or for maintenance.

The paper is structured as follows. In Section II, the problem is formalized with suitable assumptions. In Section III, basics of the control allocation theory are presented as well as an overview of the controller structure used in the paper. Section IV provides control design related to the current loop. In Section V, regulation of the output voltage is performed for an unknown resistive load. Finally, Section VI gives simula-tion results, Section VII compares the resulting control law with existing ones, and experimental results are presented in Section VIII.

Terminology and Notation. In the sequel, the terms converters and actuators will be used indifferently, such as load and plant. The first terminology comes from the electrical power community, whereas the second from the control allocation literature. The notation x j refers to the j-th element of vector x, with 1 being the index of the first element. The symbol I m stands for the identity matrix of size m × m. The null matrix of size m × n is denoted by 0 m×n . The vector (column matrix) of size m for which every entry is 1 (respectively 0) is denoted by 1 m (respectively 0 m ). The operator "diag" creates a diagonal matrix from entries of its (vector) argument. In optimization problems, variables with a hat such as î constitute the optimization variables.

Problem statement

This paper is about controlling the electrical circuit shown in Figure 1, which corresponds to the parallel interconnection of m heterogeneous buck converters sharing a single capacitor C and a common resistive load R. The load is assumed to belong to some interval L ⊂ R >0 . R is unknown, as happens in most practical cases, and is assumed to be constant, although the control algorithm will compensate for slow variations or stepwise changes. The converters are controlled via PWM signals where d j refers to the duty cycle of the j-th converter. Index j belongs to the set J := {1, . . . , m}. The DC bus voltage is denoted v and the current in the j-th inductor, labelled L j , is denoted i j . The equivalent voltage sources of the converters have magnitudes E j . Signals are sampled in the digital controller at a rate T s and each output signal is converted by a zero-order hold.

d 1 d m C R DC BUS L m L 1 E 1 E m v i 1 i m Buck Converter 1 Buck Converter m Load d1 dm
Throughout this paper, it is assumed that (i) the switching period T PWM is sufficiently small for the dynamics to be approximated by an average model, (ii) for each converter, the second switch is controlled in opposition with the first one, and (iii) electrical components and switches are ideals, i.e., parasitic elements (resistances, losses) can be neglected.

Considering the previous assumptions and using Kirchoff's laws, the dynamics of the circuit represented in Figure 1 are

∀ j ∈ J , L j di j dt = -v + E j d j , (1a)
C dv dt = σ - v R , (1b)
where σ :

= j∈J i j = 1 m i, (2)
refers to the total current. Eq. (1a) describes the dynamics of the inductor current produced by each converter, whereas (1b) describes the output voltage dynamics. One way to consider the parallel interconnection of buck converters is to view each converter as an actuator, with the sum of the actuator outputs applied to a single-input single-output plant, or load. Eq. (1a) corresponds to the actuators model (P a ), whereas (P) constitutes the plant (1b). This decomposition (actuators/plant) is depicted on Figure 2. The main control objective is to regulate the load voltage v to a reference value v r . The previous decomposition (actuators/plant) shows that this voltage only depends on the total current σ. The way this current is distributed between the converters remains to be determined, and it is possible to choose the best distribution in order to satisfy the constraints and achieve a secondary objective. In this paper, the secondary objective is the minimization of converter losses. In [START_REF] Delpoux | New framework for optimal current sharing of nonidentical parallel buck converters[END_REF], it was shown that the cost function associated with converter losses could be approximated by a quadratic function

P σ v P a . . .
J(i) := m j=1 r 1,j i 2 j + r 2,j i j , (3)
where ∀j ∈ J , r 1,j ∈ R ≥0 and r 2,j ∈ R ≥0 are coefficients depending on the converter and can be determined experimentally. Note that the larger r 1,j or r 2,j are, the less efficient the j-th converter is.

The problem addressed in this paper is to regulate the output voltage to the reference value v r while minimizing the converter losses expressed by the cost function J. During the whole trajectory, input and state constraints must also be taken into account. One can express this problem as follows.

Problem 1. Design a load-robust state-feedback control law (i, v) → d such that the closed-loop system admits a stable equilibrium for which v = v r holds, J(i) is minimum and constraints 0 ≤ d j ≤ 1, i - j ≤ i j ≤ i + j , j ∈ J are satisfied. In the sequel, the controller design is carried out in discrete-time in order to get closer to the real application where a discrete-time controller is connected to the system.

Control allocation perspective

Control allocation methods consist in separating the control of the plant P from the distribution of effort among the actuators. The overall control scheme is represented in Figure 3 (see [START_REF] Johansen | Control allocationa survey[END_REF]) where: • C v is designed to control the output of the plant, or load voltage v in our case to its reference value v r , by providing a global effort reference σ r ; • A takes the total effort reference σ r as an input and delivers suitable current references i r to the actuators such that (i) the total current σ tracks σ r and (ii) the converter losses are minimized according to (3); • if needed, an internal controller C a may be implemented to accelerate/stabilize the response of the actuators and delivers the duty cycle d by a internal feedback of currents i. Following control allocation concepts [START_REF] Bodson | Evaluation of optimization methods for control allocation[END_REF], the control problem 1 is tackled in two parts: Problem 2. Design a load-robust state-feedback control law (i, v) → d such that, for all R ∈ L • a total current reference σ r ensures the stable voltage tracking of a reference v r , • the total current reference is distributed to satisfy a criterion

C v A C a P a P v r σ r ∈ R i r ∈ R m d ∈ R m σ ∈ R v i ∈ R m
i ∈ argmin î∈R m   σ r - j∈J îj   2 + εJ( î) subject to ∀j ∈ J ,      i - j ≤ îj ≤ i + j , 0 ≤ d j ≤ 1, (1a).
(4) with ε ∈ R ≥0 , and where i - j , i + j are the minimum and maximum currents that converter j is capable of delivering.

Note that the scalar ε has to be chosen sufficiently small in order to give priority to the first term. Indeed, the primary objective is to regulate the voltage v and is related to tracking by the total current σ of the total current reference σ r (first term). When this first term is close to zero, the optimization will maximize efficiency as a secondary objective.

In the following sections, the designs of C a , A and C v are presented. The controller C a is designed to stabilize the actuators and make their response as fast as possible while considering input constraints 4 . Indeed, in our case, the goal is to stabilize the actuator dynamics which consist of integrators (1a). Then, an optimization algorithm is presented to solve (4) in the allocator block A. Finally, the controller C v is designed such that, without knowing the load value, the steady-state response satisfies v * = v r .

Current Control

Let T s be the sampling period of the controller. For the sequel, the following assumption holds.

Assumption 1. The output voltage v is constant over the period T s .

Indeed, because the output capacitor slows the voltage dynamics with respect to the currents, this is a realistic assumption. The approximation will be needed later for the incorporation of constraints.

Primary control C a

The discrete-time model for the converter dynamics is obtained from (1a) 5 P a,j : i

j [k + 1] = i j [k] + E j L j T s d j [k] - T s L j v[k].
(5) Note that ( 5) is not stable (the converters behave as integrators). The internal controller C a,j aims to stabilize each converter while ensuring the convergence to a reference value i r,j such as in Figure 4. The concatenation of the internal controllers C a,j , j ∈ J forms the block C a of Figure 3. To reach the reference value i r,j as rapidly as possible, a deadbeat controller is proposed. Reference values i r,j are updated at the period T s . Hence, the objective for C a,j is to make i j reach exactly the reference value in one period T s . The design problem of C a,j consists in finding:

C a,j P a,j + - i r,j ε j d j i j v v
C a,j : i r,j [k] → d j [k] s.t.    i j [k + 1] = i r,j [k], (5), 0 ≤ d j [k] ≤ 1.
(6) Obviously, by assigning the value of d j [k] at 1 (respectively 0), the maximum attainable value i j [k + 1] (respectively the minimum one) is obtained from an initial current i j [k]. Since assumption 1 holds, those limits are given by ∆i

+ j := i j [k + 1] -i j [k] = T s L j (E j -v[k]), (7a) ∆i - j := i j [k + 1] -i j [k] = - T s L j v[k], (7b)
where (7a) and (7b) are deduced from ( 5) by setting d j = 1 and 0, respectively. The controller for the actuator, or primary controller, is designed as specified in the following lemma. Lemma 1. Let the current control C a,j be

d j [k] = L j E j T s ε j [k] + 1 E j v[k] (8)
where

ε j [k] := i r,j [k] -i j [k].
The closed-loop transfer function of Figure 4 is such that the state i j reaches the reference value i r,j in one sampling period T s .

Proof. By using ( 8) with [START_REF] Huang | Circuit theoretic classification of parallel connected dc /dc converters[END_REF], one can obtain

i j [k + 1] = i j [k] + ε j [k] + T s L j v[k] - T s L j v[k]. Since ε j [k] := i r,j [k] -i j [k], it follows that i j [k + 1] = i r,j [k],
which means that the state reaches the reference in one sampling period T s .

Allocator A 4.2.1. Principle

The aim of the allocator block (see Figure 3) is to distribute the total current reference σ r among the available converters in such a way that: (i) every current reference is achievable for the primary controller C a in one step and (ii) the cost function ( 3) is minimized. The problem to solve is (4) at the period T s , with the solution providing the reference currents for the individual converters. In other words, for k ∈ N,

   i r,1 . . . i r,m    [k] ∈ argmin î∈R m   σ r [k] - m j=1 îj   2 + εJ( î) subject to ∀j ∈ J ,    i - j ≤ îj ≤ i + j , 0 ≤ d j [k] ≤ 1, (5)
. ( 9) From the previous subsection and, in particular, from [START_REF] Delpoux | New framework for optimal current sharing of nonidentical parallel buck converters[END_REF], constraints on duty cycles d j are transferred to the currents, which are the decision variables of problem [START_REF] Moayedi | Distributed cooperative load sharing in parallel dc-dc converters[END_REF]. This change makes it possible to gather the constraints via the following relationship ∀j ∈ J ,

max i - j , ∆i - j + i j [k] ≤ îj ≤ min i + j , ∆i + j + i j [k]
where ∆i - j and , ∆i + j are given by [START_REF] Delpoux | New framework for optimal current sharing of nonidentical parallel buck converters[END_REF]. Algorithms can be found in the literature to solve quadratic problems with inequality constraints (see [START_REF] Harkegard | Backstepping and control allocation with applications to flight control[END_REF]Chapter 8], [START_REF]Dynamic control allocation using constrained quadratic programming[END_REF], [START_REF] Bodson | Load balancing in control allocation[END_REF], [START_REF] Harkegard | Efficient active set algorithms for solving constrained least squares problems in aircraft control allocation[END_REF]). To apply these methods, J is rewritten as

J(i) = m j=1 r 1,j i j + r 2,j 2r 1,j 2 - m j=1 r 2 2,j 4r 1,j . Since m j=1 r 2 2,j
4r 1,j is scalar, the minimum of J is reached for the same current values as the standard quadratic function (by setting their derivatives to zero)

J(i) := m j=1 r 1,j i j + r 2,j 2r 1,j 2 = W r (i -i p ) 2 2
where

W r := diag         √ r 1,1 . . . √ r 1,m         , and i p := -       r 2,1 (2r 1,1 )
. . .

r 2,m (2r 1,m )       . Furthermore, rewriting σ as in (2), problem (9) is transformed into the equivalent problem    i r,1 . . . i r,m    [k] ∈ argmin î 1 m √ εW r î - σ r [k] √ εW r i p 2 2 s.t. ∀j ∈ J , max i - j , ∆i - j + i j [k] ≤ îj ≤ min i + j , ∆i + j + i j [k] . (10)
This equivalent problem can be solved using the active set methods presented in [START_REF] Nocedal | Numerical Optimization[END_REF] and applied to control allocation in [START_REF] Harkegard | Backstepping and control allocation with applications to flight control[END_REF]Section 8.1]. An active set method solves a sequence of equalityconstrained problems.

The first step of the sequence consists in solving the optimization problem without any constraints. If the given solution is achievable, i.e. the constraints are not violated, the solution is obtained and the algorithm stops. In the other case, a second step is necessary: the variables outside the constraints are set to the corresponding limits as equality constraints (corresponding to the working set W that specifies which actuators are saturated) and the algorithm solves the optimization problem on the remaining variables by disregarding the constraints. If the solution is still not feasible, the step is performed again, until a feasible solution is obtained. If the solution is feasible, the algorithm moves to the third step: some of the inequalities are now removed (one by one) to determine if the optimization can be improved with fewer variables at their limits. Note that this third step is only required if the previous step set at least two equality constraints at a time. The experiments of this paper use a Matlab toolbox available on-line in [START_REF] Harkegard | Quadratic programming control allocation toolbox for Matlab[END_REF]. For the initialization of the algorithm, i 0 was chosen to be the zero vector at the first iteration, and the solution at the previous time step otherwise. The working set was initialized at W = 0 m .

Speed of convergence

In order to provide information about the possible implementation of this algorithm in real-time, the following simulations are given.

Environment. The following tests have been performed on a Lenovo Yoga 710 having an Intel Core i7 processor and a RAM of 8GB. The algorithm is implemented on MATLAB/SIMULINK 2018a using a matlab-function block.

Test. The simulation concerns the estimation of the mean time over a whole simulation for the computation of the algorithm. The simulation time is T f = 60s, and the algorithm is computed for the following three sampling times : (i) T s = 2 × 10 -5 s, (ii) T s = 5 × 10 -5 s and T s = 1 × 10 -4 s. For those three cases and for a number of converters growing from 2 to 8, the total simulation time of the controller is measured. Results are given on Figure 5. For a simulation time of T f =60s, the computation time have to be less than 60s to use the algorithm in real time. This limit is depicted by the purple line. For the sampling time T s = 10 -4 s that will be used for the experiments, we see on this figure that it is possible to use more than 8 converters.

Voltage control C v

The voltage controller aims to regulate the output voltage v to its reference value v r by specifying the total current reference σ r (see Figure 3).

Internal loop behaviour

This subsection focuses on the characteristics of the internal loop, namely constraints and dynamic behavior, in order to take them into account when designing the voltage controller.

Internal loop constraints

The constraints of the allocator A are considered in two steps:

• the magnitude constraints, coming from the limits on the converter currents, specify that

σ min := m j=1 i - j ≤ σ r [k] ≤ m j=1 i + j =: σ max ;
(11) • the rate constraints, coming from duty cycle limits and converted into current limits assuming the deadbeat controller of Section 4, specify that (using ( 7))

σ -(v) ≤ σ r [k] -σ r [k -1] =:∆σr[k] ≤ σ + (v), (12)
where

σ + (v) := m j=1 T s L j (E j -v[k]) and σ -(v) := - m j=1 T s L j v[k].
By defining σ c as the constrained reference value of the total current (see Figure 6), the constraints management provided by the allocator can be seen as a saturation block, such as on Figure 6.

Remark 1 (Rate constraints). In the literature, sufficient conditions are given for the antiwindup problem with constant magnitude and rate constraints for discrete-time systems (see [START_REF] Gomes Da Silva | Dynamic output feedback for discretetime systems under amplitude and rate actuator constraints[END_REF]). However, this problem is much more difficult when those constraints are state-dependent. This case applies here, since rate variations depend on the voltage v (see [START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF]). Giving a complete answer to this problem is out of the scope of this paper. Accordingly, the anti-windup scheme used here takes into account magnitude constraints only, even though the control allocator considers both the magnitude and rate constraints.

Internal loop dynamics

Consider the internal dynamics (C a and P a ) at the sampling period T s defined in section 4. The deadbeat controller presented in subsection 4.1 ensures that each current evolves linearly as a function of time. As a result, knowing that the total current σ is the sum of the currents i j , the allocator ensures that j i r,j (kT s ) corresponds to σ c (kT s ). Furthermore, since σ needs a time T s to reach its reference value, the recurrence relationship between σ and σ c is Therefore,

σ[(k + 1)T s ] = σ c [kT s ].
σ(t) = σ(kT s )+ σ c (kT s ) -σ(kT s ) T s (t -kT s ) (13)
holds.

Considering σ as a virtual (not constant) input for the voltage dynamics, from (1b), the discretetime model is given by

v[(k + 1)T s ] = e -Ts RC v[kT s ]+ 1 C (k+1)Ts kTs e -1 RC ((k+1)Ts-τ ) σ(τ )dτ.
With [START_REF]Parallel interconnection of buck converters revisited[END_REF], one can obtain through integration by parts the discrete-time model at the period T s described on Figure 6 with dynamics

v σ [k + 1] = A(R) v σ [k] + B(R)σ c [k] (14)
where

A(R) :=   e -Ts RC R RC T s -e -Ts RC 1 + RC T s 0 0   , B(R) :=   R - R 2 C T s 1 -e -Ts RC 1   ,
together with [START_REF] Iu | Bifurcation in parallel-connected buck converters under a democratic current sharing scheme[END_REF] and where σ c is the saturated input. The first row of the model corresponds to the time discretization of (1b) at the sampling period T s with (13), whereas the second row corresponds to the delay introduced by the internal loop (the converter with its internal controller), as depicted on Figure 6.

Controller for the unsaturated system

First, a controller C v is designed without taking saturations into account. Integral action is included in C v in order to cope with errors coming from the internal controller and to compensate for load disturbances. Afterwards, a scheme is designed to prevent windup when the limits are reached.

The aim of this subsection is to design a controller for the voltage dynamics ( 14) which ensures the stability of the equilibrium point v r for all R ∈ L := [R -, R + ] where R -∈ R >0 and R + ∈ R >0 correspond respectively to the lower and upper values that R can take. As a first step, saturation of the signal σ r is disregarded, so that σ c = σ r .

The load-robust state-feedback control law with an output integrator is given by

C v : ξ[k + 1] = ξ[k] + v r -v[k] σ r [k] = k ξ ξ[k] + k p (v r -v[k]) + k σ σ[k], (15)
where k p ∈ R, k ξ ∈ R and k σ ∈ R are the proportional, integral and derivative gains of the control law, respectively. The model ( 14) with [START_REF] Johansen | Control allocationa survey[END_REF] corresponds to the following extended model

  ṽ σ ξ   [k+1] =   A e (R) + B e (R)   -k p k σ k ξ     A BF (R):=Ae(R)+Be(R)K   ṽ σ ξ   [k]. ( 16
) with A e (R) := A(R) 0 2×1 -1 0 1 , B e (R) := B(R) 0 and ṽ = v -v r , σ = σ - v r R and ξ = ξ - 1 -k σ Rk ξ v r .
The extended state matrices A e (R) and B e (R) depend on the unknown parameter, namely the load R. However, since R belongs to the compact set L and since the elements of A e (R) and B e (R) are continuous with respect to R, one can always find a convex hull in which [A e (R), B e (R)] belong. In other words, for all R ∈ L

[A e (R), B e (R)] ∈ H := co [A i , B i ] i∈{1,...,nv}
where n v corresponds to the number of convex hull vertices. A possible choice of convex hull for our application is given in Appendix A.

Once H is computed, the following proposition shows that solving LMIs for the convex hull vertices ensures stability for the closed-loop system (16) for all R ∈ L.

Proposition 1. If there exists a positive definite matrix

W = W ∈ R 3×3 and Y ∈ R 1×3 such that -W A i W + B i Y (A i W + B i Y ) -W ≺ 0 ( 17
)
holds for all the vertices [A i , B i ] of the convex hull H, then the feedback gains satisfying

-k p k σ k ξ = Y W -1
ensure that the fixed point is an exponentially stable equilibrium state of ( 16) for all R ∈ L.

(v, σ, ξ) = (v r , v r R , 1 -k σ Rk ξ v r ) P v C v σr v r z -
The proof is given in Appendix B. Note that this proposition gives a sufficient condition. It is possible that some control gains which do not respect the LMI condition can still ensure stability of the equilibrium for all R ∈ L.

Anti-windup design

The presence of magnitude constraints on the input signal not only reduces achievable performance, but could also destabilize the closed-loop system. One way to deal with this issue is to add an anti-windup scheme such as the one shown in Figure 7 (see [START_REF] Galeani | A tutorial on modern anti-windup design[END_REF]). The basic idea underlying this design is to introduce control modifications when a saturation is activated in order to recover, as much as possible, the performance achieved by the unsaturated system. Note that static and dynamic anti-windup methods exist but, for the sake of simplicity, we focus here on a static anti-windup approach. The controller ( 15) is modified as follows

ξ[k + 1] = ξ[k] + v r -v[k] + k aw (σ c [k] -σ r [k]) σ r [k] = k ξ ξ[k] + k p (v r -v[k]) + k σ σ[k],
From Figure 6 and Proposition 1, the following equalities hold at the equilibrium and in the unsaturated condition

σ r = σ c = σ = v r R .
As a result, let us define

σr [k] = σ r [k] - v r R and σc [k] = σ c [k] - v r R ,
which is such that the closed-loop dynamics ( 16) become

  ṽ σ ξ   [k+1]=A BF (R)   ṽ σ ξ   [k]+   0 0 k aw   (σ c [k]-σ r [k]) . (18)
Expressing the constraints on the modified control value σr leads to the following relationship

σmin (R) := σ min - v r R ≤ σr [k] ≤ σ max - v r R =: σmax (R).
Note that the problem under consideration is such that σmin (R) = -σ max (R). However, the anti-windup design problem is usually tackled in the literature for symmetric saturations. Stability conditions with asymmetric constraints can be obtained by reducing the achievable interval to the largest symmetric interval contained in [σ min (R), σmax (R)], though doing so reduces the achievable performance. Given v r , denote by σ0 the bound of the largest symmetric saturations contained in [σ min (R), σmax (R)] for all R ∈ L, i.e.

σ0 = min -σ min + v r R + , σ max - v r R -
In the sequel, σr [k] is restricted to lie within the interval [-σ 0 , σ0 ]. From [START_REF] Gomes Da Silva | Antiwindup design with guaranteed regions of stability for discrete-time linear systems[END_REF], if there exist a symmetric positive definite matrix Ω ∈ R 3×3 , a matrix Γ ∈ R 1×3 , a scalar Z ∈ R and S ∈ R >0 satisfying the inequality

  Ω -Γ -Ω(A i + B i K) 2S SB i + Z B aw * Ω   0 Ω ΩK -Γ KΩ -Γ (σ 0 ) 2 0, (19)
with

B aw := 0 0 1 and K = -k p k σ k ξ
for all [A i , B i ], i ∈ {1, . . . , n v } corresponding to the vertices of the convex hull H, then the gain

k aw = Z S ensures that the ellipsoid Υ(P ) = ζ ∈ R ; ζ P ζ ≤ 1 , with P = Ω -1
, is a region of exponential stability for the closed-loop system [START_REF] Johansen | Constrained nonlinear control allocation with singularity avoidance using sequential quadratic programming[END_REF]. The proof is based on summing the LMIs for i ∈ {1, . . . , n v } and on Schur complements in order to remove products of variables. The second inequality of [START_REF] Serrani | Output regulation for over-actuated linear systems via inverse model allocation[END_REF] ensures that the dead-zone implies that the sector condition is verified. It can be proved using another Schur complement. The proof is detailed in [START_REF] Gomes Da Silva | Antiwindup design with guaranteed regions of stability for discrete-time linear systems[END_REF]Theorem 1]. More information about the estimated basin of attraction are given in [START_REF] Da Silva | Antiwindup design with guaranteed regions of stability: an lmibased approach[END_REF].

The maximization of the estimated basin of attraction in the direction of the integral state ξ is chosen in order to optimize the choice of antiwindup gain k aw . The result is achieved by solving the optimization problem min Ω,Γ,Z,S,β -β subject to [START_REF] Serrani | Output regulation for over-actuated linear systems via inverse model allocation[END_REF] and

1 βν βν Ω 0 (20)
where ν := 0 0 1 corresponds to the direction of the integral state.

6. Simulations

Simulation setup

Two simulations are given where only the current limits are different in order to highlight their management to prioritize the voltage regulation. A system with six identical converters (i.e. m = 6) is considered with the following parameters:

• (E j ) j∈{1,...,6} = 24 V;

• (L j ) j∈{1,...,6} = 2 mH. Furthermore, the capacitor is set to C = 2 mF, the resistive load is R = 2 Ω, the sampling period T s = 10 -4 s, the simulation period T sim = 10 -5 s and the simulation time t f = 24 ms.

For the first simulation, current limits are set to

• (i - j ) j∈{1,...,6} = 0 A; • (i + j ) j∈{1,...,6} = 12 A; whereas they are set to

• (i - j ) j∈{1,...,6} = 0 A; • (i + j ) j∈{1,...,6} = 3 A; for the second simulation.

Primary controller:

According to Section 4, the duty cycles are given by the following relations for all j ∈ J :

d j [k] = 10 12 (i r,j [k] -i j [k]) + 1 24 v[k]
Allocator: Problem ( 10) is implemented with ε = 10 -6 . The script wlsq alloc.m of the toolbox given in [START_REF] Harkegard | Quadratic programming control allocation toolbox for Matlab[END_REF] computes the solution of this optimization problem at each time.

Voltage controller:

Following the approach of section 5, the control gains are k p = -4, k σ = 1 and k ξ = 0.05 whereas the anti-windup gain was given the value of k aw = 6.8.

Environment

The control objectives are the following: (i) regulate the output voltage v to the reference v r = 12 V and (ii) impose an optimal current distribution through the branches with respect to the cost function J. For the simulations, J is not the expression of converters losses but an example chosen to highlight the convergence of the control algorithm to the optimal strategy. The parameters are defined as follows:

• r 1,j (t) j∈{1,...,6} = j, t ∈ [0; t f /2) s 1, t ∈ [t f /2; t f ] s ;

• (r 2,j ) j∈{1,...,6} = 0.1. As a result, for the first half of the simulations, the desired current distribution is to carry more current in the first converters than in the last one. This is due to the fact that r 1,j is larger when j grows, meaning that priority is given to the first converters to carry the power. Conversely, for the second half of the simulation, the converters should share the same fraction of the total current, which is the expected behaviour since both r 1,j and r 2,j are identical for every converter. Thereby, those simulations highlight the convergence of the control law to the minimum value of J.

Results

Figures 8 and9 show the output voltage, the total current and the currents in every converter when the upper current limits are set to 12 A and to 3 A, respectively.

In the first half of the simulation, Figures 8 and9 show that as long it is possible, the first converters are prioritized to feed the load, whereas the distribution is uniform in the second half, as expected. Even during the first transient, Figure 8 indicates that the current distribution is optimal with respect to J. This is not the case when the current constraints come into play, as in Figure 9. However, it is important to note that this current distribution is not optimal anymore in order to respect the voltage tracking imposed by C v . Indeed, the total current σ and the voltage v of Figure 9 have exactly the same trajectories as on Figure 8, when (i + j ) j∈{1,...,6} = 12 A, while respecting the current constraints.

Furthermore, for the whole simulation time, the output voltage v is properly regulated at the reference value v r = 12 V. Observe that, at t = t f /2 when the current distribution objective changes, the total current and voltage values are left unchanged.

Those observations clearly highlight that the secondary objective (current distribution) is achieved while always giving priority to the foremost objective: voltage regulation. [START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF][START_REF] Kreiss | A new framework for dealing with input constraints on parallel interconnection of buck converters[END_REF]

Comparison with

Simulation setup

A system with two identical converters (i.e. m = 2) is considered with the parameters given in Table 1. [START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF][START_REF] Kreiss | A new framework for dealing with input constraints on parallel interconnection of buck converters[END_REF] The control law of [START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF] is robust to load uncertainties but does not take input constraints into account. Conversely, the control law of [START_REF] Kreiss | A new framework for dealing with input constraints on parallel interconnection of buck converters[END_REF] is not robust to load uncertainties but considers input constraints. To be fair, we provide here a load robust control law with input constraints management, putting each control law together and adding an anti-windup scheme. The resulting control law is expressed by

Control law of

Parameters j = 1 j = 2 E j (V) 24 24 L j (mH) 2 20 r 1,j 1 2 r 2,j 0 0 i - j (A) 0 0 i + j (A) 8 8
ż = v r -v + k aw (µ -µ s ) µ = k i z + k p (v r -v) + k d σ µ s =    0, µ < 0 µ, 0 ≤ µ ≤ 1 1, µ > 1 λ = v -k δ r 1,2 -r 1,1 r 1,1 + r 1,2 σ -δ λ s =    λ(µ s ), λ < λ(µ s ) λ, λ(µ s ) ≤ λ ≤ λ(µ s ) λ(µ s ), λ > λ(µ s ) d 1 = L 2 -L 1 L 2 λ s 2E 1 + L 1 + L 2 L 2 µ s d 2 = L 1 -L 2 L 1 λ s 2E 1 + L 1 + L 2 L 1 µ s where λ(µ) = max -m E 2 L 2 + E 1 L 1 + L 2 L 1 L 2 µ, -E 1 L 1 + L 2 L 1 L 2 µ λ(µ) = min m E 1 L 1 -E 1 L 1 + L 2 L 1 L 2 µ, E 1 L 1 + L 2 L 1 L 2 µ
and k i = -16.34, k p = -0.062, k d = -0.072, k aw = 5.97 and k δ = -8.89. For more details about this control law, the interested reader is referred to [START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF][START_REF] Kreiss | A new framework for dealing with input constraints on parallel interconnection of buck converters[END_REF].

Proposed control law

Primary controller: According to Section 4, the duty cycle commands are given by [START_REF] Mazumder | Masterslave current-sharing control of a parallel dc-dc converter system over an rf communication interface[END_REF].

Allocator:

Problem ( 10) is implemented with ε = 10 -6 . The script wlsq alloc.m of the toolbox given in [START_REF] Harkegard | Quadratic programming control allocation toolbox for Matlab[END_REF] computes the solution of this optimization problem at each time instant.

Voltage controller:

Following the approach of section 5, the control gains are k p = -4, k σ = 1 and k ξ = 0.05 whereas the anti-windup gain was given the value of k aw = 1.44.

Environment

The control objectives are: (i) to regulate the output voltage v to the reference v r = 12 V and (ii) to impose an optimal current distribution through the branches with respect to the cost function J. As in section 6, for this comparison, J is not the expression of converter losses but an academic example designed to highlight the convergence of the control algorithm to the optimal value. Its parameters are given in Table 1.

Results

Figures 10 and 11 depict trajectories of the output voltage, the total current, the currents in every converter and the duty cycles for the control law of [START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF][START_REF] Kreiss | A new framework for dealing with input constraints on parallel interconnection of buck converters[END_REF] and the control law of this paper, respectively. About Figure 10 Note that gains of the control law of [START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF][START_REF] Kreiss | A new framework for dealing with input constraints on parallel interconnection of buck converters[END_REF] have been carefully chosen in order that (i) v converges as fast as possible to its reference value with a negligible overshoot and (ii) currents do not exceed 8A for the simulation environment. About (i), i.e. convergence speed, let us stress that the duty cycle of the second converter is set to one during the transient so that the current of the second converter cannot grow faster. For the first converter, applying a larger duty cycle at the very beginning will necessarily drive i 1 to exceed 8A in the transient. Thus, with this linear control law, it is not possible to accelerate fo the first converter while respecting current constraint.

About Figure 11

Because the proposed control law is able to properly limit the current value, the speed of convergence of v can be substantially increased. Indeed, Figure 11 shows that d 1 is set to one as long as i 1 is smaller than its limit. So, i 1 cannot reach 8A faster than on Figure 11. Simultaneously, d 2 is set to 1 for all the transient, so that i 2 cannot grow faster. As a result, it does not seem possible for v to converge faster to its reference than as shown on Figure 11. Note that the anti-windup structure ensures a negligible voltage overshoot by rapidly decreasing i 1 to 0. This simulation also highlights that the lower limit of i 1 is respected.

To conclude, the trajectory of v shows that it reaches its reference around 0.0125s in Figure 10 and around 0.0075s in Figure 11. Thus, the proposed control law is faster than the one of [START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF][START_REF] Kreiss | A new framework for dealing with input constraints on parallel interconnection of buck converters[END_REF]. Furthermore, both current and input constraints are respected in the proposed control law, whereas it is not the case for the one of [START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF][START_REF] Kreiss | A new framework for dealing with input constraints on parallel interconnection of buck converters[END_REF]. Indeed, if the comparison environment changes (by setting v r = 16V for instance), the current constraint for the method of [START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF][START_REF] Kreiss | A new framework for dealing with input constraints on parallel interconnection of buck converters[END_REF] will be violated whereas it will be satisfied in the case of the proposed control law.

Experiments

Experimental setup

Experiments were performed to demonstrate the effectiveness of the proposed approach. The experimental setup is shown on Figure 12 and is composed of 2 buck converters (m = 2) with different inductors connected to a single variable resistive load with a parallel capacitor. The inductors are such that L 1 < L 2 . From (1a), it is clear that the first converter reacts faster than the second one (L 1 is smaller that L 2 ), but the latter has a higher efficiency. Indeed, for the same PWM period, the larger the inductor is, the less ripple it induces, so that its conduction losses are smaller.

The following observation is of major interest for the application and to understand the experiments. When none of the constraints are reached, the control algorithm tries to obtain the desire current distribution, i.e. the one that minimizes the losses and favors the slow converter. During transients, this slow converter is not able to provide the power sufficiently fast because of the constraints. By the optimal management of the constraints, the fast converter will automatically provide the desired power during transients. This feature allows one to use at the same time the efficiency of the second converter (for the steady state) and the capability of the first one (for the transient). Thereby, we obtain a fast device with a good efficiency. The expected result is that the second converter will be favored to deliver the output current in steady-state, but the first converter will be used to deliver the transient current needed to rapidly bring the output voltage to the reference.

The controller hardware is a dSPACE Micro-LabBox. The control objectives are to: (i) regulate the output voltage v to the reference v r = 12 V and (ii) impose an optimal current distribution through the branches with respect to the cost function J, reflecting the power losses. Load variations are commanded by a programmable DC electronic load BK Precision 8600 series with a maximum power of 150 W and controlled by the dSPACE board. The bench parameters are listed in Table 2. 12 Ω

Because r 1,1 > r 1,2 , the second converter is more efficient up to some current level depending on the quadratic term. The lower efficiency of the first converter is due to the fact that the ripple conduction losses are bigger for a smaller inductor.

Primary controller

According to Section 4, the duty cycle commands are given by the following equations

d 1 d 2 [k] = 1/E 1 1/E 2 v[k]+ 1 T s L 1 /E 1 0 0 L 2 /E 2 i r,1 [k] -i 1 [k] i r,2 [k] -i 2 [k] .
The value of L 1 /E 1 was experimentally determined to fit the real behavior of inductor L 1 which is not well-known.

Allocator Problem ( 10) is implemented with ε = 10 -6 . The script wlsq alloc.m of the toolbox given in [START_REF] Harkegard | Quadratic programming control allocation toolbox for Matlab[END_REF] computes the solution of this optimization problem in real-time.

Voltage controller

Following the approach of Section 5, the controller gains are k p = 4, k σ = 0.8 and k ξ = 0.4 whereas the anti-windup gain was given the value of k aw = 3. The chosen controller gains solve Proposition 1. The anti-windup gain was chosen experimentally because [START_REF] Serrani | Output regulation for over-actuated linear systems via inverse model allocation[END_REF] needed to be relaxed to improve closed-loop behavior. Furthermore, for the experiment, the constraint σr ∈ [-σ 0 , σ0 ] was relaxed to σr ∈ [σ min (R), σmax (R)] in order to optimize the system performance, even though the theoretical stability guarantees were lost. The chosen anti-windup gain is about ten times larger than the one given by the theory. Note that the one given is probably not the optimal value that satisfy [START_REF] Serrani | Output regulation for over-actuated linear systems via inverse model allocation[END_REF].

Experiments

Two experiments are performed. The first one aims to demonstrate the controller performance in the transient and steady state regimes. The second experiment shows that this approach makes it possible to easily switch off a converter in order to unplug it while still supplying the load with the other converter.

Experiment 1

Starting from zero initial conditions, the experiment is divided in three parts. The controller aims to have the output voltage reach v r as fast as possible at the start of the experiment, and to maintain this voltage afterwards. This experiment gives the responses for the system start and for step decrease and increase of the load value.

Experiment 2

At the beginning, the system is operating with a load value R = 6 Ω and with the optimal current distribution with respect to J. At t = 5 ms, the first row in the cost function in the optimization problem [START_REF] Sadabadi | A distributed control strategy for parallel dc-dc converters[END_REF] is replaced by i 2 -σ r so that i 1 is driven to zero. As a matter of fact, this modification implies that all the power required by the load is fed by the second converter. The current i 1 is now free to reach its preferred value i p = -[0.0125, 0.05] . However i p is negative and the lower limit i min,1 = 0 A. Consequently, i 1 is automatically brought to zero. This simple change in the algorithm makes it possible to unplug the first converter.

Results

Experiment 1

Figure 13 shows the output voltage, the total current reference and the total current. The blue line of the upper sub-plot corresponds to the voltage response whereas the red dashed line is the voltage reference value v r . The blue line of the lower sub-plot shows the total current σ. The total current reference σ r corresponds to the red dashed curve.

Due to the saturation management of the allocator, the total current is saturated to σ max = 22 A at the beginning. The anti-windup component prevents the voltage response from exceeding its limit. At t = 0.05 s, the voltage rises slightly due to the drop in load value, but the compensator rapidly returns the voltage to its reference value. At t = 0.01 s, the opposite situation occurs.

Figure 14 shows the currents, the current references and the duty cycles of each converter. The blue and red lines of the upper sub-plot show the currents i 1 and i 2 , whereas the yellow and purple dashed curves represent the current references. On the lower sub-plot, the blue curve corresponds to the duty cycle d 1 and the red one to d 2 .

It is worth mentioning that the current references given by the allocator can always be attained by the current controller (the slopes of the currents match the slopes of the references) and the current limits are respected. Consistent with the cost function, the current distribution in steady state is such that the second converter is favored. Yet, the first converter is used during the With regard to the duty cycles, there is a visible difference between d 1 and d 2 , due to the difference between the two inductor values. The duty cycle needs to vary more widely in the case of a larger inductor to regulate the current. The ripple on the current is also larger.

Figure 15 shows the first 20 ms of the upper sub-plot of Figure 14. This figure highlights the fact that the controller takes advantage of the heterogeneity of the converters. The allocator uses the first converter which is faster to more rapidly reach the voltage reference. Note the one-step delay between the reference and the measured value.

Experiment 2

Figure 16 shows the voltage, total current and currents responses for experiment 2. The blue line of the upper sub-plot shows the voltage response whereas the orange dashed line corresponds to its reference. On the lower sub-plot, the blue line shows the total current and the orange and yellow lines are respectively the responses of i 1 and i 2 . Observe that i 1 is driven to zero at t = 0.005 s. As a result, converter 1 can be taken out of service with minimal disturbance to the system. The current i 2 increases automatically to satisfy the power demand from the load. Aside from the benefit of control allocation in terms of optimized operation, the method also makes it possible to engage and disengage converters through trivial adjustments of the parameters of the algorithm.

Conclusions

An optimal control allocation strategy was proposed for the parallel interconnection of heterogeneous buck converters. In this manner, the regulation of the load voltage and the optimal distribution of the load current is achieved by separate components of the control algorithm. Converter dynamics and limits are taken into account. Dead-beat controllers are used for the current loops, which makes it possible to include the duty cycle constraints in the control allocator. The allocator computes current references via an active set quadratic optimization method. These references allow tracking of the total current reference while ensuring the feasibility of the commands and the optimization of efficiency as a secondary objective. The voltage controller is designed to regulate the voltage to its reference value, while taking into account the fact that load is unknown but lies within a known interval.

Experimental results validate the controller design and highlights the benefits of the proposed method, resulting in tight voltage control despite load variations and efficiency optimization in steady state. The second experiment shows that this type of controller can be used with minimal modifications to engage or disengage converters while supplying the load continuously. The latter is an interesting property for microgrids, related to the well known plug&play behaviour.

A possible topic of further research is the integration of other types of converters (such as boost converters) in the parallel interconnection. Non-linearities would be induced in the model and make the problem challenging. Furthermore, for the other control methods, recent results focus on distributed architecture (see [START_REF] Baranwal | A distributed architecture for robust and optimal control of dc microgrids[END_REF][START_REF] Wang | A decentralized current-sharing controller endows fast transient response to parallel dc-dc converters[END_REF] concerning the droop-control method and [START_REF] Sadabadi | A distributed control strategy for parallel dc-dc converters[END_REF] for current sharing). The extension of the control strategy of this paper to a distributed architecture is an appealing perspective.

Appendix A. Choice of the convex hull

To build the convex hull, polytopes that include each element of A e (R) and B e (R) for every R ∈ L = R -, R + are designed. Consider both elements If there exists a positive definite matrix W = W ∈ R 3×3 and Y ∈ R 1×3 such that [START_REF] Bouarfa | An optimization formulation of converter control and its general solution for the four-leg two-level inverter[END_REF] holds for all i ∈ {1, . . . , n v }, then by Schur complement and a pre/post-multiplication (see [START_REF] Boyd | Linear Matrix Inequalities in System and Control Theory[END_REF]), with P = W -1 and K = W -1 Y , one finds that (A e (R) + B e (R)K) P (A e (R) + B e (R)K) -P ≺ 0 holds. From [START_REF] Peaucelle | A new robust d-stability condition for real convex polytopic uncertainty[END_REF], the corresponding system ( 14) is then exponentially stable.

Figure 1 :

 1 Figure 1: Electrical schematic of m buck converters.

Figure 2 :

 2 Figure 2: Actuators/plant decomposition.

Figure 3 :

 3 Figure 3: Schematic of the overall controller

Figure 4 :

 4 Figure 4: Primary controller.

5 .

 5 The discrete-time model of a continuous LTI model ẋ = Ax + Bu is obtained by computing x[(k + 1)Ts] = e ATs x[kTs] + (k+1)Ts kTs e ATs((k+1)Ts-τ ) Bu(τ )dτ with a constant input because of the zero-order hold.

Figure 5 :

 5 Figure 5: Simulation time evolution with respect to the number of converters.

Figure 6 :

 6 Figure 6: Outer voltage control loop.

Figure 7 :

 7 Figure 7: Anti-windup action.

Figure 8 :

 8 Figure 8: Voltage v with its reference, total current σ and currents i k , when (i + j ) j∈{1,...,6} = 12 A holds.

Figure 9 :

 9 Figure9: Voltage v with its reference, total current σ and currents i k , when (i + j ) j∈{1,...,6} = 3 A holds.

Figure 10 :

 10 Figure10: Simulation for the control law of[START_REF] Trégouët | New framework for parallel interconnection of buck converters: Application to optimal current-sharing with constraints and unknown load[END_REF][START_REF] Kreiss | A new framework for dealing with input constraints on parallel interconnection of buck converters[END_REF].

Figure 11 :

 11 Figure 11: Simulation for the proposed control law.

Figure 12 :

 12 Figure 12: Experimental setup

1 .

 1 t ∈ [0, 0.05) s: the resistive load is set to R = 1 Ω. 2. t ∈ [0.05, 0.1) s: the load suddenly switches to R = 12 Ω. 3. t ∈ [0.1, 0.15] s: the load changes back to the value R = 1 Ω.

Figure 13 :

 13 Figure 13: Voltage v and total current σ with their references.

Figure 14 :

 14 Figure 14: Currents i k and duty cycles d k with current references

Figure 15 :

 15 Figure 15: Currents i k with their references during the first transient.

Figure 16 :

 16 Figure 16: Voltage, currents and total current when switching off converter 1.

a 11 :- 1 .respect to u gives da 12 dR = u 2 3 + o u 2 and db 1 dR = u 2 6 + o u 2 Figure A. 17 :

 11136217 Figure A.17: Polytope construction for a 11

Table 1 :

 1 Comparison bench parameters

Table 1 -

 1 A: converters parameters

Table 1 -

 1 B: other parameters

	Parameters	Values
	Capacitor C	5 mF
	Lower resistive bound R -	1 Ω
	Upper resistive bound R +	3 Ω
	Sampling period T s	100 µs
	Simulation period T sim	10 µs
	Sampling time t f	24 ms

Table 2 :

 2 Experimental bench parameters

Table 2 -

 2 A: converters parameters

	Parameters j = 1 j = 2
	E j (V)	24	24
	L j (mH)	0.4	4.13
	r 1,j	4	1
	r 2,j	0.1	0.1
	i -j (A) i + j (A)	0 10	0 12

Table 2 -

 2 B: other parameters

	Parameters	Values
	Switching period T PWM	20 µs
	Sampling period T s	200 µs
	Capacitor C	22 mF
	Lower resistive bound R -	1 Ω
	Upper resistive bound R +

Note that, in the case of static actuators, the internal controller Ca is not required because Pa reduces to an algebraic relationship.

Note that, for the experimental setup, u is such that, for all values of R ∈ L, da 12 /dR and db 1 /dR are greater than 0.