Ben Achraf

Abderazek Ben Ahmed

Abdallah

Hybrid Silicon-Photonic Network-on-Chip for Future Generations of High-performance Many-core Systems

Photonic Networks-on-Chip (PNoCs) promise significant advantages over their electronic counterparts. In particular, they offer a potentially disruptive technology solution with fundamentally low power dissipation that remains independent of capacity while providing ultra-high throughput and minimal access latency.

In conventional hybrid PNoC systems, several electrical control functions, such as path setup, acknowledgment and tear-down are necessary for the end-to-end optical transfer. However, the circuit-switched nature of photonic interconnect directly affects the performance and power characteristics of on-chip communication.

In this paper, we propose an energy-efficient and high-throughput hybrid Silicon-Photonic Network-on-Chip, named PHENIC 1 , targeted for future generations of high-performance many-core systems. PHENIC is based on a smart contention-aware path configuration algorithm and an energy-efficient non-blocking optical switch to further exploit the low

Introduction

The continuous increasing demand for higher performance computing systems and aggressive technology scaling has driven the trend of integrating large number of cores in a single chip [START_REF] Abdallah | Multicore Systems-on-Chip: Practical Hardware/Software Design, 2nd Edition[END_REF]. Such many-core processors are widely used across many application domains including generalpurpose, embedded [START_REF] Arabnia | A Distributed Stereocorrelation Algorithm[END_REF][START_REF] Bhandarkar | The REFINE Multiprocessor: Theoretical Properties and Algorithms[END_REF], digital signal processing (DSP) [START_REF] Arabnia | A Transputer Network for Fast Operations on Digitised Images[END_REF][START_REF] Arabnia | Arbitrary Rotation of Raster Images with SIMD Machine Architectures[END_REF][START_REF] Bhandarkar | A Reconfigurable Architecture For Image Processing And Computer Vision[END_REF], network [START_REF] Bhandarkar | The Hough Transform on a Reconfigurable Multi-Ring Network[END_REF][START_REF] Arabnia | A Transputer Network for the Arbitrary Rotation of Digitised Images[END_REF][START_REF] Arabnia | Parallel Stereocorrelation on a Reconfigurable Multi-Ring Network[END_REF], and graphics [START_REF] Arabnia | A Reconfigurable Interconnection Network For Imaging Operations And Its Implementation Using A Multi-Stage Switching Box[END_REF][START_REF] Wani | Parallel Edge-Region-Based Segmentation Algorithm Targeted at Reconfigurable Multi-Ring Network[END_REF][START_REF] Arabnia | A Parallel Algorithm for the Arbitrary of Digitized Images using Processand-Data-Decomposition Approach[END_REF].

In future generations of high-performance many-core systems, the efficiency of the communication infrastructure is as important as the computation efficiency of individual cores. Conventional electrical networks-on-chip (NoCs) are expected to reach their limits with increasing core counts because of high power dissipation and reduced performance. Photonic Network-on-Chip (PNoC) [START_REF] Ben Ahmed | PHENIC: Towards Photonic 3D-Network-on-Chip Architecture for High-throughput Many-core Systems-on-Chip[END_REF][START_REF] Ben Ahmed | Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC)[END_REF][START_REF] Ben Ahmed | Contention-free Routing for Hybrid Photonic Mesh-based Network-on-Chip Systems[END_REF][START_REF] Ben Ahmed | Hybrid Photonic NoC based on Non-blocking Photonic Switch and Light-weight Electronic Router[END_REF][START_REF] Ben Ahmed | Non-blocking Electro-optic Networkon-Chip Router for High-throughput and Low-power Many-core Systems[END_REF][START_REF] Chen | Source-and Destination-based Wavelength Assignment in Optical Network-on-Chip: Design and Performance[END_REF] is a novel concept enabling ultra-high communication bandwidth in the terabits per second range, low power, and low communication latency. When combined with Wavelength Division Multiplexing (WDM), multiple parallel optical streams of data are concurrently transferred through a single waveguide. This contrasts with the Electronic Network-on-Chips (ENoCs) [START_REF] Benini | Networks on chips: technology and tools[END_REF][START_REF] Mori | Advanced design issues for OASIS network-on-chip architecture[END_REF][START_REF] Ben Abdallah | Basic Network-on-Chip Interconnection for Future Gigascale MCSoCs Applications[END_REF] that require a unique metal wire per bit stream.

The key to saving power in PNoC systems comes from the fact that once a photonic path is established, the optical data is transmitted in an end-to-end fashion without the need for buffering, repeating, or regenerating. This is different from electronic NoCs, where messages are buffered, regenerated and then transmitted on the inter-router links several times en route to their destination.

In addition, photonic routers do not need to switch with every bit of the transmitted data like in Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 electronic routers; optical routers switch on and off once per message, and their energy dissipation does not depend on the bit rate. This feature allows for the transmission of ultra-high bandwidth messages while avoiding the power cost which found in traditional electronic networks.

In conventional hybrid PNoC systems [START_REF] Ben Ahmed | PHENIC: Towards Photonic 3D-Network-on-Chip Architecture for High-throughput Many-core Systems-on-Chip[END_REF][START_REF] Adi | An Efficient Path Setup for a Photonic Network-on-Chip[END_REF][START_REF] Chan | Physical-layer modeling and system-level design of chip-scale photonic interconnection networks[END_REF][START_REF] Shacham | Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors[END_REF][START_REF] Petracca | Design exploration of optical interconnection networks for chip multiprocessors[END_REF][START_REF] Matsutani | Prediction Router: Yet Another Low Latency On-Chip Router Architecture[END_REF][START_REF] Ye | 3-D mesh-based optical network-on-chip for multiprocessor system-on-chip[END_REF][START_REF] Wang | CPNoC: An Energy-Efficient Photonic Network-on-Chip[END_REF][START_REF] Zhang | Circuit-switched on-chip photonic interconnection network[END_REF], the source node first issues a configuration packet via a copper-based electrical link to the destination node. The configuration packet is routed via an Electric Control Network (ECN), reserving the photonic switches along the path for the photonic message which will follow it in the Photonic Communication Network (PCN). It includes a destination address information, and other additional control information. When the destination node receives the configuration packet, it will acknowledge that the optical path setup is done. When this small electric ACK is received and processed, the source node, then, starts transmission of optical data packets via the waveguides.

When the transmission is finished, the reserved path would be released by a release packet.

The circuit-switched nature of these hybrid PNoCs directly affects the performance and power characteristics of on-chip communication. As observed in our previously conducted study [START_REF] Ben Ahmed | Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC)[END_REF], hybrid PNoCs' energy overhead is mainly caused by the ECN which consumes more than 90% of the total power budget. Moreover, the latency required to execute the different steps involved in the path setting is found to be about three times longer than the photonic data transfer itself.

In this paper, we propose novel energy-efficient and high-throughput many-core hybrid Silicon-Photonic Network-on-Chip architecture (PHENIC). The proposed architecture efficiently reduces the blocking occurrence resulting in reducing the total energy and increasing the system's bandwidth. We demonstrate that the proposed system has a better performance and low energy dissipation compared to conventional hybrid PNoCs. The main contributions of this work are summarized as follows:

• A quantitative and performance study was performed on our earlier photonic NoC [START_REF] Ben Ahmed | PHENIC: Towards Photonic 3D-Network-on-Chip Architecture for High-throughput Many-core Systems-on-Chip[END_REF][START_REF] Ben Ahmed | Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC)[END_REF] upon which the proposed system is based. In this study, we analyze in detail the behavior Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 of hybrid-PNoC systems and we derive the main limitations contributing to both energy overhead and bandwidth reduction.

• A contention-aware path configuration algorithm that aims to decouple the ECN from the PCN in a manner that they work independently from each other. The proposed algorithm orchestrates the different path setup packets processes; thus, significantly alleviating the contention in the ECN and its consequent energy overhead and further enhancing the bandwidth, contrary to the already proposed hybrid-PNoC architectures.

• A new non-blocking photonic switch capable of handling all acknowledgment signals required for the path setup process (i.e., ACK and Tear-down). Thus, we adopt a new hybrid switching policy in the PCN: Spatial switching for the data stream transfer which is mostly used in conventional hybrid-PNoC designs. This is done by manipulating the state of the broadband switching elements. The second switching used is a Wavelength Selective Switching for the acknowledgment and Tear-down signals by using passive filters placed at the input and output of each port.

• A detailed performance evaluation where we highlight the efficiency of the proposed system and the performance gain when compared to well known previously proposed hybrid-PNoC systems.

Related Work

Many works have been conducted so far to solve the various challenges in PNoC designs in general. Vantrease et al. proposed a 3D stacked 256-core fully optical architecture named Corona to completely remove all electrical interconnect replacing them by an optical crossbar and token [START_REF] Vantrease | System implications of emerging nanophotonic technology[END_REF]. In a later work [START_REF] Vantrease | Light speed arbitration and flow control for nanophotonic interconnects[END_REF], they presented channel-based and slot-based protocols for their arbitration mechanism in addition to a flow-control for fully optical interconnects. Gu Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 et al. proposed FNOC [START_REF] Gu | A low-power fat tree-based optical network on-chip for multiprocessor system-on-chip[END_REF], a fat-tree based fully optical network. They omit the electronic control layer by using an optical turn-around router (OTAR) which carries both payload data and network control data on the same optical network. Pasricha et al. [START_REF] Pasricha | ORB: An on-chip optical ring bus communication architecture for multi-processor systems-on-chip[END_REF] proposed using an optical ring waveguide with bus protocol standards to replace global pipelined electrical interconnects. Beausoleil et al. [START_REF] Beausoleil | A nanophotonic interconnect for high-performance manycore computation[END_REF] proposed a crossbar-based ONoC, where 64 wavelengths are multiplexed over 270 waveguides. 256 waveguides are allocated for control and data, and 14 waveguides are for broadcast and arbitration. Zhang et al. [START_REF] Zhang | A Multilayer Nanophotonic Interconnection Network for On-Chip Many-Core Communications[END_REF] introduced a multilayer Nanophtonic interconnection named MPNOC which uses multiple layers to create a crossbar with no optical waveguide crossover. A recent work proposed by Randy et al. [START_REF] Morris | Three-Dimensional Stacked Nanophotonic Network-on-Chip Architecture with Minimal Reconfiguration[END_REF] uses also a multi-layer photonic interconnect with a Micro-ring Resonator for the intra layer communication rather than TSVs, as used in [START_REF] Zhang | A Multilayer Nanophotonic Interconnection Network for On-Chip Many-Core Communications[END_REF]. Kirman et al. [START_REF] Kirman | A Power-efficient All-optical On-chip Interconnect Using Wavelength-based Oblivious Routing[END_REF] proposed a fully optical ONoC using a wavelength-based oblivious routing, where each node has physical connectivity to all other nodes via static paths. For the wavelength allocation between the nodes, they use a wavelength-reuse algorithm proposed by Aggrwal et al. [START_REF] Aggarwal | Efficient routing in optical networks[END_REF]. Some other works focused in how to reduce the crossbar complexity in fully optical architectures. Pan et al. proposed Flexishare [START_REF] Pan | Flexishare: Channel sharing for an energy-efficient nanophotonic crossbar[END_REF] which is a flexible crossbar topology that allows channel provisioning according to the average traffic load and a distributed token stream arbitration which provides multiple tokens for a given channel.

Many research groups also proposed hybrid optical-electronic architectures. These works can be classified in two categories: the first one is circuit-switched based architecture where the electronic network is used for control and the data transmission is performed in the optical layer. The second category is cluster-based where the electronic and the optical networks are used for local and global communications, respectively. Previously in [START_REF] Ben Ahmed | Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC)[END_REF], we proposed a hybrid photonic NoC where the electronic layer is based on OASIS router [START_REF] Mori | Advanced design issues for OASIS network-on-chip architecture[END_REF] and the photonic switch is based on the work of Wang et al. [START_REF] Wang | On the Design of a 4x4 Nonblocking Nanophotonic Switch for Photonic Networks on Chip[END_REF]. In this work, a quantitative study was performed and we showed the importance of the optimization of the electronic layer. Hendry et al. [START_REF] Hendry | Circuitswitched memory access in photonic interconnection networks for high-performance embedded computing[END_REF] proposed Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 a circuit-switched memory access in photonic interconnection networks. This work represents a typical hybrid-PNoC, where all path setup steps are generated and executed in the ECN. Chan et al. [START_REF] Chan | Photonic interconnection network architectures using wavelength-selective spatial routing for chip-scale communications[END_REF] proposed a circuit switched Electro-Optical NoC for cores-to-memories connections with the addition of a wavelength-selective spatial routing to increase the path diversity and the bandwidth. Chan et al. [START_REF] Chan | Physical-layer modeling and system-level design of chip-scale photonic interconnection networks[END_REF] also proposed a circuit switched mesh using a 4x4 non blocking switch augmented with two gateways for ejection/injection from/to the network. An optical crossbar using 56 waveguides also used in this work. Sacham et al. [START_REF] Shacham | On the design of a photonic network-on-chip[END_REF] proposed a torus hybrid-PNoC based on a blocking 4x4 optical switch with an extra network for the ejection/injection from/to the torus. Petracca et al. [START_REF] Petracca | Design exploration of optical interconnection networks for chip multiprocessors[END_REF] proposed a non-blocking torus hybrid-PNoC where the conventional path setup scheme is used. Cisse et al. [START_REF] Adi | An Efficient Path Setup for a Photonic Network-on-Chip[END_REF] proposed a hybrid-PNoC torus named HPNoC which uses predictive switching [START_REF] Matsutani | Prediction Router: Yet Another Low Latency On-Chip Router Architecture[END_REF] in the ECN to reduce the setup latency by reducing the pipeline stages of the electrical router. Although the latency is reduced by using such predictive switching, the path setup steps are all generated and transmitted in the ECN. Ye et al. [START_REF] Ye | 3-D mesh-based optical network-on-chip for multiprocessor system-on-chip[END_REF] proposed a new protocol, called Quickly Acknowledge and Simultaneously Tear-down (QAST), to reduce the control delays during the path setup and tear-down processes. QAST uses an optical ACK signal and sends a Tear-down packet at the beginning of a transmission instead of sending it at the end of the transmission, as in conventional hybrid-PNoCs. Optimizing the Tear-down to be sent in parallel with the transmission does not really solve the problem of the path setup procedure.

Because, the optical transmission of the data is very short and sending the Tear-down after, or at the same time, does not really reduce the latency overhead.

In a recent work proposed by Wang et al. [START_REF] Wang | CPNoC: An Energy-Efficient Photonic Network-on-Chip[END_REF], the typical ECN is reduced to one central controller to process all path setup requests packets and set the corresponding optical switch according to a Microring Resonators (MRs) state table. Although this solution reduces the hop count in the ECN, it suffers from a complex centralized router and the electronic layer cannot be used like a conventional one if we want to use it for small packets (e.g., cache block broadcasting).

Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 Another interesting work to solve the path setup problem was proposed by Hendry et al. [START_REF] Hendry | Time-Division-Multiplexed Arbitration in Silicon Nanophotonic Networks-On-Chip for High-Performance Chip Multiprocessors[END_REF][START_REF] Hendry | Silicon nanophotonic network-on-chip using TDM arbitration[END_REF],

where they completely remove the ECN and they substitute it by a Time Division Multiplexing arbitration scheme which provides round-robin fairness to set up photonic circuit paths. In this work, instead of setting the path in the ECN, each communication between n any pair of nodes is only allowed to be active during a specific time slot. According to the obtained results, the electronic energy did not really decrease. This is because of the buffering required when there is a switching between the X and Y directions. Moreover, the path is fixed in the design level. For cluster-based architectures, Pan et al. proposed Firefly [START_REF] Pan | Firefly: Illuminating future network-on-chip with nanophotonics[END_REF] which reduces the crossbar complexity by designing smaller optical crossbars connecting selected clusters and implementing electrical interconnect within the cluster. Another recent work was proposed by Tan et al. [START_REF] Tan | A Hybrid Optoelectronic Networks-on-Chip Architecture[END_REF] where a butterfly fat-tree based hybrid optoelectronic NoC architecture is introduced using the generic wavelength-routed optical router. However, the wavelength assignment used in this approach for routing purposes leads to an inefficient use of the optical spectrum, as we previously explained.

Figure 1 summarizes all the previously stated works categorized according to their types and main key architecture.

To the best of our knowledge, none of the existing solutions proposed so far take advantage of circuit-switching benefits by using the entire optical spectrum through WDM for end-to-end communication and combines them with a contention-free path setup algorithm which: first, it eliminates the association between the ECN and the PCN which is considered as a direct source of the latency overhead. Second, it provides a better use of the ECN resources by minimizing the number of Path blocked packets generated in the network due to resources limitations. In the next section, we analyze the different limitations of conventional hybrid-PNoC systems.

Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0

Performance Study of Photonics NoC Systems

Previously in [START_REF] Ben Ahmed | Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC)[END_REF], we performed a preliminary evaluation where we analyzed the performance of our earlier proposed photonic NoC [START_REF] Ben Ahmed | PHENIC: Towards Photonic 3D-Network-on-Chip Architecture for High-throughput Many-core Systems-on-Chip[END_REF]. The evaluation is performed under different message sizes, network sizes, and with different synthetic traffic patterns. We also compared the results obtained with a conventional ENoC system [START_REF] Ben Abdallah | Basic Network-on-Chip Interconnection for Future Gigascale MCSoCs Applications[END_REF][START_REF] Ahmed | Graceful Deadlock-Free Fault-Tolerant Routing Algorithm for 3D Network-on-Chip Architectures[END_REF][START_REF] Ahmed | Architecture and Design of High-throughput, Lowlatency, and Fault-Tolerant Routing Algorithm for 3D-Network-on-Chip (3D-NoC)[END_REF][START_REF] Abdallah | Multicore Systems-on-Chip: Practical Hardware/Software Design, 2nd Edition[END_REF]. The power consumption near-saturation for different network sizes and different benchmarks, is evaluated. The first thing to notice from this figure is the efficiency of PHENIC system in terms of power consumption when compared to conventional ENoC. As we explained earlier, this efficiency is inherited from the low-power properties of hybrid-PNoC systems.

The second observation, is the large gap which manifests when we increase the network size from 64 to 256 cores. Despite the fact that this power overhead is still less than that of ENoC, it puts under question the scalability of hybrid-PNoC systems as we increase the network size. This is because these systems are targeted for Many-core systems which can reach the hundreds and thousands of cores [START_REF] Abdallah | Multicore Systems-on-Chip: Practical Hardware/Software Design, 2nd Edition[END_REF].

To understand the reasons for this increase in power, and which of the ECN and PCN is mainly responsible, we analyzed the power and latency overheads of 256 cores PHENIC system under different message sizes. We find out that the ECN consumes the largest portion of the system power budget. This portion varies between 78% and 93% of the system total power, depending on the message size. At the same time, the setup latency is more than 3x greater than the transmission latency.

From these results, it becomes obvious that the ECN should be given more attention and further optimized in order to reduce the power overhead, and also to increase the throughput in a given hybrid-PNoC system. For this purpose, we evaluated the average dynamic energy in the inputbuffer which is considered as the most congested and power-hungry component in the ECN. With Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 this analysis, we can have a clear understanding about the effects of the different packets traveling the ECN since the input-buffer activity reflects the other components behavior, such as the routing computation module, arbiter, crossbar, and inter-router links.

When evaluating the input-buffer dynamic energy, we observed that two portions dominate the total dynamic energy in the input-buffer which are the Path-setup-Control-Packet (PSCP) and Path blocked packets (85%), while the ACK and Tear-down packets consume much smaller ration (15%). As we previously mentioned, for every communication between a (source, destination) pair, a PSCP packet is injected and travels the ECN in order to request the necessary resources in the PCN. When these resources are utilized by another communication, a Path blocked packet is generated and travels back to the source node while releasing the already reserved resources by the PSCP packet. The alternation between the PSCP and Path blocked packets continues several times until the requested resources are released and become available. In this fashion, a significant amount of energy is wasted on generating, processing, and storing ineffective packets that do not reach their destinations after all. The energy burden of these two packets is quite high, and we can also observe that they are quite equivalent. This is logic since as the number of Path blocked packets increases, the number of PSCP packets necessary to establish again the path increases as well. In an ideal situation, the Path blocked energy overhead should be removed and the PSCP one should be a little bit higher than those of the ACK and Tear-down overheads. In practice, it is very difficult; thus, the most effective approach is to reduce the blocking occurrence as much as possible in order to reduce the PSCP packets generation and alleviate the consequent congestion.

In conventional hybrid-PNoC systems, blocking is mainly caused by two major factors: first, the use of a blocking optical switch where some input-or output-ports share the same resources (MRs and waveguides). This kind of switch has been used in many prior works in order to decrease the energy (both static and dynamic) in the PCN by reducing the number of MRs and waveguides. Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 [START_REF] Ben Ahmed | Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC)[END_REF][START_REF] Chan | Physical-layer modeling and system-level design of chip-scale photonic interconnection networks[END_REF][START_REF] Wang | On the Design of a 4x4 Nonblocking Nanophotonic Switch for Photonic Networks on Chip[END_REF] while Figs. 2 (b) and (d) depict two non-blocking ones [START_REF] Chan | Physical-layer modeling and system-level design of chip-scale photonic interconnection networks[END_REF][START_REF] Petracca | Design exploration of optical interconnection networks for chip multiprocessors[END_REF]. From these figures, we can see the difference between the two kinds of switches in terms of complexity. As a matter of fact, blocking switches are simple with limited number of MRs and waveguides, while nonblocking switches are much more complex. Nevertheless,the ECN energy and latency significantly increase when using a blocking type, as we previously proved. This is due to the big difference between the energy properties of each of the photonic and electrical paradigms. As a consequence, hybrid-PNoCs should be equipped with non-blocking optical switches that allow the elimination of the dependency caused by the resources' sharing between communications.

The second factor for blocking is the high congestion frequently found in the ECN. As we previously mentioned, the ECN in most hybrid-PNoCs host different kinds of packets (e.g., PSCP, Path blocked, ACK, and Tear-down). These packets share all the resources of the ECN, creating a congestion that has a huge impact on the energy, as well as on the system bandwidth. To relieve this congestion, the naive approach is to increase the buffer size; however, this solution increases the static power consumption and also the ECN area. Allowing part of these packets to be transferred in the PCN, provides a better traffic balance and fair resource utilization. In particular, by sending the ACK and Tear-down packets in the PCN as optical signals, three main advantages can be achieved: (1) the congestion in the ECN is significantly relieved and as a result the blocking probability decreases as well. (2) When transferring these two types of packets in the PCN, we can exploit the benefits of the latter's low-energy properties. Moreover, the ECN buffer size can be reduced without affecting the performance. (3) Break the dependency between the different path setup steps which can increase the blocking probability.

To understand this latter point, Fig. 3 illustrates a simplified example of three cases of dependency frequently observed during our evaluation study between the PSCP and Tear-down packets. In the first case, a PSCP of a given communication (C3) is stored in the west input-port and requesting the east output-port; however, the requested resources for both west input-port Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 and east output-port are utilized by a former communication (C1). Despite the fact that the Teardown packet which will release these resources in the next cycle, the PSCP is dropped and a Path blocked packet is generated to travel back to the source node (represented by a green dashed line in Fig. 3) where a new PSCP is generated. Similarly in the second case, a PSCP in the south input-port (C6) is requesting the north output-port. In this case, the PSCP does not share the same output-port with the previous communication (C4). Nevertheless, it is blocked since the inputport resources are already reserved and will be released in the next cycle by the Tear-down packet located in the same input-port. In the third case, the PSCP (C5) and the Tear-down (C2) packets are located in different input-ports and requesting the same local output-port. We assume that for arbitration reasons the PSCP is served first; therefore, it is blocked despite the fact that the local output-port resources will be released in the next cycle. This case is considered to be the worst. This is because the PSCP is already in the destination node. Nevertheless, it is blocked and has to travel all the way back to the source node due to its dependency with the Tear-down packet.

As a conclusion for this study, blocking constitutes the major source of energy and latency overhead in conventional hybrid-PNoC systems. It is mainly caused by congestion, which mostly occurs due to the different types of packets sharing the ECN resources. In order to solve the problems elaborated in this study, we explain the details of the complete architecture of the proposed PHENIC-II system in the next section. We first highlight the key functions and components of the energy-efficient non-blocking switch, and then the adopted path setup algorithm targeted to alleviate the contention commonly found in conventional hybrid-PNoC systems.

Proposed System Architecture

The simplified block diagram of the PHENIC system is shown in Fig. 4 In the next subsections, we explain the photonic switch, electronic router, and the adopted path setup algorithm.

Non-blocking Photonic Switch

As we mentioned earlier, our proposed switch should be able to handle the data stream like any other conventional photonic switch, as well as the ACK signals and the resulting regeneration process of the Tear-down signal at each hope. Thus, we adopt a hybrid switching policy: Spacialswitching for the data signals by manipulating the state of the broadband switching elements (green MRs in Fig. 5) and a Wavelength-selective switching for the Tear-down signals by using detectors and modulators. Moreover, since the Tear-down signals should be checked and regenerated at each hop, it is crucial that their manipulation should be done automatically and without interfering with data signals nor causing a blockage inside the switch.

It is important to mention that we did not add a dedicated gateway including detector and modulator banks for the Tear-down signal at the local port. Instead, when the Tear-down is generated at the source Network Interface, it is first sent to the electronic router. There, the Photonic Switch Controller, explained later in Fig. 6, will release the corresponding MRs and generate another Tear-down which is sent to the output-port modulator in the PCN where it continues its path in a hop-by-hop basis until it reaches its destination. At the destination node, the Tear-down is detected in the input-port and sent to the Photonic Switch Controller in the corresponding electronic router. In this fashion, we can omit the overhead of an additional gateway Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 which becomes significant when we increase the number of cores.

Table 1 shows the MRs configuration for data transmission, where 18 MRs are used in a nonblocking fashion. We use the first six wavelengths in the optical spectrum starting from 1550 nm, with a wavelength spacing equal to 0.8 nm to maintain a low cross-talk as reported in [START_REF] Preston | Performance guidelines for WDM interconnects based on silicon microring resonators[END_REF].

For the acknowledgment signals, we use the first five wavelengths in the optical spectrum starting from 1550 nm: four wavelengths for the Tear-down signal where each one is dedicated for each port except the local one. In addition, a single wavelength for the ACK. The remaining available wavelengths are used for data transmission. Moreover, the five wavelengths used to control the ACK and Tear-down signals are constant regardless of the network size, in contrast with the fully optical where the number of wavelength used for control and arbitration grows with the network size. Thus, cutting these wavelengths from the available spectrum to be used for control, would not degrade the system bandwidth. These five wavelengths will be negligible especially when Dense Wavelength Division Multiplexing (DWDM) is used providing up to 128 wavelengths per waveguide [START_REF] Brusberg | Single-mode Glass Waveguide Platform for DWDM Chip-to-Chip Interconnects[END_REF]. The wavelength assignment for each port is shown in Table 2.

In case where the Tear-down signals enter the switch, they need to be redirected to the corresponding electronic router. Since these signals are coming from different ports, and they are modulated with different wavelengths, detectors capable of switching all the four wavelengths are placed in front of the input-ports to intercept them. The converted optical signal will be redirected to the electronic router to be processed. According to the information included, the corresponding MRs will be released. For the ACK, when the PSCP reaches the destination, 1-bit optical signal is modulated starting from the output port (i.e., opposite direction) and travels back to the source.

With this smart hybrid switching mechanism, we take advantage of the low-power consumption of the optical link by using optical pulses modulated with the adequate wavelength instead of propagating the acknowledgment signals in the ECN. Second, we take advantage of the WDM proprieties by separating the acknowledgment packets and the data signals and let them coexist Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 in the same medium without interfering with each other. This is in contrast with the electronic domain where these acknowledgment packets travel for a several hops consequently blocking (preventing) the waiting cores from sending their PSCP packets.

Although the insertion loss and cross-talk performance study are out of the scope of this work, it is important to mention that by using such scheme to handle ACK and Tear-down signals no additional insertion loss will be added. In fact, since the Tear-down signal will be generated at each hop, the incurred insertion loss will be much lower than the worst case insertion loss. For the ACK signal, the insertion loss will be the same as the corresponding data signal loss. Equation 1 [START_REF] Sun | DSENT-A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modeling[END_REF] shows how the laser power is calculated in the PCN. Where P sense,i is the laser power required at a given photo-detector i and loss i is the loss of that photo-detector, given in dB.

P Laser = P sense,i .10 loss i /10 (1)
The energy power overhead is caused by the modulators and detectors placed in the front of each port, which as we show later in the evaluation section, is much lower than the one caused if acknowledgment signals were transferred in conventional electrical links. In addition, since modulators and detectors are energy bit-dependent, we only use 1-bit to modulate the ACK signal and 8-bits for the Tear-down to modulate any destination address in a 256 cores system.

Light-weight electronic router

In the proposed PHENIC system, the ECN is based on Mesh topology. The packets are forwarded along the network using Wormhole-like switching policy and then routed according to Dimension- The NI is connected also to the data switch (i.e., PCN). When the source node receives the ACK, the payload is processed by a serializer bank (if needed), a high speed driver, and a modulator to convert the electrical signal to an optical one. At the source node, the optical data leaves the data switch and go through a detection step, a high speed Trans-Impedance-Amplification step, and a deserilization step. At the end the NI's receiver, receives the payload data with its original clock speed.

Contention-free Path Configuration Algorithm

After introducing the photonic switch and electronic router, we dedicate this subsection to explain the proposed path-setup algorithm and explain its ability to remove the dependency between the ECN and PCN which is causing a significant latency overhead in conventional hybrid-PNoC systems. In addition, we considerably decrease the latency caused by the path blocking that requires several cycles for the path dropping and the new PSCP generation. Another key feature of the proposed path setup algorithm is the efficiency of the ECN resources' utilization. By moving the acknowledgment signals to the upper layer, we can reduce the buffer depth to only 2 slots, since half of the network traffic is eliminated. This reduction is a key factor to design a lightweight router, highly optimized for latency and energy.

Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 Figure 8 (a) shows an example of a successful path-setup process where all the necessary resources between a given source-destination pair are reserved. Before optical data transmission, the source node issues a Pathsetup -Control -Packet (PS CP) which is routed in the ECN and includes information about the destination and source addresses. In addition to the source and destination addresses, other information are included. For example, 1-bit is used for the Packet-type field. This field can be "0" for a PSCP (Path-Setup-Control-Packet) and "1" when this configuration packet is a Path-blocked. Other information to ensuring Quality-of-Service and fault-tolerance, such as Message-ID, Fault-status, Error-Detection-Code, can be also included. For each electrical router, the output-port is calculated according to Dimension-Order routing [START_REF] Ben Abdallah | Basic Network-on-Chip Interconnection for Future Gigascale MCSoCs Applications[END_REF].

Every time the PSCP progresses to the next router, the optical waveguides between the previous and current routers are reserved. Depending on the output port of the electrical router, the corresponding photonic router is configured by switching ON/OFF one or more MRs using the MRs configuration table shown in Table 1. In the example shown in Fig. 8 (a), the packet is entering the local input-port attached to the Network Interface (NI) and requesting the east outputport. According to Table 1, MRs 12 and 17 are required and their availability is checked in the (Micro Ring State Table ) MRST. In this table, both MRs' states are "0" (free). Therefore, the switch controller reserves these two MRs and changes their states from "0" (free) to "1" (not free). After this successful reservation (hop based), the PSCP continues its path to the next hop and the same procedure is repeated until all necessary MRs are reserved for the complete path.

This process is illustrated in lines 1 -10 of Algorithm 1. In case where the requested MRs at a given optical switch along the path are not available, blocking occurs. This can be seen in Fig. 8 (b) where MR 16, which is necessary for the ejection to the local output-port from the west input-port, is used by another communication. In this case, the PSCP is converted into a Path blocked packet (PB). The PB, then, travels back to the source node and releases the already reserved resources.

The release is done by re-updating the corresponding entries in the MRST to "0" and by sending Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 an electrical "OFF" signal to the corresponding MRs in the PCN. This process is illustrated in After the MRs are deactivated, a new optical Tear-down signal is generated according to the used wavelength. It is sent through the PCN to the next hop where it is converted back to electrical and redirected to the EC in the corresponding electronic router to be processed. After this process, the MRs are released and a new optical Tear-down signal is generated. This process is repeated until the Tear-down reaches the destination and all optical resources are released. It is important to mention that the path-setup and path-blocked processes of the proposed algorithm are very similar to the conventional ones [START_REF] Ben Ahmed | PHENIC: Towards Photonic 3D-Network-on-Chip Architecture for High-throughput Many-core Systems-on-Chip[END_REF][START_REF] Ben Ahmed | Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC)[END_REF][START_REF] Adi | An Efficient Path Setup for a Photonic Network-on-Chip[END_REF][START_REF] Hendry | Circuitswitched memory access in photonic interconnection networks for high-performance embedded computing[END_REF][START_REF] Chan | Physical-layer modeling and system-level design of chip-scale photonic interconnection networks[END_REF][START_REF] Shacham | On the design of a photonic network-on-chip[END_REF]. The main difference is that the MRST in our proposal contains only two states: Free and Active. The MRs are set "ON" as soon as the PSCP succeeds to reserve them. In the conventional mechanisms, three states are necessary:

Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0

Free, Reserved, and Active. When the PSCP finds the requested MRs Free, it updates their states in the MSCT to Reserved without turning them "ON". When the complete path-setup process is completed, the ACK signal travels back to the source node and sets the corresponding MRs "ON" by updating their states in the MSCT to Active. With the proposed algorithm, some portions of the reserved path might be set "ON" and then "OFF" due to the unavailability of the resources.

However, it enables the fast ACK transmission in the PCN.

In conventional path-setup algorithms, the ACK and Tear-down packets are transmitted in the ECN and have to go through all the buffering, routing computation, and arbitration stages. With the proposed algorithm, they are carried via the PCN. As a consequence, the ETE latency can be significantly reduced in addition to the dynamic energy saving that can be achieved.

Evaluation

Evaluation Methodology

We simulate our proposed PHENIC system using a modified version of PhoenixSim which is a physical-layer simulator developed in the OMNeT++ simulation environment [START_REF] Chan | PhoenixSim: A Simulator for Physical-Layer Analysis of Chip-Scale Photonic Interconnection Networks[END_REF]. The used simulator incorporates detailed physical models of basic photonic building blocks such as waveguides, modulators, photodetectors, and switches. Electronic energy performance is based on the ORION simulator [START_REF] Kahng | Orion 2.0: A power-area simulator for interconnection networks[END_REF]. We evaluate the bandwidth performance and energy consumption for 64 and 256 cores systems. We compare the obtained results with the previous blocking meshbased PHENIC system (PHENIC BL) [START_REF] Ben Ahmed | Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC)[END_REF] and three conventional hybrid-PNoC architectures [START_REF] Chan | Physical-layer modeling and system-level design of chip-scale photonic interconnection networks[END_REF][START_REF] Chan | PhoenixSim: A Simulator for Physical-Layer Analysis of Chip-Scale Photonic Interconnection Networks[END_REF][START_REF] Shacham | Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors[END_REF]. We chose these three networks for their different behaviors. In fact, the first one has a blocking switch (Chan Mesh) and was proposed by Chan et al. [START_REF] Chan | Physical-layer modeling and system-level design of chip-scale photonic interconnection networks[END_REF]. The second one is considered as non-blocking (Chan Xb), since it uses a crossbar [START_REF] Chan | PhoenixSim: A Simulator for Physical-Layer Analysis of Chip-Scale Photonic Interconnection Networks[END_REF]. The third system is a torus-based system (Shacham) [START_REF] Shacham | Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors[END_REF] having the capability of setting the path with less hop count Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 by taking advantage of the connections between the edges. For benchmarks, we used Random Uniform and Bitreverse traffic patterns. Random Uniform traffic is a communication pattern where the destinations are randomly and uniformly selected each time a new communication occurs. In Bitreverse, each node sends messages to the complement node of its ID; thus, resulting in very long communications to observe the scalability of the proposed system. Tables 3 and4 show the system and energy configuration parameters, respectively.

PHENIC System Performance Evaluation

Complexity

In this section we evaluate the complexity of the proposed system against the four other architectures. The evaluation considers the number of used rings and the resulting static thermal tuning. The number of used MR is given by equation 2, where Mod/Detc (ring) is the number of rings required to modulate/detect the payload signal. S witch (ring) is the number of ring required for the photonic switch to route the optical data. Finally, the ACK s(ring) is the number required to handle the acknowledgment signal.

T otal (ring) = Mod/Detc (ring) + S witch (ring) + ACK s(ring)

Tables 5 and6 show the comparison results for 64 and 256 cores system, respectively. We can see that the two blocking networks (PHENIC BL and Chan Mesh) have the lowest number of rings. In fact, this kind of network is used for light-traffic load, where the injection rate is low and the use of blocking switch does not degrade the performance. In addition, with minimal number of rings, the resulting insertion loss is lower than the non-blocking one. But, when it comes to the system performance, this kind of network shows higher energy and the number of blocked requests increases considerably, as shown in the next section. For the proposed PHENIC system, Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 it has an additional rings used for acknowledgment signal, compared to the other networks. This increase can reach 100%, 50% and 12% when compared to the blocking networks, crossbar and torus systems, receptively. We also observe the same behavior when evaluating the required static thermal tuning, which is required to maintain the functionality of the ring, under 20K temperature with 1µW for each ring.

Latency and Bandwidth Evaluation

Figures 9 (a) and (b) show the overall average latency and the average latency near the saturation region, respectively. We can see that for zero-load latency, all networks behave in the same way.

Near saturation, PHENIC shows more flexibility and scalability in 256 cores when compared to the other networks. For the 64 cores configuration, the crossbar-based system slightly outperforms PHENIC system in terms of latency. This can be explained by the use of Optical-to-Electronic conversion of the Teardown which affects the overall latency for small networks.

For the achieved bandwidth, Fig. 10 shows that the bandwidth is increased by 24% and 51% when compared to PHENIC BL and Chan Mesh, respectively, for both 64 and 256 cores configurations. When compared to the crossbar and the torus systems, we can see that the three systems behave in the same way. While the torus system has the capability of setting the path with less hop count, we can see that PHENIC system can achieve the same performance without the need for an extra accessing network which is required for the torus. This behavior is observed for both 64 and 256 core systems.

From Fig. 11 we can see the resulting blocking latency comparison results for all studied networks in 64 and 256 cores systems under random uniform traffic. The blocking latency can be defined as the average time added to the overall latency when a path setup packet is being blocked and needs to go back to the source node. The first thing to notice from Fig. 11 is the resulting overhead of using a blocking switch to save on the number of rings. We can Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 see how the previous blocking PHENIC BL and the Chan Mesh networks have a considerable blocking latency, reaching the 200% when compared to the proposed PHENIC, crossbar, and the torus systems, in both 64 and 256 cores systems. When comparing the proposed PHENIC to the crossbar-based and the torus-based systems, we can see that the proposed PHENIC slightly outperforms the two networks in 64 cores system. When it comes to larger networks, we can clearly see the benefits of the proposed PHENIC system. For example, when compared with the crossbar-based system, which is considered as non blocking and also having the same number of rings (except for those used for the acknowledgment signals), we can see an improvement of 60% just before the saturation. We can conclude that by breaking the dependency of the different configuration packets, many requests can be saved from being blocked. This improvement is less when compared to the torus-based system with just 37%. This is because it has the capability of using the edges, so a path blocked packet spends less time to reach the source node. Another interesting behavior is the one of the curve in the proposed system is less aggressive then the other networks. We can see, for instance, that between 0.06 ms and 0.04 ms injection rates (nearsaturation region), the blocking latency for the crossbar-based system increased by 300%, while it is just 63% for the PHENIC system. We can say that the proposed system is less sensitive to the blocking when compared to a blocking (PHENIC BL, Chan Mesh) and non-blocking networks (Chan Xb, Shacham).

Our final evaluation in this subsection is shown in Fig. 12, which shows the number of blocked requests that reached more than half of the network diameter. In other words, the number of PSCPs that failed to reach their destinations after traveling more than half of their path. We can see that for low injection rates, all networks behave similarly. When the injection rate increases and the system reaches the near-saturation region (between the two vertical dashed lines) we can see that in the proposed PHENIC system, the number of blocked requests decreases by 31% and 36% when compared to the crossbar and the torus based systems for 256 cores, respectively. Compared to the Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 blocking networks, the number of blocked requests for PHENIC 256 cores decreases by 42%, and by 35% for 64 cores system. Moreover, the curves have the same behavior as the blocking latency in Fig. 11. We can notice that the curve for the other networks is more aggressive, in contrast with the proposed system. In this figure, we are only showing the most energy-costly portion (i.e., packet blocked). Since a PSCP traveling more than half the network and after that it is canceled, this incurs high wasted energy dissipation (i.e., buffering, switching, crossbar traversal).

Energy Evaluation

We evaluate the energy overhead for the PSCP which is given by Equation 3, where PS S ucc is the dynamic energy in the ECN dissipated by the successful PSCPs reaching their destinations, and PS Failed is the dynamic energy consumed by the PSCPs which resulted in Path blocked packets.

We also evaluate the ACK energy overhead which is defined as: Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 energy which is also considerably reduced by 36% in 256 cores and 64% in 64 cores systems.

When compared to the crossbar-based system, this latter outperforms the proposed PHENIC in both 64 and 256 cores systems. Nevertheless, PHENIC system is still showing better performance when compared to the torus-based system.

Figures 16 (b) and (d) represent the energy overhead when the system is fully loaded (i.e., near the saturation region) for random uniform and bitreverse traffic, respectively. We can notice that the decrease in the PSCP and ACK energy is considerable when compared to the other architectures for both small and large networks, especially when compared to the blocking ones.

Moreover, the torus based system is largely penalized due to the additional ports for the connection between the edges.

We can also see, that for all network the PSCP energy dominates the overall energy, this is because the blocking can be avoided to a certain limit; but, due to the photonic resources limitation, some of the requests become blocked. This problem is mostly related to the structure of the switch and can be avoided by using high-radix switches in addition to be related to the used routing algorithm. For the acknowledgment's energy, it is clear that the optical handling of the Tear-down and ACK adopted in PHENIC is more energy efficient for the two benchmarks and for the two network sizes.

This can be clearly observed when we compare the total energy and the energy efficiency.

While the proposed PHENIC, crossbar-based, torus-based systems behave in the same way in terms of bandwidth, they have different energy profiles.

Figure 15 shows the total energy and the energy efficiency comparison results for 64 and 256 cores systems. For the 256 cores configuration, the proposed system outperforms all other networks. This is illustrated by an improvement in terms of energy efficiency reaching 26% and 48% when compared the crossbar-based (non blocking) and the mesh-based (blocking), respectively. When compared to the torus-based architecture, PHENIC improves the energy Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 efficiency by up 70%. The torus-based architecture offers high bandwidth thanks to the connection between edges leading to short communications. On the other hand, it comes at high energy cost.

This can be explained by the fact that the additional input-ports, required for the edge connections established in the torus-based system, incur increased area and consequently an energy overhead.

In Fig. 16 (a) and (b), the energy breakdown is shown for 64 and 256 cores systems, respectively. Compared to other networks where the electronic energy is reaching 90% of the total energy, PHENIC shows more balanced energy distribution between the photonic and electronic networks. This is despite the fact that the electronic power is still high with 70% of the total system energy. When we dig more in the energy evaluation, we find the explanation of this energy efficient scheme. Figures 17 (a) and (b) show the buffering dynamic energy comparison results. From this figure, we can see first how the dynamic energy of the PSCP is decreased considerably when compared to all other networks. We can also observe the significant decrease in the Path blocked dynamic energy which is a direct consequence of the considerable decrease of the PSCP dynamic energy. it can be seen that the torus-based system can achieve the same performance of the proposed PHENIC system in terms of bandwidth, at the cost of higher electronic energy.

From these results, we can see that PHENIC outperforms systems whether having non blocking or blocking switches. In addition, it provides much better energy efficiency than the torus-based which can offer the same bandwidth as the proposed system. We can conclude that the obtained improvement by PHENIC is the result of the association of three main factors together:

(1) the non blocking switch supporting optical acknowledgment signals, (2) the light-weight router with reduced buffer size, (3) and the path setup algorithm to adopt hybrid switching inside the photonic switch.

Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0

Conclusion and Future Work

Future generations of many-core system applications with hundreds of cores will require a scalable communication fabric that can enable high performance. To address this challenge, we proposed an energy-efficient and high-performance hybrid Silicon-Photonic Network-on-Chip architecture (PHENIC). The proposed system is based on a novel contention-aware path configuration algorithm and an energy-efficient non-blocking photonic switch. Simulation results

show that PHENIC enjoys 50% increase in bandwidth and about 60% decrease in energy related to the control unit, versus other reported architectures. This performance comes from the decrease in the blocking latency and the number of blocked requests. This encouraging results highlight the potential of using photonics on chip and the PHENIC hybrid photonic NoC architecture to meet the design and performance challenges of future generations of many-core systems.

As a future work, we plan to investigate the reliability issue of such complex systems. We also plan to investigate the routing algorithm by providing more path diversity during the path configuration process in the ECN. This aims to further reduce the number of blocked requests and the consequent energy and latency overhead. Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0

0⋅10 0 5⋅10 -2 9⋅10 -2

Figure 2

 2 Figure 2 shows four kinds of switches where Figs. 2 (a) and (c) represent two blocking switches

  . The system consists of two networks: the first one is the PCN, and is based on silicon broadband photonic switches interconnected by waveguides; the second one is the ECN and is used for path reservation Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 and configuration of the optical switches at the PCN by mainly powering ON/OFF the MRs. Each Processing Element (PE) is connected to a local electrical router and also connected to the corresponding gateway (modulator/detector) in the PCN. Messages generated by the PEs are separated into control signals and payload signals. Control signals are routed in the ECN and used for path setting (routing). The payload signals are converted to optical data and transmitted on the PCN.

  Ordered-Routing (DOR-XY). As a flow control the ECN adopts Stall-Go mechanism, and Matrix-Arbiter as a scheduling technique. The router is considered as the backbone element in the whole ECN. The ECN router architecture is based upon OASIS-NoC router (ONoC Router)[START_REF] Ben Abdallah | Basic Network-on-Chip Interconnection for Future Gigascale MCSoCs Applications[END_REF][START_REF] Ahmed | Graceful Deadlock-Free Fault-Tolerant Routing Algorithm for 3D Network-on-Chip Architectures[END_REF][START_REF] Ahmed | Architecture and Design of High-throughput, Lowlatency, and Fault-Tolerant Routing Algorithm for 3D-Network-on-Chip (3D-NoC)[END_REF][START_REF] Abdallah | Multicore Systems-on-Chip: Practical Hardware/Software Design, 2nd Edition[END_REF]. Figure6illustrates the ECN router architecture where the routing process at each router can Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 be defined by three main pipeline stages: Buffer writing (BW), Routing Calculation and Switch Allocation (RC/SA), and finally the Crossbar Traversal (CT).As shown in the Fig.6, the electronic arbiter receives the detected Tear-down from the above switch (colored arrows). According to the information encoded in this signal, the corresponding MRs are released and a new Tear-down is generated for the next hop until it reaches its final destination and all MRs involved in this communication are released. The figure shows also the connection between the network interface (NI) and the local port, where a configuration packet (CP) is sent from the NI to the local port. The CP could be a setup packet or a path blocked packet.

lines 11 -

 11 [START_REF] Ben Abdallah | Basic Network-on-Chip Interconnection for Future Gigascale MCSoCs Applications[END_REF] of Algorithm 1. When the PSCP arrives successfully at the destination node, the NI modulates one-bit acknowledgment (ACK) signal to travel back to the source via the PCN. This can be seen in Fig.8 (c) and in lines 1 -5 of Algorithm 2. Upon the arrival of this ACK signal, the source node modulates the payload through the data modulators and sends it to the destination node via the PCN. Lines 6 -10 of Algorithm 2 depicts this data/payload transfer phase. The last process of the proposed path-configuration algorithm is the T eardown step as shown in lines 11 -16 of Algorithm 2. When the entire payload is transmitted, it is necessary to release the reserved optical resources. This is handled by the source node which sends a T eardown packet to the destination after predetermined number of cycles depending on the source-destination addresses, transmission bandwidth and message size. As shown in Fig.8 (d), the source's NI sends the electronic T eardown packet (TD) to the first electronic router ER 1 . The Electronic Controller (EC) in this router indexes the MRCT with input-output ports information and determines the MRs that need to be released. As we can see in this figure, the states of MRs 12 and 17, previously reserved in the path-setup process, are reset to Free (state="0") and electrical "OFF" signals are sent to these two MRs.

( 1 ) 5 )

 15 Figures 16 (a) and (c) show the PSCP and ACKs dynamic energy overhead for half-load traffic

Figure 1 :Figure 2 :

 12 Figure 1: Hybrid and fully PNoC systems taxonomy.

Figure 3 :

 3 Figure 3: Simplified example illustrating the dependency between the PSCP and Tear-down

Figure 4 :Figure 5 :Algorithm 1 : 3 DestAdd ← PSCPi; 4 PortIn ← PSCPi; 5 if 6 GrantFigure 6 :

 45134566 Figure 4: PHENIC system architecture. (a) Hybrid electro-optical router interconnected for a 3x3

Figure 14 :

 14 Figure 14: Path setup and acknowledgments energy (Cont): (c) half-load under bitreverse traffic,

Figure 15 :

 15 Figure 15: Total energy and energy efficiency comparison results under random uniform traffic

Table 1 :

 1 Micro-ring Configuration For Data Transmission. Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0

	output/Input Local North East	South West
	Local	-	9,18	11,18 14	16
	North	17,10 -	1	3	None
	East	17,12 2	-	None 4
	South	13	6	None -	8
	West	15	None 5	7	-

Table 2 :

 2 Wavelength Assignment For Acknowledgment Signal Handling. Mod λ 1 Mod λ 4 Mod λ 3 Mod λ 2Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0

		Local North East	South West
	Input	Mod λ 0 Det λ 3	Det λ 2	Det λ 1	Det λ 4
	Output Det λ 0

Table 3 :

 3 Configuration Parameters.Figure 11: Average blocking latency comparison under random uniform traffic. The left Y-axis shows the blocking latency for PHENIC BL and Chan Mesh networks and the right Y-axis for PHENIC, Chan Xb and Shacham networks.Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0

	Network Configuration	Value
	Process technology	32nm
	Number of tiles	256,64
	Chip area (equally divided amongst tiles) 400 mm 2
	Core frequency	2.5GHz
	Electronic Control frequency	1GHz
	Power Model	Orion 2.0
	Buffer Depth	2
	Message size	2 kilobytes
	Simulation time	10ms (25 10 8 cycles)

Acknowledgments

This work is partially supported by the University of Aizu Competitive Research funding (CRF), Ref. P-12-2014-2015. We wish to thank all anonymous reviewers for providing us useful comments and suggestions.

1 PHENIC project is supported by University of Aizu Competitive Research Funding, Ref. P-12-2014-2015.

Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0 Preprint copy. This journal article has been accepted for publication at the Journal of Supercomputing, Nov. 2015. The final publication is available at: www.springer.com, DOI: 10.1007/s11227-015-1539-0


Sebastien Bindel

Serge Chaumette

Benoit Hilt

A novel predictive link quality metric for mobile ad-hoc networks in urban contexts ⋆ ⋆⋆

Keywords: F-ETX, forecasting, routing, link quality

In Mobile Ad hoc networks (MANETs), advanced routing metrics use Link Quality Estimators (LQE) for making routing decisions. To be efficient and in a strong interaction with the physical layer transmission conditions, the accuracy and the reactivity of LQE used by metrics are crucial for maintaining connectivity. Current LQE estimates the link quality into a single value. This method limits the accuracy of the estimators, especially in highly volatile environments such as VANETs in urban environments. In this paper we propose multi-estimators LQE approach that provides both a better link quality and a link behavior assessment. These novel estimators deal with LQE requirements, reactivity, stability and accuracy to become a reliable LQE. We evaluate they reactivity and accuracy with realistic physical layer and mobility patterns and also found their forecasting properties.

Introduction

Link quality estimation is one of the main concerns for applications running in Mobile Ad-Hoc Networks (MANET), Vehicular (VANET) and emerging Unmanned System networks. In such networks, the radio signal is affected by several phenomena including shadowing, fading and Doppler effect which degrade its quality. Resulting perturbations contribute to undermine current algorithms, that impact applications performances. For instance, routing protocols often rely on link quality estimations to select reliable links and maintain efficient network operation. Link quality estimation also plays a significant role in topology discovery mechanisms to build a neighborhood knowledge. However the lossy and the dynamic behavior of the links makes this task non trivial.

In the past, several research papers have been focused on the design of link quality estimators and have tackled some received wisdoms. Firstly, empirical studies have shown the absence of correlation between the link quality and the distance between nodes [START_REF] Baccour | all: Radio link quality estimation in wireless sensor networks: A survey[END_REF]. Secondly, the transitional phase of link quality is often longer than expected and characterized by a significant level of unreliability and asymmetry [16]. Thirdly, the correlation between the Packet Reception Ratio (PRR) and the physical information (i.e. RSSI, SNR and LQI) is not easily deductible while these indicators have a limited efficiency to assess the link quality [START_REF] Baccour | all: Radio link quality estimation in wireless sensor networks: A survey[END_REF] [17] [START_REF] Srinivasan | An empirical study of lowpower wireless[END_REF]. It is therefore important to take into account these observations to design effective metrics.

Fast ETX (F-ETX) is a novel metric [START_REF] Bindel | F-ETX: an enhancement of ETX metric for wireless mobile networks[END_REF] that uses dynamic windows size to sense the link and overcomes intrinsic limitations of static window size and empirical filters such as EWMA. As a result, F-ETX performs better than current ETX based metrics. Even if the metric reacts quickly to persistent changes, transient fluctuations also affects the estimation. F-ETX features make it reactive but instable in some situations. We observed in our experimentations that F-ETX provides additional information about link features not yet characterized. This paper completes [START_REF] Bindel | F-ETX: an enhancement of ETX metric for wireless mobile networks[END_REF] by providing an extended version of F-ETX combining additional companion-metrics to give a multi faced assessment in order to make the metric stable, reactive and accurate. Additionally, it shows the companionmetrics ability to provide reliable predictions of link quality.

The remainder of this paper is divided into five parts. Section 2 reviews current techniques to estimate the quality of a link. Section 3 gives the F-ETX technical background. Section 4 presents the design of the predictive companionmetrics. Section 5 shows a comparative evaluation of our estimators with other metrics. Section 6 concludes this paper and opens up new perspectives.

Related work

Effective link measurement is a fundamental building block in wireless networks and especially if the propagation channel is subject to important variations. This section summarizes current wireless link quality estimation techniques and point out the main challenges of this hot topic.

Logical information as link quality metrics

Traditional metrics in wired networks, (i.e. hop count) fail to give an estimation on the paths reliability in wireless networks. De Couto et al. have suggested the Expected Transmission Count (ETX) metric [START_REF] De Couto | A high-throughput path metric for multi-hop wireless routing[END_REF], which combines forward and backward packet reception to compute a packet delivery success probability. Draves et al [START_REF] Draves | Comparison of routing metrics for static multi-hop wireless networks[END_REF] have experimented four type of metrics (ETX, hop count, Perhop Round Trip Time and Per-hop Packet Pair Delay) through a test bed placed in an indoor environment. They observed that ETX performs better than the others but in a mobility case, the performance of the hop count metric exceeds the ETX metric. Due to fixed size window based estimation, we showed [START_REF] Bindel | F-ETX: an enhancement of ETX metric for wireless mobile networks[END_REF] a short window size leads to a reactive estimation, while a larger window size reduces its agility. The Required Number of Packet (RNP) metric suggested by Cerpa et al [START_REF] Cerpa | Temporal properties of low power wireless links: modeling and implications on multi-hop routing[END_REF] performs at MAC layer and counts the average number of packet retransmissions required to deliver it successfully. They observed the temporal properties of low power wireless links and described the usefulness of such a metric to measure the link quality compared to reception rate (RR). Unlike the RR information, RNP metric takes into account the underlying distribution of losses because the link quality is characterized in both directions. However, this metric requires an ARQ (Automatic Repeat-Request) mechanism to retransmit lost packets in order to determine the number of retransmission required to achieve a successful reception. Woo et al [15] designed a routing protocol based on the channel snopping an introduced an agile filter called Window Mean with EWMA (WMEWMA) as an empirical estimator technique [14]. Authors have shown its performance, over the others filters based on the Exponential Weighted Moving Average (EWMA).

Physical informations as link quality metrics

Other metrics, which perform at the PHY layer provide an immediate quality information about the wireless channel. This type of metric has the advantage to be implemented without any additional costs and provides a valuable snapshot of the link state. Such metrics are relied on three kinds of information provided by the PHY layer: the Received Signal Strength Indicator (RSSI), the Signal to Noise Ratio (SNR) and the Link Quality Indicator (LQI). Current works try to establish a correlation between PHY parameters and the PRR but none of them found a satisfactory solution. Zhao et al. [17] showed the difficulty to make a good estimation of the link quality based on RSSI values. Even if a high signal strength can be associated to a high packet reception, the reverse relationship is not true. The use of the SNR was often proposed to overcome RSSI based indicators limitations. However, experimental evaluations have shown that the correlation between the SNR and the PRR is not directly deductible. This is due to the hardware sensitivity and the environmental effects, especially for intermediate link quality [START_REF] Baccour | all: Radio link quality estimation in wireless sensor networks: A survey[END_REF]. In addition, Boano et al. [START_REF] Boano | The triangle metric: Fast link quality estimation for mobile wireless sensor networks[END_REF] have shown the limitation of SNR based indicators to differentiate the possible states of a wireless link (transitional and bad), excepted for good links (result confirmed by [START_REF] Srinivasan | An empirical study of lowpower wireless[END_REF]). The last hardware based metric called LQI has been proposed for the 802.15.4 standard but it can only be exploited on specific radio chips. Even if LQI presents a certain correlation (better than the RSS and closer to the SNR) with the PRR [START_REF] Liu | Data-driven link quality prediction using link features[END_REF], it does not provide a relevant estimation for intermediate link quality [START_REF] Srinivasan | An empirical study of lowpower wireless[END_REF].

A recent generation of link quality estimators based on the packet decoding process has been proposed. The first one deals with the DSSS decoding error analysis [START_REF] Heinzer | Fast and accurate packet delivery estimation based on DSSS chip errors[END_REF] [START_REF] Spuhler | BLITZ: Wireless link quality estimation in the dark[END_REF] to assess the link quality. The second one proposed by Gabteni et al. [START_REF] Gabteni | A novel predictive link state indicator for ad-hoc networks[END_REF] uses the OFDM decoding process in order to make an interesting link state indicator which predict future link disruptions. Unfortunately, these estimators are only available on specific radio chips for the first one and only tested in simulations for the second one.

Metrics with multi-estimators

An interesting novel approach supports that the link assessment can be made with multi-estimators to have a multi-faced vision of the link in order to compute a scored quality link estimation. Baccour et al. [START_REF] Baccour | F-LQE: A fuzzy link quality estimator for wireless sensor networks[END_REF] designed an hybrid metric based on logical and physical information to provide multi-estimators that assess the packet delivery ratio, the link asymmetry level, the link stability and the channel quality. These estimators are aggregated into a single metric following a fuzzy logic method. The Holistic Packet Statistic (HoPS) metric suggested by Renner et al. [START_REF] Renner | Prediction accuracy of link-quality estimators[END_REF] incorporates four estimators; namely short-term, long-term, absolute deviation and trend estimation; computed with the EWMA filter. However an intrinsic problem of the use of this filter limits the agility of estimators. It also has the disadvantage to require a large amount of traffic to train the estimators and consequently increases the detection time of link state changes.

F-ETX metric

The use of a static window size and filters based on EWMA limit the agility of link quality estimators. The F-ETX metric [START_REF] Bindel | F-ETX: an enhancement of ETX metric for wireless mobile networks[END_REF] overcomes these limitations by monitoring the link with a dynamic window size. Two windows are maintained, one to estimate the PRR and the second one for the ARR (Acknowledgment Reception Ratio) estimation, respectively represented by d f and d r ratios. Theses windows are also managed by two algorithms; one dealing with their reductions to increase the reactivity of the metric and another one takes care about their growth in order to increase the accuracy and the stability of the metric.

Reactivity improvement -Window size reduction

As reactivity is the major concern for link quality metrics, F-ETX uses an algorithm that ensures both a fresh and an accurate estimation. Each ratio (i.e. d f and d r ) computation uses a binary filter based on the Weighted Moving Average (WMA). It keeps the newest correctly received packet information and penalizes the target ratio according to the current number of lost packets. Let x 1 . . . , x 1 the values representing the current states of reception maintained by a window W at the time n. The associated binary weight, w, represents the reception state of the x data packet and fixed at 0 for lost and 1 for a good reception. Let α be the number of packets marked as lost in the window and |W n | the window size at the time n. If a loss is detected, the new window size is determined as follows:

|W n | = |W n-1 | 2 α (1)
Th reception probability is computed by:

probability = w n x n + w n-1 x n-1 + ... + w 1 x 1 |W n | (2)
As shown in [START_REF] Bindel | F-ETX: an enhancement of ETX metric for wireless mobile networks[END_REF], in case of successive packet losses, the algorithm enables an exponential (2 α ) decrease of the window size that leads to a rapid link state detection.

Accuracy and stability improvement -Growth of the window

To adapt the link quality assessment according to the link stability, a dedicated algorithm manages the growth of the window size after its reduction. This guarantees a proper estimation of the link quality adjusted to the link stability. When a packet loss occurs, the algorithm saves the current window size, called in the rest of this paper the threshold, T h . For each new packet marked as received, the window size is incremented. From the moment the window size reaches the threshold, each new received packet increments a dedicated counter C n . Then, the window (W ) is increased or shifted (the window is shifted left) under the following conditions.

W Increased if W n T h ∧ C n Wn 2 Shif ted else (3)
After each increase, the counter C n is reset. This approach limits the speed of the window size according to the loss occurrence and adjusts the accuracy of the estimation according to the link stability.

Discussion

F-ETX appears as reactive and accurate, but reacts also to transient losses. This makes the metric instable and does not meet requirements to be a suitable LQE. As a matter of fact, reactivity and stability are at odds, a single metric cannot be both reactive and stable. However additional information can be extracted from the metric to assess different link features. This information is fully exploited to provide companion metrics about the link quality trend, the link stability and an indicator about the potential switch from a bidirectional to an unidirectional link. The goals of these companions metrics is to offset the weakness of the link quality assessment and provide additional information on the link states to predict local links features.

Companion estimators of F-ETX

The F-ETX metric only deals with a single estimation while the algorithm assesses other link features that could be suitable both for local link evaluation and end-to-end path exploration required by routing protocols as example. We argue that a multi-faced representation of the link provides detail information about its state and helps the routing process to select the best suitable link. These estimators are described next.

Link quality : This estimator is based on the link quality performed by the F-ETX metric. It uses the forward d f and the backward d r ratios, which represent the probability of a packet to be delivered to a neighbor and the probability of its ACK packet to be successfully received back.

χ LQ = 1 (1 -d f )(1 -d r ) (4)
Link quality trend : This indicator tracks the course of the link quality by computing the variation between the current χ LQ t and the previous estimation χ LQ t-1 . To provide a long term estimation the result is averaged with an EWMA.

∆ LQ t = χ LQ t -χ LQ t-1 χ T rend t = β • ∆ LQ t + (1 -β) • χ T rend t-1 (5)
The coefficient β influences the sensitivity of the filter. Choosing a small β value is advisable to achieve a long term estimation. Note that two successives χ LQ set to 0 indicate a long-term disruption and resets the link quality trend estimator.

Link stability estimation : We observed that a fine analysis of the d f and d r maintained windows content provides a link stability information. Let a binary state [0, 1] that represents the reception state of an excepted packet in a window. We note W max the maximum window size, W n the current window size and the W i the i th element in the window. The windows maintained to compute the d f and d r probabilities are respectively noted W d f and W dr . The link stability indicator is computed with an EWMA filter tacking into account the absolute Ξ and the relative stability ξ.

Ξ = W d f n i=1 W d f i + W dr n i=1 W dr i 2W max ξ = W d f n i=1 W d f i + W dr n i=1 W dr i W d f n + W dr n χ Stab t = Ξ t • γ + (1 -γ) • ξ t (6)
The absolute estimation (Ξ) computed from the maximum window size (fixed value) represents the absolute level of stability of the link. The relative estimation (ξ) computed from the current window size (dynamic value) represents the relative stability. This third estimation gives the level of the link stability according to the current window size. This information is useful, since, for a same absolute value, the relative link estimation gives an additional assessment taking into account losses which took place recently. Both absolute and relative information are suitable to characterize the link stability, hence we advise a γ value fixed at 0.5.

Unidirectional link level : This last estimator deals with the detection of bidirectional links becoming unidirectional. Current approaches like F-LQE with the ASL estimator, track the difference between the uplink and downlink reception rates. Such a method becomes inefficient if the link has a short life time or experiment an high level of packets losses. In this case, windows are not sufficient trained to give a trustworthy estimation. Our method overcomes this limitation by measuring the variation of the up and downlink reception ratios. This makes it independent of the window size and does not require any training period. Let W be a window and W t n its size at time t. The variations of the reception ratio provided by the window W at time t is noted ∆ W in t . The indicator is given by:

∆ W in t = W t n i=1 W i - W t-1 n i=1 W i χ U LL t = χ U LL t-1 • λ + (1 -λ) • ϕ(∆ d f t , ∆ dr t ) with ϕ(x, y) =    -1 x < 0 ∧ y > 0 1 x > 0 ∧ y < 0 0 else (7)
To give a tendency we advise a λ value fixed at an high value. When this indicator becomes negative, a link may become unidirectional (e.g. nodes with different transmit power level) .

Evaluation

This evaluation compares the performances and the robustness of F-ETX and companion metrics to current scored metrics, namely F-LQE and HOPS. Tests were run in an urban environment with both realistic propagation and mobility into the NS-3 simulator. Simulations ran 30 mobile nodes in a 500m × 500m area with realistic urban Manhattan 4×4 grid based mobility. Nodes have different relative speeds in [0:30] m/s. The realistic wireless channel was setup with a ThreeLogDistanceLossModel for modeling shadowing (Exp0: 2.5, Exp1: 5, Exp2: 10, D0: 1m , D1: 75m, D2: 114m ). Fading effect was setup with a RicianPropaga-tionLossModel with a LineOfSightPower fixed at 1. Communications performed with 802.11g at 6Mbp/s. Link quality metrics are measured at the receiver side by monitoring probe packets. Details can be found in [START_REF] Bindel | F-ETX: an enhancement of ETX metric for wireless mobile networks[END_REF]. Parameters of LQEs have been set according to [START_REF] Baccour | F-LQE: A fuzzy link quality estimator for wireless sensor networks[END_REF] for F-LQE and [START_REF] Renner | Prediction accuracy of link-quality estimators[END_REF] for HoPS. For F-LQE [START_REF] Baccour | F-LQE: A fuzzy link quality estimator for wireless sensor networks[END_REF] the parameter of the WMEWMA filter used to determine the packet delivery ratio is set to 0.6. An history based of 30 PRR is used to compute the link stability and the link quality estimations. Until to reach this threshold, the minimal required history is set to 5 PRR. HoPS [START_REF] Renner | Prediction accuracy of link-quality estimators[END_REF] uses EWMA filters to compute short-and long-term link quality estimations and their deviation.

Coefficients are respectively set to 0.9 and 0.997 and its initializes short-and long-term estimations at 50% for new links. For F-ETX, parameters λ, β and γ are respectively set to 0.9 , 0.1 and 0.5. To evaluate both the agility of the metrics to track fluctuations of the link quality and the accuracy/robustness of the metrics, we achieved temporal and statistical evaluations.

Temporal behavior

The reliability of metrics were tested under two scenarios; a fast and a slow crossing cases involving two nodes. In the first one, the relative speed is 50 m/s and the communication time is 5s while in the second one, they are respectively 3 m/s and 24s.

Fast speed scenario According to the distribution of the d r and d f in the figure 1(a) the link lifetime is very short (5s between 12s and 17s, while important stochastic losses can be observed resulting from a significant fading (Rayleigh) effect). The PRR computed over an history of 5 packets declares the link disrupted at 21s, but in fact the disruption occurs at 17s, in addition a single d f and d r reading is not sufficient to determine the link state. For instance, at 13s on a single reading the link could be considered as disrupted, whereas it was a transitory loss (the link remains up until 17s). About the F-LQE, figure 1(b) shows the smoothed PRR (SPRR) evaluating the link quality and the link stability estimation (SF). Below, the figure 1(c) shows the unidirectionality level of a link estimator (ASL). The SPRR follows the corresponding PRR (fig 1) trace with a smoothing trend, but the estimator is clearly not enough reactive and detect the disruption too late. This result from the EWMA filter that gives more important stability than reactivity to the estimator. The SF estimator also suffers from a lag to indicate a decrease of the stability from 22s, while the link is disrupted, because it is based on an history of five packets to compute the stability estimation. About the ASL indicator, the variation of d r and d f distribution introduces light fluctuations indicating a low probability to have asymmetric link. Regarding estimators from HoPS (fig 1(d) and (e)) it is observed the slow convergence time of the short-term estimation, while a link is disrupted, the estimator declares the link quality as not disrupted. But the long-term estimator indicates a correct trend of decrease. Consequently, the EWMA filter is well used for long-term estimation but not suitable for short-term estimation which too smooth estimations. In the same manner, the link quality trend and the variation indicators are affected by the long reactivity of the short estimation and react too slowly when a disruption occurs . The estimators of F-ETX are shown figure 1(f) and (g). In contrast with LQE, F-ETX is more reactive than the others and declares the link disrupted earlier (at 18s). The trend estimation indicates a degradation of the link quality via consecutive negative values. This is confirmed by the link stability estimator indicating a low level of stability and a decrease. About the unidirectional indicator, its gives a false positive value (at 14s) indicated that the link can be unidirectional in the opposite direction.

Slow speed scenario

Statistical evaluation

While previous evaluations give a detail about the strength and weakness of LQEs, this evaluation is extended with statistical analysis from all links of the simulation. Over 470 links have been analysed where 1800 packets have been exchanged. Previously we have observed that the link quality estimator of F-ETX is more reactive than F-LQE and HoPs. In this statistical study we are focus on how this estimator can anticipate disruption compared to the PRR solution based on an history of 5 packets . Figure 3 (a) shows that F-ETX is clearly the best solution by anticipated disruption before the PRR solution. Because based on the dynamic window size the metric is more reactive and track very well link states changes. In addition, F-ETX assess both link direction unlike a PRR solution that only evaluates downlink. The rest of the statistical analysis is made with the Mean Absolute Error (MAE) that measures the magnitude of the predicted estimation and the current outcome. A low score indicates a good prediction while a bigger value indicates a greater error between the prediction and the current value. Tracking link stability is an essential feature to detect and differentiate transient and persistent link.

We have compared Fig 3 (b) the variation of the value given by these estimators to the current variation observed from the delivery and forward ratios. F-ETX estimator gives the lowest MAE compared to the other. Because HoPS indicator only tracks the variation between the HoPs ST and LT estimations, that not really related with the link stability and about F-LQE, the estimation is based on a PRR history that produce a lag generating consecutive error predictions.

The link quality trend is a complementary information that determines the current course of the link quality. Fig 3 (c) shows the link quality trend of HoPs and F-ETX. We observe the better ability of our estimator to give the tendency of the link quality compared to HoPS. Even if each of them is based on the link quality estimator and both are computed with an EWMA filter. Their abilities to track the link quality course depends on the ability of link quality estimator, as HoPS-ST suffers from lag with the use EWMA filter impacting the HoPS-LT.

On the other hand, the link quality estimator from F-ETX is react but instable. That is why with the use of EWMA the estimation is stabilized given a better long-term estimation than the HoPS-LT overestimating the tendency. Figure 3 (d) shows the unidirectional link estimator of the F-LQE and F-ETX. During the simulation, any effective unidirectional link are present. ASL estimation only made a single reading on the reception ratio of the up and downlink often different when highly propagation disturbances are present. Our indicator adopts another strategy based on the variation between the up and downlink, this results that our estimation is more robust to disturbance and give more suitable information about the potential of a bidirectional link to become unidirectional.

Conclusion

In this paper we presented novel companion-metrics of our recently proposed F-EXT metric [START_REF] Bindel | F-ETX: an enhancement of ETX metric for wireless mobile networks[END_REF]. Each of them evaluates a specific link feature; (i) the link quality, (ii) its trend, (iii) its stability and (iv) the detection of unidirectional links. They do not require a training period and are computed efficiently by the use of dynamic sized windows and moving average filters. These four metrics have then be compared to popular propositions of LQEs from the literature (e.g. F-LQE and Hops). Comparisons took two forms. First showed the capacity of the metrics to track accurately link disruption and link upcoming in two nodes crossing scenarios (e.g. a fast 50m/s and an slow 3m/s one). They also highlighted prediction capabilities of the metrics. The second evaluation confirmed this prediction capability through a statistical analysis that show how F-ETX and its companion-metrics overcomes other LQE when dealing with link disruption forecasting. The capability to detect a wireless link that switches from bidirectional to unidirectional was also tested. To test the robustness of the new metrics, simulations ran realistic channel propagation models and realistic urban mobility. This work shows two important elements relating to link quality monitoring; to track efficiently a link expecting volatile channel propagation conditions, the use of dynamic sized windows overcomes the classical methods, a metric associated to companion-metrics allows a better assessment of channel properties and is therefore more suitable for usage into higher levels. This is precisely the aim of our future works. We plan to test the F-ETX and companion-metrics in other contexts such as building environments to confirm the suitability of our approach. We will also integrate the F-ETX and companionmetrics into routing protocols to test their efficiency in multi-hop path setup.

Fig. 1 .

 1 Fig. 1. Fast speed crossing

Fig. 2 .Fig. 3 .

 23 Fig. 2. Slow speed crossing

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This research was supported by a DGA-MRIS scholarship