André Jorge
email: andrejorge77@gmail.com

João Guerreiro
email: joaocaguerreiro@gmail.com

Pedro Pereira

João Martins
email: jf.martins@fct.unl.pt

Luís Gomes

Energy Consumption Monitoring System for Large Complexes

Keywords: Power Meter, Power Analyzer, Energy Efficient Buildings, Modbus Protocol

ou non, émanant des établissements d'enseignement et de recherche français ou étrangers, des laboratoires publics ou privés.

Introduction

Environmental conservation has become a very important issue. The use of renewable energies has experienced a significant growth from the crisis of the oil in the 70's, in which renewable forms of energy started to be considered as a potentially alternative to the oil producing finite resources of the Earth [START_REF] Elhadidy | Parametric Study of Hybrid (wind+solar+diesel) power generating Systems[END_REF]. Recent European Community Directives point to an energy consumption reduction, leading to an annual improvement in energy efficiency of around 6 per cent in 2012. Strict regulations, regarding power consumption and energy efficiency, have been set to preserve the environment. To fulfill energy conservation goals, it will be helpful if consumers could assess their energy load diagram so that they can plan/re-plan their energy consumption profile. Unstable global energy supplies, increasing load demands and increasing environment concerns are forcing energy producers and consumers to reevaluate the energy usage paradigm. An energy monitoring system is an essential tool to help consumers understanding their energy usage profile and the associated environment impact and providing an instrument to re-shape their energy load diagram and, consequently, reduce its inherent costs. The developed system helps and instructs people to use their energy in a better way.

The efficient use of energy has direct consequences for the users, such as consumption and inherent costs reduction. Several strategies can be taken to fulfill these objectives: load shifting, automatic load control, energy storage, autonomous generation, and renewable energy usage. Nevertheless, in order to implement any of those strategies it is fundamental to accurately know the load diagram and load profile of each user. There are some commercial tools that can be used to monitor energy consumption and perform power management analysis, however when large complexes, with hundreds of metering points, are considered they become extremely expensive. In [START_REF] Yeardy | A Low-Cost Embedded System for Internet Based Power Measurement[END_REF], Yeardy et al. present another tool for power consumption measurement, showing some results.

The main purpose of the present work is the development of a open source distributed metering system, with an innovative user interface and communication tool, that allows the analysis and study of energy load profile, applied to large complexes. The system was successfully installed in the campus of the Faculty of Science and Technology (Universidade Nova de Lisboa), Portugal. The campus comprises several buildings' departments occupying a total area of 30ha. The development system proposes a method to circumvent the limitations placed by the Modbus protocol [START_REF] Liao | Toward Authenticating the Master in the Modbus Protocol[END_REF][4] (as the typical series communication structure, improving the transmission rate), acquire energy consumption data, produce load diagrams for each user in the complex facility (allowing users to evaluate potential interventions in order to reduce consumption and minimize waste and load peaks), calculate the energy consumption costs associated with each department, maintain monthly costs accounting records, and provide detailed information on the validity of best rates solutions. The development of the system was based on three phases:

1. Development of the network communication tools; 2. Development of the real time analyses software package; 3. Development of the energy recording, taxing and analysis software package;

The last package is essential for organizing the energy cost distribution between all campus' departments, and help each one of them establishing solutions that should be adopted in order to solve the problem of excessive energy consumption [START_REF] Huang | Development of an Intelligent Energy Management Network for Building Automation[END_REF].

Contribution to Technological Innovation

Current energy consumption is based on conventional data logging systems, which involves two major problems; (i) is the fact that retrieving the energy consumption data is not conventional, (ii) the cost of energy consumption monitoring systems is high. Smart-meters offers a possible solution, however they are often proprietary equipment with dedicated protocols. The solution presented here is an open-source energy monitoring system that skirts the above barriers by also being cheap and robust.

Modbus Protocol

Modbus is an open protocol used in Industrial Automation Systems (IAS) as well as in Building Management Systems (BMS). The Modbus protocol was created in 1979 by Modicon, a company of Schneider Electric Group. In 2004 this group decided to offer Modbus as a public protocol and by that reason, the Modbus-IDA community appeared [6]. Since 1979 Modbus protocol rapidly became an industrial standard and has been implemented by hundreds of manufacturers in various applications and industrial segments. Its popularity has increased due to its simplicity of implementation and availability of free source code in the Internet. Modbus is an application-layer messaging protocol, positioned at level 7 of the OSI model and provides client/server communication between devices connected on different types of buses or networks.

The devices connected to a Modbus network interact through a master-slave scheme where only the master can start the conversation and the slave responds by sending the information requested by the master or performing the task set for him.

Serial Modbus connections can use two basic transmission modes, namely ASCII (American Standard Code for Information Interchange) or RTU (remote terminal unit). The transmission mode in serial communications defines the way the Modbus messages are encoded. Using Modbus/ASCII, the messages use plain ASCII format, while when using Modbus/RTU format a compressed format is used. This binary encoding makes the message unreadable by humans when monitoring, but have a severe impact in terms of reducing the size of each message, which allows for more data exchange in the same time frame.

Network Hardware Description

Fig. 1 presents proposed network topology, composed by the following main devices:

• PD8 (RS-485/Ethernet Converter)

• UPT210 Universal Power Transducer • CT (50:5 current transformer) The PD8 (RS-485/Ethernet Converter) converter allows transmitting data from/to master devices through an Ethernet data network, to/from devices equipped with an RS-485 interface. The converter is available in two versions concerning its operation mode: Real-Port network service and serial bridge with UDP protocol. In our particular case, the converter is operating with Real-Port Network service because a computer was needed to log the information provided by the UPT210. The converter used in this mode enables to co-operate only with one master computer at a time. In this case, for using a PD8 converter to serve Modbus protocol, a PC is needed to control break time intervals between received transmission characters.

UPT210 Universal Power Transducer is a digital meter able to measure the electrical parameters on three-phase systems. It provides accurate measurements even by distorted waveform. An LCD display provides the three-phase quantities. The working parameters can be easily set up by instrument keypad. UPT210 is a compact, cost effective meter operating both as a stand-alone device and as an integral part of a more extensive energy monitoring and management network. It replaces multiple analogue meters as well as single function meters such as voltmeters, ammeters, wattmeters, varmeters, frequency-meters, power factor-meters, energy-meters, etc.

The current transformer (CT) is used for measurement of electric currents. When current in a circuit is too high to directly apply to measuring instruments, a current transformer produces a reduced current accurately proportional to the current in the circuit (in this case, 50:5 CT), which can be conveniently connected to measuring and recording instruments. The current transformer also isolates the measuring instruments from what may be very high voltage in the primary circuit.

Network Implementation Details

In this section, we will step through each part of the network implementation, which is broken down in two main areas: Master implementation and Slave implementation.

The first one, Master implementation, is composed by a computer running a monitor program, having as main tasks to control break time intervals between received and transmitted message, gather information from all the transducers and analyze the collected data.

Using a computer as the system brain, allows to employ meters without local memory, which are cheaper compared with those with it, and from a single place can collect all the data, making unnecessary any human resources to do this job.

The second area, concerns all the physical devices in the neighbourhood of the place where power consumption is going to be measured. This includes several power transducers and a PD8 converter which allows the communication between the local network or internet and the devices equipped with RS-485 interface.

The system can be implemented either in a local network or using internet for remote access, as shown in Fig. 2. In this work, the system was tested in a local network.

Monitoring Software

The proposed monitoring software consists of two distinct applications:

• Real-time analysis • Collect and record data

Real-Time Analysis Application

The developed software has the aim to make real-time analysis of all the parameters that characterize the electric network, such as voltage, current, power, active and reactive energy. The measured values can be used to build graphics load for later analysis of energy consumption in a given period of time, stored in a file, the functionality is also available in print, or simply sending the data to the mail of the person responsible for examine any issue that may exist for example. This package can only make a connection to a single analyzer simultaneously due to the protocol limitations, which requires the reservation of a communication port on the computer for each device. On must note that this feature makes sense, because only then one can perform real-time analysis. If not the time of the n-scan counters implemented in line would suffer from such a delay that would be relevant to the energy analysis performed by this package. Fig. 3 gives an overview of the application, where a screen shot of the system acquisition is shown.

Collect and Record Data Application

The second application has the goal of recording all the values of active and reactive power and/or energy of each analyzer, which could be connected to the Internet or connected to a local network. In the first case, a single server is capable to collect all the data from n analyzers (UPT210) connected to m converters (PD8). A sampling time of 10 msec per analyzer was considered. In the second case, each local network, if there is more than one, needs a server. The application collects and records the values of energy of each analyzer considering 24 hours intervals.

If there's the need to produce a energy bill for each department associated with a specific analyzer, the server has full knowledge of what the devices contained in each network in order to be made a comparison of consumption not only from month to month but between equipments. In this perspective, it can easily detect undesired events as wasteful consumption of energy or leakage. This package has the ability to adjust the energy consumption to the rates imposed by the energy supplier. In the Portuguese case, automatic adjust to the four periods of the year as well to the different daily periods.

The previous rules were employed because, in this particular project, the system was implemented in our Institution, which is supplied by a 15 kV medium voltage power system.

Energy Consumption Analysis in Large Complexes

This developed software package reports the consumption of a number of unlimited measurement points located in one or several complexes. Allows measuring the real costs incurred in the various sectors, departments, or even in critical equipments, with immediate benefits to users:

• Increase the transparency of energy taxation increasing the knowledge within the cost of their activities; • Adjust the tariff policy and decide further investments in new equipment. The user gains a powerful tool that allows benchmarking to compare the consumption of installations, equipment with other similar services, forcing those responsible for each department or sector to eliminate the observed deviations, leading to an efficient energy usage.

This software package enables record viewing in a graphic and/or table format. It contains tools that easily allow the identification of particular power contributions and its peak value, contributions to the overall consumption of energy, and the causes of energy consumption over periods of several hours of charging.

The feature Real-Time Monitoring has some advantages that should be taken into consideration. The energy service provider usually performs monthly readings of the consumed energy or simply esteems it if the installations are small (and only charge back about 15 days later). It can run more than 6 weeks until the client is aware of its consumption and detect any abnormal behavior. To efficiently manage energy resources is important to have the knowledge of the consumption evolution in a daily and weekly basis. This is easily achieved with the developed system.

For large complexes, with several power meters, the traditional manual solution has a high cost because it requires staff to make the "journey" from meter to meter, recording the readings and entering them into a computer application for analysis. The developed system does it automatically, without the need of human intervention and with lower expenses. Fig. 4 presents the evolution of the active power for two days of consumption in the Electrical Engineering Department. The developed software package easily adds data referring to multiple points of energy consumption. This feature makes possible to dynamically manage the consumption of a department or even a single activity, even when spread over multiple locations or buildings. The subsequent analysis of the amounts charged will help the user to optimize the consumption and pricing profile, thereby reducing the value of the energy invoice.

Conclusions

This paper presented an energy monitoring low cost system suitable to use in large complexes, with several departments/buildings far apart. Several commercial tools are available but they become extremely expensive for large complexes with a huge amount of metering points.

The great advantage of the developed system is the use of the Modbus RTU protocol, considering the physical implementation done through Ethernet, which enables the implementation of this system in large complexes, bypassing the need to establish cabling in the whole complex area, which was practically impossible in the considered implementation.

The industrial implementation of these systems usually has the configuration RS-232 to RS-485 network, stating the need of a computer in each network implemented. In this case several networks need just one computer to monitor all meters in all departments. The system also includes an analyses software package, which is very useful for energy consumption monitoring and suitable for establishing energy management policies.

The system is accessible to every industrial or commercial facility since it uses a reduced cost platform. To accomplish that, a RS-485/Ethernet converter, power meters and a standard personal computer were used. The developed monitoring system is flexible, presents a user friendly interface and a large data storage capacity.

Fig. 1 .

 1 Fig. 1. Network topology.

Fig. 2 .

 2 Fig. 2. System configuration using a local network or internet.

Fig. 3 .

 3 Fig. 3. Snapshot of the Real-Time implemented program.

Fig. 4 .

 4 Fig. 4. Evolution of the average power.


José-María Ceballos

Alfredo Alvarez
email: aalvarez@unex.es

Pilar Suarez
email: psuarez@unex.es

" Benito

Study of AC Losses in Superconducting Electrical Components for Electrical System Design

Keywords: AC losses, Superconductivity, Bi-2223 tapes, YBCO tapes, Superconducting coils

An experimental rig allowing us to perform AC loss measurements, on short (10 cm) tape samples of high-temperature superconductor Bi-2223/Ag, was designed and tested. We propose a new set-up in order to determine AC losses in multilayer superconducting coils. We made a comparative AC losses study of an isolated tape and of the same tape in the same conditions except for the proximity of another tape, with and without current, located just over the first one. We present a serial of results obtains from different tapes, first we used multifilament BSCCO tape (1G) and YBCO tape (2G) with ferromagnetic substrate.

Introduction

The purpose of the work was to study, characterize, and measure the different components of AC losses in superconductors that are part of such electrical systems as transformers, electrical motors, etc.

Firstly, we present a serial of experiments consisted in the evaluation of a single tape carrying current in a possible external magnetic field, obtained in collaboration with the Superconductor Physics Department within the Institute of Electrical Engineering from Slovak Academy of Sciences.

Finally, we focused in a tape as part of a multilayer coil, because this is the most usual way that the tape is used in electrical systems. The behavior of each section of tape is different from of an isolated piece because of the influence of the superconducting layer wound just next to it.

In order to analyze the different components of the AC loss including the influence of one section of tape by another wound together with it, we made a comparative study of an isolated tape and of the same tape in the same conditions except for the proximity of another tape, with and without current, located just over the first one.

Contribution to Technological Innovation

The study of AC losses under the simultaneous action of the transport AC current and the external AC magnetic field is of prime importance for the reliable prediction of dissipation in electric power devices such as motors/generators, transformers and transmission cables. The reason for such a study is because, if the study of losses is an important part of the design of any electrical application, in superconducting electrical systems losses determine not only their efficiency but also the capacity of the corresponding cooling system.

Experimental

We carried out two different serial of experiments in order to determinate the AC losses in a sample of superconducting tape.

In the first one, we tried to find the contribution of the external magnetic field to the AC transport losses.

In the second one, we found the influence of the presence of nearby tapes on the AC losses in a single tape.

Transport Losses in a Single Tape with External Magnetic Field

For this experiment, the setup consists on an isolated tape feeding with a wide range of transport current and exposed, simultaneously to an external magnetic field (Fig. 1 shows a scheme of this configuration). The main aim of this serial of experiment was to determine, by an electromagnetic method, the AC loss in a superconducting wire transporting the AC current I T = √2I rms cos(2π f t) while exposed to the AC magnetic field B ext = √2B rms cos(2π f t + ϕ).

In particular, the dependence on the phase shift ϕ between I T and B ext has been investigated.

To carry out this method, one has to resolve two main problems: a) An independent supply of current into the sample and in the AC field magnet winding is necessary to keep the values of I rms and B rms constant while changing the phase difference.

b) The distinction between the dissipation covered by the power supply for I T and the one delivered by the energizing system of the AC magnet is necessary to avoid a double count of dissipation in loss registration.

For measurement of transport loss the loop perpendicular to the wide face of the tape is used. AC loss per unit of length is determined by formula:

P T = I T *V T /L (1)
Where I T is the RMS value of transport current, V T is the part of RMS value of voltage from measuring loop which is in phase with transport current, and L is loop length. Perpendicular arrangement reduces the false voltage signal induced by external field. Fine compensation of the remaining false voltage is performed with the help of an adjustable mutual inductance linked to AC magnet current. Similar compensation is used in the case of the magnetization loss measurement, but linked now to the sample current. By this way the false signals were reduced satisfactory.

All the experiment with this set-up was implemented at frequency of 72Hz. The characteristics of the tape analyzed in this experiment are shown in table 1.

Transport Losses in a Single Tape Under the Influence of another Tape

In many applications of superconducting tape in electrical devices, the tape must be wound in multilayer coils as in figure 2. In such a case, every piece of tape is located very close to some other piece, in the next layer, along the coil. The proximity of these two parts of the circuit adds a new component (not necessarily positive) in the total loss of the multilayer coil that does not exist in the tape or single-layer coil loss. Therefore, we can divide the loss into 3 components:

a) The transport loss, P N , which can be calculated by the Norris equation [START_REF] Norris | Calculation of Hysteresis Losses on Hard Superconductors Carrying AC: Isolated Conductors and Edges of Thin Sheets[END_REF].

b) The magnetic loss, P mag , due to the global magnetic field created by the complete coil.

c) The local loss, P loc , due to the proximity of turns in the same position of consecutive layers. So, the total loss, P T , can be written as follows: P T = P N + P mag + P loc [START_REF] Frolek | Partitioning of Transport AC Loss in a Superconducting Tape into Magnetic and Resistive Components[END_REF] To evaluate the new component of the loss, P loc , we designed and carried out the experiment described below.

Figure 3 shows the arrangement of the tapes for the measurement of the losses. In this case, the tape is not bent as in a coil, and therefore P mag = 0 (no global magnetic field has to be taken into account). The electrical method is used to determine the losses in the longer tape through the measurement of the voltage between taps on the tape (see figure 3, circuits CI and CO) or the emf in a contact-less loop (circuits CLI and CLO) [START_REF] Frolek | Partitioning of Transport AC Loss in a Superconducting Tape into Magnetic and Resistive Components[END_REF]. The shorter tape is located over the CI and CLI circuits, leaving the CO a CLO circuits outside its influence. The current I L in the longer tape and I S in the shorter one are independent but in phase for this study.

The measuring equipment picks up the waveforms of the currents through two Hall current probes, and the waveforms of the tap and loop voltages through four measurement amplifiers that filter and adapt the signals to be read by a data acquisition board (DAQ). All the waveforms have a whole number of periods (typically 5) at a frequency f, of 100 Hz.

The characteristics of the different tapes under test are summarized in table 2.

Results and Discussion

Transport Losses in a Single Tape with External Magnetic Field

In figure 4, the dependence of transport loss P T as a function of the amplitude of the magnetic field is displayed.

As we can see exits a strong dependence in the losses respect to the amplitude of the magnetic field. The slope in the behavior of the transport losses change dramatically when a perpendicular magnetic field is applied.

1G

We can also observe that this slope is even higher when the superconductor became to be saturated and the current starts to flow through the silver matrix [START_REF] Gömöry | Resistive Losses in a High-T c Wire Carrying AC Current Larger than I c[END_REF]. In figure 5, the dependence of transport loss P T as a function of the phase shift between the transport current and magnetic field is displayed.

Although we initially supposed that the maximum of the losses occurs when the transport current and external field are in phase, as we can see in the figure 6, it seems that the maximum of losses occurs in a range of shift angles between 30º-50º, depending of the amplitude of the external magnetic field. The more the magnetic field amplitude increase, the more angle of the maximum of the losses, as we can see in the figure 6, in which we present the variation of transport losses with fixed current (34A) under different field amplitudes. These transport losses have been normalized to the maximum. Fig. 5. Transport losses dependence with the phase shift in degrees, between transport current (34A) and magnetic field for different amplitudes of the magnetic field.

Fig. 6. Normalized to the maximum transport losses dependence with the phase shift between transport current (34A) and magnetic field for different amplitudes of the magnetic field.

Transport Losses in a Single Tape Under the Influence of another Tape

Figure 7 shows the loss in the 2G long tape, outside the influence of the shorter, as a function of the transport current I L . The sample shows significantly higher losses compared with the theoretical values at currents lower than the critical current. This indicates that the losses in the 2G tapes are affected by the magnetic losses in the ferromagnetic substrates [START_REF] Duckworth | Transport AC Losses Studies of YBCO Coated Conductors With Nickel Alloy Substrates[END_REF][START_REF] Duckworth | Substrate and Stabilization Effects on the Transport AC Losses in YBCO Coated Conductors[END_REF][START_REF] Gianni | Transport AC Losses in YBCO Coated Conductors[END_REF][START_REF] Majoros | Transport AC Losses in YBCO Coated Conductors[END_REF]. Fig. 7. Losses outside the influence of the short tape (probe CO) for different currents I S (from 0 to 75 A) in 2G sample. This loss corresponds to the transport loss in a 2G single tape at currents lower than critical current. It is been that the experimental measurements follow an IL 2 dependence [START_REF] Stravrev | Comparison of the AC Losses BSCCO and YBCO Conductors by Means of Numerical Analysis[END_REF].

In Fig. 8 we have plotted the experimental data of losses in 2G sample and the sum with Norris's models with ferromagnetic losses. FM1 corresponds to data from [START_REF] Duckworth | Transport AC Losses Studies of YBCO Coated Conductors With Nickel Alloy Substrates[END_REF][START_REF] Gianni | Transport AC Losses in YBCO Coated Conductors[END_REF] and FM2 corresponds to data from [START_REF] Duckworth | Substrate and Stabilization Effects on the Transport AC Losses in YBCO Coated Conductors[END_REF][START_REF] Gianni | Transport AC Losses in YBCO Coated Conductors[END_REF]. In general, the addition of the ferromagnetic losses FM1 or FM2 to the Norris Elliptical losses improves considerably the agreement with our experimental measurements as in [START_REF] Gianni | Transport AC Losses in YBCO Coated Conductors[END_REF]. However, our measurements fit to "FM2 + Norris Elliptic" for all values of I L but only fit to "FM1 + Norris Elliptic" for I L > 25 A.

In Fig. 9 a comparison of losses between 1G and 2G tapes for I < I c is shown and we can see a significant difference between them but the most important one is the different slopes because of FM losses. The results for 1G setup show an expected behavior that is, the losses in probe CI increase when I S increase concluding that the presence of consecutive superconducting layers affect to AC losses of the neighboring layers due to the dependence of the critical current with the transport current through the two tapes [START_REF] Suarez | Influence of the Current Through One Turn of a Multilayer Coil on the Nearest Turn in a Consecutive Layer[END_REF], but for 2G setup we can see in the figure 10 a different and interesting behavior. When I S increase below I c the losses in the long tape decrease but when I S increase above I c the losses in the long tape increase. Figure 11 shows a scheme of our arrangement to give a possible explanation of this effect. The short tape FM substrate and the conducting layers (Ag layer and stainless steel coverts) are located between short and long tapes YBCO layers. So when I S < I c , the magnetic field cause by I S in the long tape FM substrate reduces the magnetic field in the same substrate due to I L . This effect is stronger when I S increases producing a reduction of the losses in the long tape. However, when I S > I c , the current (I S -I c ) goes through the conducting layers increasing the magnetic field in the long tape FM substrate and the losses in the long tape [START_REF] Suarez | Losses in 2G Tapes Wound Close Together: Comparison with Similar 1G Tape Configurations[END_REF].

Conclusions

An experimental set-up for the measurement of AC loss under the simultaneous action of the transport current and the magnetic field shifted in phase was developed and tested.

The results clearly show that the maximum loss is not at zero phase shift, and its position depends on the magnitude of the current and field.

Two similar arrangements for 1G and 2G assembled tapes have been constructed and studied in order to establish a comparison between them.

We have found a good agreement between our measurements and those estimated from bibliography for 2G single tape but it is necessary to carry on the study taking our own losses measurements in the ferromagnetic substrate.

Also we have shown a different behavior between 1G and 2G assembled tapes demonstrating that the existence and the location of ferromagnetic substrates are highly influent on the losses of the tapes. However, experiences with different 2G samples must be realized.

Fig. 1 .

 1 Fig. 1. Experimental arrangement for the measure of the transport losses in a single tape with external magnetic field.

Fig. 2 .

 2 Fig.2. Multi-layer coils carrying the same or different current in each layer. The proximity of the tapes in the same position of consecutive layers makes the AC loss different from in a single layer coil.

Fig. 3 .

 3 Fig.3. Experimental arrangement of the tape (the longer) for the measurement of the losses both under and outside the influence of another tape (the shorter) very close to the former.

Fig. 4 .

 4 Fig.4. Transport losses dependence with the amplitude of the perpendicular magnetic field (B) for different transport currents (Itra).

Fig. 8 .

 8 Fig. 8. Comparison between loss in 2G sample and theoretical curve making into account ferromagnetic losses in the substrate (FM) at values lower than the critical current.

Fig. 9 .

 9 Fig. 9. Comparison between losses in 1G and 2G tapes measured through the probe CO. These losses correspond to the transport losses in each single tape.

Fig. 10 .

 10 Fig. 10. Losses under the influence of the 1G and 2G short tape (probe CI) for different currents IS (from 0 to 105 A in the 1G tape and from 0 to 85A in the 2G tape).

Fig. 11 .

 11 Fig. 11. Scheme of our arrangement. The right figure correspond to the case for I S < I c and the left one is drawn the case for I S > I c . In both of them are the short and the long tapes. Spots represent Ag layers and stain steel covers, grey color represent FM substrates and white color represent YBCO layers. The layers are not at scale.

Table 1 .

 1 Characteristics of the tape under test.

	High Strength American Superconductor
	Type	1G	Width (mm)	4.2 (+/-0.2mm)
	Superconductor	Bi(Pb)-2223	Thickness (µm)	0.31 (+/-0.02mm)
	Fabrication Tech	PIT	I c (A)	120A
	Matrix	Silver Alloy	Reinforcement	Stainless Steel

Table 2 .

 2 Characteristics of tapes under test.


José Rui Custódio
email: jrui.custodio@gmail.com

Michael Figueiredo

Edinei Santin
email: e.santin@fct.unl.pt

João Goes

A CMOS Inverter-Based Self-Biased Fully Differential Amplifier

Keywords: Fully-differential amplifier, inverter-based amplification, low power, self-biasing

A CMOS self-biased fully differential amplifier is presented. Due to the self-biasing structure of the amplifier and its associated negative feedback, the amplifier is compensated to achieve low sensitivity to process, supply voltage and temperature (PVT) variations. The output common-mode voltage of the amplifier is adjusted through the same biasing voltages provided by the common-mode feedback (CMFB) circuit. The amplifier core is based on a simple structure that uses two CMOS inverters to amplify the input differential signal. Despite its simple structure, the proposed amplifier is attractive to a wide range of applications, specially those requiring low power and small silicon area. As two examples, a sample-and-hold circuit and a second order multi-bit sigma-delta modulator either employing the proposed amplifier are presented. Besides these application examples, a set of amplifier performance parameters is given.

Introduction

The complementary fully differential amplifier has a wide range of applications in both the analog and digital domain. This type of amplifier may be used in applications where a wide input signal range is necessary, such as filters, voltage comparators, low voltage differential-signalling (LVDS) systems, and TTL-to-CMOS buffers. Examples of single-ended versions of this type of amplifier have been proposed in [START_REF] Bazes | Two Novel Fully Complementary Self-Biased CMOS Differential Amplifiers[END_REF]. Besides a fully complementary structure, the amplifiers in [START_REF] Bazes | Two Novel Fully Complementary Self-Biased CMOS Differential Amplifiers[END_REF] use a self-biasing method which avoids using separate biasing circuits to bias the amplifier. The advantages of self-biasing techniques are well-known: they simplify the implementation of amplifiers by removing amplifier biasing circuitry, thus saving power and die area; they enable circuits to be insensitive to process, supply voltage, temperature (PVT) and parameter variations; circuits employing these techniques are capable of supplying switching currents greater than the quiescent bias currents [START_REF] Bazes | Two Novel Fully Complementary Self-Biased CMOS Differential Amplifiers[END_REF].

Similar to the amplifiers in [START_REF] Bazes | Two Novel Fully Complementary Self-Biased CMOS Differential Amplifiers[END_REF], a single-ended self-biased amplifier was proposed in [START_REF] Zhu | A High Speed Self-biased CMOS Amplifier IP core[END_REF]. As in all single-ended amplifiers, they suffer from the lack of common-mode (CM) rejection and are highly sensitive to surrounding noisy circuitry. Although die area is practically doubled, the benefits of fully differential circuits outrun their disadvantages, thus it is always a better option than their single-ended counterpart.

Fully differential self-biased amplifiers have already been proposed, such as, a folded cascode CMOS opamp (with and without gain boosting) [START_REF] Mandal | A Self-Biased High Performance Folded Cascode CMOS Op-Amp[END_REF], a class AB amplifier [START_REF] Giustolisi | High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier[END_REF], and an LVDS signal receiver [START_REF] Xiao | A 500 Mb/s, 20-Channel CMOS Laser Diode Array Driver for a Parallel Optical Bus[END_REF]. The amplifier reported in [START_REF] Giustolisi | High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier[END_REF] is a pseudo-differential amplifier that relies on a complex active common-mode feedback (CMFB) network which has a separate biasing circuit, thus, is not completely selfbiased. The LVDS signal receiver from [START_REF] Xiao | A 500 Mb/s, 20-Channel CMOS Laser Diode Array Driver for a Parallel Optical Bus[END_REF] uses a continuous time CMFB circuit with resistors, thus lowering the achievable gain.

The objective of this brief is to propose a simple CMOS inverter-based self-biased fully differential amplifier with constant DC gain over PVT variations for a wide range of applications. Basically this circuit is a differential version of the amplifier proposed in [START_REF] Bazes | Two Novel Fully Complementary Self-Biased CMOS Differential Amplifiers[END_REF], where self-biasing and output common-mode adjustment is realized through a switched-capacitor (SC) CMFB network.

This paper is organized as follows. Section 2 debates on the contribution of technologic innovation introduced by the proposed circuit. The theory of operation and design analysis of the amplifier is described in Section 3. This section also proposes a design methodology. Application examples in a sample-and-hold amplifier and a sigma-delta (Σ∆) modulator with simulation results are shown in Section 4. The paper is completed with a section dedicated to the conclusions.

Contribution to Technological Innovation

It is well-known that circuits employing self-biasing are less sensitive to PVT variations [START_REF] Bazes | Two Novel Fully Complementary Self-Biased CMOS Differential Amplifiers[END_REF]. In fact, these circuits have the advantage of being able to reestablish their nominal operating point after a perturbation in the operation. As a result, the yield of the designed circuits is improved substantially. Also, self-biased circuits do not necessitate dedicated biasing circuitry, and thus power and area are lowered.

Another desired characteristic of a circuit is the capability of being implemented differentially. Fully differential circuits suppress even-order harmonic distortion and are more robust to extrinsic (surrounding) noise. This is a major concern in mixedsignal circuits, where the noise from digital circuitry is coupled into the sensitive analog blocks via the substrate and supply lines. Implementation simplicity (in terms of structure, number of devices, and layout effort) is another issue, since, generally, it leads to circuits consuming less power and area, presenting low noise, and easy to be laid out.

In this work we present a CMOS inverter-based self-biased fully-differential amplifier with the innovation of using a simple SC CMFB circuit to both control the output CM voltage and bias the amplifier. The proposed amplifier accomplishes the above mentioned characteristics and is well suited for a broad range of applications as will be demonstrated.

3 Inverter-Based Self-Biased Fully Differential Amplifier

Theory of Operation

The proposed amplifier, illustrated in Fig. 1, comprises two input CMOS inverters (M 2 , M 3 ) and two voltage controlled resistors (VCR) M 1 and M 4 , biased in the boundary of the saturation and triode regions (it is very difficult to bias both these transistors simultaneously in the saturation region). A simple SC CMFB circuit comprising only two capacitors (C CM ) and five switches is used to properly adjust the output common-mode voltage to about V DD /2 and, on the other hand, to provide closed-loop control (self-biasing) of the amplifier. The VCRs, M 1 and M 4 , have their gate voltages controlled by the output of the SC CMFB circuit, V CM . M 1 and M 4 together with V CM are connected to the input inverters in a negative feedback loop reducing the effect of PVT variations on the amplifier's DC gain. As an example of compensation, if V DD increases, the source-gate voltage in PMOS device M 1 , V SGP1 , also increases producing an increase in the bias current I D . This increase will change proportionally the current in the two input inverters, increasing the output CM voltage. As a consequence, the CMFB circuit will produce a higher V CM output control voltage (assuming that V CMI is constant and provided by a bandgap circuit) forcing V GSP1 to remain constant, thus compensating the V DD variation. Process and temperature variations have similar compensations through the negative-feedback loop. As will be seen in the following sub-section, the DC gain, A V0 , is approximately the ratio of a transconductance by an output conductance, gm/gds. The DC gain is maintained constant because variations in gm (± 30%) are accompanied by similar variations in gds, thus their ratio has variations less than 7 % over PVT variations.

Design Analysis

Performing a small signal analysis followed by a Y-parameter simplification of the amplifier it is possible to obtain the amplifier's transfer function, given by, ( ) ( )

3 2 3 2 2 3 3 2 +gds gds C C cgd cgd s gm gm cgd cgd s A CM L V + + + + ⋅ - - + ⋅ ≅ (1)
Equation ( 2) presents the amplifier's DC gain. Some assumptions have been made, ( )

namely, gm 3 ≅ k•gm 2 = k•gm (k = µ N /µ P ), b ef2 ≅ b ef3 = b ef (b ef ≅ 0.
gds k gm b A ef V ⋅ + ⋅ ⋅ ≅ 2 1 0 (2)
It should be noticed that (1) represents the gain of a standard inverter input amplifier, in other words, no parameters of devices M 1 and M 4 appear in the transfer function.

From [START_REF] Bazes | Two Novel Fully Complementary Self-Biased CMOS Differential Amplifiers[END_REF] it is also possible to obtain expressions for the dominant pole frequency (BW), gain-bandwidth product (GBW), and the unity gain frequency (UGF), which are important performance parameters in opamp circuits. The following equations respectively represent the mentioned performance parameters. Parasitic capacitor cgd = cgd 2 = cgd 3 and C L represents the output load capacitance. (3)

( ) cgd C C k gm b BW A GBW CM L ef V ⋅ + + + ⋅ ⋅ = × = 2 1 0 (4) ( ) CM L ef C C gds k gm b UGF + ⋅ - + ⋅ ⋅ = 2 1
(5) By considering the DC gain and GBW as initial specifications for the opamp, a possible design procedure would be to use (4) to obtain the gm that satisfies the GBW for a given effective load (C eff = C L + C CM + 2cgd), and then to employ (2) to find the gds that satisfies the A V0 requirement. The drain currents for M 2 and M 3 can be calculated using gm and a given drain-source saturation voltage, V DSsat = V GS -V T ≥ 100 mV. Finally, M 2 and M 3 should be sized to be in saturation and to have an adequate gds (adjusted by the channel lengths). Multiplying the drain current of M 2 (or M 3 ) by two (to account for both current paths, differential circuit) it is possible to size M 1 and M 4 in the triode/saturation boundary region for a V DSsat ≥ 100 mV (V DSsat1,4 should not be large to avoid degrading output swing). Some care should be taken in the sizing of the transistors to guarantee the desired output common-mode voltage, power budget, output swing and PVT and mismatch insensitivity.

Simulation Results

This section presents simulation results of the proposed amplifier for two target applications. Firstly, the amplifier is applied in a sample-and-hold amplifier (SHA) intended for the front-end stage of a low resolution, high speed pipelined analog-todigital converter (ADC). Secondly, the proposed amplifier is used in a multi-bit Σ∆ modulator targeted at hearing aid devices. Both amplifiers were designed in a 130 nm high speed 1.2 V CMOS technology (L min = 120 nm). The mobility and threshold parameters (Level 2), K N , K P , V TN and V TP of the devices are, respectively, 525 µAV -2 , 145 µAV -2 , 0.38 V and -0.33 V. For V cmi , 550 mV was used.

Application in a Sample-and-Hold Amplifier

An interesting application for the proposed amplifier is in a SHA as depicted in Fig. 2. This SHA was successfully applied in the front-end stage of a low resolution (7 bit) and high speed (500 MS/s) pipelined ADC. As a result, the basic specifications of the amplifier, such as DC gain (A V0 ) and GBW, should be large enough to accommodate these requirements. Furthermore, the power consumption must be kept as low as possible to avoid degradation in the ADC performance.

With these prerequisites in mind and by using the proposed design procedure as an initial step followed by electrical simulations for sizing refinements (this includes typical and, at least, process corners), the transistors are sized as reported in Table 1. To evaluate the overall performance and robustness of the designed amplifier, its key parameters are simulated for different PVT corners according to Table 2. At typical conditions (Ct), the amplifier dissipates 0.9 mW and achieves a DC gain of 25.8 dB with a GBW larger than 2.88 GHz (for an effective load capacitance of 0.5 fF). The results for the other PVT corners are shown in Fig. 3. It should be noted that, although the GBW and the static power vary considerably, the DC gain varies less than ±0.75 dB considering all corners. These results were expected and clearly indicate the contribution of self-biasing in reducing amplifier sensitivity to PVT variations, concerning the DC gain. 2.

Application in a Multi-Bit Sigma-Delta Modulator

The proposed amplifier was also applied to a second-order four-bit Σ∆ modulator as shown in Fig. 4. In this context, the amplifier is employed to realize a low power SC integrator, which is one of the key elements that determine the global performance of the Σ∆ modulator. This modulator is intended for hearing aids, and, therefore, it requires a dynamic range of about 96 dB with a peak signal-to-(noise plus distortion) ratio (SNDR) above 60 dB. Additionally, the signal bandwidth is 20 kHz. These specifications are met using a second-order four-bit Σ∆ modulator with nonlinear digital-to-analog converters with an oversampling ratio of 32.

The most stringent requirements are needed in the first integrator, which results in a higher complex amplifier design than necessary for the second integrator. It was verified by high level simulations that a minimum DC gain of 40 dB in the amplifier of the first integrator is enough to achieve the target dynamic range of 96 dB. In addition, the amplifier needs to settle its output with an error lower than 10 bit of resolution required for 60 dB of SNDR when operated at 1.28 MHz sampling frequency. This is achieved with a GBW higher than 8.4 MHz. To meet all these specifications the amplifier is sized following the same procedure described earlier and the results are shown in Table 3. The performance of the amplifier was verified through different PVT corners simulations as indicated in Table 2. The amplifier achieves a DC gain of 42.9 dB with a GBW larger than 8.4 MHz (for an effective load capacitance of 10 pF) dissipating only 41 µW at typical operation. The results for the remaining corners are depicted in Fig. 5. As in the previous example, we can note that the DC gain varies less than ±1.5 dB considering all corners. 2.

Conclusions

A CMOS self-biased fully differential amplifier was presented. In order to generate the biasing voltages of the amplifier, a CMFB is employed. The CMFB circuit, based on an SC network, uses the amplifier's outputs to derive the mentioned voltages, hence the designation, self-biased amplifier. Due to the self-biasing structure of the amplifier and its associated negative feedback, the amplifier is compensated to achieve low sensitivity to PVT variations. The output common-mode voltage of the amplifier is adjusted through the same biasing voltages provided by the CMFB circuit. The amplifier core is based on a simple structure that uses two CMOS inverters to amplify the input differential signal. Despite its simple structure, the proposed amplifier is attractive to a wide range of applications, specially those requiring low power and small area. As two examples, a second order Σ∆ modulator and a SHA circuit either employing the proposed amplifier were presented. Besides these application examples, a set of amplifier performance parameters was given.

Fig. 1 .

 1 Fig. 1. Schematic of the fully-differential single-stage self-biased amplifier with the SC CMFB circuit.

  85) and gds 2 ≅ gds 3 = gds. µ N and µ P represent the mobilities of the NMOS and PMOS transistors, respectively. b ef represents the gm degradation in devices M 2 and M 3 due to bodyeffect. Special care should be taken when considering a value for b ef , as it may vary with the operating region of each transistor.

Table 1 .Fig. 2 .

 12 Fig. 2. Complete electrical schematic of the sample-and-hold amplifier.

Fig. 3 .

 3 Fig.3. GBW, A 0 , and static power of the amplifier for PVT corners listed in Table2.

Fig. 4 .

 4 Fig. 4. Complete block diagram of the second-order four-bit Σ∆ modulator.

Fig. 5 .

 5 Fig.5. GBW, A 0 , and static power of the amplifier for PVT corners listed in Table2.

Table 2 .

 2 List of PVT corners used in the electrical simulations.

		Corner	Process	Supply Voltage	Temperature
		Ct	TT	1.2	27
		C1	TT	1.14	27
		C2	TT	1.26	27
		C3	SS	1.14	-40
		C4	SS	1.14	85
		C5	SS	1.26	-40
		C6	SS	1.26	85
		C7	FF	1.14	-40
		C8	FF	1.14	85
		C9	FF	1.26	-40
		C10	FF	1.26	85
	1.5
	1	Ct C1 C2 C3 C4 C5 C6 C7 C8 C9C10

Table 3 .

 3 Feature size of the transistors for the amplifier of the first integrator.

		Transistor			W (µm) / L (µm)
		M 1					8.5 / 1.2
		M 2					15 / 0.8
		M 3					16 / 1.3
		M 4					7.75 / 4.5
	X	+	-	-1 -1 A.z 1-z 1 st Integrator	+	+ -	-1 -1 2 nd Integrator B.z 1-z	4-bit ADC	Y	16codes Lookup Table	Dout
									(Thermometer)
							4-bit
							DAC	Xref
					4-bit DAC	Xref

J.R.Custódio, M. Figueiredo, E. Santin and J. Goes

Acknowledgments

. This work was supported in part by the Portuguese Foundation for Science and Technology (FCT/MCTES) under projects SPEED (PTDC/EEAELC/66857/2006), LEADER (PTDC/EEA-ELC/69791/2006) and IMPACT (PTDC/EEA-ELC/101421/2008). The authors also would like to thank Marta Kordasz for implementing an opamp transfer function extractor program based on Y-parameters, which greatly reduced circuit analysis time.