Nikhil Vichare

Michael Pecht

ENABLING ELECTRONIC PROGNOSTICS USING THERMAL DATA

Prognostics is a process of assessing the extent of deviation or degradation of a product from its expected normal operating condition, and then, based on continuous monitoring, predicting the future reliability of the product. By being able to determine when a product will fail, procedures can be developed to provide advanced warning of failures, optimize maintenance, reduce life cycle costs, and improve the design, qualification and logistical support of fielded and future systems. In the case of electronics, the reliability is often influenced by thermal loads, in the form of steady-state temperatures, power cycles, temperature gradients, ramp rates, and dwell times. If one can continuously monitor the thermal loads, in-situ, this data can be used in conjunction with precursor reasoning algorithms and stress-and-damage models to enable prognostics. This paper discusses approaches to enable electronic prognostics and provides a case study of prognostics using thermal data.

INTRODUCTION

A significant proportion of industry world-wide is devoted to products and systems intended for operation over a long life cycle. Examples of such systems include aerospace, automotive, telecom infrastructure, oil exploration and military applications. In these systems, long-term reliability, often 10 -20 years, is essential and maintenance opportunities are frequently limited by accessibility, as well as logistical, operational, and economic constraints. If one can assess the extent of deviation or degradation from an expected normal operating condition (i.e., the system's health), of these systems, this data can be used to meet the following powerful objectives, which include [START_REF] Vichare | Prognostics and Health Management of Electronics[END_REF] providing an early warning of failure; (2) forecasting maintenance as needed to avoid scheduled maintenance and extend maintenance cycles; (3) assessing the potential for life extensions; (4) reducing the amount of redundancy; [START_REF] Cutter | Condition-Based Maintenance Plus Select Program Survey[END_REF] providing guidance for system re-configuration and self-healing; [START_REF] Kirkland | Avionics Health Management: Searching for the Prognostics Grail[END_REF] providing efficient fault detection and identification, including evidence of "failed" equipment found to function properly when re-tested (no-fault found); and [START_REF] Mishra | In-situ Sensors for Product Reliability Monitoring[END_REF] improving future designs and qualification methods [START_REF] Vichare | Prognostics and Health Management of Electronics[END_REF] [2].

Most products and systems contain some electronics to provide functionality and performance. These electronics are often the first item of the product or system to fail [START_REF] Vichare | Prognostics and Health Management of Electronics[END_REF]. While the application of health monitoring, is well established for assessment of mechanical systems, this is not the case for electronic systems. The term "diagnostics" pertains to the detection and isolation of faults or failures. "Prognostics" is the process of predicting a future state (of reliability) based on current and historic conditions. Prognostics and health management (PHM) is a method that permits the reliability of a system to be evaluated in its actual life-cycle conditions, to determine the advent of failure, and mitigate the system risks.

PHM has emerged as one of the key enablers for achieving efficient system-level maintenance and lowering life-cycle costs. In November 2002 [START_REF]Condition Based Maintenance Plus[END_REF], the U.S. Deputy Under Secretary of Defense for Logistics and Materiel Readiness released a policy called condition-based maintenance plus (CBM+ ) [START_REF]Condition Based Maintenance Plus[END_REF]. CBM+ represents an effort to shift unscheduled corrective equipment maintenance of new and legacy systems to preventive and predictive approaches that schedule maintenance based upon the evidence of need.

The importance of PHM implementation was explicitly stated in the DoD 5000.2 policy document on defense acquisition [START_REF] Cutter | Condition-Based Maintenance Plus Select Program Survey[END_REF], which states that "program managers shall optimize operational readiness through affordable, integrated, embedded diagnostics and prognostics, and embedded training and testing, serialized item management, automatic identification technology (AIT), and iterative technology refreshment" [4]. A 2005 survey of eleven CBM programs highlighted "electronics prognostics" as one of the most needed maintenance-related features or applications, without regard for cost [START_REF] Cutter | Condition-Based Maintenance Plus Select Program Survey[END_REF], a view also shared by the avionics industry [START_REF] Kirkland | Avionics Health Management: Searching for the Prognostics Grail[END_REF].

In this paper the main approaches for prognostic implementation are categorized as (1) use of expendable devices, such as 'canaries' and fuses that fail earlier than the host product to provide advance warning of failure; (2) monitoring and reasoning of parameters that are precursors to impending failure, such as shifts in performance parameters; and (3) modeling of stress and damage in electronic parts and structures utilizing exposure conditions (e.g., usage, temperature, vibration, radiation) to compute accumulated damage. For electronic systems, in-situ data can be monitored from different sites including device, components, interconnects, boards, and systems using built-in sensors and data-buses (JTAG, I2C, etc) or external sensors. The monitored data can be used with the suitable prognostic approaches to provide the health assessment and remaining life (Figure 1). A PHM case-study using thermal data is provided.

FUSES AND CANARIES

Expendable devices such as fuses and canaries have been a traditional method of protection for structures and electrical power systems. For example, fuses and circuit breakers are used in electronic products to sense excessive current drain and to disconnect power from a product or system. Fuses within circuits safeguard against voltage transients or excessive power dissipation, and protect power supplies from shorted parts.

The word "canary" is derived from one of coal mining's earliest systems for warning of the presence of hazardous gas using the canary bird. Because the canary is more sensitive to hazardous gases than humans, the death or sickening of the canary was an indication to the miners to get out of the shaft. The canary thus provided an effective early warning of catastrophic failure by providing advance warning that was easy to interpret.

Figure 2 shows the failure distribution of the actual product and the canary devices. Under the same environmental and operational loading conditions, the canary health monitors wearout faster to indicate the impending failure of the actual product. Canaries can be calibrated to provide sufficient advance warning of failure (prognostic distance) to enable appropriate maintenance and replacement activities. This point can be adjusted to some other early indication level. Multiple trigger points can also be provided, using multiple canaries evenly spaced over the bathtub curve. The installation of canaries mounted on the same chip as that of the actual circuitry enables multiple sensing with different acceleration factors. Canaries with higher acceleration factor will fail faster than the others. Figure 3 shows the failure points of canaries on a plot of acceleration factor vs. time. The failure points represent failure of different canaries that are pre-designed with different acceleration factors to get different failure time. Acceleration factor "one" on the line corresponds to the failure of the actual circuit. Given the plot, the remaining life of the actual circuit can be predicted, which is the time difference between the points with an acceleration factor equal to "one" and a time where the prediction is needed.

Fuses and canary devices can be used to provide advance warning of failure due to specific wearout failure mechanisms. Mishra, et al., [START_REF] Mishra | In-situ Sensors for Product Reliability Monitoring[END_REF] studied the applicability of semiconductorlevel health monitors by using pre-calibrated cells (circuits) located on the same chip with the actual circuitry. The prognostics cell approach has been commercialized by Ridgetop Group (known as Sentinel Semiconductor TM technology) to provide an early-warning sentinel for upcoming device failures [START_REF]Ridgetop Semiconductor-Sentinel Silicon ™ Library, Hot Carrier (HC) Prognostic Cell[END_REF]. The prognostic cells are available for 0.35, 0.25, and 0.18 micron CMOS processes; the power consumption is approximately 600 microwatts. The cell size is typically 800 µm 2 at the 0.25 micron process size. Currently, prognostic cells are available for semiconductor failure mechanisms such as electrostatic discharge (ESD), hot carrier, metal migration, dielectric breakdown, and radiation effects. The time to failure of these prognostic cells can be precalibrated with respect to the time to failure of the actual product. Because of their location, these cells contain and experience substantially similar dependencies as does the actual product. These stresses that contribute to degradation of the circuit include voltage, current, temperature, humidity, and radiation. Since the operational stresses are the same, the damage rate is expected to be the same for both the circuits. However, the prognostic cell is designed to fail faster through increased stress on the cell structure by means of scaling.

Scaling in fuses and canaries can be achieved by controlled increase of the current density inside the cells. With the same amount of current passing through both circuits, if the crosssectional area of the current-carrying paths in the cells is decreased, a higher current density is achieved. Further control in current density can be achieved by increasing the voltage level applied to the cells. A combination of both of these techniques can also be used. Higher current density leads to higher internal (joule) heating, causing greater stress on the cells. When a current of higher density passes through the cells, they are expected to fail faster than the actual circuit [START_REF] Mishra | In-situ Sensors for Product Reliability Monitoring[END_REF].

Figure 3. Multiple canaries calibrated to different levels of degradation

MONITORING PRECURSORS TO FAILURE

A failure precursor is an event that signifies impending failure. A precursor indication is usually a change in a measurable variable that can be associated with subsequent failure. For example, a shift in the output voltage of a power supply might suggest impending failure due to damaged feedback regulator and opto-isolator circuitry. Failures can then be predicted by using a causal relationship between a measured variable that can be correlated with subsequent failure.

A first step in monitoring precursors to failure is to select the life-cycle parameters to be monitored. Parameters can be identified based on factors that are crucial for safety, that are likely to cause catastrophic failures, that are essential for mission completeness, or that can result in long downtimes. Selection can also be based on knowledge of the critical parameters established by past experience and field failure data on similar products and on qualification testing. More systematic methods, such as failure mode mechanisms and effects analysis (FMMEA) [START_REF] Ganesan | Identification and Utilization of Failure Mechanisms to Enhance FMEA and FMECA[END_REF], can be used to determine parameters that need to be monitored.

It is also necessary to develop a reasoning algorithm to correlate the change in the precursor variable with the impending failure. This characterization is typically performed by measuring the precursor variable under an expected or accelerated usage profile. Based on the characterization, a model is developed -typically a parametric curve-fit, neural-network, Bayesian network, or a time-series trending of a precursor signal(s). For a fielded product with highly varying usage profiles, an unexpected change in the usage profile could result in a different (non-characterized) change in the precursor signal. If the precursor reasoning model is not characterized to factor in the uncertainty in life-cycle usage and environmental profiles, it may provide false alarms. Additionally, it may not always be possible to characterize the precursor signals under all possible usage scenarios (assuming they are known and can be simulated). This approach can be improved by using precursors that relate to the failure mechanisms, instead of precursors purely based on observation.

The dependence of training to build the precursor reasoning model can be explained using a simple example regarding use of a computer for office work and engineering analysis. A precursor analysis tool may have been trained while it was used for office applications such as word processing and data entry that did not involve any data processing. The precursor is chosen to be the case temperature of the microprocessor. This training will result in identification of a temperature signal with a narrow band with a relatively low mean value. This situation is analogous to the creation of a control chart during manufacturing. When the same computer is now used for engineering analysis that utilizes the full capability of the processor, the average temperature of the processor case and the variations in the temperature is likely to increase; these conditions will be seen as an aberration from normal usage resulting in false alarm. On the other hand, if the training condition is reversed, then even an unnatural temperature rise during word processing application that is caused by real degradations (e.g., processor die attach delamination, fan capacity loss, heat sink fouling) will not be detected as a cause for concern from the temperature signal. This situation leads us to a few basic tenets of the physics of failure based design principles. The life cycle environmental condition need to be established and continually updated to take advantage of the prognostics built into a system. Also, we need to first know the failure mechanisms that are likely to cause the degradations that can lead to eventual failures in the systems. It is necessary to understand that there are different failure signatures for different failure mechanisms and without knowledge of the failure mechanisms to monitor; it is impractical to expect success in implementation of PHM.

MONITORING ENVIRONMENTAL AND USAGE LOADS

The life-cycle environment of a product consists of manufacturing, storage, handling, operating and non-operating conditions. The life-cycle loads, either individually or in various combinations, may lead to performance or physical degradation of the product and reduce its service life [2]. The extent and rate of product degradation depends upon the magnitude and duration of exposure (usage rate, frequency, and severity) to such loads. If one can measure these loads in-situ, the load profiles can be used in conjunction with damage models to assess the degradation due to cumulative load exposures.

The assessment of the impact of life-cycle usage and environmental loads on electronic structures and components was studied by Ramakrishnan and Pecht [START_REF] Ramakrishnan | A Life Consumption Monitoring Methodology for Electronic Systems[END_REF]. This study introduced the life consumption monitoring (LCM) methodology, which combines in-situ measured loads with physics-based stress and damage models for assessing the life consumed.

The application of the LCM methodology to electronics PHM was illustrated with two case studies [START_REF] Ramakrishnan | A Life Consumption Monitoring Methodology for Electronic Systems[END_REF]. Temperature and vibrations were measured in-situ on the board in the application environment. Using the monitored environmental data, stress and damage models were developed and used to estimate consumed life. The LCM methodology predicted remaining life with acceptable accuracy. The application of this approach to legacy systems was demonstrated by Mathew, et al., [START_REF] Mathew | Prognostic Assessment of Aluminum Support Structure on a Printed Circuit Board[END_REF] and Shetty, et al. [START_REF] Shetty | Remaining Life Assessment of Shuttle Remote Manipulator System End Effector[END_REF].

Vichare et al [2] [13] [START_REF] Vichare | In-Situ Temperature Measurement of a Notebook Computer -A Case Study in Health and Usage Monitoring of Electronics[END_REF] proposed methods for monitoring and recording the loads in-situ. Methods were proposed for embedding the data reduction and load parameter extraction algorithms in to the sensor modules to enable reduction in onboard storage space, low power consumption, and uninterrupted data collection over longer durations. As shown in Figure 4, a time-temperature signal is monitored in-situ using sensors, and further processed to extract cyclic temperature range (∆T), cyclic mean temperature (T mean ), ramp rate (dT/dt), and dwell time (t D ) using embedded load extraction algorithms. The extracted load parameters are stored in appropriate bins to achieve further data reduction. The binned data is downloaded to estimate the distributions of the load parameters for use in damage assessment, remaining life estimation, and the accumulation of the products use history.

The methodology presented above for load monitoring and analysis is applied to the notebook computer, which was previously thermally characterized by Vichare et al. 2004 [14]. While a comprehensive health monitoring plan may involve multiple life cycle conditions, such as humidity, vibration, shock, radiation, and contamination, the present study focuses on temperature. A list of variables (not exhaustive) for monitoring the entire laptop is proposed in Table 1. Internal temperatures on CPU heat sink temperature, hard disk drive (HDD) temperature, ambient temperature (in vicinity of laptop), were dynamically monitored along with percentage of CPU utilized and fan condition (on/off), in-situ during all phases of the life cycle, including usage, storage, and transportation.

Figure 5a shows the raw sensor data, namely absolute temperature-time history for the heat sink and HDD, the corresponding temperature cycles amplitudes, and CPU usage.

The raw sensor absolute temperature data shown in Figure 5a was converted into a sequence of peaks and valleys using the ordered overall range method. The sequence of peaks and valleys were processed using a 3-parameter Rainflow method to identify the complete and half cycles and extract the amplitude, mean temperature, and ramp rate of each cycle. The resulting distribution of cyclic temperature ranges and mean temperatures on the heat sink and HDD are shown in Figure 5b and Figure 5c respectively. These data can be used with stress and damage models to asses the degradation of product and estimate the remaining life of the product. Along with the temperatures the usage of the product was recorded by logging the percentage CPU usage and the operation of the CPU cooling fan. An example of CPU usage monitoring is shown in Figure 5d with CPU usage and corresponding heat sink temperature. In Figure 5b, the CPU heat sink temperature was found to be 13 o C and 8 o C lower than its maximum rating over 90% and 95% of the monitored time period, respectively. This highlights the potential conservativeness of thermal management solutions optimized based on worst-case operating conditions that rarely occur. Such findings could contribute to the design of more sustainable, least-energy consumption thermal management solutions.

Approximately 97% of the temperature cycles experienced by either the CPU heat sink or hard disk drive had amplitude of less than 5 o C. However, the maximum temperature cycle amplitudes measured were found to exceed those specified by environmental standards for computer and consumer equipment. Such a discrepancy between standardized and actual conditions provides a strong motivation for monitoring actual product application environments.

The effects of power cycles, usage history, CPU computing resources usage, and external thermal environment on peak transient thermal loads were characterized. It was found that the product thermal operating envelope differed considerably from the operating conditions specified by environmental standard IPC SM-785 [START_REF]Guidelines for Accelerated Reliability Testing for Surface Mount Attachments[END_REF] and from the worst-case operating conditions assumed by the vendor, in terms of absolute temperatures, temperature cycle amplitudes, and temperature ramp rates. The monitored life cycle temperature data could also be used in physics based stress and damage models, to provide both damage estimation and remaining life prediction due to specific failure mechanisms influenced by temperature. The measured data could also be used to determine the stress levels to be imposed in accelerated testing, refining product specifications, and setting product warranties.

PHM INTEGRATION

Implementing an effective PHM strategy for a complete product or system may require integrating different prognostic health monitoring approaches. The first step is an analysis to determine the weak link(s) in the system based on the potential failure modes and mechanisms to enable a more focused monitoring process. Once the potential failure modes, mechanisms, and effects (FMMEA) have been identified, a combination of canaries, precursor reasoning, and life-cycle damage modeling may be necessary, depending on the failure attributes. In fact, different approaches can be implemented based on the same sensor data.

For example, operational loads, such as temperature, voltage, current, and acceleration can be used with damage models to calculate the susceptibility to electromigration between metallizations, and thermal-fatigue of interconnect, plated-thru holes, die-attach etc. Also, the processor usage, current, and CPU temperature data can be used to build a statistical model that is based on the correlations between these parameters. This model can be appropriately trained to detect thermal anomalies and identify sign for certain transistor degradation.

Future electronic system designs will integrate sensing and processing modules that will enable in-situ PHM. Advances in sensors, microprocessors, compact non-volatile memory, battery technologies, and wireless telemetry have already enabled the implementation of sensor modules and autonomous data loggers. For in-situ health monitoring, integrated, miniaturized, low-power, reliable sensor systems operated using portable power supplies (such as batteries) are being developed. These sensor systems have self-contained architecture requiring minimum or no intrusion into the host product in addition to specialized sensors for monitoring localized parameters. Sensors with embedded algorithms will enable fault detection, diagnostics, and remaining life prognostics that would ultimately drive the supply chain. The prognostic information will be linked via wireless communications to relay needs to maintenance officers and automatic identification techniques (RFID being the most common current example) will be used to locate parts in the supply chain--all integrated through a secure web portal to acquire and deliver replacement parts quickly on an as-needed basis.

Figure 2 .

 2 Figure 2. Advance warning of failure using canary structures

  Michael Pecht ENABLING ELECTRONIC PROGNOSTICS USING THERMAL DATA. ©TIMA Editions/THERMINIC 2006 -page-ISBN: 2-916187-04-9

Figure 4 .Figure 5 .,

 45 Figure 4. Load parameter extraction for health assessment and prognostics

Table 1

 1

	. Environmental, usage and performance parameters
	for PHM of notebook computers
	Parameters	Examples
	Environmental	-Temperatures of microprocessor, hard
	and Usage	disk drive, video card, RAM etc.
		-Vibrations/shock in application and
		handling, disk spin
		-Processor usage, memory usage,
		processor queue length, Cache fast
		reads/second etc.
		-Power cycles, number of on/off
		-Hard disk and monitor on/off
		-Strain in mother board flexing and
		torsion during handling and due to
		ageing
		-Pressure on keyboard and buttons
		-Force on latch, hinge, and connectors
		-Humidity and radiation exposure
	Performance	-Fan ON/OFF, Fan speed
	and system	-CPU core voltage, CPU I/O voltage
	setup	-Hard disk parameters: spin-up time,
		flying head height, ECC count, data
		transfer rate
		-Power management settings (power
		schemes, hibernate, and stand-by
		settings)


Dorota Pierścińska

Kamil Pierściński

Maciej Bugajski

Jens W Tomm

THERMAL PROPERTIES OF HIGH POWER LASER BARS INVESTIGATED BY SPATIALLY RESOLVED THERMOREFLECTANCE SPECTROSCOPY

In this work we present results of the analysis of thermal properties of high-power laser bars obtained by spatially resolved thermoreflectance (TR) spectroscopy.

Thermoreflectance is a modulation technique relying on periodic facet temperature modulation induced by pulsed current supply of the laser. The periodic temperature change of the laser induces variation of the refractive index and consequently modulates probe beam reflectivity. The technique has a spatial resolution of about ~1 µm and can be used for temperature mapping over 300 µm × 300 µm area.

Information obtained in these experiments provide an insight into thermal processes occurring at devices' facets and consequently lead to increased reliability and substantially longer lifetimes of such structures.

INTRODUCTION

High -power optoelectronic devices such as diode lasers, diode laser arrays or bars have steadily grown in power and decreased in price per watt. These devices offer a wide range of applications, e.g. as efficient sources for pumping solid-state lasers 1,2 (with a high spatial and spectral quality), as direct tools for material processing 3,4 and in medicine 5 .

However, limitations regarding device lifetime and reliability still limit their access to all potential application fields. Reabsorption of the laser radiation 6 and catastrophic optical damage (COD) 7 are among the mechanisms which cause laser bar degradation and consequently limit emitted optical power and device lifetime.

Several thermometric techniques such as thermoreflectance 8 , micro -Raman spectroscopy 9 , and micro-photoluminescence 10 are used to determine temperature distribution in the semiconductor laser. Information obtained in these experiments provide an insight into thermal processes occurring at devices' facets and consequently lead to increased reliability and substantially longer lifetimes of such structures.

In this work we use thermoreflectance (TR) spectroscopy to obtain temperature distribution over the facet of individual emitters in high power laser bars. The high temperatures, in excess of 200 o C have been observed for devices undergoing the failure. The increase of facet temperature with operation time for these emitters suggests thermal runaway model of COD. The damage to the facet has been confirmed by scanning electron microscope (SEM) investigation. Our investigation confirm that very high facet temperatures exist for operation currents between the failure of individual emitters and the total device failure. The heating of the facet in high -power laser bars and its degradation has been studied by means of non -invasive optical technique: thermoreflectance 11,12 . TR is a modulation technique relying on periodic facet temperature modulation induced by pulsed current supply of the laser (repetition rate 50-200 Hz, duty cycle 25-50%). Under these conditions the laser is operating quasi-CW and is subjected to thermal conditions, which are almost similar to genuine CW operation. The spatially resolved TR technique (spatial resolution of about ~ 1µm) provides detailed temperature distribution maps of operating devices.

THERMOREFLECTANCE TECHNIQUE

The relative variation of sample reflectance ∆R/R is linear versus the temperature variation ∆T and a measurement of the sample reflectance allows for the determination of the local temperature increase using the following formula:

R R R R T R R T ∆ ≡ ∆       ∂ ∂ = ∆ - κ 1 1 ( 1
)
Here κ is the TR coefficient which depends on probed material as well as on the wavelength of probe light. Therefore it should be determined experimentally for each investigated device. Here, the TR coefficient has been determined experimentally by means of micro-photoluminescence (PL) measurement. More information about calibration of thermoreflectance by photoluminescence measurements can be found in [11]. The other method which provides more straightforward temperature determination is micro -Raman spectroscopy. The absolute value of temperature can be obtained from the intensity ratio of anti-Stokes and Stokes lines or independently from the temperature dependent shift of these lines positions. This technique is preferred for determination of the value of TR coefficient 13 .

Experiment

In TR measurement devices are mounted on a temperature-controlled heat sink positioned on a high precision x -y -z piezo-translator stage to align laser mirror to the laser probe beam which is reflected from the facet. Using piezoelectrically driven translator stage allows for mapping laser facet temperature with submicron resolution. The experimental set-up used in the experiments is shown in Fig. 1. The clear advantage of thermoreflectance over micro-Raman measurements, which also have mapping capability, manifest itself in that TR, contrary to Raman, is a single-wavelength measurement.

RESULTS AND DISCUSSION

For each emitter the temperature line scans starting at the active region towards the substrate were measured. The measurements were repeated three times and the results averaged. The temperature maps (300 µm x 120 µm) were measured only for selected emitters. Fig. 2. presents distribution of active region temperatures in laser bar, together with temperature line scans for selected emitters, showing characteristic behaviour. All emitters, except a few, show the facet temperature increase of the order of 30 0 C. Three emitters are substantially hotter, with temperature of emitter no. 8 reaching 200 0 C. Results of consecutive scans for each emitter showed the same values of temperature except for emitter no. 18 which exhibited increased degradation after each scan.

The emitter no. 8 exhibited the highest temperature of the active region among all emitters. The map of temperature distribution for emitter no. 8 is shown in Fig. 3. The map was recorded with 0.5 µm step in x and y direction. Black colour corresponds to no change of temperature and white colour to the highest change of temperature. The facet of this emitter is highly defected, as can be seen in a picture from CCD camera built in the experimental set-up (Fig. 4). (R in eq. 1) should account for modified reflectance in the areas of damaged coatings. This emitter facet does not exhibit features of drastically damaged coatings as was in the case for emitter no. 8.

However spots of higher temperature in the active region are still observed. In the CCD image captured during measurement dark spots (no lasing) can be observed. Near field image was recorded in order to compare it with the horizontal temperature profile along junction obtained by thermoreflectance spectroscopy. Result of this comparison are presented in Fig. 7. The degradation or damage of the facet often leads to appearance of points with lower intensity 'dark spots' in the near field profile. As it can be seen in Fig. 7 a higher value of temperature occurs at the dark spots. In the dark spot regions almost all electric power supplied is converted into heat and also the current density is higher.

The maps recorded for emitters which show no excessive heating exhibit uniform temperature distribution and increase of the overall facet temperature with supply current (see Fig. 8).

CONCLUSION

We have presented a study of the facet heating in high power laser bars. The experimental technique used was spatially resolved thermoreflectance. It allowed for identification of emitter failure mechanisms and gave insight into the heat management of the devices. The observed ageing effects for the individual emitters appeared to be almost exclusively related to facet damage. We have also observed thermal runaway effects for the laser bar as a whole; i.e., channelling of the supply current by the degraded emitter and consequent further increase of its temperature. The thermoreflectance proved to be method of choice for studying thermal properties of lasers, especially when exact temperature distribution is of interest. The close correlation between TR maps and SEM images of the facet damage additionally validate the method used in the investigations and provide a step forward in quantifying COD effects in high power lasers.

Fig 1 .

 1 Fig 1. Experimental set-up for thermoreflectance measurements on laser diode and laser bar mirrors.

Fig 2 .Fig 3 .

 23 Fig 2. Distribution of active region temperatures in laser bar (a) and temperature line scans for selected emitters; (b) -emitter no. 8, (c) -emitter no. 18.

Fig 4 .

 4 Fig 4. CCD camera image of the facet of emitter no. 8 -(a), and SEM photo of emitter no. 8 showing damaged antireflective (AR) coating -(b) and SEM photographs also show precipitating In solder -(c).

Fig 5 .

 5 Fig 5. Temperature map of the emitter no. 8 at I=50A and at the heat sink temperature of 25°C.

Fig 7 .

 7 Fig 7. Comparison of near field and horizontal temperature profile along junction for emitter no. 18.

9 Fig 8 .

 98 Fig 8. Temperature maps of the emitter no. 16 at I=30 A (a) and I=50 A (b) at the heat sink temperature of 25°C.


Efraim Rotem -Mobile

Temperature measurement in the Intel ® Core TM Duo Processor

Modern CPUs with increasing core frequency and power are rapidly reaching a point where the CPU frequency and performance are limited by the amount of heat that can be extracted by the cooling technology.

In mobile environment, this issue is becoming more apparent, as form factors become thinner and lighter. Often, mobile platforms trade CPU performance in order to reduce power and manage thermals. This enables the delivery of high performance computing together with improved ergonomics by lowering skin temperature and reducing fan acoustic noise. Most of available high performance CPUs provide thermal sensor on the die to allow thermal management, typically in the form of analog thermal diode. Operating system algorithms and platform embedded controllers read the temperature and control the processor power. Improved thermal sensors directly translate into better system performance, reliability and ergonomics. In this paper we will introduce the new Intel ® Core TM Duo processor temperature sensing capability and present performance benefits measurements and results.

Die Hot-Spot

Introduction

Today's high performance processors contain over a hundred million transistors, running in a frequency of several gigahertz. The power and thermal characteristics of these processors are becoming more challenging than ever before, and are likely to continue to grow with Moor's low. Improvements in the cooling technology however, are relatively slow and do not follow Moor's low. All computing segments face power and thermal challenges. In the server domain, the cost of electricity and air conditioning is one of the biggest expense items of a data center, and drives the need for low power high efficiency systems. In the mobile computing market, power and thermal management are the key limiter for delivering higher computational performance. Thin and light industrial designs are limited by the heat that can be extracted from the box. Ergonomic characteristics are also highly impacted by thermal considerations. The cooling fan is the major source of acoustic noise in the mobile system and external skin hot spots should be avoided for ergonomic reasons as well.

The increasing demand for compute density brings the need for efficient thermal management schemes. Several such schemes have been proposed, for example DVS (dynamic frequency voltage scaling [START_REF] Brooks | Dynamic Thermal Management for High-Performance Microprocessors[END_REF]). These mechanisms were implemented in CPUs such as the Intel® Centrino® Processor [START_REF]Intel® Pentium® M processor product specifications[END_REF]. Most operating systems on the market support ACPI [START_REF]Advanced Configuration and Power Interface[END_REF]. This is an industry standard infrastructure that enables thermal management of computer platforms. Thermal management is done by the use of active cooling devices, such as fans, or passive cooling actions such as DVS. Thermal management schemes accept user preferences for setting management policy. A computer user can select between high performance, energy conservation and improved ergonomics parameters.

The basic feedback for most of the power and thermal management schemes is temperature measurement. Both Intel® processors [START_REF]Intel SpeedStep Technology[END_REF] and others [START_REF] Pham1 | The design and implementation of a first-generation CELL processor[END_REF], incorporate temperature sensor on the die to allow thermal measurement, typically in the form of analog thermal diode. The voltage on a diode junction is a function of the junction temperature. The diode is routed to external pins and an A/D chip on the platform converts the voltage into temperature reading. The Intel® Centrino processor [START_REF]Intel® Pentium® M processor product specifications[END_REF] introduced a fixed thermal sensor, tuned to the max specified junction temperature. In case of abnormal conditions, such as cooling system malfunction, the circuit asserts a signal that activates a programmable self management power saving action that protects the CPU from operating out of its specified thermal range. It is apparent that the accuracy of the thermal measurements directly impacts the performance of the thermal management system and the performance of the CPU. In mobile computers, 1.5 o C accuracy in temperature measurement is equivalent to 1 Watt of CPU power. In desk-top computers the impact is even higher due to the lower thermal resistance and 1 o C accuracy translates into 2 Watt of CPU power.

There are several causes for temperature measurement inaccuracy:

1. Parameter variance: The thermal diode is not ideal and during the manufacturing process, there are variations in the diode parameters that translate into reading variations. An offset value is programmed into the Intel® Core™ Duo, to be used by the A/D to generate accurate readings.

2. A/D accuracy: Some errors are associated with the analog to digital conversion due to design and technology limitations as well as quantization errors.

The best temperature A/Ds available on the market today provide +/-½ o C accuracy.

3. Proximity to the hot spot: CPU performance and reliability is limited by the temperature of the hottest location on the die. Thermal diode placement is limited by routing and I/O considerations and usually cannot be placed at the hottest spot on the die. Furthermore, the hot spot tends to shift around as a function of the workload of the CPU. It is not rare to find temperature difference as high as 10 o C between a diode and the hot spot.

4. Manufacturing temperature control: Parts are tested for functionality and reliability at the max temperature specifications. Variations in test temperature drive a need for additional guard-band in the temperature control set points.

The speed of response to temperature changes also impacts thermal management performance. The Intel ® Core TM Duo processor has implemented a new digital temperature reading capability to address the accuracy and response time limitations of existing solutions. The rest of the paper will describe the implementation of the digital sensor and the measured results of it's performance.

The Intel® Core ™ Duo digital sensor (DTS)

The general structure of the digital thermometer of the Intel® Core™ Duo [START_REF] Naveh | Power and Thermal Management in the Intel® Core™ Duo[END_REF] is described in Figure 1. In addition to the analog thermal diode, multiple sensing devices are distributed on the die in all the hot spots. An internal A/D circuit converts each sensor into a 7 bit digital reading. The temperature reading is calculated as an offset from the maximum specified Tj, e.g. 0 indicated that the CPU is at it's maximum allowable Tj, PROCHOT is a fixed temperature threshold calibrated to trip at the max specified junction temperature. Upon crossing this threshold, a H/W power reduction action is initiated, reducing the frequency and voltage, keeping the CPU within functionality and reliability limits. A properly designed cooling system with thermal management should not activate the H/W protection mechanisms. Some aggressive platform designs however, may need occasional H/W initiated action due to long response time. On most operating systems, interrupt latency is not guaranteed and therefore, S/W based control may respond too slow. Other actions have inherent long delays. The time extending from activation of a fan and until its maximum speed is reached may be too long. Aggressive thermal design, together with a slow cooling response may cause thermal excursions that may compromise reliability and functionality. It is possible to design a system with enough margins to avoid such cases, but this comes at a cost of performance or compromised ergonomic characteristics. H/W based protection enables better user experience without compromising the device reliability and performance.

THERMTRIP is a catastrophic shut down event, both on the CPU and for the platform. It identifies thermal runaway in case of cooling system malfunction and turns off the CPU and platform voltages, preventing meltdown and permanent damage.

A new functionality of the DTS on the Intel ® Core TM Duo is out of spec indication. It is possible for the CPU to operate within specifications while at maximum Tj. Out of spec indication is a notification to the operating system that a malfunction occurred, junction temperature is rising and a graceful shut down is required while functionality is still guaranteed and user data can be saved.

In order to perform S/W and ACPI thermal control functions, the DTS offers interrupt generation capability, in addition to the temperature reading. Two S/W programmable thresholds are loaded by S/W and a thermal interrupt is generated upon threshold crossing. This thermal event generates an interrupt to single or both cores simultaneously according to the APIC settings.

The digital thermometer is the basis for software thermal control such as the ACPI. In the ACPI infrastructure, thermal management is done by assigning a set of policies or actions to temperature thresholds. A policy can be active, such as activating fan in various speeds (_ACx), or passive (_PSV), by reducing the CPU frequency. Interrupt thresholds are defined to indicate upper and lower temperatures thresholds. An example of digital thermometer usage is given in Figure 2.

Measurements and results

In previous Pentium™ -M systems, a single analog thermal diode was used to measure die temperature. Thermal diode cannot be located at the hottest spot of the die due to design limitations. To perform thermal management activities, some fixed offset was applied to the measured temperature, to keep the CPU within specifications. With the increasing performance and power density of the Intel ® Core TM Duo, the performance implications of guard bands increase. Figure 3 shown measured die temperature of different workloads. It can be seen that the hot spot of the die moves to different locations depending on the nature of the workload. A workload that stresses the floating point unit which is a high power operation, will generate hot spot near the floating point while other workloads will stress different locations on the die. Figure 4 shows the thermal impact of single core applications. It can be noted that a single diode cannot capture the maximal die temperature. Placing a diode between the cores, results in non optimal location as this is a relatively cold area of the die in single thread workloads. Workloads can be migrated by the operating system scheduler from one core to the another on the same die and therefore a symmetrical sensor placement is required.

Die Hot-Spot

In order to evaluate the DTS temperature reading, we performed a study to identify the impact of different workloads on the difference between diode and the hot spot, as measured by the DTS. A set of workloads including all SPEC-2K components and other popular benchmarks and applications, at single thread and multithread were executed on the CPU. Several iterations were done to reach a thermal steady state and then the diode and DTS temperatures were measured. Before taking the measurement, a calibration process has been performed, leaving only the temperature offset. As described earlier, both external A/D and internal DTS have some inaccuracies. Calibration procedure is needed to equalize DTS and diode temperature readings and measure temperature offsets only. Figure 5 shows the offset between the analog diode and the hot spot, as measured by the DTS. The horizontal axis represents the hot spot temperature as a percentage of the max temperature. The vertical axis shows the temperature offset between the diode and the hot spot. Each point on the chart represents a single application.

It can be seen that large temperature gradients exist on the die. It also can be noted that some workloads display high temperature gradients while other have no offset. Thermal control algorithms need to prevent the hot spot from exceeding the max temperature specification. It is possible to mitigate the temperature difference by applying a fixed offset to the diode reading. This obviously is a non optimal solution as the workloads with low offset will be panelized by the unnecessary temperature offset. The use of digital thermometer provides improved temperature reading, enables higher CPU performance within thermal limitations and improves reliability. Previous studies [START_REF] Rotem | Analysis of Thermal Monitor features of the Intel Pentium M Processor[END_REF] have shown that temperature reduction directly translates into performance degradation. The above chart represents 3%-7% reduction in performance due to temperature measurement offset. Building a thermal management system around a thermal diode, with the characteristics shown in Figure 5 requires temperature guard-band. This guard band can be applied to the control set point, and as a result, the workloads that generate high offset temperatures result in lost performance. A different approach can set the Tj threshold assuming that the diode represents the correct die temperature. Some of the workloads will run at high max Tj and therefore risk functional issues or reliability degradation.

The DTS also reduces the other temperature readings errors, which are not shown in this paper. The DTS is calibrated at manufacturing conditions and the reference point is set to this test temperature. Functionality, electrical specifications and reliability commitments are guaranteed at maximum Tj as measured by the DTS. Any test inaccuracy or parameters variance are already accounted for in the DTS set point.

Summary and conclusions

With the increasing demand for computational density and the increase in CPU transistors and frequency, power and thermal are the key limiters for providing computing performance. In recent years, thermal management has become a fundamental function of computer platform. The input to every thermal management scheme is a thermal sensor. We have shown that thermal sensor accuracy translates into power, which in turn translates into better CPU performance. Legacy analog thermal sensors incur inaccuracies due to parameter distribution and temperature offset from the hot spot. In this paper we introduced the new digital thermal sensor (DTS) of the Intel® Core® Duo processor. We showed that multiple sense point on various hot spots of the die, together with on die A/D converter provide improved temperature reading. The better accuracy translates either into 3%-7% higher performance or into improved ergonomics. The introduction of dual core

Figure 1 :

 1 Figure 1: Digital Thermometer Block Diagram

Figure 2 :

 2 Figure 2: Digital thermometer and ACPI In the above example the current die temperature is at 60 o C. The thresholds set to 5 o C above and below the current temperature. If the temperature rises above 65 o C, an interrupt is generated, notifying the S/W of a significant change in temperature. The control software reads the temperature and identifies the new temperature and initiates action if needed. In the above example, 65 o C requires activating a fan at a low speed. The activation thresholds and policies are defined at system configuration and communicated to the ACPI. Upon interrupt servicing, new thresholds are written around the new temperature to further track temperature changes. Small hysteresis values are applied to prevent frequent interrupts around a threshold point.

Figure 3 :Figure 3

 33 Figure 3: Die hot spots at different workloads

Figure 4 :

 4 Figure 4: Thermal behavior of a single core application

Figure 5 :

 5 Figure 5: Diode to DTS Temp. difference

  1 indicated 1 o C below etc. All temperature readings are combined together into a single value, indicating the temperature of the hottest spot on die. The Intel ® Core TM Duo is a dual core CPU. The DTS offers the ability to read temperature for each core independently and to read the maximum temperature for the entire package. To achieve measurement accuracy, each sensor is calibrated at test time. Calibration is done for the Maximum Tj and the linearity of the readout slope. The temperature reading is post processed for filtering out random noise and generating the H/W activated thermal protection functions. The DTS implementation on the Intel ® Core TM Duo processor supports the legacy Intel Centrino® thermal sensor and fixed function thresholds PROCHOT and THERMTRIP[START_REF]Intel® Pentium® M processor product specifications[END_REF].

	Multiple
	Sensors	A/D
		Converter	Analog Sensor
	S/W	Filtering	Thermal shut down
	accessible	&	Thermal protection
	Register Temperature	Post Processing 7 bit temperature Out of Spec High reading
	Threshold #1		Threshold Low Threshold compare	Thermal Interrupt
	Threshold #2		compare


Ernő Kollár

Székely Vladimír

Bute

REDUCING THE POSSIBILITY OF SUBJECTIVE ERROR IN THE DETERMINATION OF THE STRUCTURE-FUNCTION-BASED EFFECTIVE THERMAL CONDUCTIVITY OF BOARDS

The thermal response function given to a unit-step dissipation accurately characterizes the thermal system. Instead of the thermal response function the so-called structure function describing three-dimensional as the equivalent model of one-dimensional heat-spreading, created from the thermal response function with the help of complex mathematical procedures, is often used. Using the structure function the partial thermal capacity and partial heat resistance of certain elements of the thermal system can be identified.

If the geometrical measurements of a thermal system of simple geometry and homogeneous material (such as a homogeneous rod or board, etc.) are known, the coefficient of thermal conductivity of the material in question can be determined from two points of the structure function at 2-5 per cent of accuracy.

In this paper a method is presented which applies a wide range/section instead of two points of the cumulative structure function to determine the thermal coefficient, thus reducing the subjective error deriving from the selection of the two points.

The above method is presented and illustrated in simulated as well as measured thermal transient responses.

INTRODUCTION

The structure functions are graphical representations of the RC-model (Cauer-network) of the thermal system (Figure 1). The thermal resistance between the n-th element of the model network and the heat source (driving point) is:

( ) ∑ = Σ = n i i R n R 1 , (1)
and the cumulative thermal capacitance is:

( ) ∑ = Σ = n i i C n C 1 , (2)
where R i and C i denote the element values of the i-th stage of the Cauer-type model network. Plotting the C Σ vs. R Σ values results in the cumulative structure function (Figure 2). In order to determine the conductivity value on the linear range from the integrated structure function [START_REF] Székely | Calculating effective board thermal parameters from transient measurements[END_REF]:

1 2 1 2 ln 4 1 Σ Σ Σ Σ -         ⋅ = R R C C w π λ , ( 3
)
where w is the thickness of the board and the R ∑ and C ∑ indexes indicate the values belonging to the selected points.

The main aspect of the selection of the two points is that both should be within the middle, linear (lambda measuring) range and should not be identical.

Our simulations carried out by the SunRed [2] simulation program showed that considering the criteria of the above mentioned method as a basis and keeping in mind the aspects of accuracy these criteria are not enough. In the selection of the two points there always remains a certain degree of subjectivity, the subjectivity of the person carrying out the evaluation, which appears as an error when determining the thermal conductivity.

Therefore we have elaborated a method to reduce subjective error, which applies a wide range/section instead of two points of the cumulative structure function to determine the thermal coefficient [START_REF] Rencz | Increasing the accuracy of structure function based thermal material parameter measurements[END_REF].

It is an additional advantage of the method that it determines the inflection point of the selected range more accurately, than determining it from the second derivative according to the R th .

THE λ-FINDER ALGORITHM

The λ-finder algorithm determines the thermal conductivity coefficient from the integrated structure function of the board-like materials. The algorithm examines how the steepness of the graph (curve) changes if the symmetrical immediate neighborhood of the given point in the integrated structure function is symmetrically extended.

The steps of the algorithm are the following: • Conductivity values are determined in each point of the range according to (4)

( )               - ⋅ ⋅ = - + - + ) ( ) ( ) ( ) ( ln 4 1 n th n th n th n th th n R R C C w R π λ , ( 4
)
where w is the thickness of the board, and n in the indexes of R th and C th indicates the R th and C th values plus (+n) samples towards the higher values and minus (-n) samples towards the smaller values from the point examined. (n = 1…20).

• From the conductivity values belonging to a certain point of the range λ m (R th ) average(s) (5) and δ m (R th ) relative deviation(s) (6) are determined.

( In this example we started from the simulation of the thermal transient heat response of the 1-mm-thick homogeneous copper board in vacuum. We created an integrated structure function from the gained thermal response function using the T3Ster-Master [4] program.

( ) ∑ = = m n th n th m R m R 1 1 λ λ , (5) ( ) ( ) ( ) ( ) ( ) ( ) 1 1 1 2 - - = ∑ = m R R R R )
The program determines conductivity from two points of the integrated structure function selected at random and a board thickness given at random. The calculated thermal conductivity of the sample may differ from the 390 W/mK value set as simulation parameter even with 1.5 per cent, depending on the two selected points (Figure 4). The smallest minimums of the relative deviation functions designate accurately that R th point where the determination of the thermal conductivity value is advisable. With the help of the smallest minimum points found in the relative deviation function of thermal conductivity we are able to prevent the appearance of subjective error at the determination of thermal conductivity value derived from two points. In certain cases it might be necessary to determine the inflection point of the cumulative structure function. How-ever, the determination from the second derivative according to the R th is not always a preferable solution. The double derivation may increase the 'noise' the function so much that we can select the inflection point only in a subjective manner.

The λ-finder algorithm smooths down this 'noise' and provides the inflection point of the cumulative structure function at the smallest minimum point of the deviation functions.

EXAMPLE II, EFFECTIVE THERMAL CONDUCTIVITY OF PCBS

From the aspect of measurement technology the measure of the effective thermal conductivity of PCBs is greatly simplified by the fact that it can be carried out in the air as well and it is not necessary to use vacuum. In that case, however, the shunting effect of the air must somehow be taken into consideration.

In this experiment we simulated the thermal transient response of 1-mm-thick boards having thermal conductivity between 2 and 14 W/mK in air. Due to the shunting effect of the air the thermal conductivity values of the board simulated in the air determined on the basis of the structure function are, of course, higher than the values adjusted as the parameters of the simulation. The shunting effect of the air changes the deriving thermal conductivity only a little, but the size of this error can be measured in relation to the subjective error appearing at the selection of the two points. In the experiments we employed the following cylinder-symmetrical structure (Figure 7). Using the λ-finder algorithm we determined the relative increase of the thermal conductivity values of the board and plotted it in relation to the parameter of the simulation burdened with the shunting effect of the air (Figure 8). From the aspect of measurement technology it is advisable to use such a group of graphs which gives the thermal conductivity of the sample (that is, measured in vacuum) from the thermal conductivity values measured in the air (Figure 9).

y = 3,57E-01x -1,47E+00 R 2 = 9,75E-01 y = 3,80E-01x -1,75E+00 R 2 = 9,54E-01 y = 4,75E-01x -2,39E+00

CONCLUSIONS

We have created an algorithm which reduces the subjective error appearing at the determination of the local thermal conductivity based on structure function of board-like materials in a way that it applies a wide range instead of two points of the cumulative structure function to determine the thermal coefficient.

We have shown two applications for the algorithm. This algorithm is advantageous when the subjective error is commensurable to other errors, for example the shunting effect of the air at the determination of the effective thermal conductivity of boards.

Figure 1 :

 1 Figure 1: The RC-model of the thermal system.

Figure 2 :Figure 3 :

 23 Figure 2: The cumulative structure function.The cumulative structure function characteristic of board-like materials of homogeneous isotropic conductivity (Figure3).

•

  Describe the δ m (R th ) relative deviations and λ m (R th ) average thermal conductivity(ies) in relation to R th thermal resistance. • We seek minimal values in the δ m (R th ) deviation functions. • Where the δ m (R th ) functions together give the smallest minimum, this δ m (R th ) value belonging to the R th point gives the effective thermal conductivity on λ m (R th ) function as well as the inflection point of the integrated structure function. Note: The n max = 20 and m values are experimental ones. The algorithm does not exclude the use of any other n max and m values.

1 2

 1 Ernő Kollár, Vladimír Székely Reducing the possibility of subjective error in the determination of the structure-function-based...

Figure 4 :Figure 5 :

 45 Figure 4: The integrated structure function of the 1-mmthick ECU57 sample 'simulated in vacuum' Let us employ the λ-finder algorithm for the calculated integrated structure function and describe the δ m (R th ) relative deviations in relation to the R th thermal resistance.

Figure 6 :

 6 Figure 6: The λ m (R th ) average thermal conductivity functions of the sample

Chart 1 :

 1 Thermal conductivity of the ECU-57 sample determined by the λ-finder method (w = 1 mm) Reducing the possibility of subjective error in the determination of the structure-function-based... ©TIMA Editions/THERMINIC 2006 -page-ISBN: 2-916187-04-9

Figure 7 :

 7 Figure 7: The board thermal conductivity measurement setup

Figure 8 :

 8 Figure 8: The air surrounding the board increases thermal conductivity

  Thermal conductivity determined within the lambda measuring range, simulated in the air [W/mK]

Figure 9 :

 9 Figure 9: Thermal conductivity adjustment curves of the sample for the easy measuring

©TIMA Editions/THERMINIC 2006-page-ISBN: 2-916187-04-9

ACKNOWLEDGEMENTS

This work was partially supported by the PATENT IST-1999-12529 Project of the EU, and by the 2/018/NKFP-2001 INFOTERM Projects of the Hungarian Government.


Zbigniew Suszyński

Mateusz Kosikowski

Radosław Duer
email: 3rduer@man.koszalin.pl

THE APPLICATION OF ARTIFICIAL NEURAL NETWORK FOR THE ASSESSMENT OF THERMAL PROPERTIES OF MULTILAYERED SEMICONDUCTOR STRUCTURE

This paper presents the method for determination of thermal properties of multi-layered structure basing upon experimental data acquired with the help of photoacoustic technique in harmonic modulation mode. The method proposed is based upon the matching of theoretical complex contrast characteristic of the investigated object to the experimental contrast characteristic realised by artificial neural network

INTRODUCTION

The non-destructive investigations of thermal properties of solids are very important for the semiconductor industry. Especially, in the case of high power semiconductor devices, which are usually produced as multli-layered planar structures, the quality of adhesion between the layers is one of the most important factors of reliability of such a device. The areas of weak adhesion are characterised by high thermal impedance. Generally, thermal properties of weak adhesion area are highly diversified so it can be assumed that thermal nonuniformity is present there [START_REF] Suszyński | Photoacoustic inspection of thermal properties of layered structure with pulse excitations[END_REF]. The assessment of thermal properties (such as diffusivity, effusivity, thickness of layer) of such area is related to resolving the inverse problem of deconvolution in order to estimate thermal impedance of non-uniformity area. That was the motivation for this contribution.

The method presented utilitizes Artificial Neural Network (ANN) to resolve the inverse problem. In this approach, well trained ANN identifies the set of thermal properties for which the experimental complex contrast characteristic (CTC) matches the best to the theoretical CTC characteristic obtained from the model.

THE EXPERIMENT

The object of investigation

The object investigated during photo-acoustic experiment was typical high power thyristor structure. Three layers can be distinguished in such a structure: silicon-eutecticsmolybdenum (Fig. 1).

In the case of weak quality of adhesion the additional layer of high thermal impedance can be formed in the interface area between silicon and molybdenum. The thermally thick piece of passivated glass was used as a Zbigniew Suszyński, Mateusz Kosikowski, Radosław Duer 3 The application of artificial neural network for the assessment of thermal properties ...

©TIMA Editions/THERMINIC 2006

-page-ISBN: 2-916187-04-9 reference object for calculations of complex contrast characteristics.

The object of investigation

The experimental data were collected with the help of photo-acoustic technique in harmonic excitations mode with the standard measurement set-up [START_REF] Tam | Applications of photoacoustic sensing techniques[END_REF]. The source of energy excitation was modulated laser beam of power about 1W. The frequencies of modulation were ranged from 106Hz to 586Hz. The signal of temperature response was acquired in both the amplitude and phase images [START_REF] Rosencwaig | Thermal wave imaging with thermo-acoustic detection[END_REF].

The examples taken from the sequence of both the amplitude and phase images are presented in Fig. 2. This figure also presents CTC images.

Amplitude

Phase CTC 106 Hz 131 Hz 306Hz Fig. 2

. Examples of amplitude, phase and CTC images of investigated object

For the purpose of proper analysis of thermal parameters of the object basing upon the results of photo-acoustic measurements it is mandatory to eliminate the influence of linear distortions introduced by each element of the photoacoustic set-up. The best for that is the use of comparative method of analysis -for example Complex Thermal Contrast method [START_REF] Suszyński | Thermal Diagnostic of Power Thyristor[END_REF][START_REF] Suszyński | Termofalowe metody badania materiałów i przyrządów elektronicznych[END_REF]. The mean value of temperature response signal from both the area of non-uniformity and the reference object were used further for determination of complex contrast characteristics.

1-D TLM model

1-D TLM model was used in order to derive the theoretical complex contrast characteristics. The model utilities the electro-thermal analogy for determination of

R 1 2 R 1 2 R 1 2 R 1 2 R 1 2 R 1 2 R 1 2 R 1 2 R 1 2

Zbigniew Suszyński, Mateusz Kosikowski, Radosław Duer 3

The application of artificial neural network for the assessment of thermal properties ...

©TIMA Editions/THERMINIC 2006

-page-ISBN: 2-916187-04-9 temperature response. In this case, the investigated structure is represented by four-terminal network (Fig. 3) [START_REF] Suszyński | Termofalowe metody badania materiałów i przyrządów elektronicznych[END_REF][START_REF] De Cogan | Propagation analysis for thermal modeling[END_REF].

) 1 ( Θ K ) 2 ( Θ K ) 3 ( Θ K ) 4 ( Θ K 1 Θ 2 Θ 3 Θ 4 Θ 5 Θ Fig. 3. Four-terminal network model of 4-layer structure.                   + - + - + - ⋅ = Θ ) 4 ( ) 3 ( 11
2 ) 3 ( 12 ) 3 ( 11 ) 2 ( 11 2 ) 2 ( 12 ) 2 ( 11 ) 1 ( 11 2 ) 1 ( 12 ) 1 ( 11 1 ) ( ) ( ) ( ~C Z z z z z z z z z z P (1) ) sinh( ) cosh( 11 Γ Γ = C Z z ) sinh( 1 12 Γ = C Z z (2) d i ⋅ + = Γ α ω 2 ) 1 ( ω ε 2 1 ) 1 ( S i Z C + = (3) n C front n W Z P ) 1 ( = Θ (4) 2 i for ) ( thick thermally if 1 i for ) ( thin thermally if 1 i for sinh cosh sinh 1 sinh cosh 1 sinh cosh 1 1 1 , 1 1 1 1 2 1 1 1 1 1 ≥ >> = ≤ =                  + Γ Γ         Γ - Γ Γ Γ Γ = + - + - + - + - + - + - + - µ µ ε α d d W i n n i i n i n i n i n i n i (5)
Where:

1 Θ -temperature of input of analyzed object [K], Γ -operator of propagation, C Z -characteristic impedance [K/W], P ~- stimulation power ω -frequency [Hz], ε -thermal effusivity [ -1 -2 0.5 K m Ws ⋅ ⋅ ], α -thermal diffusivity [ 1 2 - ⋅ s m ],
d -thickness of layer [m], n -number of layers, i -number of particular layer.

Zbigniew Suszyński, Mateusz Kosikowski, Radosław Duer 3

The application of artificial neural network for the assessment of thermal properties ...

©TIMA Editions/THERMINIC 2006

-page-ISBN: 2-916187-04-9

Temperature response at the surface of investigated object is given by the equation [START_REF] Suszyński | Photoacoustic inspection of thermal properties of layered structure with pulse excitations[END_REF]. It is possible to transform the equation ( 1) into more convenient form (4) using the recursive coefficient W i given by the equation ( 5) [START_REF] Arsoba | Badanie jakości termokompresji w strukturach tyrystorowych metodami termofalowymi dla pobudzeń zmiennych w czasie lub przestrzeni[END_REF].

The values of temperature obtained were used for derivation of complex contrast characteristics.

Complex contrast is defined as difference between normalized complex temperatures for both the investigated and the reference objects. Thus, CTC presents the changes of both amplitude and phase of temperature disturbance [START_REF] Suszyński | The idea of complex temperature contrast images for thermal-waves measurements[END_REF].

INPUT (CTC characteristics) …

Fuzzy system These vales obtained for the uniform areas (Fig. 2 -area 2) are as following: 387µm and 0.1nm. For the purpose of verification of ANN simulation, the results of destructive investigations were used. Those investigations were performed for the same high power thyristor structure after photo-acoustic experiment. The results of this kind of investigations are presented in Tab.1 (Real Values). As it follows, the thickness of silicon layer as well as the thickness of air layer is in high convergence for the uniform area. The zero value means that spacial resolution of destructive investigation method was to low so it could not be compared with the value of 0.1nm achieved for the ANN method Concerning the area of non-uniformity, both of the geometrical parameters investigated are different from each other. For the case of non-uniformity area it is caused by the insensibility of the model for the air layer thickness above 5µm so it was the biggest thickness of air layer assumed during thermal modelling and training of ANN.

CONCLUSIONS

The final results obtained are encouraging concerning the fact that the convergence of experimental characteristics to the ones obtained from ANN was good. Differences can be caused by the use of 1D thermal model. The limitations of 1D model in comparison to the 2D model can be significant. The solution for that can be usage of 2D or 3D thermal models for the purpose of ANN training. However, it will be related with extensive increase of the independent variables as well as the consumption of computer system resources. Nevertheless, the method for thermal properties analysis presented allows to utilise the advantages of CTC contrast method and the quickness of artificial neural networks. The solution of inverse problem given that way is insensible to the disturbances of measurement data as well as measurement errors. The trained ANN produces relevant and precise enough results even with significantly wrong value of experimental CTC characteristics for some frequency, which can appear due to large error made during the measurements for this frequency.

Fig. 1 .

 1 Fig.1. Profile of the experimental object.

4 .

 4 Examples of CTC theoretical characteristics (a). Structure of designed system (b). Tab. 1. The effusivity and diffusivity values of particular layer of investigated object appointed by ANN. The thickness ranges of each layer used for ANN training are shown in Fig.1.

Fig. 5 . 3 Fig. 5

 535 Fig. 5. Example-results of pattern mach by ANN.


Jo Das

Herman Oprins

Hangfeng Ji

Andrei Sarua

Wouter Ruythooren

Joff Derluyn

Martin Kuball

Marianne Germain

Gustaaf Borghs

A TEMPERATURE ANALYSIS OF HIGH-POWER ALGAN/GAN HEMTS

Galliumnitride (GaN) has become a strategic superior material for space, defense and civil applications, primarily for power amplification at RF and mm-wave frequencies. For AlGaN/GaN high electron mobility transistors (HEMT), an outstanding performance combined together with low cost and high flexibility can be obtained using a System-in-a-Package (SIP) approach. Since thermal management is extremely important for these high power applications, a hybrid integration of the HEMT onto an AlN carrier substrate is proposed. In this study we investigate the temperature performance for AlGaN/GaN HEMTs integrated onto AlN using flip-chip mounting. Therefore, we use thermal simulations in combination with experimental results using micro-Raman spectroscopy and electrical dc-analysis.

INTRODUCTION

The AlGaN/GaN material system has many advantages for high power RF applications [START_REF] Mishra | AlGaN/GaN HEMTs -an overview of device operation and applications[END_REF]. It combines a higher output power density (even at high frequency), a higher output impedance (easier matching), a larger bandwidth and better linearity than other existing technologies (like Si-LDMOS or GaAs p-HEMT). These features follow directly from the physical properties of GaN: the large bandgap (E g = 3.4 eV) results in a breakdown electrical field ten times larger than Si. This allows transistor operation at high bias voltage (>50V). Moreover it is possible to engineer piezoelectric AlGaN/GaN heterostructures, with spontaneous formation of a twodimensional electron gas (2DEG), exhibiting high electron mobility and high current density, combined with high electron saturation velocity.

The AlGaN/GaN heterostructures are usually grown on sapphire, SiC and recently also on Si substrates. Sapphire substrates have the advantage of low cost, however, for realizing high power applications their low thermal conductivity (k = 35 W/m.K) compared to e.g. SiC (k = 400 W/m.K) is a major drawback. To overcome the low thermal conductivity of sapphire, flip-chip bumps can be used to interconnect the HEMT both electrically and thermally to a AlN carrier [START_REF] Xu | A 3-10-GHz GaN-Based Flip-Chip Integrated Broad-Band Power Amplifier[END_REF]. By integrating passive components onto the AlN, using a Multi-Chip-Module technology a System-in-a-Package (SIP) integration is obtained. In this paper we will study a new flip-chip bump design, to achieve a good thermal performance. We will compare finite element thermal simulations to experimental results, using electrical DC-characterization, and micro-Raman spectroscopy. We will demonstrate that using the novel bump design an improved thermal performance for multi-finger HEMTs on sapphire substrates can be achieved.

Fig. 1: Top view and cross-section of the flip-chip bump design: bumps are placed directly on the source and drain ohmic contacts. In this way, there is a direct thermal and electrical contact between the ohmic contacts and the metal pads on the AlN carrier.

FABRICATION

The AlGaN/GaN heterostructures used in this work were grown by metal-organic vapor phase epitaxy (MOVPE) on sapphire substrates. On top of the AlGaN, an in-situ 3.5 nm Si 3 N 4 passivation layer is grown. This Si 3 N 4 layer enhances the electrical performance of the device, reduces the dispersion effects, and protects the surface during processing [START_REF] Derluyn | Improvement of AlGaN/GaN high electron mobility transistor structures by in situ deposition of a Si 3 N 4 surface layer[END_REF]. The HEMTs are fabricated using a 5-step process: mesa etching, ohmic contact formation, gate and contact metal deposition and passivation. The gate length L g is 1.5 μm, and the width of a single gate finger W g = 100 μm. The distance between two neighboring gate fingers is 100 μm.

To lower the device temperature, we integrated the HEMT onto a AlN carrier substrate using flip-chip bumps. In our new flip-chip bump design, bumps are placed both on source and drain contacts of the HEMT (see Fig. 1). More details about the flip-chip bump design can be found in [START_REF] Das | Improved Thermal Performance of AlGaN/GaN HEMTs by an Optimized Flip-Chip Design[END_REF]. On the AlN substrate, metal contact pads are deposited by electroplating. Note that AlN is here the preferred carrier substrate, because of its high thermal conductivity and low substrate loss at RF frequencies.

THERMAL SIMULATIONS

To study the thermal behavior of the HEMT device for the different integration structures, a fully three dimensional finite element model is used [START_REF] Oprins | Thermal analysis of AlGaN/GaN HEMTs[END_REF]. Heat sources are defined between the ohmic contact regions of the multiple gate-finger HEMT. The heat generation is assumed to be uniform within these heat sources. For the simulations a constant temperature at the backside of the AlN carrier (T = 25 °C) is defined as a boundary condition. The thermal conductivities of the materials used in the simulations are given in Table 1. For GaN, sapphire, and AlN, the temperature dependency of the thermal conductivity is taken into account with a temperature dependence as given in Table I. Fig. 2 displays a cross-section of the temperature distribution within the HEMT after flip-chip integration, for a total power dissipation of 1.8 W. Since the total gate width of the HEMT W g = 0.6 mm, this corresponds to a dissipated power density of 3 W/mm. From the simulations, we find a maximum temperature T max = 77 ºC, which is much lower compared to a HEMT on sapphire before integration (T max = 169ºC). From the figure it is very clear that the flip-chip bumps act as effective heat sinks. As a comparison, also a HEMT on SiC was simulated: since SiC has a much higher thermal conductivity, a lower maximum temperature was obtained: T max = 46 ºC. Nevertheless, this result shows that the thermal performance of the HEMT on sapphire after flip-chip becomes quite close to the HEMT on SiC, and at the same time it has the advantage of a much lower substrate cost.

EXPERIMENTAL RESULTS

DC-measurements and micro-Raman spectroscopy were used to assess the impact of flip-chip integration on the thermal performance of the HEMT. When a high drainsource voltage V ds is applied, the 2-DEG saturation current I ds,sat will decrease due to the self-heating effect. From this decrease (ΔI sat ), it is possible to extract the temperature of the active region [START_REF] Kuzmík | Determination of Channel Temperature in AlGaN/GaN HEMTs Grown on Sapphire and Silicon Substrates Using DC Characterization Method[END_REF]:

ΔI sat = -g m .(I sat .ΔR s +ΔV T ) (1)
In this equation, ΔR s and ΔV T represent the change of source resistance and the change of threshold voltage compared to their reference value at room temperature, respectively. The dependencies V T = f(T) and R s = f(T) were determined experimentally, using an external heating source to heat the devices up to constant temperature. As a result, the channel temperature versus dissipated power is obtained (see Fig. 3). From this figure it is clear that the flip-chip integration improves the thermal performance of the HEMT. Moreover there is a good agreement between the measured and simulated temperatures. In order to measure experimentally the temperature distribution within the HEMT, an integrated Raman-IR system was used. This system consists of a Renishaw InVia Raman microscope equipped with motorized XY positioning stage and a QFI IR thermal microscope, switchable between Raman and IR detection modes. The 488nm line of an Argon ion laser was employed as excitation source for the Raman measurements. Raman shift of the E 2 phonon of GaN was probed to determine the temperature of powered devices. More details of the experimental set-up can be found in [START_REF] Kuball | Integrated Raman -IR Thermography on AlGaN/GaN Transistors[END_REF][START_REF] Kuball | Measurement of temperature in high-power AlGaN/GaN HFETs using Raman scattering[END_REF]. As the sapphire substrate was double-side polished, device temperature could be measured through the substrate. As a result, device temperature was accessible not only in the source drain openings, but also directly underneath the contacts and where the flip-chip tin bumps are located, which is a major advantage [START_REF] Ji | Flip-chip mounting for improved thermal management of AlGaN/GaN HFETs[END_REF]. Fig. 4 displays an obtained linescan together with the thermal simulation showing that there is an excellent agreement between both obtained results. Note that peak temperatures determined from electrical device analysis (Fig. 3) are slightly smaller compared to peak temperatures obtained from the Raman measurements, possibly indicating that the electrical device characterization technique determines not peak device temperature, but a slightly lower average temperature.

CONCLUSION

We have investigated the temperature distribution in high-power AlGaN/GaN HEMTs before and after flipchip, with thermal simulations, electrical and micro-Raman analysis. We obtained an excellent agreement between simulation and experimental results. We have shown that by using our new flip-chip design, with bumps on the source and drain ohmic contacts, a much better thermal performance is obtained, because the flipchip bumps, which are very close to the active device area, act as very effective heat sinks.

Fig. 2 :

 2 Fig.2: Temperature distribution simulation (cross-section) of a HEMT on sapphire after flip-chip, at a power dissipation of 3 W/mm.

Fig. 4 :

 4 Fig.4: Temperature linescan of a HEMT on sapphire after flip-chip integration, at a dissipated power of 6.8 W/mm. Micro-Raman spectroscopy and finite element simulations are compared.

Fig. 3 :

 3 Fig.3: Temperature versus power for a HEMT on sapphire before and after flip-chip, obtained both from simulations and electrical measurements.

TABLE I THERMAL

 I CONDUCTIVITIES USED IN THE SIMULATIONS

	Material	Thermal conductivity [W/m.K]
	GaN	160.(300 K/T) 1.4
	Sapphire	35.(300 K/T)
	Au	310
	AlN	180.(300 K/T) 1.4
	Solder bumps	50

6. ACKNOWLEDGEMENTS The research at IMEC was supported by the ESA-ATHENA project under Contract No. 14205/00/NL/PA. The research at the University of Bristol was supported by EPSRC. H. Oprins thanks IWT for providing a scholarship. H. Ji thanks Universities UK for providing an ORS scholarship.


Carmine Sapia
email: sapia@uniroma3.it

FLOW VISUALIZATION OF THE BUOYANCY-INDUCED CONVECTIVE HEAT TRANSFER IN ELECTRONICS COOLING

Flow Visualization of The Buoyancy-induced Convective Heat Transfer in Electronics Cooling

C.

INTRODUCTION

The reliability of an electronic system mainly depends on its components working temperature. Thermal management is a key issue in PCB and IC design. Increasing speeds and package densities with reduced feature sizes cause an increasing of power dissipation and higher die temperatures. If the heat generated is not adequately removed, the die temperature increases indefinitely. Failure probability is strictly, exponentially, related to the device operating temperature. The most common kinds of failure are due to increased stresses, to increased electromigration and leakage currents, to differences in thermal expansion caused by the differing coefficient of thermal expansion among materials and to accelerated corrosion mechanism. Convection, natural or forced, air cooling is still the most utilized method in heat extraction problems in the electronic equipments [1,2]. Natural convection (and radiation) heat transfer, in air, with extended surfaces can manage a thermal load of 0.1 W/m 2 with a temperature difference, between device and ambient, of ∆T=80 °C [START_REF] Cengel | Heat Transfer[END_REF][START_REF] Incropera | Fundamentals of Heat and Mass Transfer[END_REF]. Natural convection cooling, in particular, results simple, cheap and reliable. In compact, low power consumption electronic equipments (as wireless phone, palm handled computers and so on), in sealed system or in solar cell, natural convection is often the only solution available for the cooling technique of the system. It's also the only way to avoid or reduce the acoustic noise (zero dB cooling) related with fan or liquid pumps characterizing other kinds of cooling systems. More complex cooling techniques are necessary only in high power applications. In these cases we have to face with increase of costs and added cooling related space. In flow visualization problems optical methods are usually preferred [START_REF] Merzkirch | Flow Visualization[END_REF][START_REF] Mayinger | Optical Measurements[END_REF][START_REF] Garimella | Flow Visualization Methods and their Application in Electronic Systems[END_REF][START_REF] Merzkirch | Approaches in flow visualization[END_REF][START_REF] Smith | Flow Visualization[END_REF]. Optical techniques are no contact, non destructive kinds of testing. The measure process does not alter the thermal flow field of the cooling fluid under test. Moreover optical methods do not suffer any kind of inertia problems as occurs in other flow visualization techniques which deal with marks particle. Optical methods can visualize thermal phenomenon characterized by very short characteristic time. Non destructive testing, optically implemented, is a powerful investigation tool in thermofluid dynamics problems; it can also validate the results obtained by numerical modelling (CFD) of the heat transfer problem. In figure 1 is summarized the principle of the method. A temperature gradient causes a density variation in a cooling fluid with a consequent local change in the refractive index. The light ray travelling through the fluid is proportionally deflected. Analyzing the deflection of the light probe it is possible to go back to the related temperature gradient. The optical set-up presented in this paper allows to monitor the local variations for the refractive index and, consequently, allows to visualize the convective thermal flow in the cooling fluid.

EXPERIMENTAL SET-UP

It

Experimental procedure

In figure 2 is illustrated a schematic of the experimental set-up developed for the optical flow visualization method utilized.

A step fringe pattern is projected through the electronic device under test and recorded by a CCD camera. The cooling fluid under test is positioned between the reference fringe pattern and the digital camera (test field area in figure 2). All the images acquired by a CCD camera (Sony: 768 x 576 x 8bit) are real-time processed by the means of a frame grabber (Data Translation DT-3155). The time sequence of the images is visualized and memorized in a personal computer. Two different kinds of images are acquired and processed: the first with the working fluid at rest without the thermal load, the second one with the fluid under operative cooling condition. By the means of digital filtering and image processing [START_REF] Pratt | Digital image processing[END_REF] procedure (MATLAB, release 6.5), it is possible to reveal, qualitatively, the phase gradients and the thermal pattern related to the convective flow emerging from the electronic device.

All the informations for the visualization of the convective flow under test are extracted in white-light without coherent sources. The whole process is digitally carried out.

RESULTS

To prove the functionality of the experimental set-up, it was investigated the convective heat transfer of two situations typically recurrent in the electronic systems: a power transistor heat sink and a power resistor. In all the presented situations it was possible to visualize the convective flow generated, in air, by the heated sample and qualitatively understand the shape of the isothermal lines in the test field.

Flow visualization of the buoyancy-induced convective heat transfer, in air, for an heat sink.

In figure 3a -3c are presented some experimental results for the onset and the development, in air, of the natural convection flow emerging from a power transistor heat sink (ST338K). In an electronic equipment the power transistor is usually positioned in the middle of the heat sink. To reproduce experimentally the described real thermal situation, the structure under investigation (anodized aluminium, 1.5 mm thickness; 41mm x 38mm x 16mm) was centred on a vertical rod electrically heated and controlled in temperature. After an adequate warm-up time (2 hours) of the heater-heat sink system it has been started to acquire images with the optical set-up and the experimental procedure previously described. The temperature difference, between heat sink and ambient, was settled down at ∆T=40 °C.

C. Sapia Flow visualization of the buoyancy-induced convective heat transfer in electronics cooling

©TIMA Editions/THERMINIC 2006 -page-ISBN: 2-916187-04-9

Non uniform thermal distribution was individuated. As expected, convective flow appears to be stronger in the central part of the heat sink. The main hot spot is clearly highlighted in the middle of the heat sink; hot spots due to spatially not uniform heat flux can cause physical stress and further reduce reliability of an electronic device.

The overheated fluid starts to emerge from the heat sink base with the shape of symmetrical thermal bubble (fig. 3a). The thermal bubble loses initial symmetry developing into two different lateral plumes (fig. 3b). Finally (fig. 3c) the side plumes appear to be detached from the base of the heat sink; the thermal bubble explodes in various floating separated thermals. At the bottom it's also present the onset of the new thermal bubble.

In the figures 3a-3c are also visible the convective plumes at the top of the vertical profiles of the heat sink and lateral thermal bubbles emerging from the base of the narrowest grooves. It's also present a region of compressed overheated fluid below the horizontal base of the heat sink. The hot air emerging from below appears to be compressed by the physical obstruction represented by the base plate of the heat sink. The compressed fluid from below finds only laterally the way to emerge. The onset and the development of the buoyancy-induced convective heat transfer experimentally observed in this paper is consistent with what reported in literature [START_REF] Goldstein | Onset and Development of Natural Convection Above a Suddenly Heated Horizontal Surface[END_REF] for the analysis of the natural convection generated by an horizontal hot plate. "Plumes" are defined as extension, usually laminar, of the boundary layer; "thermals" are defined as three-dimensional structures (bubbles) that are detached from the boundary layer floating and emerging in the fluid (fig. 4).

Figure 4. Schematic of thermal and plumes for an horizontal hot plate.

To enhance the flow visualization results the images obtained with the described optical system have been opportunely post processed, again with the MATLAB software. In figure 5a-5c the thermal distortion experimentally observed for the natural convection air flow is presented after an height coding.

Flow visualization of the convective heat transfer,

in air, for a power resistor.

It has been visualized the convective heat flow, in air, for a power resistor (50 W) controlled in temperature with Joule heating. In the figure 6a-6c are presented the flow visualization results. To increase the heat exchange from the resistor to the ambient, the manufacturer has realized the power resistor with a semi spherical extended surface (aluminium; 1 mm thickness). Are also visible the two lateral extensions at the bottom of the device to mount the device on an external metallic plate.

The presented images are obtained with the same procedure and optical set-up described in section 2. The phase gradients related to the thermal expansion of the cooling fluid are presented in three different situations. After an adequate warm up time (2h) the structure of the natural convective flow appears to be completely developed and stabilized (figure 6a). The structure of the flow for the steady state is characterized by two main symmetrical side lobes with an upper plume of heat extraction in the middle. In the bottom of the device is present a bubble of overheated fluid detached from the surface of the resistor.

In figure 6b the shape of the steady state convective flow is disturbed from an added moderate lateral ventilation: the exposed side lobe appears compressed and the upper "chimney" of natural convection results deformed generating a vortex. It's clearly visible some thermal bubbles detached from the surface of the device. As expected in presence of the moderate lateral ventilation the steady state is completely deformed. In this case the thermal refractive index gradients distribution appears to be more complex and distributed involving a larger volume of the cooling fluid.

Increasing the lateral imposed air flow (fig. 6c), the upper plume loses completely his original regularity and direction appearing completely dominated by the side ventilation. It's visible a lateral multi plume structure in the direction of the external air flow with many detached thermal bubbles. The overheated fluid starts to be completely removed from the surface of the power resistor.

CONCLUSIONS

The experimental work in this paper represents a very simple method for the visualization of non homogeneities in a phase object: the temperature gradients in a cooling fluid for buoyancy-induced convective flow can be visualized.

The set-up was optically implemented: the analysis is absolutely no-contact. The experiment can be carried out without distortion for the thermal flow and, consequently, without perturbation for the heat transfer process and alteration for the temperature gradients in the fluid under test. The system developed was tested on two situations typically recurrent in the electronic systems: an heat sink and a power resistor. In both the cases it was possible to visualize the convective flow generated, in air, by the heated sample and qualitatively understand the shape of the isothermal lines in the test field and the involved volume in the cooling fluid. The results presented show that is possible to monitore the onset and the development of the natural convection thermal flow and the perturbation in the thermal gradient map caused by externally added air flow.

These preliminary results show the potential of the proposed technique to visualize convective flows in electronic cooling problems with a simple and cheap noninvasive optical setup.

The proposed system seems to be suitable only to qualitative analysis but, compared to others well known interferometric optical techniques, the described set-up is less sensitive to environmental instabilities (industrial noise, vibrations); it's possible to make experimental analysis directly in situ where the electronic equipment works. Compared to standard Schlieren photography the convective flow field analysis is also carried out without large lenses or mirrors; it's easier suitable to large area whole-field thermal investigations. The results are consistent with other more complex techniques [START_REF] Goldstein | Onset and Development of Natural Convection Above a Suddenly Heated Horizontal Surface[END_REF].

All the set-up is based on white-light without the need of coherent sources of illumination. The process can also be easy made automatic, easy to use also by non-optically skilled operators. Experimental methods, for the visualization of the thermal flow and temperature distribution, can provide useful information for the optimization process of the thermal management of an electronic system. Non destructive optical techniques implemented fully digital can also get the advantage of the recent increasing development of digital acquisition sensors (CCD and CMOS) and image processing techniques.

[1] Kim, S.J., Lee, S.W., Air cooling technology for electronic equipment, CRC Press, Boca Raton, LA, 1996.

9 2. 1 .

 91 's illustrated a simple white-light optical set-up for the monitoring of the refractive index local changes in a fluid: that's what happens in a cooling flow due to the thermal load related to the electronic component normal operation C. Sapia Flow visualization of the buoyancy-induced convective heat transfer in electronics cooling ©TIMA Editions/THERMINIC 2006 -page-ISBN: 2-916187-04-The principle of the method Natural convection heat transfer occurs when the convective fluid motion is induced by density differences themselves caused by the heating. Non uniform refractive index changes in the cooling fluid arise from the density gradients related to the thermal expansion of the fluid. The thermal load of the device causes an optical deflection in the cooling fluid that an opportune light probe can reveal.

Figure 1 .

 1 Figure 1. Light deflection trough an inhomogeneous flow field.

Figure 2 .

 2 Figure 2. The experimental set-up.

Figure 3 .

 3 Figure 3. Flow visualization of the buoyancy-induced convective heat transfer, in air, for a power transistor heat sink: (a) the hot spot in the middle causes the onset of a symmetrical thermal bubble; (b) the thermal bubble loses initial symmetry developing into two different lateral plumes; (c) the thermal bubble explodes in various floating separated thermals. At the bottom it's present the onset of the new thermal bubble.

Figure 5 .

 5 Figure 5. Flow visualization of the buoyancy-induced convective heat transfer, in air, for a power transistor heat sink: the thermal distortion experimentally observed (Fig.3a-3c) for the natural convection air flow is here presented after an height coding.

  [2] Incropera, F. P., "Convection heat transfer in electronic equipment cooling", J. Heat Transfer, vol. 110 No.4, pp. 1097-1111, 1988.

Figure 6 .

 6 Figure 6. Flow visualization of the buoyancy-induced convective heat transfer, in air, for a power resistor: (a) steady-state flow: two symmetrical side lobes and a main upper plume; (b) moderate overimposed side air flow induces vortex and thermal bubbles for the upper plume; (c) increasing side ventilation, the shape and the direction of the flow is completely dominated by the external air flux.

C. Sapia Flow visualization of the buoyancy-induced convective heat transfer in electronics cooling

©TIMA Editions/THERMINIC 2006 -page-ISBN: 2-916187-04-9