Margus Metshein
email: margus.metshein@taltech.ee

Antoine Gautier

Benoit Larras

Antoine Frappe

Deepu John

Barry Cardiff

Paul Annus

Raul Land

Olev Martens

Study of Electrode Locations for Joint Acquisition of the Impedance-and Electro-cardiography Signals

ICG (impedance cardiography) and ECG (electrocardiography) are important indicators of the functioning of the heart and of the overall cardio-vascular system. Adding of the ICG to ECG measurement functions into the wearable devices will improve the quality of the health monitoring of the people, as the ICG is reflecting relevant hemodynamic parameters (informative time intervals, but also the stroke volume and cardiac output and their variability). In the current paper various electrode locations (12 various setups) has been tested for possible joint ECG & ICG data acquisition (by the same electrodes) and the quality has been evaluated for every setup. It is shown, that while typically the ICG is acquired over the whole thorax (or the chest), the wrist-based joint acquisition of the ECG & ICG signals can be considered with still reasonable and acceptable signal quality.

I. INTRODUCTION

For monitoring the pulse, which is among blood pressure, temperature, height and weight, the most important parameters of human body, classical methods exist. The methods for evaluating the status of heart are available already for a long time -from which the most known is electrocardiography. During the development of technology, also the impedance cardiography (ICG) has been emerged -capable of assessing the status of cardiovascular system. Importantly, the electrocardiogram (ECG) presents the electrical activity of the heart, while ICG denotes the mechanical pumping activity of the heart [START_REF] Martinsen | Bioimpedance and Bioelectricity Basics[END_REF] -representing the same information in different modalities. Both methods are well researched, relying on classical and predefined placement of electrodes. The co-utilization of both methods had opened a door to determine specific time intervals, characterizing the overall operating of heart, relying on both, mechanical and electrical functioning of heart.

ICG is a known method for determining hemodynamical parameters and has been used from 1960-s [START_REF] Raj | Feasibility of single-arm single-lead ecg biometrics[END_REF] to estimate additionally the heart rate (HR) and its variation (HRV), the Cardiac Output (CO) and Stroke Volume (SV), but also various timings, e.g., Left Ventricular Ejection Time (LVET) and Pre-Ejection Period (PEP). Portable solutions can be developed to monitor these and other hemodynamic's related parameters [START_REF] Yazdanian | Design and implementation of a portable impedance cardiography system for noninvasive stroke volume monitoring[END_REF].

For measuring ECG, the standard lead locations are defined, from which the Einthoven's triangle have been known already 120 years. The elaboration of the electrode placement strategies has occurred since then with the goal of gaining fully complex and detailed signal where the prerequisite is the location of heart in the center of the triangle. The recognizable pattern of ECG signal is classically identified by assigning five deflections in the detected signal: P, Q, R, S and T wave.

Example waveforms of ECG and ICG are given in Fig. 1. As described below and illustrated in the Fig. 2a, the ICG (as well as ECG) signals are classically acquired from the whole thorax. However, the human body is a complex entity, providing option to acquire the relevant data also from the chest (Fig. 2b) or even from the wrist (Fig. 2c).

The simplest way of monitoring hemodynamic parameters is detecting the pulse. This is the oldest method, rebuilt in modern devices through different means, like electrical bioimpedance (EBI), bioelectricity (ECG), optical (photoplethysmography (PPG)) etc. based methods. However, such signals are sophisticated, presenting variety of key points that represent the operating of heart.

However, the classical electrode locations for monitoring ICG and ECG are clearly causing the devices to be bulky or very complex. To reduce the size of the device or utilized area on the body surface, new electrode locations need to be chosen -presumably located more densely. This, in turn, is expected to lower the quality of the measured signals, cause these to contain less information or to be nonlinear compared to the actual stroke volume and measured value of EBI.

Based on its noninvasive means, ICG fits perfectly into the framework of the term: wearability -the incorporation of electrodes and respective electronic circuitry into smart wearables for on-site patient monitoring. For monitoring ICG, electrodes are attached onto the skin surface, current of high frequency and low amplitude is applied onto the thorax and resulting response voltage is recorded. The resulting voltage is amplitude-modulated, incorporating the data of pulsatile changes in the impedance thorax, expectedly caused by cardiorespiratory system [START_REF] Cybulski | Ambulatory Impedance Cardiography -The Systems and their Applications[END_REF].

Wrist is often proposed as a location of modern wearable devices -solved classically through touching the electrode of smartwatch with a finger of other hand (like Apple Watch). Also, the applicability of single-arm singe-lead monitoring of ECG has been reported in scientific literature [START_REF] Raj | Feasibility of single-arm single-lead ecg biometrics[END_REF], [START_REF] Escalona | Wrist and arm body surface bipolar ecg leads signal and sensor study for long-term rhythm monitoring[END_REF], capable of replicating all the key components. However, the signal amplitude is significantly reduced with the diminished volume of body between the electrodes [START_REF] Gonc | Non-contact wearable single forearm cardiac biopotential acquisition device[END_REF], requiring heavy filtering or advanced denoising strategies.

The co-utilization of electrodes for monitoring simultaneously the ICG and ECG have been reported in literature before. For example [START_REF] Hafid | Simultaneous recording of icg and ecg using z-rpi device with minimum number of electrodes[END_REF], where the number of electrodes for wearable autonomous measurement device has been reduced to four with the recognizability of hemodynamic feature points in both signals. Or a patented solution for monitoring ICG and ECG with the configuration where the electrodes are shared [START_REF] Harrold | Icg/ecg monitoring apparatus[END_REF]. In laboratory environment, such experiments have been reported, incorporating concurrent utilization of variety of sensors -like in [START_REF] Nakagawara | A portable instrument for noninvasive monitoring of beat-by-beat cardiovascular haemodynamic parameters based on the volume-compensation and electrical-admittance method[END_REF], where the ICG and ECG is detected by using the classical Kubicek method (using band electrodes around the thorax).

However, the recognizability of the hemodynamic pattern on the signal is expected to deteriorate when relocating the electrodes from the nominated to novel positions. Due to that, the determination of feature points in ICG and ECG, gathered by using coinciding electrode location in the arm has rarely been referred in relevant literature, constituting a novel research direction. Still, it is expected that the hemodynamic pattern on the monitored ICG can be determined -even in the case of non-classical electrode locations. Current paper studies the possibility of co-utilizing the coinciding electrode locations for monitoring ECG and ICG. The detection of hemodynamic pattern in ICG and time intervals parallel with ECG is performed, solutions proposed, and various electrode placements are evaluated.

II. METHODS AND MEASUREMENT SETUP A. Measurement Devices and Properties

The impedance spectroscope HF2IS, accompanied with transimpedance amplifier HF2TA of Zurich Instruments AG (Zurich, Switzerland) was used as a measurement device. HF2IS approves performing simultaneous measurement of impedance at four distinct frequencies up to 50 MHz [START_REF]HF2 User Manual -ziControl Edition[END_REF], with two optional auxiliary inputs, one of them connected to an external ECG monitor for concurrent acquisition of respective analog signals. The measurement frequency (typical for ICG) of 100 kHz was selected in this study.

A custom prepared ECG monitor with 3-electrode system was used to gather the data of electrical activity of heart. The ECG monitor was based on the single lead heart rate monitor front end of type AD8232ACPZ of Analog Devices Inc. (Wilmington, MA, USA).

For measurement of ICG and ECG, monitoring electrodes of type 2228 of 3M (Maplewood, MN, USA) were used, chosen because of its firm adhesive foam tape backing.

B. Measurement Method

The experimentation with electrode locations for measuring the ICG and ECG was divided into two domains: placed either on the thoracic area (1) or exclusively on the left arm [START_REF] Raj | Feasibility of single-arm single-lead ecg biometrics[END_REF]. The possibility of utilizing the same electrode locations for determining the ICG and ECG was researched in both cases. Physically separate electrodes were used to pick up ICG and ECG -attached side by side on the skin surface. This approach is explained by the utilization of the single impedance spectroscope without any additional circuitry of signal pick-up -needed for co-usage of the same electrodes. As the electrodes were closely attached, the outcome is comparable, and can be considered to imitate the situation when the same electrodes are used.

For implementing the classical Einthoven's triangle, three leads are specified. However, current research was focused on using single lead positive left arm (LA) electrode, right arm negative (RA) electrode approach with the attached third left leg (LL) electrode.

The electrodes for ECG and ICG on the left arm were not located as a pair, but had larger distance in the case of ECG. Specifically, LA electrode was located on the upper arm, while RA together with LL were attached onto wrist. The reason for this is the deterioration of the quality of detected signal in the case of single-arm ECG [START_REF] Escalona | Wrist and arm body surface bipolar ecg leads signal and sensor study for long-term rhythm monitoring[END_REF].

To keep the descriptions homogeneous throughout the whole paper, the term ICG is used to remark the electrode placement configurations on both cases (thorax and arm): called thoracic electrode placement configurations (TEPC) and arm electrode placement configurations (AEPC) respectively.

The electrodes were attached onto the skin surface based on the chosen TEPC's and AEPC's and after 3 minutes, the signal waveforms of ECG and ICG were picked up. The electrodes were attached to the impedance spectroscope by using wires with crocodile clips that were implemented to be as short as possible. The experimental procedures involving human, described in current paper were following the principles outlined in the Helsinki Declaration of 1975, as revised in 2000.

C. Setup for Monitoring ECG and ICG on the Thoracic Area

For monitoring ICG on the thoracic area, seven setups were chosen for TEPC. The configurations were either following the classical ICG monitoring electrode locations like TEPC-1 [START_REF] Sramek | Status report on bomed's electrical bioimpedance[END_REF] (Fig. 3a); or repeating a literature-based proposal of co-monitoring ICG and ECG like TEPC-2 [START_REF] Hafid | Simultaneous recording of icg and ecg using z-rpi device with minimum number of electrodes[END_REF] (Fig. 3b); or intuitive TEPC-3 and TEPC-4 (Fig. 3c-d), where the heart or aorta remains between the electrodes; or presenting new compact approaches that could be suitable for incorporation into a wearable device by forming TEPC-5 to TEPC-7 (Fig. 4a-c).

D. Setup for Monitoring ICG and ECG on the Left Arm

For monitoring ICG on the left arm, five AEPC variants were selected (Fig. 5). Electrodes were either attached distally like AEPC-1; or circularly like AEPC-2; or in mixed configuration respective to the wrist like AEPC-3 and AEPC-4; or covering the whole length of arm like AEPC-5. In the case of AEPC-1 to AEPC-4, the original size of electrodes was cut to the width of 5 mm to gain higher electrode density.

III. MEASUREMENT RESULTS AND INITIAL EVALUATION

The Impedance (Z) and ECG signals were acquired from a young healthy male (37 years of age) and saved in the A Savitzky-Golay low-pass filter was applied on the Z signal (sampling frequency -1500 Hz, filter order -5, number of points -49) before differentiation. The feature points B, C, X (Fig. 1) were determined by a very simple algorithm [START_REF] Naidu | Detection of characteristic points of impedance cardiogram and validation using doppler echocardiography[END_REF]: C as maximum (extremum over ca 50% of the peak value threshold), B as the first zero-crossing to the "left" from the C and X as the global minimum between two C points. The Z, dZ/dt and ECG with estimated B, C, X points of ICG (on dZ/dt plots) are shown in Fig. 6 for all described measurement configurations. In the Fig. 6, Z and dZ/dt are shown in Ohms and the ECG in Volts.

The recognizability of these key points depends largely on the electrode placement on the body. The classical electrode placements have been proposed to provide the most sophisticated signal waveforms as possible -like the modified version of Kubicek method, proposed by Sramek [START_REF] Sramek | Status report on bomed's electrical bioimpedance[END_REF] based on spot electrodes. In such methods, the electrodes are attached to cover the whole volume of upper thorax, including the heart and aorta. Other, either tightly set or special EPC's may not cover the whole interesting volume changes in thorax and the waveforms of ICG may be less informative, need additional processing or smart analysis. The presence of feature points in the signal of ICG can be used as a base to evaluate the utilized EPC's.

In the current paper the focus was on determining the B, C, While the ECG signal is reasonable for all studied cases (see plots in Fig. 6), then the ICG (dZ/dt) signal has quite varying quality. The goodness of ICG signals is estimated in two ways (column "Quality" (1) and columns "C-C errors", "C-X errors" and "B-C errors" (2) in Table I). First, the plots with marked possible B, C, X points are evaluated visually -0 (non-recognizable waveform); 1 (waveform visible, but not possible to find the feature points); 2 (reasonable); 3 (strong and clear signal). These terms were chosen in the frames of conducted research, where the signals starting from the 2 (reasonable) denote the situation where the algorithm was capable of detecting the feature points.

Secondly the estimated locations of B, C, X points, the time intervals C-C (cardiac period), B-C and C-X (forming together the LVET) were estimated and compared against expected values around -900 ms (C-C), 60 ms (B-C) and 200 ms (C-X). The count of these erroneous time intervals against the overall number of periods is shown in the same table. The reasonable setups are (in green) -TEPC-1, 4, 7 and AEPC-1 to AEPC-5. As an observation for future work, while the AEPC-s can be as good as TEPC-s, the C-X interval for AEPC can be with error of 30 or 50 % or even more, probably due to the wrong determination of the X point in some periods.

The experimented AEPC-1 -AEPC-4 have earlier been studied by TalTech research group to detect the pulse wave through EBI measurements. The effectiveness of selected AEPCs was determined by FEM-modelling through finding the emerging sensitivity distributions -the presence of positive and negative regions [START_REF] Pesti | Electrode placement strategies for the measurement of radial artery bioimpedance: Simulations and experiments[END_REF]. The simulation showed the highest sensitivity ratio (and the best result among the four chosen AEPC's in current study) in the case of AEPC-3 [START_REF] Pesti | Electrode placement strategies for the measurement of radial artery bioimpedance: Simulations and experiments[END_REF]. The result depends on the distribution of sensitivities i.e., is largely affected by the complex and layered structure of thorax with its vastly varying conductivity. Based on the simulations it has been claimed that most of the contribution for ICG comes from the skeletal muscle and upper thorax and less than 1% from the aorta [START_REF] Patterson | Fundamentals of impedance cardiography[END_REF]. While the representation of the exact sensitivity distribution in human body is not yet found, the controversy remains -and the gold standard for monitoring the stroke volume is not defined.

V. CONCLUSIONS AND FUTURE WORK

The performed experimentation confirmed that the utilization of coinciding electrode locations for simultaneous determination of ECG and ICG is highly feasible. Moreover, the variety of electrode locations on thorax and arm provide waveforms, where the hemodynamic pattern is present in quality, which is enough to determine the important feature points and time intervals. The next research question is improving the feature extraction algorithm for X-point and finding other corrections. Additionally, to improve the credibility of the results, the next step is to get more statistical data from various persons under different conditions is important.

Fig. 1 .Fig. 2 .

 12 Fig.1. Typical ECG and ICG waveforms[START_REF] Yazdanian | Design and implementation of a portable impedance cardiography system for noninvasive stroke volume monitoring[END_REF]

4 Fig. 3 . 4 (Fig. 4 .

 4344 Fig. 3. Measurement configuration setups: TEPC-1 to TEPC-4

Fig. 5 . 5 (Fig. 6 .

 556 Fig. 5. Measurement configuration setups: AEPC-1 -AEPC-5

ACKNOWLEDGMENT

The authors would like to thank colleagues prof M. Min, dr A. Krivošei and dr M. Rist for their valuable help.

* This work was supported by EU Regional Development Fund (Estonian Centre of Excellence in ICT Research EXCITE TAR16013), CHIST-ERA grant JEDAI, Mobilitas+ project Mobera20, Irish Research Council and French Researh Agency project ANR-19-CHR3-0005-01.


Benoit Larras
email: benoit.larras@junia.com

Antoine Frappé

A 43pJ per Inference CBNN-based Computein-sensor Associative Memory in 28nm FDSOI

Distributed smart sensors are more and more used in applications such as biomedical or domestic monitoring. However, each sensor broadcasts data wirelessly to the others or to an aggregator, which leads to energy-hungry sensor nodes and an increased latency at the network level. To tackle both challenges, this work proposes to distribute part of the processing elements in each sensor node and presents an ASIC implementation of an associative memory using clique-based neural networks (CBNNs) coupled with an integrated SRAM memory, in a 28nm FDSOI technology node. It consumes 43pJ for a single inference, which is 6.5 times better than state-of-the-art associative memories implementations, for the same memory size.

I. INTRODUCTION

In the context of healthcare monitoring, wireless body area sensor networks (WBAN) are used to gather data in multiple places of the body. The targeted applications include cardiac monitoring, posture or gesture recognition, etc. Traditionally, a WBAN is structured as in [START_REF] Movassaghi | Wireless Body Area Networks: A Survey[END_REF], Figure 1.a. All the sensors in the network acquire data through their sensing interface and broadcast it wirelessly. Then, an aggregator gathers information from all the sensors and processes the whole data flow with one or more processing elements (PEs), usually using Artificial Intelligence (AI) algorithms. They are connected to a dedicated memory designed to store all the sensors' data, connections map, and system states.

However, several drawbacks of this architecture need to be highlighted for the case of autonomous sensors in a WBAN. First of all, the sensors transmit continuously the acquired raw data, which consumes most of the energy budget of the sensor. Besides, PEs in the aggregator have to compute the concatenated data flow, either by the means of multiple PEs operating in parallel or by increasing the computation time. The latency of the network is also impacted since the PEs have to wait to receive all the data to begin their computation. Finally, a larger bus is needed to communicate with the global memory in the aggregator, which requires increased time and energy budgets.

In the context of sensor networks, the "Near-sensor computing" paradigm tends to move at least a part of the PEs within the sensors, instead of computing multiple data flows in the same block, as described in [START_REF] Yu | A survey on the edge computing for the internet of things[END_REF], Figure 1.b. Even though the processing capability becomes more limited in each sensor if the PEs are divided among the network, there is an opportunity to decrease the sensors' energy consumption. At the sensor level, pre-processing data allows decreasing the number of bits to transmit to the rest of the network, which also decreases the sensor's total energy consumption. The memory exchanges and global latency are also reduced at the network level, which increases the capabilities of real-time operation.

In WBANs, a commonly used computation is the convergence to the closest a priori stored configuration of physiological parameters. It is implemented, in [START_REF] Moin | A wearable biosensing system with in-sensor adaptive machine learning for hand gesture recognition[END_REF] in the case of hand gesture recognition, and in [START_REF] Larras | On the Distribution of Clique-Based Neural Networks for Edge AI[END_REF] in the case of posture recognition, by the means of associative memories. This type of AI paradigm is interesting as it does not require off-line training of the entire network, but storing the different configurations to output. In [START_REF] Moin | A wearable biosensing system with in-sensor adaptive machine learning for hand gesture recognition[END_REF], the minimal Hamming distance with the stored gestures is computed with a global digital logic block from surface electromyography sensors on the arm. The memory and PE are implemented in an aggregator and are not easily distributed next to the sensors. In [START_REF] Larras | On the Distribution of Clique-Based Neural Networks for Edge AI[END_REF], a mixed-signal implementation of a clique-based neural network (CBNN), distributed in clusters, is used to determine the posture by combining data from accelerometers on the body. This type of associative memory is strongly compatible with near-sensor distributed computing but the referenced circuit does not implement on-chip storage for sensor and external data. Other non-CMOS implementations of associative memories are possible using opto-electronic [START_REF] Wang | A novel memristor-based circuit implementation of full-function pavlov associative memory accorded with biological feature[END_REF] and memristive [START_REF] Alkabani | Oe-cam: A hybrid opto-electronic content addressable memory[END_REF] components.

This work proposes the implementation of a distributed PE integrating a cluster from a CBNN and its on-chip memory in 28nm FDSOI technology node. The benefits are:

• a reduced energy consumption per inference (less than 43pJ under 0.7V supply) and silicon occupation of the block {PE+memory} (27,600µm 2 ); • a decreased circuit complexity by the use of transistor body biasing; • a standalone operation by the means of memory integration and organization. This paper is organized into the following sections. Section II describes the architecture of the proposed localized PE, Section III presents the measurement results, from individual characterization as well as applicative use-cases, and Section IV concludes the paper.

II. PROCESSING ELEMENT (PE) IMPLEMENTATION

A. CBNN behavior and distribution

Clustered CBNN networks are formed by grouping neurons per category of information, Fig. 2. There are N C clusters, N N neurons per cluster and N S synapses per neuron. One cluster corresponds to the information contained by one sensor. One neuron corresponds to a set of parameter values from this sensor. Neurons from different clusters are connected to form a clique, and all the cliques represent the convergence options of the network. An in-cluster "Winner-Takes-All" (WTA) rule activates or not the neurons. Thus, only one neuron is activated per cluster. The clustered structure of the CBNN is compatible with the "Near-sensor computing" paradigm, as the computations are localized per cluster. The clusters can therefore be dispatched next to the sensors as the PEs in Fig. 1.b. The transmitted data from each sensor become the output of the integrated cluster, plus its index (reference address in the network), instead of raw data from the sensors. The total number of bits transmitted by a sensor node is log 2 (N C ) + log 2 (N N ). In terms of power consumption and latency, this transmission scheme is more efficient than computing all the sensor features with the whole CBNN in the aggregator, for a value of N N greater than 27 [START_REF] Larras | On the Distribution of Clique-Based Neural Networks for Edge AI[END_REF]. Moreover, the embedded memory depicted in Fig. 1 can be distributed as well in each sensor node. Each local memory can therefore be reduced to store only the incoming connections to the concerned integrated cluster. With smaller memories, the access time for each cluster is faster and thus more energy efficient.

B. PE mixed-signal circuit

Analog CMOS circuits implement a cluster of neurons with the lowest circuit complexity and, thus, lead to low power consumption [START_REF] Larras | A Fully Flexible Circuit Implementation of Clique-Based Neural Networks in 65-nm CMOS[END_REF]. N S synapses feed the input contributions into each neuron, then the WTA operation is triggered between the neurons in the cluster, as shown in Fig. 3. The synapses are implemented as switched current sources converting binary input voltages into binary currents, i.e. 0A or I UNIT , which are summed at node A. The WTA circuit, separated in the neurons, is composed of transistors M 1 and diodes M 2 , and receives the input current copied by the M 3 -M 4 current mirror. The current flowing in the WTA element sets the drain-source voltage of M 1 depending on the currents flowing in the other neurons, connected by the means of node C. The result of the operation is output as a binary voltage at node B. If the input current of a neuron is the highest, the drain-source voltage of the corresponding transistor M 1 is set higher than its saturation voltage. Otherwise, the drain-source voltage of M 1 is set under its saturation voltage. A buffer translates the voltage at node B in a standard binary voltage at node S. The activated neuron's index is output to the rest of the network.

The circuit, designed for the 28nm FDSOI technology node, benefits from the body biasing feature in 3 ways. First, in order to optimize the energy consumption of the PE, the transistors in the synapses operate in the subthreshold region. A better control of the I UNIT current value is achieved through body biasing of the transistors in the synapses. Second, the buffer threshold at node B is affected by PVT variations and typically requires a feedback circuit to calibrate the threshold by current starving. Here, the buffer is body-biased independently so that the threshold is always comprised between the high and low levels of the WTA circuit, and thus no external circuitry is needed. Finally, leakage currents flowing in each blocked diode M 2 are drawn from the synapses currents and limit the number of WTA elements in parallel. A second stage of WTA operation is needed for higher number of neurons in a cluster [START_REF] Larras | A Fully Flexible Circuit Implementation of Clique-Based Neural Networks in 65-nm CMOS[END_REF]. By body biasing separately the diodes, the leakage current is reduced from 3.6nA down to 41pA, which can allow either further reducing I UNIT , or increasing the number of WTA elements in parallel by a factor of 100.

C. Memory organization

The embedded memory stores the binary connections between the neurons from different clusters in the network. The only implemented connections are those from neurons of other clusters to the considered integrated cluster, as shown in Fig. 4. The memory stores N C × N N words. It corresponds to the number of neurons in the whole network. Each word contains N N bits, each bit stimulating one neuron in the considered cluster.

The reading process is scheduled as follows. The circuit receives log 2 (N C ) + log 2 (N N ) bits from another cluster. It corresponds to the index winning neuron in that cluster, concatenated with the cluster index. This message is used as an address to output the activated connections from the embedded memory to the current cluster. The output word is pushed in a shift register in order to gather the following messages from the other clusters. The selected bits are input in the analog cluster at the same time, as soon as all the clusters inputs have been received. Therefore, the order in which the messages are received does not matter. A cluster can also time out before sending data, a binary timeout flag is triggered. In that case, the shift register outputs the received data as-is into the analog cluster. If half of the neurons are stimulated, a stored clique can be recovered thanks to the high inherent redundancy of CBNNs.

III. MEASUREMENT RESULTS

The proposed design is implemented on a 1-mm 2 ASIC in the 28nm FDSOI technology node, as depicted in Fig. 5. Three independent instances of the block {PE+memory}, named C1, C2 and C3, are implemented on-chip. They can be used for different sensors in the same network.

A. Characterization of the block {PE+memory}

Each block implements a cluster of 32 neurons, with 16 synapses per neuron. There are 512 scheduling registers per block, and the memory stores 512 words of 32 bits each. The total silicon area per block {PE+memory} is 27,600µm 2 . * obtained for 25% of the number of inputs activated [START_REF] Larras | A Fully Flexible Circuit Implementation of Clique-Based Neural Networks in 65-nm CMOS[END_REF].

The electrical characteristics are shown in Table I. The circuit operates at a supply voltage V CC between 0.7V and 1V, with a unitary current I UNIT of 30nA. The measured static power consumption for one instance is of 7µW for 1V, and 0.8µW for 0.7V. Once the memory is loaded, a series of up to 16 32-bit vectors is loaded in the shift registers, and the data bits are loaded in the cluster, starting its convergence phase. The power consumption of the analog WTA depends on the number of '1' in the memory, however most of the dynamic power is used in the shift registers. Including the memory read operations, the block {PE+memory} consumes at most 43pJ per inference under 0.7V supply.

B. State of the art of associative memories for WBAN

The individual characteristics of the proposed implementation are compared to state-of-the-art associative memories for WBAN. Their features are summed up in Table II. In [START_REF] Moin | A wearable biosensing system with in-sensor adaptive machine learning for hand gesture recognition[END_REF], the associative memory used for hand gesture recognition computes the Hamming distance between the sensors' inputs and the stored configurations. However, the associative memory is implemented on an external FPGA, which constrains the system for embedded operation and is not relevant for performance comparison. A state-of-the-art associative memory implementing a multi-context ternary content addressable memory (T-CAM) is integrated in an ASIC used for speech recognition in [START_REF] Arakawa | Multi-Context TCAM-Based Selective Computing: Design Space Exploration for a Low-Power NN[END_REF]. It is combined with an SRAM storing 96kb of data. The association operation consumes 80pJ, but the main drawbacks of this implementation are linked to the use of a global memory storing all the convergence options. The static energy consumption of the global memory is 20 times more important than that of the associative operation itself, and its silicon area increases dramatically the circuit surface. Distributing the memory mitigates these drawbacks, which is not demonstrated in [START_REF] Larras | On the Distribution of Clique-Based Neural Networks for Edge AI[END_REF] because the memory is implemented externally on a FPGA. Globally, for a distribution in 16 sensor nodes, the energy consumption normalized to the embedded memory size is reduced in this work by a factor of 6.5. In addition, it has been shown in [START_REF] Larras | On the Distribution of Clique-Based Neural Networks for Edge AI[END_REF] that the energy consumption overhead due to the wireless interface is mitigated since a lower number of bits is transmitted in the distributed scheme.

IV. CONCLUSION

This paper presents a distributed mixed-signal implementation of clique-based neural networks, combined with an SRAM memory. The circuit is used as an associative memory in WBAN applications, and has been fabricated in 28nm FDSOI technology node. It consumes at most 43pJ per inference, which is 6.5 times the energy consumption of state-of-theart implementation of associative memories such as T-CAMs for the same memory size. Further work will include real-life demonstration of the complete WBAN with distributed PEs and memories in the sensors.

Figure 1 .

 1 Figure 1. Structural description of 2 versions of a WBAN. a) Architecture with centralized computations in an aggregator. b) Architecture with distribution of the processing elements in the sensors.

Figure 2 .

 2 Figure 2. Structure of a CBNN implementing N C clusters of N N neurons each. Each cluster is integrated in an independent sensor. An example of a clique is highlighted in black.

Figure 3 .

 3 Figure 3. Schematic of a mixed-signal cluster of N N neurons in a CBNN. N S is the number of possible input connection per neuron. Shaded areas show independently body-biased transistors.

Figure 4 .

 4 Figure 4. Organization of the embedded memory. It contains N C × N N words of N N bits each, displayed as columns. Each square represents a bit storing the connection state between 2 neurons from a distant cluster to the concerned integrated cluster. Each row represents a neuron in the concerned cluster (destination neuron), and each column a neuron in the whole network (source neuron).

Figure 5 .

 5 Figure 5. Photograph of the fabricated chip in 28nm FDSOI technology node. It implements 3 independent blocks {PE+memory} C1, C2 and C3.

Table I ELECTRICAL

 I CHARACTERISTICS OF A BLOCK {PE+MEMORY}

	Technology process	28nm FDSOI
	Unitary synapse current I UNIT	30nA
	Supply voltage V CC	1V	0.7V
	Static power consumption	7µW	0.8µW
	Energy per memory read	3.6pJ	2.5pJ
	Energy consumption: registers	max. 19pJ	max. 2.4pJ
	Energy consumption: analog cluster	max. 820fJ*	max. 550fJ*
	Analog cluster inference time	101ns


Soufiane Mourrane

Benoit Larras

Andreia Cathelin

Antoine Frappé

Event-Driven Continuous-Time Feature Extraction for Ultra Low-Power Audio Keyword Spotting

Keywords:

In the context of autonomous keyword spotting and sound detection, this paper proposes a low power feature extraction unit generating spectrograms that represent a unique signature allowing the classification of audio signals. This system is composed of a continuous-time digital signal processing feature extractor combined with a convolutional neural network engine. The study evaluates the hardware requirements to implement the feature extraction unit using an advanced CMOS process. Furthermore, a simulation of the complete system using Matlab ® reveals that the recognition accuracy remains higher than 90% while offering a power consumption 4000X lower than a conventional discrete time system.

I. INTRODUCTION

The increasing need of online sensing and autonomous recognition Internet-of-Things (IoT) devices pushes towards the development of embedded near-sensor processing units for applications such as sound detection and keyword spotting. However, dealing with real-world audio signals requires always-on power-hungry operations that cannot withstand low power and long battery lifetime constraints. In that regard, it is preferable to use a low-power selective audio processing, activating high-performance units only when a relevant signal is present at the input. Fig. 1 shows an architecture where an audio signal is firstly analyzed by a keyword spotting unit, that generates a wake-up signal responsible of triggering the main processing elements. Inside the latter unit, a feature extractor performs the spectral division of the input signal into multiple frequency bands and extracts the per-band energies to be able to construct the spectrograms i.e. graphs displaying the energy in every band as function of time. Then, a classifier carries out the analysis by mapping the input spectrograms to some predefined classes, to decide or not to wake up the next processing blocks.

In such systems, the problem appears to be the implementation of the feature extraction unit with low hardware complexity level, ultra-low energy consumption as well as a reduced number of extracted features to simplify the classification mechanism [START_REF] Lecoq | Low-complexity feature extraction unit for "Wake-on-Feature" speech processing[END_REF]. In literature, several methods have been proposed to design the feature extractor. The filter bank can be built fully analog as in [START_REF] Badami | A 90 nm CMOS, 6 µW Power-Proportional Acoustic Sensing Frontend for Voice Activity Detection[END_REF] and [START_REF] Yang | A 1 µW voice activity detector using analog feature extraction and digital deep neural network[END_REF], where the audio signal is parallelly filtered using a 16 Gm-C bandpass filter bank, but this approach led to an architecture unable to scale with technologies or to ensure a certain configurable architecture to be adaptable for other audio applications. The spectrograms can also be generated using integrated FFT algorithms, as in [START_REF] Giraldo | 18 µW SoC for near-microphone Keyword Spotting and Speaker Verification[END_REF] and [START_REF] Shan | A 510-nW Wake-Up Keyword-Spotting Chip Using Serial-FFT-Based MFCC and Binarized Depthwise Separable CNN in 28-nm CMOS[END_REF]. This method appears to resolve the configurability issue, but still generates an excessive number of features that induce an increase in the latency, which will affect the system speed i.e. number of classifications per second.

In order to merge the advantages of both previous strategies, this work proposes an event-driven feature extraction unit based on continuous-time digital signal processing (CT-DSP) to implement the filtering in digital-friendly processes, as introduced in [START_REF] Schell | A Continuous-Time ADC/DSP/DAC System With No Clock and With Activity-Dependent Power Dissipation[END_REF]. The event-driven operation builds a proportionality between dynamic power consumption and the activity of the input signal, what makes the system suitable for the recognition of keywords present in audio signals with long silence periods. The principal hardware-oriented parameters (such as number of bands, ADC resolution and energy quantizer resolution), are optimally chosen to scale down the system complexity while maintaining a recognition accuracy of 90%, as proposed in [START_REF] Lecoq | Low-complexity feature extraction unit for "Wake-on-Feature" speech processing[END_REF] for a discete-time digital system. Since in CT-DSP systems, only finite impulse response (FIR) filters with a limited number of taps are feasible [START_REF] Schell | A Continuous-Time ADC/DSP/DAC System With No Clock and With Activity-Dependent Power Dissipation[END_REF], this paper proposes to study the implementation of a filter bank composed of 8 CT FIR filters, with a maximum of 16 delay taps each. In this configuration, low center frequencies are hardly reachable and the target frequency range is then reduced to 840Hz-6.25kHz. Moreover, the out-of-band attenuation of the filters will be limited. Even under these severe constraints, this study reveals that a recognition accuracy larger than 90% for 10-keyword spotting is still achievable when the produced spectrograms are classified with a state-of-the-art classifier relying on convolutional neural networks (CNN). Besides achieving high recognition accuracy, the system improves the power efficiency by a gain factor that can increase up to 4000 compared to a discrete-time system.

The remainder of this paper is organized as follows. Section II presents an overview of the entire CT processing chain. Section III details the operation and hardware implementation of the different components of the system. Section IV presents the results from simulations coupling the feature extraction with a CNN classifier and Section V concludes the paper.

II. CT PROCESSING CHAIN FOR AUDIO RECOGNITION

A. Audio recognition context

Conventional DT systems generate a constant number of events set by the sampling frequency, even if the input signal corresponds to a recording of a silent environment without any interesting information. However, CT systems avoid blind processing of the audio signals and generates samples only with the existence of a significant information-holding input. Thus, the advantage of CT processing system is that its performance changes with different audio scenarios. This work proposes the study of 3 different scenarios. Scenario #1 corresponds to a background noise inside a private room with no spoken keywords to test the system performance when no significant information is present at the input. Scenario #2 is about the recognition of 3 keywords per minute in the same background noise as before. Finally, the third scenario correspond to the recognition of 150 keywords per minute corresponding to conversational speech inside a noiseless environment.

B. CT processing chain architecture

Continuous-time digital signal processing (CT-DSP) systems provide the highest flexibility and scalability margins for digital systems, keeping the architecture clockless. The CT DSP is triggered to start the processing whenever a relevant event is present at the input, thus the power consumption will be strongly dependent on the input activity. Consequently, for signals with long silence periods and few sparse events, the consumption of CT DSP systems is drastically reduced compared to conventional sampled systems. The continuoustime processing chain starts with a level-crossing ADC (LC-ADC) that encodes asynchronously the input into a pair of bits (CHANGE, UPDN) indicating the crossing of some predefined threshold levels i.e. quantization levels, and the crossing direction, respectively. In that context, the events are defined as the crossings, thus the number of generated events directly depends on the number of threshold levels i.e. ADC resolution.

Afterwards, a CT digital filter bank receives the pair (CHANGE, UPDN) at its input to decompose the spectral content of the audio signal into the frequency bands of interest. The filters outputs are then propagated along with CHANGE pulses towards the next block that performs energy estimation. This energy extractor block operates by squaring the values of the outputs of each filter, then accumulates these squared values over a precise time window defined by the period of a low frequency clock, as detailed in Fig. 2. The window or frame duration is set to 25ms. This block is the boundary between the CT and the low-frequency DT domains.

III. HARDWARE IMPLEMENTATION OF CT-DSP A. Level-crossing ADC

The LC-ADC is an asynchronous delta encoder composed of two analog comparators continuously comparing the input signal to a predefined set of high and low amplitude thresholds, to generate the CHANGE and UPDN signals. Then, the generated pair of bits is injected into a digital unit that refreshes the values of the low and high thresholds defining the comparison window [START_REF] Schell | A Continuous-Time ADC/DSP/DAC System With No Clock and With Activity-Dependent Power Dissipation[END_REF], [START_REF] Marisa | Pseudo Asynchronous Level Crossing adc for ecg Signal Acquisition[END_REF]. The operation principle of the LC-ADC is shown in Fig. 3, where a sample is taken whenever the input signal fulfills the following conditions: input ≥ U pper threshold or input ≤ lower threshold. The thresholds are updated by ±LSB, depending on the direction of the change. Thus, signals with low amplitude generates low number of events, which will decrease the system power consumption. An inconvenient of such ADCs is the high sensitivity to noisy signals, that generate a large number of insignificant events, that degrades the power efficiency. A solution for this problem has been presented in [START_REF] Marisa | Pseudo Asynchronous Level Crossing adc for ecg Signal Acquisition[END_REF], where a single sample is generated per each comparison window. Consequently, the upper and lower thresholds are separated by 2LSB, as depicted in Fig. 3.

B. Digital CT FIR filter bank

Thanks to the delta encoding of audio input, the CT FIR filter structure is simplified compared to a conventional structure, as depicted in Fig. 4. The signals CHANGE and UPDN are delayed using analog delay taps (T D ) to maintain the clockless operation. Then, the signal pair is fed into the Multiplier/Accumulator (MAC) unit to perform successive additions of the filter's coefficients. During our investigations, we found that 6-bit coefficients are suitable for providing a decent selectivity and recognition accuracy. Finally, a multibit adder receives the MAC results and generates the multibit FIR output.

The main challenge faced in CT filtering is that low frequency and high selective filters need to have high orders i.e. high number of delay taps, which will increase the hardware complexity as well as the number of generated combinatorial events. The reduction of the frequency range as well as the degradation of the selectivity i.e. out-of-band attenuation, relaxes the complexity constraints. For speech recognition, it has been demonstrated in [START_REF] Lecoq | Low-complexity feature extraction unit for "Wake-on-Feature" speech processing[END_REF] that 8 filters logarithmically distributed between 75Hz and 7kHz can extract sufficient features to recognize 10 keywords with 90% accuracy. Since the human voice does not have a significant spectral content below 800Hz (only information on voice intonation and accent are present) [START_REF] Rabiner | Fundamentals of speech reecognition[END_REF], we propose to first restrict the frequency range of interest from 75Hz-7kHz to 840Hz-6.25kHz to reduce hardware complexity. This range is similarly divided into 8 logarithmically-distributed bands, using CT FIR filters. Reducing bandwidth results in a degradation in the accuracy lower than 2% compared to our initial setup in the 10-keyword detection case. In a second step, decreasing the out-of-band attenuation from 20dB to 5dB, reduces the accuracy from 93.1% down to 90.6%, when using a 6-bit LC-ADC. This accuracy loss is balanced by the gain in hardware complexity, enabling the implementation of the CT filters with a maximum of 16 taps. The magnitude response of the proposed filter bank is presented in Fig. 5.

C. Energy extraction

The filters outputs are squared and accumulated to extract the energy in each band by the circuit shown in Fig. 6. The combinatory squarer and the following accumulator are clock-gated by the CHANGE signal, thus an energy value is extracted only with the existence of an event at the input. Then, the squared results are accumulated during the framing clock period i.e. frame. Finally, the frames, lasting 25ms, are concatenated to form the spectrograms.

IV. SIMULATION RESULTS

The CT processing chain has been simulated with the Google Tensorflow ® speech commands dataset (GSCD) [START_REF] Warden | Speech commands: A public dataset for single-word speech recognition[END_REF] and Librispeech dataset [START_REF] Panayotov | Librispeech: An ASR corpus based on public domain audio books[END_REF], using Matlab ® .

Table I displays the number of generated events by the LC-ADC for the three scenarios for an ADC resolution varying from 5 to 9 bits. The number of generated samples scales with signal activity . The values of generated events are compared to a reference value of 960,000 events that corresponds to the number of generated events in the conventional discrete-time case using an ADC working with a sampling frequency equal to 16kHz during 1 minute.

To validate the benefits of the system applied on low activity signals, another simulation is proposed in Table I describing the evolution of the power consumption with the LC-ADC resolution. The model used to estimate the consumption calculates the number of logic gates and multiplies by a typical power for each event, extracted using Spectre simulator considering 28nm FDSOI technology. In this technology, a delay tap consumes 15 fJ/event, as stated in [START_REF] González | A Wide Tuning Range Delay Element for Event-Driven Processing of Low-Frequency Signals in 28-nm FD-SOI CMOS[END_REF], thus the delay line dominates the CT system power consumption. For the DT system, the MAC units are dominating the power consumption, considering that the MAC is composed from a ripple carry array multiplier. The reference power consumption is evaluated as 311.5nW in the case of a DT system. From Table I, we can observe that the CT system stays advantageous in terms of power consumption for all the scenarios up to 7-bit resolution.

To evaluate the trade-off between power consumption and system's performance, the generated spectrograms, with hardware-oriented optimized parameters, are classified using a state-of-the-art CNN consisting of 6 filtering steps composed of a 2-dimensional convolution layer and a rectifier liner unit (ReLU) layer. Between 2 successive filtering stages, an additional max-pooling layer is inserted. At the end, a fully connected layer, with a size matching the number of target keywords, is set after the last filtering step [START_REF] Lecoq | Low-complexity feature extraction unit for "Wake-on-Feature" speech processing[END_REF]. This kind of CNN classifiers is compatible with low-power embedded implementation [START_REF] Zheng | An Ultra-Low Power Binarized Convolutional Neural Network-Based Speech Recognition Processor With On-Chip Self-Learning[END_REF]. To verify the relevance of the extracted features, a simulation describing the variation of the system recognition accuracy as a function of the number of target words and LC-ADC resolution is presented in Fig. 7. The system naturally becomes more accurate with low number of target keywords. The recognition of 1 and 2 keywords is achieved with an accuracy higher than 99.1% and 98.1%, respectively, compared to an accuracy of 97.1% @1word and 94.6% @2words (black dots in Fig. 7), with an average consumption of 336.6nW, for feature extractor, in [START_REF] Shan | A 510-nW Wake-Up Keyword-Spotting Chip Using Serial-FFT-Based MFCC and Binarized Depthwise Separable CNN in 28-nm CMOS[END_REF], which is 5X higher than the CT system. Moreover, the system stays accurate even for a higher number of keywords, as shown in Fig. 7, where the recognition of 10 keywords is achieved with an accuracy varying from 88.6% up to 92%, depending on the LC-ADC resolution, compared to an accuracy of 90.87% in [START_REF] Giraldo | 18 µW SoC for near-microphone Keyword Spotting and Speaker Verification[END_REF] for GSCD dataset. The grey column in Table I, corresponding to 6-bit resolution, represents the best compromise between power consumption and recognition accuracy, because the CT system maintain an accuracy higher than 90% with reducing the power consumption by a factor of 4000, 40 and 5 compared to DT system for scenarios #1, 2 and 3, respectively.

V. CONCLUSION

An audio low-power continuous time feature extraction unit targeting the recognition of up to 10 keywords is simulated with different speech scenarios. This event-driven CT system allows the recognition of 10 keywords with an accuracy higher than 90% while being up to 4000X more power efficient than an equivalent discrete-time system. The simulated classification accuracy is at par or better than state of the art.

VI. ACKNOWLEDGEMENT

This work was supported in part by the French National Research Agency under Grant ANR-18-CE24-0006-01 LEOPAR.

Figure 1 .

 1 Figure 1. Structure of the pre-processing unit in the context of audio pattern recognition. The feature extraction block generates the spectrograms from the audio input signal.

Figure 2 .

 2 Figure 2. Structure of the continuous-time feature extraction block.

Figure 3 .

 3 Figure 3. Illustration of the sample generation from an analog input signal in the LC-ADC. After each crossing, the comparison window is updated by ±1 LSB.

Figure 4 .

 4 Figure 4. Schematic of a digital CT 16-tap FIR filter. For each CHANGE bit, the coefficients are accumulated depending on the UPDN polarity, and replace the multiplication in conventional FIR filters. A delay element T D propagates the CHANGE and UPDN bits from one tap to the next one.

Figure 5 .Figure 6 .

 56 Figure 5. Magnitude response of the proposed bank of 8 digital CT 16-tap FIR filters. The stop-band attenuation of -5dB releases the design constraints to minimize the number of taps in each filter.

Figure 7 .

 7 Figure 7. Evolution of recognition accuracy as function of number of target keywords for different ADC resolution. Comparison with accuracies from state-of-the-art works, using GSCD dataset.

Table I NUMBER

 I OF EVENT AND POWER CONSUMPTION IN CT CASE FOR THE DIFFERENT SCENARIOS COMPARED TO DT CASE.


Narimane Gassa

Benjamin Sacristan

Nejib Zemzemi

Maxime Laborde

Juan Garrido Oliver

Clara Matencio Perabla

Guillermo Jimenez-Perez

Oscar Camara

Sylvain Ploux

Marc Strik

Pierre Bordachar

Remi Dubois

Benchmark of deep learning algorithms for the automatic screening in electrocardiograms transmitted by implantable cardiac devices

The objective of this work was to benchmark different deep learning architectures for noise detection against cardiac arrhythmia episodes recorded by pacemakers and implantable cardioverter-defibrillators (PM/ICDs) and transmitted for remote monitoring. Up to now, most signal processing from ICD data has been based on classical hand-crafted algorithms, not AI or DL-based ones.

The database consist of PM/ICD data from 805 patients representing a total of 10471 recordings from three different channels: the right ventricular (RV), the right atria (RA), and the shock channel.

Four deep learning approaches were trained and optimized to classify PM/ICDs' records as actual ventricular signal vs noise episodes. We evaluated the performance of the different models using the F 2 score.

Results show that the use of 2D representations of 1D signals led to better performances than the direct use of 1D signals, suggesting that the detection of noise takes advantage of a spectral decomposition of the signal, which remains to be confirmed in other contexts.

This study proposes deep learning approaches for the analysis of remote monitoring recordings from PM/ICDs. The detection of noise allows efficient management of this large daily flow of data.

Introduction

Remote monitoring of pacemakers and implantable cardioverter defibrillators (PM/ICDs) identifies early signs of lead failure, which lowers patient morbidity and mortality.

Remote monitoring generates a large amount of data with low yield. It is estimated that only 7 to 9% of the transmitted data requires a medical opinion, and less than 2% motivate early patient management [START_REF] Vogtmann | Workload and usefulness of daily, centralized home monitoring for patients treated with cieds: results of the monic (model project mon-itor centre) prospective multicentre study[END_REF]. In case of non-sustained ventricular arrhythmia, a major challenge is to identify lead noise (4% of the tracings). Noise episodes may eventually reveal electrode failure, the consequences of which can be disastrous (syncope, inappropriate shock, death) [START_REF] Ploux | Towards eradication of inappropriate therapies for icd lead failure by combining comprehensive remote monitoring and lead noise alerts[END_REF][START_REF] Nishii | Analysis of arrhythmic events is useful to detect lead failure earlier in patients followed by remote monitoring[END_REF][START_REF] Ploux | Optimizing implantable cardioverter-defibrillator remote monitoring: a practical guide[END_REF]. The analysis of these large datasets requires a lot of human resources, thus the deployment of remote monitoring surveillance in clinical practice remains difficult.

The ultimate goal of our project was to develop an assistance algorithm, based on a machine learning strategy, allowing an automated analysis of cardiac arrhythmia traces transmitted by PM/ICDs upstream of human evaluation. In this work, we compared four different deep learning approaches for noise detection against arrhythmia episodes in order to test three key aspects of the classifier: i) the input space for handling 1D signals; ii) the imbalanced data-set with missing signals; and iii) the deep network architecture.

Methods

Dataset

The database was composed of PM/ICD remote records collected at Bordeaux University Hospital and managed by IHU Liryc. A total of 805 patients has been followed-up, creating 10,471 records, each composed of right ventricular bipolar signals, and possibly atrial, left ventricular and/or far field EGM signals, depending on the type of device (single, dual, or triple-chamber pacemaker or implantable cardioverter defibrillator).

The database was randomly divided into 3 subsets: All Recordings were unevenly sampled at the maximum rate 200 Hz for efficient storage in the device. We applied data interpolation so that all time-steps were 5 ms. Considering that the recordings were not of the same length, window sliding was applied. It consisted of taking the first W points from the recording of L points, and then moving forward by S points and taking the following W points, at the end getting (L-W)/S + 1 samples of each recording.

This way we achieved two things: (i) samples of equal length; and (ii) a larger sample size. Moreover, not all recordings have the same number of channels. As not all recordings had the same number of channels, we artificially added signal lines at zero to have 3 channels in all recordings. We finally obtained samples with the same number of channels, time-step, and number of points.

The architecture of our model was based on the Residual neural network with 3 channels in the input and 2000 points per sample.

2D-DenseNet

To take advantage of Deep Convolutional Neural Networks, we converted the time series data into images.

In this part, we only considered the recordings of the right ventricular channel, so we obtained two-dimensional images of the temporal traces of the ventricular signal over 2000ms. Then these images were fed to a Dense neural Network (DenseNet) for image classification. Input image dimension of the network was (248,372,1).

DenseNet is an improved version of convolutional neural networks that minimizes the vanishing gradient problem, and can be trained with few parameters which takes less time and is found to achieve better results. [START_REF] Huang | Densely connected convolutional networks[END_REF] The figure depicts the architecture of a typical DenseNet model, we have dense blocks composed of interconnected layers : each layer is receiving information from all preceding layers and in between there are non-linear transformation (Batch Normalization, Rectified Linear Unit (ReLU), Convolutions ). A transitional block is introduced between two dense blocks as a way of downsampling by applying a batch normalization, a convolution and a global average pooling.

Input

2DTF-CNN

All recordings were sampled at 200Hz. In this section, we have only considered the first 15000ms for each sample and we carried out an interpolation in order to have a fixed time-step equal to 5ms and a number of recordings equal to 3000.

A spectrogram is the pointwise magnitude of the fourier transform of a segment of an audio signal. We compute, for each time signal, the correspending spectrogram. We obtain two-dimensional graphs and a third dimension represented by colors, time is running along the x-axis. The vertical axis represents frequency. The amplitude of a particular frequency at a particular time is represented by the third dimension.

The 2D time/frequency maps of the ventricular bipolar signal are then fed to convolutional neural for classification purpose.

We propose here a classical CNN architecture constituted of a stacking of two convolutional layers alternating with two pooling layers and terminating with two fully connected (FC) layers and a dropout layer (p = 0.5) inbetween. The output is a probability distribution obtained utilizing a sigmoid function on the output of the final FC layer. The network architecture is represented in Figure 2. We used a stochastic gradient descent method (Adam) for training the proposed model with 32 samples for batch size. The hyper-parameters are set as follows: learning rate of 10 -3 , and number of epochs are set to 100.

2DTF-VGG

In this part, RV-time/frequency maps are also used as inputs of the network. Each RV recording is first divided into regular time segments each 10 seconds wide. We compute then for each part the spectrogram in the range [0-100Hz] with a frequency resolution of 2Hz, and a 50% overlapping sliding windows of 1s leading to one 50x20 image for each 10-second segment. These 2D representations feed a VGG-like neural network. Final architecture was selected using a 5 fold cross-validation process over the training dataset. In order to manage the unbalanced data- set, we train a cost-sensitive classifier and penalize missclassifications from the minority class y more than the majority class n by introducing weights to our loss function as follows:

Loss = 1 n n i=1 W y i log(ŷ i ) + (1 -W )(1 -y i )log(1 -ŷi )
Where y i is the probability of input i to be be a noise event; and n the total number of example in the training database. W was set to 0.66 using the cross validation process.

A record being composed of several parts, we classify the recording as noise if at least one of its parts is classified as noise.

Evaluation metric

To assess the accuracy of the classification results obtained by the different deep neural networks models, we compute the F 2 score [START_REF] Van Rijsbergen | Information Retrieval[END_REF]:

F β = (1 + β 2 ) P P V • se β 2 • P P V + se , with β = 2
where se is the sensitivity to detect noise, and PPV the positive predictive value to detect noise.

se =

T P T P + F N , P P V = T P T P + F P For instance, noise (class y) is the positive class, and NSTV (class y) is the negative class.

Results

The CNN-based network (2DTF-CNN) that used 2D time/frequency maps of the ventricular bipolar signal as input gave the best results on the test set (F 2 = 0.914), outperforming pre-trained VGG (2DTF-VGG) (F 2 = 0.863). However, a CNN network based on a naive DenseNet architecture trained on 2D images of the ventricular signal time traces (2D-ResNet) also performed very well (F 2 = 0.906). Both architectures surpassed networks with 1D signals as input (1D-AgResNet: F 2 = 0.791). In table 2 we show confusion matrices of the four methods. In particular, the false negative metric on the test set is coherent with the F2-scores (2DTF-CNN: FN = 9, 2D-DenseNet: FN = 13, 2DTF-VGG: FN = 17, 1D-AgResNet: FN=30). On the other hand, if we consider the number of the missclassified recordings (2DTF-CNN: FN+FP =26 , 2D-DenseNet: FN+FP = 17, 2DTF-VGG: FN+FP = 31, 1D-AgResNet: FN+FP=30) the 2D-DenseNet method outperforms the three others methods but the F2-score gives more weight to sensitivity(se) thus we penalize our models more for false negatives then false positives.

Discussion and conclusion

In this work, we suggest a deep learning approach to automatically identify PM/ICD episodes with lead noise, results show that the use of 2D representation and a convolutional neural network (2DTF-CNN, 2D-DenseNet, 2DTF-VGG) outperforms the use of 1D representation of the signal (1D-AgResNet).

The 2DTF-CNN has the best performance in terms of F 2-score reaching 91% on the test set. This may suggest that noise detection can also benefit from spectral decomposition of the signal, which remains to be confirmed in other contexts.

Regarding the imbalanced data, we used a weighted loss function which potentially improved the F2-score. It will also be interesting to work on resampling the training set as shown in [START_REF] Yoon | Deep learningbased electrocardiogram signal noise detection and screening model[END_REF] where the authors propose an under-sampling approach to make a balanced dataset out of the imbalanced one. Adding an arrhythmia class, [START_REF] Rajpurkar | Cardiologist-level arrhythmia detection with convolutional neural networks[END_REF], may also help the model distinguish noise episodes from arrhythmia episodes, thereby minimizing the false positive rate.

Figure 1 :

 1 Figure 1: (a) Representation of the neural network architecture (2D-DenseNet), (b) Dense block, (c) transition layer.

Figure 2 :

 2 Figure 2: Representation of the neural network architecture (2DTF-CNN).

Figure 3 :

 3 Figure 3: Representation of the neural network architecture (2DTF-VGG).

Figure 4 :

 4 Figure 4: Overall Results.

Table 1 :

 1 Data profile.

	Validation set: 142 patients, 2621 recordings
	• Test set: 328 patients, 2843 recordings
	The records labeled by the device as non sustained ven-

• Training set: 417 patients, 4998 recordings •

Table 2 :

 2 Confusion matrices

Acknowledgments

This Project has received funding from the European Unions Horizon research and innovation programme under the Marie Skodowska-Curie grant agreement No. 860974 and by the French National Research Agency, grant references ANR-10-IAHU04-LIRYC and ANR-11-EQPX-0030.