Léo Savonnet
email: leo.savonnet@ifsttar.fr

Sonia Duprey

Xuguang Wang

Coupling rigid multi-body and deformable finite element human models for assessing seat discomfort

Keywords: Comfort, Seat, Musculoskeletal model, FE model

According to literature, both rigid multi-body (MB) musculoskeletal and deformable finite element (FE) human modeling approaches are used to assess discomfort related to sitting; a deformable FE model can predict the occupant seat interaction while the MB model estimates muscular activity and spinal joint loads. Combining both MB and FE human models could better help assess sitting discomfort, because it would estimate all mechanical factors leading to discomfort. In this research study, a FE model of the pelvis and thighs has been developed from MRI images of a 50 th height male. The full body musculoskeletal model available in AnyScript Model Repository public domains' was used and personalized according to the subject's anthropometric dimensions. Two methods of coupling MB and FE models were compared. In the first method, several simulations of the two solvers (Anybody Modelling system and Radioss) were launched sequentially. At each phase, the rigid body model outputs (forces and moments) were used as boundary conditions for the deformable model; the deformable model gives new inputs (position of the bones) for the rigid body model. In the second method, only the posture obtained from the MB model simulations was set as boundary conditions in the FE model. The pelvis position was constrained in each direction and the seating process was simulated by imposing the seat pan vertical displacement until the resultant contact force reaches the level estimated by the MB model. This method did not require several simulation loops. The first method may help predict a more accurate posture due to the consideration of realistic occupant/seat interaction (soft tissue deformation) for body positioning. However, this method requires a longer computation time because of the simulation loops. Work is still in progress especially for personalizing and positioning the finite element model. Experimental data will also be collected for validation.

Introduction

The average amount of time spent sitting on a daily basis is concerning for overall health in today's society. North Americans spend on average 10 hours a day sitting [START_REF] Holmes | Evaluating Abdominal and Lower-Back Muscle Activity While Performing Core Exercises on a Stability Ball and a Dynamic Office Chair[END_REF]. Prolonged sitting leads to discomfort and musculoskeletal complaints [START_REF] Vink | Editorial: Comfort and Discomfort Studies Demonstrate the Need for a New Model[END_REF], decrease seated workers efficiency (Hertzberg 1958), is a risk for Low back pain (LBP) [START_REF] Lis | Association between Sitting and Occupational LBP[END_REF] or even lead to pressure sores in the case of persons confined to a bed or wheelchair [START_REF] Olesen | Missing Links in Pressure Ulcer research-An Interdisciplinary Overview[END_REF]. Previous literature predominantly aims at understanding static sitting discomfort [START_REF] Zemp | Are Pressure Measurements Effective in the Assessment of Office Chair Comfort/discomfort? A Review[END_REF][START_REF] Vink | Aircraft Interior Comfort and Design[END_REF][START_REF] Harrison | Sitting Biomechanics Part I: Review of the Literature[END_REF]) and attempt to find objective discomfort criteria experimentally. The occupant/seat pressure is the most studied factor especially in the automotive industry. Since interface pressure is linked to soft tissues compression [START_REF] Luboz | Biomechanical Modeling to Prevent Ischial Pressure Ulcers[END_REF], a poor distributed center of pressure distribution may lead to a deprivation of oxygen in the gluteal muscle and is generally considered as a factor causing seat discomfort. Maximum pressure thresholds were proposed by some investigators [START_REF] Ciaccia | An Approach to Aircraft Seat Comfort Using Interface Pressure Mapping[END_REF]Sznelwar 2012,Conine et al. 1994) and discomfort criteria were proposed based on the whole pressure distribution on the seat pan (Hartung et al. 2006[START_REF] Mergl | Predicting Long Term Riding Comfort in Cars by Contact Forces Between Human and Seat[END_REF]. Seat pan shear force was also proposed as a discomfort factor. Several studies [START_REF] Reichel | SHearing Force as a Factor in Decubitus Ulcers in Paraplegics[END_REF][START_REF] Chow | Deformations and Stresses in Soft Body Tissues of a Sitting Person[END_REF][START_REF] Goossens | Decubitus Risk: Is Shear More Important than Pressure?[END_REF] showed that shear forces together with normal pressure might reduce blood flow and lead to a lack of oxygen in the tissue. A high spinal disc compression may lead to a lack of nucleus oxygenation during sitting and can trigger LBP ( Harrison et al. 2000, McBeth and[START_REF] Mcbeth | Epidemiology of Chronic Musculoskeletal Pain[END_REF]. Disc compression is much higher in sitting than in standing or lying postures (Nachemson andElfström 1970, Andersson et al. Nachemson 1977, , thus it should be minimized to reduce risk of LBP [START_REF] Zenk | Technical Note: Spine Loading in Automotive Seating[END_REF]. Finally a continuously constant muscular activity, even low (under 5% of maximum voluntary contraction) but maintained during a long time, might lead to muscular fatigue/discomfort, and should also be minimized [START_REF] Carvalho | Passive Stiffness Changes in the Lumbar Spine and Effect of Gender during Prolonged Simulated Driving[END_REF][START_REF] Rasmussen | Muscle Relaxation and Shear Force Reduction May Be Conflicting: A Computational Model of Seating[END_REF][START_REF] Grujicic | Musculoskeletal Computational Analysis of the Influence of Car-Seat Design/adjustments on Long-Distance Driving Fatigue[END_REF]).

In the recent years, both deformable finite element (FE) [START_REF] Choi | Human Body Modeling for Riding Comfort Simulation[END_REF][START_REF] Siefert | Virtual Optimisation of Car Passenger Seats: Simulation of Static and Dynamic Effects on Drivers' Seating Comfort[END_REF] and rigid multibody (MB) musculoskeletal [START_REF] Rasmussen | Design Optimization of Airline Seats[END_REF] human models have been developed for assessing seating discomfort. FE models can estimate pressure and shear forces at the occupant/seat interface as well as the internal strains and stress in the soft tissues, while MB musculoskeletal models can estimate muscular activity and spinal joint loads. Ideally, a hybrid modeling approach combining both MB and FE human models is required in order to obtain all parameters necessary for sitting discomfort assessment.

A full body FE model could be used to calculate contact forces and position as inputs for a MB model. However, due to the difficulties in personalizing and positioning a full body FE model, such a simulation is generally limited to small numbers of human models and postures [START_REF] Siefert | Virtual Optimisation of Car Passenger Seats: Simulation of Static and Dynamic Effects on Drivers' Seating Comfort[END_REF][START_REF] Choi | Human Body Modeling for Riding Comfort Simulation[END_REF]. A solution could be to model the thighs and the buttock as deformable while the rest of the body would be modeled as rigid multi-bodies; the external pressure distribution and shear forces on this area are main factors affecting sitting discomfort.

In the present work, two methods of coupling MB-FE models were tested and compared, using a whole body model for MB simulations and a buttock-thigh model for FE simulations.

Material and Methods

Finite element model of the buttocks

MRI images of the buttock-thigh complex of healthy subjects (males, 24 years, 174 cm, 66 kg) were obtained from a lying position with an angle of 130° between L5-S1, the hip joint and the knee joint (T1 weighted, resolution of 0.853*1.1*1.0 mm). The geometry of bones and soft tissues were obtained by segmentation. Soft tissues were meshed using four-node tetrahedral solid elements of a minimum size of 5 mm after a preliminary study of mesh convergence. The skin and bones were meshed with triangular shell elements of 5 mm (Figure 1). The bones were assumed rigid and soft tissues were attached to the bones. A ball and socket joint was introduced between the femur and the pelvis at the center of the head of the femur. The soft tissues were modelled with a Mooney Rivlin hyperelastic isotropic material law. The material properties were defined from the literature, with the first two coefficients of the strain energy function being A 1 =1.65 kPa and A 2 = 3.35 kPa [START_REF] Verver | A Finite Element Model of the Human Buttocks for Prediction of Seat Pressure Distributions[END_REF][START_REF] Cheng | Considerations and Experiences in Developing an FE Buttock Model for Seating Comfort Analysis[END_REF][START_REF] Siefert | Volumetric Muscle Approach for Human-Model CASIMIR[END_REF][START_REF] Grujicic | Seat-Cushion and Soft-Tissue Material Modeling and a Finite Element Investigation of the Seating Comfort for Passenger-Vehicle Occupants[END_REF]. The skin was modeled as elastic linear with the Young modulus E= 0.15 MPa and Poisson ratio ν = 0.49 [START_REF] Verver | A Finite Element Model of the Human Buttocks for Prediction of Seat Pressure Distributions[END_REF][START_REF] Grujicic | Seat-Cushion and Soft-Tissue Material Modeling and a Finite Element Investigation of the Seating Comfort for Passenger-Vehicle Occupants[END_REF]). The active component of the muscles was not modelled.

MB model

A full body model developed by Michael Daamsgard and John Rasmussen [START_REF] Damsgaard | Analysis of Musculoskeletal Systems in the AnyBody Modeling System[END_REF][START_REF] Rasmussen | Computational Analysis of the Influence of Seat Pan Inclination and Friction on Muscle Activity and Spinal Joint Forces[END_REF]) called AAUHuman can be found in the AnyScript model repository (http://forge.anyscript.org/gf/). Its geometry was scaled to the FE model. The pelvis and femur model present in the AnyScript model repository were replaced by the one of the FE model. The length of other segments was linearily scaled to the subject used for the FE model. The cross sectional directions of each segment were scaled according to their segment mass. Muscle strength was scaled in proportion with the fat ratio calculated using the Body Mass Index.

Coupling MB and FE models

Two methods of coupling MB and FE models can be proposed for simulating an occupant seating on a seat.

For the two methods, the first step consists in finding the initial position of the MB model based on the seat geometry using inverse kinematics. Distances between marker points associated to body segments and the seat were specified. The position of the center of the ischial tuberosity was defined, the distance between the T2 vertebrae and the seat and distance between knee joint and the seat were set. Joint angles at the shoulder, knee and ankle were also imposed. This position (position of the lumbosacral joint, ischial tuberosity and knee joint) was then imposed to the FE model.

In the first method (Method 1), an inverse dynamic is conducted with Anybody to estimate the articular net forces and moments. The contact between the seat and the body was modeled with contact elements, which provides compressive reaction and friction force proportional to the reaction force in the element:

|F f | ≤ μR
F f is the friction force, R is the reaction force and µ is the Coulomb friction coefficient. These elements are placed on multiple support points segment in contact. The reaction forces can be determined by considering them as unknown muscle forces. Force and moment calculated at the lumbosacral and knee joint centers were applied as boudary condition for the FE model. Once, a first FE simulation was performed, the newly reached position of the pelvis and femur were imposed on the MB model. This loop was repeated until the the positions of pelvis and femur have converged.

In the second method (Method 2), the pelvis of the FE model was constrained in all directions and the femur was free to move. The FE simulation was performed by moving the seat pan vertically until the resultant contact force reaches the level estimated by the MB model. Since the pelvis position was fixed, MB-FE coupling loops were not necessary as required by Method 1.

A case study

In the present work, to test the two coupling methods, a simple case of a person sitting on a horizontal rigid plane was simulated with the feet being suspended.

The upper body position was defined by imposing an angle of 90° between the seat plane and the direction between the center of the ischial tuberosities and T2. The knee joint flexion was set to 90°. The knee joint center was positioned at 3 cm above the seat. The ischial tuberosities were maintained in contact with the seat surface. To fully locate the pelvis and spinal vertebrae, empirical relationships bewteen the spinal and pelvis joint angles were introduced in the Anybody seated man model. A ratio of 2:1 between hip flexion and pelvis-thorax flexion and a linear combination between the three rotation angles associated to each lumbar joint and the three angles associated to the T12-L1 joint was introduced (Rasmussen, Tørholm, and de Zee 2009). The arm was positionned along the vertical direction. Figures 3 and4 show the imposed sitting posture for the MB and FE models respectively. When using the first method, 10 loops were needed to reach a stable pelvis position (Figure 4) with a simulation of 50 ms in sitting for each loop, except for the first one with a sitting duration of 180 ms.

The pelvis was re-positionned after the iteractive MB-FE simulations. A difference of 10 degrees in pelvic tilt was observed (Table 1). This led to slight different pressure distribution (Figure 5, Table 2) and muscle activity estimation (Table 3) between the two coupling methods. The muscle activity is the muscular force divided by its strength. The strength is defined for each muscle as the force when the muscle is loaded to its maximum activity.

Discussion and conclusion

In the present work, two methods of coupling MB and FE models were compared for simulating occupant/seat interaction. Method 2 was used in most of the previous investigations by fixing the pelvis [START_REF] Mergl | Development of a 3D Finite Element Model of Thigh and Pelvis[END_REF][START_REF] Lin | FEM Model for Evaluating Buttock Tissue Response under Sitting Load[END_REF][START_REF] Luboz | Biomechanical Modeling to Prevent Ischial Pressure Ulcers[END_REF]. As no iteration was required, computation time was advantageously low, requiring the computation of 1h30 in a PC (HP 8 processors i7 CPU 2.90 GHz RAM 32 Go) instead of 6h45 for Method 1. In the present study, Method 1 was tested allowing a better consideration of the physical interaction between buttock and seat thus, correcting pelvis orientation initially estimated from geometric constraints. It is expected that the position of the pelvis corrected by Method 1 (once the simulation loops converged) to be more realistic. The corrected position should be checked by experimental observation. Furthermore, it should be noted that this corrected pelvic position was dependent on its initial position. The whole body was initially positioned by imposing some geometric constraints using the MB model. The initial boundaries conditions put into the FE model are strongly linked to this initial posture. The relationship between seat characteristics and body posture should be investigated in the near future.

It should also be noted that the actions of the upper body on the buttock-thigh FE model in Method 1 were only transmitted by the force and moments applied on the sacrum. Thus, the distribution of the forces applied at the section between upper body and pelvis was not considered. This may affect the tissue deformation and thus the contact pressure.

Moreover, the muscles were modeled as passive in the FE model, thus active muscle action was not considered in the stiffness between the pelvis and the femur. Only passive stiffness was taken into account due to the tissues surrounding the hip joint. The effect of muscle activation on the hip joint stiffness needs to be investigated.

Figure 1 :

 1 Figure 1: Mesh of the FE model

Figure 2 :

 2 Figure 2: Position of the MB model

Figure 3 :

 3 Figure 3: Initial position of the FE model. The net force and moments applied on the sacrum and knee are also indicated

Figure 4 :

 4 Figure 4: Variation in the vertical position in meter of knee and lumbosacral joints during the 10 first MB-FE iterative simulations

Table 1 :

 1 Angle bewteen L5S1-Hip-Knee joints projected in the sagittal plane and ischial tuberositie

	to seat distance
		L5S1-Hip-Knee	Ischial-seat
		angle	distance
		(degrees)	(mm)
	Method 1	87.4	21.5
	Method 2	97.8	27,6
	Figure 5: Pressure distributions by two MB-FE
	coupling methods (left: method 1, right: method 2)

Table 2 :

 2 Occupant/seat pressure

		Contact	Peak	Average
		Area	pressure	pressure
		(cm²)	(kPa)	(kPa)
	Method 1	332	40	1.99
	Method 2	305	42	2.16

Table 3 :

 3 Muscle Activity simulated by Anybody model in % of maximum voluntary contraction

		Highest
		value in the
		entire body Abdo muscles Back muscles
	Method
	1	0.099	0.072	0.100
	Method
	2	0.140	0.099	0.122

Acknowledgement

This study was partially support by ZODIAC Seat France.


Cyril Buttay
email: cyril.buttay@insa-lyon.fr

Christian Martin

Florent Morel

Rémy Caillaud

Johan Le Leslé

Roberto Mrad

Nicolas Degrenne

Stefan Mollov

Johan Le Lesl É

Application of the PCB-Embedding Technology in Power Electronics -State of the Art and Proposed Development

de niveau recherche, publiés ou non, émanant des établissements d'enseignement et de recherche français ou étrangers, des laboratoires publics ou privés.

I. INTRODUCTION

For more than 100 years, evolution in power electronics has mainly been driven by improvements in the switching components [START_REF] Van Wyk | On a future for power electronics[END_REF]: valves, silicon transistors and thyristors, MOSFETs, IGBTs. Silicon-based components are still progressing, with the introduction of the superjunction MOSFETs or the trench IGBTs [START_REF] Majumdar | Review of integration trends in power electronics systems and devices[END_REF]. Since 2001, wide band-gap materials have been commercially introduced: Silicon Carbide (SiC) and Gallium Nitride (GaN).

From a circuit point of view, many topologies were introduced over the years [START_REF] Mohan | Power Electronics: Converters, Applications, and Design[END_REF], and a sound theory has been built [START_REF] Middlebrook | A general unified approach to modelling switching-converter power stages[END_REF]. It seems to be a consensus nowadays that there is not much improvement to be expected from a new power circuit topology [START_REF] Van Wyk | On a future for power electronics[END_REF], [START_REF] Prem | Electronics enabling efficient energy usage -results from the E4U project[END_REF], [START_REF] Mathúna | Packaging and integration technologies for future high-frequency power supplies[END_REF]. A large part of the current research activity regarding circuit design focuses on the "multi-cellular" approach [START_REF] Kolar | What are the big challenges in power electronics?[END_REF], where elementary switching cells or elementary converters are associated to form a larger converter. This has the advantage of modularity, reduced electro-magnetic interference -EMI -(with proper control, the elementary blocks produce interference which partially cancel each other) and inherent fault-tolerance, at the cost of increased complexity.

The next driver for progress is considered to be integration and packaging [START_REF] Van Wyk | On a future for power electronics[END_REF], [START_REF] Prem | Electronics enabling efficient energy usage -results from the E4U project[END_REF]- [START_REF] Seal | High performance silicon carbide power packaging-past trends, present practices, and future directions[END_REF]. Future packaging technologies should offer better electrical and thermal performances, low cost, and should be able to manage the complexity of the multi-cellular approaches. Among the possible integration technologies, printed circuit board (Fig. 1a) is particularly attractive: because it is a mature technology, many advanced design tools are available, as well as a full manufacturing supply chain. It allows a high density of interconnects, and is relatively inexpensive. Many manufacturing steps of a PCB rely on batch processes, i.e processes which are performed simultaneously to all parts of a PCB panel, independently of its size and of the number of features it contains. This is a fundamental aspect, also found in microelectronics (wafer-level processing): for a given Fig. 2: Some examples of PCB integration: (a) a (crosssectioned) camera module which includes data processing and power management in the PCB (total size 16x16 mm 2 ) [START_REF] Ostmann | Evolution and future of embedding technology[END_REF]; (b) a 60 W, credit-card-size converter with magnetic and capacitive components embedded in the PCB [START_REF] Waffenschmidt | Design and application of thin, planar magnetic components for embedded passives integrated circuits[END_REF]; (c) 4 SiC dies embedded in a PCB, with decoupling capacitors [START_REF] Hoene | Ultra-Low-Inductance Power Module for Fast Switching Semicon-ductors[END_REF];

(d) a commercial application: "Dr Blade", which includes MOSFET and gate driver in the same PCB package (source: Infineon); (e) comparison between a 50 kW power module with embedded dies (left) and standard technology (right), approximate size 15x8 cm 2 [START_REF] Ostmann | Evolution and future of embedding technology[END_REF].

manufacturing configuration (equipment used, layer count in the PCB. . . ) cost and turnaround time are independent of the circuit design.

With the ever increasing need for more compact electronic systems, integration technologies have been developed to take advantage of the inter-layer space in multi-layer PCBs (Fig. 1b). Component embedding was first introduced in the 80's for ceramic circuits, and implemented with organic PCBs in the 90's [START_REF] Luke | [END_REF]. This topic has been particularly active in Europe, with research institutes such as Fraunhofer IZM [START_REF] Ostmann | Evolution and future of embedding technology[END_REF], or companies such as Hofmann Leiterplatten [START_REF] Hofmann | Practical experience manufacturing PCBs with embedded active and passive devices[END_REF] or Imberra Electronics [START_REF] Palm | Embedding active components inside printed circuit board (PCB) -a solution for miniaturization of electronics[END_REF]. Since 2010, this technology has attracted a lot of interest, with relatively complex circuits being produced, such as the camera in Fig. 2a. These circuits include several semiconductor dies, passive components (resistors, inductors, capacitors), etc.

If we focus on power electronics, examples of PCB integration are given in Figs. 2b to 2e. In Fig. 2b, layers of magnetic and dielectric materials are stacked with copper and polymer-impregnated fibre sheets ("pre-pregs") and laminated to form a solid substrate with embedded passives [START_REF] Waffenschmidt | Design Method and Material Technologies for Passives in Printed Circuit Board Embedded Circuits[END_REF]. In Fig. 2c, SiC dies are embedded in a PCB, with decoupling capacitors mounted on the surface directly above. The authors demonstrate that this configuration generates a parasitic inductance of less than 1 nH [START_REF] Klein | Packages for Fast Switching HV GaN Power Devices[END_REF], [START_REF] Hoene | Ultra Low Inductance Package for SiC[END_REF], 10 times lower than the best commercial power modules currently available. A largerscale demonstrator, developed during the German project "Hi-Level", is presented in Fig. 2e, with a side-by-side comparison of two "modules": each of them includes 18 IGBTs and 18 diodes to form an inverter with a 50 kW rating, but the one based on PCB embedding is much thinner than the other (millimetres compared to centimetres). Finally, an actual industrial application of PCB embedding is presented in Fig. 2d. This circuit integrates two power transistors and the corresponding half-bridge gate driver IC. It is produced at a large scale (production capability is 3.3 million per month [START_REF] Essig | Enhancing power modules efficiency by chip embedding[END_REF]).

It is worth noting that component embedding is not the only way to take advantage of PCB technology: in [START_REF] Jong | Toward the Next Level of PCB Usage in Power Electronic Converters[END_REF], a flex-rigid PCB is folded in an intricate way to form the windings of a magnetic component and wrapped around large capacitors to encapsulate the converter. In [START_REF] Lostetter | An overview to integrated power module design for high power electronics packaging[END_REF], a multi-layer PCB is laminated on a ceramic substrate to host the gate driver circuit, but wirebonds are still used to connect the power semiconductor dies. These wirebonds are replaced by a flex PCB substrate in [START_REF] Dieckerhoff | Electric Characteristics of Planar Interconnect Technologies for Power MOSFETs[END_REF]- [START_REF] Beckedahl | 400A, 1200V SiC power module with 1nH commutation inductance[END_REF] to form low-inductance interconnects. In [START_REF] Marchesini | Implementation and Switching Behavior of a PCB-DBC IGBT Module Based on the Power Chip-on-Chip 3D Concept[END_REF], a comparable approach is chosen with rigid, multi-layer PCB instead of flex. In [START_REF] Ferreira | PCB Integration Technology Overview[END_REF], standard PCBs are populated with surface-mount components that have a uniform thickness, to allow for dense PCB stacking. However, none of these techniques offer the same level of integration and manufacturing process rationalisation as PCB embedding.

A comprehensive article recently presented the state of the art of PCB embedding for power electronics [START_REF] Alderman | 3-D Embedded Packaging Technology[END_REF], and [START_REF] Ostmann | Evolution and future of embedding technology[END_REF] gives an history of the technology, with a strong focus on embedding power semiconductor devices. As embedding develops (this is particularly true for signal electronics), standards have appeared such as JPCA-EB01, CEI 62878 and IPC 7092 [START_REF] Hofmann | Practical experience manufacturing PCBs with embedded active and passive devices[END_REF], [START_REF] Morianz | Embedded power electronics on the way to be launched[END_REF]. For power electronics, however, many issues still have to be addressed, and are discussed in the next section. The design process in itself has to be reinvented; propositions are made in section III. II. TECHNOLOGY REVIEW Some signal electronic systems were produced with almost all components embedded in PCB (see Fig. 2a for example). However, this is not the case for power electronics: so far, the research has focused on embedding only a subset of a Fig. 3: Embedding of some components: (a): manufacturing process to embed a power semiconductor die in a PCB [START_REF] Ostmann | Evolution and future of embedding technology[END_REF] and (b) a cross section of such die (dark grey) embedded in a laminated PCB with sintered-silver (light grey) interconnects; (c): cross section of a PCB with an embedded capacitive layer (visible in the middle of the board) [START_REF] Dupont | Dupont interra embedded passives materials -interra HK04 planar capacitor laminate[END_REF]; (d) embedding of a ferrite core (30 mm on a side) to form a common-mode filter [START_REF] Ali | Design of a hybrid integrated EMC filter for a DC-DC power converter[END_REF]; (e): concept of the "planar" magnetic component, with a magnetic core clamped around PCB windings; (f) direct embedding of ferrite powder to form a large-size inductor (50 mm diameter) [START_REF] Caillaud | High power PCB-embedded inductors based on ferrite powder[END_REF]; (g) a thick copper conductor for handling large currents (hundreds of amperes) (source: https://www.isoltronic.ch/).

converter (in many cases the active devices, but embedding of passives has also been investigated). This is why the review below is proposed on a component-per-component basis.

A. Embedding of Active Devices

Most of the research and development on component embedding is actually focused on active devices. It was first developed for microelectronic devices, with thin dies and a high number of interconnects [START_REF] Ostmann | Evolution and future of embedding technology[END_REF], [START_REF] Kugler | Chip Embedding in Laminates[END_REF], mounted flip-chip prior to embedding in a PCB. For power semiconductor devices, the embedding technique is different, because most of them require contacts to be taken on both sides of the die. Several solutions were investigated to form these contacts: in [START_REF] Hoene | Ultra Low Inductance Package for SiC[END_REF], the dies are populated with gold "stud bump" prior to embedding; after lamination, windows are machined in the PCB to retrieve the gold bumps. In [START_REF] Sharma | PCB embedded power package with reinforced topside chip contacts[END_REF], a thick copper buffer is mounted on the dies prior to embedding; mechanical drilling is performed later, followed by copper electroplating. In [START_REF] Pascal | Using Laminated Metal Foam as the Top-Side Contact of a PCB-Embedded Power Die[END_REF], a piece of metal foam is stacked on top of the die to provide electrical connection with the copper layers in the PCB.

In most cases, however, a laser is used to ablate the PCB material and get access to the dies after embedding: either a low power CO 2 laser [START_REF] Yu | Comparison of topside contact layouts for power dies embedded in PCB[END_REF], which offers a good selectivity (it ablates organic materials but not metals), or a UV laser, which is more accurate, but has no selectivity [START_REF] Palm | Embedding active components inside printed circuit board (PCB) -a solution for miniaturization of electronics[END_REF], [START_REF] Ostmann | Power modules with embedded components[END_REF], [START_REF] Regnat | Silicon carbide power chip on chip module based on embedded die technology with paralleled dies[END_REF] (Figs 3a andb). This laser-drilling technique offers the advantage of using tools that are standard in the PCB industry. However, it requires the dies to have copper pads, which is not standard (most power dies have aluminium on top, for wire-bonding, and silver on bottom, for soldering). Copper is indeed required for the electroplating step which follows drilling [START_REF] Yu | Highly integrated power electronic converters using active devices embedded in printed-circuit board[END_REF]. Although producing semiconductor dies with a copper finish does not constitute a major scientific challenge, such dies are currently difficult to procure. Some alternative deposition methods were investigated such as cold spray [START_REF] Mueller | Highly efficient and flexible plasma based copper coating process for the manufacture of direct metallized mechatronic devices[END_REF] or sputtering [START_REF] Randoll | Lifetime and manufacturability of integrated power electronics[END_REF].

Finally, another approach is the embedding of packaged devices (inserted devices, see section II-C, below) rather than of bare dies, as depicted in Fig. 2a. This is a simple solution for integrated circuits such as gate drivers, but is not so attractive for power semiconductors as the packaging constitutes an additional thermal barrier. It may, however, constitute a workaround for the lack of copper die finish discussed above.

B. Embedding of Formed Components

Capacitive films [START_REF] Andresakis | Embedded Capacitors[END_REF] can be used in the PCB stack-up (Fig. 3c), to form capacitors which are distributed over the entire board. These are basically a single-layer plane capacitor (C = ǫS/t, with C the capacitance, ǫ the permittivity of the dielectric material, t its thickness and S the surface of the capacitor). While this is particularly efficient for microelectronics, where low capacitance values (pF to nF), low voltage (3 to 5 V) and very high frequency capacitors are required, it is not so suited to power electronics: the capacitance required is often more than one micro-farad, and voltages can reach thousands of volts. Most available films have a capacitance value of around 1 nF cm -2 , with voltages ratings lower than 100 V peak [START_REF] Andresakis | Embedded Capacitors[END_REF]. High permittivity materials such as BaTiO 3 (1, 000 < ǫ r < 10, 000) are used, but they are mixed with organic binders, to form large films which can be handled for fabrication, resulting in an equivalent ǫ r < 100, hence the low resulting capacitance.

Magnetic components are especially attractive candidates for embedding, because they are custom components which occupy a large share of a typical converter (13 % of the volume in [START_REF] Bortis | ηρ-Pareto Optimization and Comparative Evaluation of Inverter Concepts considered for the GOOGLE Little Box Challenge[END_REF]), and the manufacturing of their copper winding is not very efficient (they are individually wound, with possibly many turns). Planar components (Fig. 3e) partially address these issues, but full PCB embedding goes further as depicted in Fig. 3d. However, so far the research has mainly focused on the low-power (1-100 W) range [START_REF] Chen | Design considerations for passive substrate with ferrite materials embedded in printed circuit board (PCB)[END_REF], [START_REF] Kondo | Embedded planar power inductor technology for package-level DC power grid[END_REF], which is especially suited to the "Point Of Load" (POL) converters used, for example, in the power management of computers.

Road-maps for POL converters [START_REF] Li | Technology roadmap for high frequency integrated DC-DC converter[END_REF] and more general power embedding [START_REF] Alderman | 3-D Embedded Packaging Technology[END_REF] show that little improvements are to be expected from the magnetic materials in the foreseeable future. Most of the gain should come from a better use of the existing materials. This includes techniques such as the embedding of solid cores, as depicted in Fig. 3d [29], [START_REF] Chen | Design considerations for passive substrate with ferrite materials embedded in printed circuit board (PCB)[END_REF], [START_REF] Sun | Two Comparison-Alternative High Temperature PCB-Embedded Transformer Designs for a 2 W Gate Driver Power Supply[END_REF], which may be difficult to extend to higher power levels (i.e. larger cores), because solid cores (ferrite, iron powder, etc.) are brittle, and yet must endure the high laminating pressure (2 MPa) experienced during PCB manufacturing. More compliant materials were also investigated, such as organic pastes with a ferrite load [START_REF] Bang | Ni-Zn ferrite screen printed power inductors for compact dc-dc power converter applications[END_REF], direct embedding of ferrite powder [START_REF] Caillaud | High power PCB-embedded inductors based on ferrite powder[END_REF] (Fig. 3f), use of Low Temperature Cofired Ceramic materials [START_REF] Ji | High-Frequency High Power Density 3-D Integrated Gallium-Nitride-Based Point of Load Module Design[END_REF], [START_REF] Zhang | High-density integration of high-frequency high-current point-of-load (POL) modules with planar inductors[END_REF], or use of thin-layers (tens of microns) of permalloys or amorphous materials [START_REF] Marxgut | Multiobjective optimization of ultraflat magnetic components with PCB-integrated core[END_REF]. Their performances tend to be lower than those of solid cores, but they may be more attractive for manufacturing. Even for solid cores, copper losses were found to increase much faster with frequency for embedded inductors than for standard, wirewound inductors [START_REF] Caillaud | Design, manufacturing and characterization of printed circuit board embedded inductors for power applications[END_REF].

C. Embedding of Inserted Components

For power electronics, multi-layers capacitors are usually required. While it is possible to stack many dielectric layers during PCB fabrication, this is unpractical as it requires patterning (etching) of as many copper layers to form the electrodes of the capacitors. At the moment, the most practical solution is to embed surface-mount components [START_REF] Goldman | [END_REF], as depicted in Fig 1b .  Such components must sustain the lamination temperature (in the order of 200 • C over 1 h) and usually integrate many layers of ceramic dielectrics with high permittivity (such as BaTiO 3 , this time without any organic binder), so they offer capacitance densities of more than 10 µF cm -2 . They are, however, quite sensitive to mechanical stresses. This was investigated during the FP7 project Hermes [START_REF] Ostmann | Power modules with embedded components[END_REF], but only for very small capacitors (1x0.5 mm 2 ) [START_REF] Brizoux | Industrial PCB development using embedded passive & active discrete chips focused on process and DfR1[END_REF], which are much smaller than required for most power converters.

To embed multilayer capacitors (as well as for any other surface-mount component such as IC, resistor, etc.), they are assembled to a patterned board (using, gluing, soldering, or any standard attachment method), and cavities are machined in the prepreg sheets which are to be stacked on top [START_REF] Hofmann | Practical experience manufacturing PCBs with embedded active and passive devices[END_REF]. This allows for a reduction in the pressure experienced by the embedded components during lamination, but requires a careful evaluation of the cavity size and of the amount of resin to provide for proper filling. As standard attachment methods are used, virtually any component can be embedded.

D. Thermal management of Embedded components

Standard PCB materials have poor thermal conductivity (around 1 W m -1 K -1 [START_REF] Randoll | Characteristics and aging of PCB embedded power electronics[END_REF]). Alumina-loaded materials can achieve up to 5 W m -1 K -1 [START_REF] Randoll | Characteristics and aging of PCB embedded power electronics[END_REF], but they are sensitive to the growth of conductive anode filaments, which may cause short circuits [START_REF] Randoll | Lifetime and manufacturability of integrated power electronics[END_REF]. Thicker copper conductors can provide better heat spreading [START_REF] Stahr | Thermal benchmark of a classic and novel embedded high-power 3-phase inverter bridge[END_REF] and increase the current carrying capability of the PCB (Fig. 3g). The thermal inertia very close to the die is very important for short-circuit robustness [START_REF] Tinschert | Improving the short circuit ruggedness of IGBTs[END_REF]; PCB-embedding potentially allows adding a comparatively high mass of copper on both sides of the die.

While copper vias can be used to achieve a thermal conductivity in the z-axis which is comparable to that of bulk copper [START_REF] Regnat | Silicon carbide power chip on chip module based on embedded die technology with paralleled dies[END_REF], [START_REF] Lefevre | Thermal management of a low-cost 2kW solar inverter[END_REF], this is not so true in the x-and y-directions. Anisotropic materials such as pyrolitic graphite sheets can be used to increase this in-plane conductivity to values as high as 1700 W m -1 K -1 [START_REF] Zweben | Thermal Materials Solve Power Electronics Challenges[END_REF]. A more radical approach to thermal management is to embed dual-phase cooling systems such as heatpipes [START_REF] Wits | Flat miniature heat pipes in printed circuit boards[END_REF] (Fig. 4a), [START_REF] De Sousa | Enhanced in-plane heat transport in embedded mini heat pipes PCB[END_REF], [START_REF] De Sousa | Enhanced heat transport in printed circuit boards via passive components embedding[END_REF] (Fig. 4b) or vapour chambers (also known as thermal ground planes, Fig. 4c) [START_REF] Liew | Flexible thermal ground planes fabricated with printed circuit board technology[END_REF]. Both are closed systems which rely on the phase change of a fluid to overcome the intrinsic limits of heat conduction through solids. They also may be more mechanically compliant than a solid lump of metal.

Finally, the thermal interface material (TIM), which thermally couples the PCB to a heat-sink, is typically the weakest link in the thermal path. Some electrical insulation is typically required in power electronics applications, and most electrical insulators are poor thermal conductors. PCB-specific solutions include the use of FR4 prepreg or transfer adhesive to attach an aluminum plate to the PCB [START_REF] Heinz | Heat management of circuit boards[END_REF]. Another alternative to standard soft TIM is to use a gel TIM located in a cavity of the PCB [START_REF] Degrenne | A low-cost and high-performance thermal interface assembly between printed circuit board and heat-sink[END_REF].

E. Reliability tests

As the embedding of power devices is still in its infancy, the focus is still more on technology development than on reliability testing. For smaller components (as used in microelectronics), the technology is more advanced, and research groups have already implemented design rules based on reliability data [START_REF] Brizoux | Industrial PCB development using embedded passive & active discrete chips focused on process and DfR1[END_REF], [START_REF] Brizoux | Development of a Design & Manufacturing Environment for Reliable and Cost-Effective PCB Embedding Technology[END_REF].

As power devices tend to be used at higher temperatures (T j =175 • C or more, either because of harsh environmental conditions, or because of their power density), the temperature capability of the PCB material itself must be investigated. Several studies demonstrated that some materials (such as hydrocarbon-ceramic materials) can survive more than 10 000 h at 250 • C, providing they are properly protected form oxidation [START_REF] Shaddock | Reliability of high temperature laminates[END_REF]. Although they do not offer the best temperature capability, even the standard epoxy-based materials (FR4) can sustain 190 • C over more than 1000 h [START_REF] Avino-Salvado | Evaluation of printed-circuit boards materials for high temperature operation[END_REF], providing they are protected from oxygen.

Thermal cycling is also a matter of concern, as standard PCB materials tend to have a high Coefficient of Thermal Expansion -CTE -(more than 40 ppm/K in the z-direction [START_REF] Panasonic | R-1755v laminage specification sheet[END_REF], and even 240 ppm/K above the glass-transition temperature). Fibers (glass, aramid. . . ) are added to form composites with a much more limited CTE in the x and y axes (13-15, [START_REF] Panasonic | R-1755v laminage specification sheet[END_REF]), but it remains higher than the CTE of Si or SiC dies (3-4 ppm/K) or ceramic capacitors (10-15 ppm/K [START_REF] Franklin | High capacitance stacked multi-layer ceramic capacitors for power supplies[END_REF]). However, for dies embedded in available low-CTE materials, it has been demonstrated [START_REF] Randoll | Lifetime and manufacturability of integrated power electronics[END_REF], [START_REF] Randoll | Characteristics and aging of PCB embedded power electronics[END_REF] that it is possible to achieve a reliability on par with that of standard power modules. With the same sort of low-CTE materials [START_REF] Perrin | 2 MHz highdensity integrated power supply for gate driver in high-temperature applications[END_REF] showed than an embedded magnetic core could sustain more than 1000 -50/+200 • C cycles while an identical core embedded in standard FR-4 material was broken after 150 cycles. The robustness of more complex structures to thermal cycling is still to be assessed, as large elements can be embedded in the PCB of a power converter (copper layers of several millimeter in thickness, larger magnetic cores, etc.)

F. Conclusions on the Technology Review

PCB embedding is a rapidly developing technology. Solutions have been proposed for the embedding of dies, passives, thermal management systems, with very good performances. At this stage, there are no obvious "showstopper" which could prevent further progress. There are, however, many challenges still to be addressed, such as (in no particular order):

• Development of devices for embedding: dies with suitable finish, specific packages for ICs, compatible passives. . .

• Management of many components with multiple form factors or shapes: there is a risk we might end-up replacing air with PCB material instead of producing more compact converters.

• Rational use of embedding: an optimal circuit probably uses both the volume (embedding) and the surfaces of the PCB. At the moment, there is no clear definition of which components should be embedded and which should remain on the surface.

• Use of the overall form factor: PCB embedding tends to produce flat circuits (a few millimeters thick, and several centimeters wide), which are not always practical.

Stacking of several PCBs or producing thicker PCBs are possible workarounds, but they come with their own drawbacks (complexity of the interconnects, thermal management, complex manufacturing process. . . ). Many of these issues must be addressed at the design level, which is the subject of the next section.

III. TOWARDS AN INTEGRATED DESIGN ENVIRONMENT

A 2015 contest, organised by Google and the IEEE (the "Little Box Challenge", with a 1 M$ prize) demonstrated that advanced converters could achieve at the same time a very high efficiency (>95% in a 2 kW photo-voltaic application) and a very high power density (up to 12 kW L -1 , 10 times that of commercial units) [START_REF] Bortis | ηρ-Pareto Optimization and Comparative Evaluation of Inverter Concepts considered for the GOOGLE Little Box Challenge[END_REF]. A detailed analysis of this contest [START_REF] Kolar | Approaches to overcome the Google/IEEE Little Box Challenges[END_REF] highlighted two main scientific challenges: advanced integration technologies for active and passive devices, and efficient, computer-based design techniques. As discussed above, PCB embedding is an attractive candidate regarding the advanced integration technology. This is, however, not so clear for the computer-based design techniques. This section proposes a new design approach which relies on PCB embedding.

A. Current Design Methods in Power Electronics

Power electronics is intrinsically a complex topic (see Fig. 5): the design of a converter involves several physical domains (electrical, thermal, mechanical), and is based on heterogeneous materials and hardware [START_REF] Kerachev | A new step towards the power electronics design automation[END_REF] (as opposed to the monolithic silicon integration encountered in microelectronics). This is a real challenge, as most computer-based Fig. 5: (a) Overview of the design workflow of a power electronic converter: a pre-design (circuit topology, selection of the main components) is derived from the specifications of the converter. Then, using the available component models, more accurate simulations are run, including the effect of the parasitic elements or thermal analyses. This process is iterated several times until the converter offers satisfying performance ("implementation loop"), with frequent validation with the manufacturers to ensure all the parts of the converter can actually be produced. Eventually, the design is sent to manufacturing, and tested. (b) example of a an assembly process (kilowatt-range): a custom PCB is manufactured, and populated with COTS (Components-Off-The-Shelf) as well as custom components (typically the power inductors or transformers); the power semiconductors are usually pre-packaged in power modules (although they could be supplied as discrete components); PCB(s) and power module(s) are then assembled and secured to a heatsink and a custom housing to form the final converter, in a largely manual process.

modelling tools only address one physical domain, or one technology.

In recent years, several research groups have proposed "design workflows", where various pieces of software are linked together to simulate the behaviour of a "virtual prototype". Some use a mix of Finite-Element Modelling (FEM) software and circuit simulators, to analyse the electrical and thermal behaviour of a structure [START_REF] Boroyevich | IPEM-based power electronics system integration[END_REF], and even to integrate the thermomechanical stresses arising from thermal cycling [START_REF] Solomalala | Multi-domain simulation platform for virtual prototyping of integrated power systems[END_REF]. As FEM is computationally intensive, other groups developed model reduction techniques to produce lighter models [START_REF] Biela | Towards Virtual Prototyping and Comprehensive Multi-Objective Optimisation in Power Electronics[END_REF], [START_REF] Evans | Automated fast extraction of compact thermal models for power electronic modules[END_REF]. These models can then be used in an automated process to design a converter with optimised performance (efficiency, power density. . . ) [START_REF] Kolar | Performance trends and limitations of power electronic systems[END_REF]- [START_REF] Caillaud | Comparison of planar and toroidal PCB integrated inductors for a multi-cellular 3.3 kW PFC[END_REF].

A common issue with computer simulation is the lack of suitable models [START_REF] Cottet | Industry perspective on multi domain ssimulation and virtual prototyping[END_REF]: the description languages for circuit models are incompatible with each other (SPICE, MAST, VHDL-AMS. . . ). Even implementations of the same description language differ largely from one simulator to another. Regarding FEM models, they require many parameters [START_REF] Pietranico | Thermal fatigue and failure of electronic power device substrates[END_REF] which are either not available (e.g. internal layout or composition of a power module), or very specific: in [START_REF] Ben Kabaar | Characterization of materials and their interfaces in a direct bonded copper substrate for power electronics applications[END_REF], we showed that mechanical simulations not only required the information regarding the shape and composition of a layer, but also about its manufacturing process (in this case the properties of the layer were affected by annealing).

Overall, because of the lack of integrated design tools, and because power electronic systems rely on many differ-ent manufacturing processes (for the various components, the interconnections, the thermal management, etc.), most design processes include many iterations (several hardware prototypes), for which computer simulation is used more for analysis than for design [START_REF] Ericsen | PEBB -power electronics building blocks from concept to reality[END_REF]. This is very different from the microelectronics world, where the design flow relies on software suites which integrate the manufacturing constraints and all the required models through "Design Toolkits". This "Design For Manufacturing" approach ensures that the designed circuit can be manufactured, and that the manufactured circuit behaves as expected.

B. Proposed Design Approach

In microelectronics, designers use an Electronic Design Automation (EDA) software suite, which allows them to design their circuit, simulate it, implement it ("generate the masks") and perform all sorts of validations and checks during the process. The manufacturing technology (whether it is 14 nm CMOS from foundry X or 0.35 µm BCD from foundry Y) is considered from the beginning of the design process, by using design toolkits, which contain libraries of elementary cells (simple gate or more advanced functions), with all the data to simulate or route them. Libraries also implement design rules related to the technology, to enable design validation. Advanced simulation tools allow not only to simulate the circuit, but also to extract the parasitic elements (capacitances, crosstalk, etc.) or to perform a thermal analysis.

Basically, a single person can design a new integrated circuit entirely on a single computer, and generate manufacturing files which are directly used at the foundry. This "design toolkit" approach is not new: in 1980, Mead and Conway [START_REF] Mead | Introduction to VLSI systems[END_REF] introduced a set of design rules for the design of Integrated Circuits (ICs). In particular, they proposed to express all dimensions of a transistor as a multiple of a single value (which would become the "node size", the main metric in the Moore law). Compared to the manual design used at this time, this simple approach removed a lot of flexibility. But it made it possible to use computer in the design phase, to manage the increasing complexity of IC design, triggering what is known as the "VLSI revolution" (Very-Large-Scale Integration).

An approach inspired by the EDA processes was initiated, with the "Power Electronics Design Automation" (PEDA) [START_REF] Kerachev | A new step towards the power electronics design automation[END_REF]. It is based on standard PCB technology (i.e. without embedding). A library of circuits (actually low-power, isolated DC-DC converters) is used to design converters with larger power/voltage/current ratings by combining those in the library in series and parallel. Many tasks are automated (such as code generation for the controller, or routing of the layout).

PCB embedding is a consistent manufacturing solution, with batch processes which are much like the wafer-level manufacturing encountered in microelectronics; the geometry of the layout is perfectly controlled (all components are mounted on a single rigid board), so they can be modelled and analyzed; powerful PCB design tools, with some simulation and validation capabilities are available. PCB embedding is therefore a particularly attractive candidate to extend the 5a, a library with consistent models is supplied upfront (made possible by the use of a single, well controlled manufacturing technology). This allows for automatic model generation (extraction of parasitics, generation of compact thermal models. . . , as well as automatic validation against the design rules. As it is largely automated and autonomous, the implementation loop can be run rapidly, resulting in an optimized design, which can directly be sent to manufacturing, without additional validation step. (b) corresponding assembly process, also simplified, as all the customization now takes place during the manufacturing of the PCB (which, in this ideal case, also provides the housing). Several levels of intermediate packaging are thus removed (power modules, bobbin for the magnetic components, etc. microelectronics EDA approach to power electronics, in what we call the Power Electronics Embedding Design Automation (PEEDA).

The expected benefits of PEEDA are many: there is, of course, the ambition to move to full "virtual prototyping", to reduce design time and cost. But other outcomes might be of comparable if not greater interest: the "fabless" approach, where many companies can focus on design with little investment upfront, while manufacturers focus on technology optimization; the shared runs (similar to the multi-project wafers), where many designs which use the same technology are assembled on a single PCB panel to share the tooling costs; the simplification of qualification tests (as the same technology is reused many times, not all the qualification tests have to be repeated for every product). Finally, the scalability of the PCB process allows an identical product to be made as a few units or as millions.

C. Getting There

While there are clear benefits to using PEEDA, and although it is based on the tremendous PCB ecosystem, it still requires a lot of development work.

• Definition of the design flow: many software tools are available, including PCB design, parasitic extraction, thermal analysis, etc. But their inter-operation is still limited, involving a lot of manual work to move back and forth. Device models are often incompatible, and many simulators cannot handle the complexity of a power electronic converter circuit (with time constants ranging from sub-nanosecond to seconds or minutes, complex inductive and capacitive coupling, etc.). Simplified models are a possible solution to address this complexity, but in any case, they must be generated automatically.

• Definition of the design rules: this includes some rules aimed at manufacturability or reliability, which must be validated experimentally (this is especially true for large embedded passive devices, for which little is known regarding reliability). Again, these design rules must be in a form which allows automatic validation. These design rules could also include the definition of the technology itself (for example the definition of standard PCB stackups, e.g. a given number of layers) to enable the "multiproject" panels presented above.

• Development of embedded power devices: many power components are not available yet in embedded form (larger passive components, sensors, etc.). Even the power semiconductors, which focus most of the work on embedded devices, are still very difficult to procure with suitable finish. There is still considerable work to be undertaken to develop the embedding technology. Another aspect should not be underestimated: the impact of devices embedding on the existing PCB supply chain. Indeed, embedding requires handling components (including bare dies) in PCB factories, something which is not common nowadays. Device embedding also has a very strong impact on the "value" chain: as known good devices are embedded in a PCB, and rework is not possible, any process failure is much more expensive. Production yields of 99 % [START_REF] Brizoux | Development of a Design & Manufacturing Environment for Reliable and Cost-Effective PCB Embedding Technology[END_REF] or even 99.7% [START_REF] Goldman | [END_REF] are required for such technology to be of any interest.

IV. CONCLUSION

PCB embedding is a very active topic, especially on the technological front, with many research teams involved. Very good performances have been demonstrated regarding size reduction, improved switching performance, thermal performance, or even reliability.

While the development of the technology is still ongoing, and there is still much to be made, we think some effort should now be focused on the design process. Indeed, PCB embedding has the potential to enable the "VLSI revolution" of power electronics, providing suitable design tools are available. Much like with the integrated circuits, this will require trading some flexibility for manufacturing process optimization and design automation.

A "design toolkit" approach is proposed, inspired by microelectronics. This toolkit fully describes the manufacturing technology to guide the designer and enable automatic validation. This "design for manufacturing" approach should ensure seamless transfer from design files to a manufactured product.

The expected outcomes of such approach include shorter development cycles, flexible design ("bespoke converters"), shorter qualification procedures, and lower initial investment ("fabless" approach).

Fig. 1 :

 1 Fig. 1: (a) Standard PCB with devices mounted on its surface; (b) the same devices embedded in the PCB.

Fig. 4 :

 4 Fig.4: Dual-phase passive cooling systems using PCB technology: (a) a heatpipe formed by a cavity in a PCB[START_REF] Wits | Flat miniature heat pipes in printed circuit boards[END_REF]; (b) a 2 mm diameter tubular heatpipe inserted in a PCB (cross section view)[START_REF] De Sousa | Enhanced in-plane heat transport in embedded mini heat pipes PCB[END_REF]; (c) a thermal ground plane (vapor chamber) which can be inserted in a PCB stack-up.

  standard parts (housing, heatsink...) (b)

Fig. 6 :

 6 Fig. 6: (a) Proposed design workflow based on PCB embedding: compared to Fig.5a, a library with consistent models is supplied upfront (made possible by the use of a single, well controlled manufacturing technology). This allows for automatic model generation (extraction of parasitics, generation of compact thermal models. . . , as well as automatic validation against the design rules. As it is largely automated and autonomous, the implementation loop can be run rapidly, resulting in an optimized design, which can directly be sent to manufacturing, without additional validation step. (b) corresponding assembly process, also simplified, as all the customization now takes place during the manufacturing of the PCB (which, in this ideal case, also provides the housing). Several levels of intermediate packaging are thus removed (power modules, bobbin for the magnetic components, etc.

ACKNOWLEDGMENT

The authors would like to thank Mr. Jean-Christophe CR ÉBIER and Yves LEMBEYE, from G2ELab for their fruitful discussions.


Johan Le Leslé
email: j.lelesle@fr.merce.mee.com

Florent Morel
email: florent.morel@ec-lyon.fr

Cyril Buttay
email: cyril.buttay@insa-lyon.fr

Christian Vollaire
email: christian.vollaire@ec-lyon.fr

Optimisation of an Integrated Bidirectional Interleaved Single-Phase Power Factor Corrector

This paper presents a design methodology for a full-bridge interleaved bidirectional Power Factor Corrector (PFC) converter. It applies to converters with off-the-shelf components and/or PCB-integrated passive and active components. The procedure is implemented after selection of the topology and the modulation principle. The procedure includes a selection of semiconductor based on losses calculation, EMI filter design including the impact of cell shading and inductor design. The lowest volume is found with Zero Voltage Switching (ZVS) along a complete grid period in Continuous Current Mode (CCM) at fixed switching frequency. This is usually obtained with variable switching frequency such as Discontinuous Current Mode (DCM) or Triangular Current Mode (TCM). Moreover, the paper shows that interleaving enhances efficiency and power density by sharing losses and reducing EMI filter size. A pareto front in the efficiency (η) vs power density (ρ) domain is derived to define the final result.

Introduction

The main requirements of next generation converters are high efficiency, high power density, high reliability and low-cost [START_REF] Lefevre | A cost-controlled, 4.3kW/l 1-Φ Inverter with a 97.2% CEC efficiency[END_REF]. The development of wide-band gap (WBG) components such as Silicon Carbide (SiC) or Gallium Nitride (GaN) allows the switching frequency to be increased leading to denser converters [START_REF] Ji | High-frequency high power density 3-D integrated gallium-nitride-based point of load module design[END_REF]. To fully take advantage of WBG devices and increase the porwer density the PCB integration of dies and/or passives is seen as a promising and low-cost approach [3] [4]. Integration allows parasitic elements to be reduced leading to smaller EMI filter [START_REF] Wyss | Analysis of PCB embedded power semiconductors for a 30 kW boost PFC converter[END_REF]. The paper addresses these two. This paper focuses on the optimisation procedure. This research topic is challenging because power converter design is driven by multiple objectives which require trade-offs. Optimisation procedure improves the converter performances [6][7]. As an example to the presented methodology, the paper proposes the optimisation of a highly integrated 3.3 kW bidirectional AC/DC converter with the main specifications listed in Tab.1.

Power Factor Corrector are commonly used in grid connected applications such as solar inverter or electrical vehicle on-board battery charger. PFCs ensure the compliance with harmonic standards by shaping the grid current according to the grid voltage.

I P F C L 1 I L1 L N I LN C O Load Q1 1 Q1 N Q3 1 Q3 N Q2 1 Q4 1 Q2 N Q4 N V DC Cell n o 1 Cell n o N
Fig. 1: Topology of the interleaved PFC composed of N High Frequency (HF) legs (odd numbers) and N Low Frequency (LF) legs (even numbers) . The combination of one LF and one HF leg with the associated inductor represents an elementary cell in the global converter.

The selected topology (full-bridge interleaved converter) is presented in Fig. 1. The proposed cell association principle permits a modular converter design. The converter is controlled by an unipolar PWM modulation which means one leg is controlled at high frequency while the second one is controlled at the grid frequency. This type of modulation has several advantages such as the reduction of switching losses and the reduction of the input inductor requirements, compared to bipolar PWM [START_REF] Jiang | Topology of a Bidirectional Converter for Energy Interaction between Electric Vehicles and the Grid[END_REF]. The converter also operates in Continuous Current Mode (CCM). The modular approach is particularly interesting for light load operations, indeed the cell shading improves the efficiency at low power by deactivating one or more cells, as it will be highlighted below with Fig 7.b. The proposed design procedure allows high efficiency/high power density converter to be designed. In this case, advantages of variable frequency control are obtained with fixed frequency control, simplifying the implementation.

This paper is composed of three main parts, the first one deals with the optimisation procedure, which is composed of three main sections. The second part presents the optimisation results. Then, the last part provides a conclusion of this work and presents some perspectives.

Optimisation Methodology

Hereafter, the optimisation procedure is introduced and illustrated with Fig. 2. As it is indicated in the flowchart, three main optimisation variables are used: the switching frequency (f SW = [140 kHz; 260 kHz), the current ripple (ΔI = [2 A; 12 A]), the number of EMI filter stages (Nf =[2; 4]) and the number of interleaved cells (N = [2; 5]). Three main parts compose the procedure, the semiconductor selection, the EMI filter design and the inductor design used for the input inductor and the EMI filter part. First of all, waveforms are analytically calculated for a set of variables. These waveforms, e.g. input current, inductor current and switch current, are used to select the semiconductor, design the inductors and the EMI filter. The selection of the semiconductor is done based on a database including SiC bare dies, the estimated volume of the gate driver (Bootstrap type) is also added. The EMI filter design considers multi-stage filters which is congruent with the integration objective, as multiple stage filters allows high attenuation capabilities with low volume [START_REF] Heldwein | Design of Minimum Volume EMC Input Filters for an Ultra Compact Three-Phase PWM Rectifier[END_REF]. Losses from each parts are used to determine the volume of thermal management. Natural convection is selected for low-cost and high reliability reasons. The thermal coefficient of 5 cm 3 /W is determined after analytical and FEM calculation to match the specifications. The maximal ambient temperature is 60°C and the maximal device temperature is defined as 125°C. The selection of the final converter is done including the thermal management as it generally represents an important part of the overall volume.

Semiconductors

PCB dies embedding was assumed to simulate a high level of integration. The main drawback of this is the limited choice of references. Hence, only SiC bare dies from Wolfspeed are considered. The database is composed of 900V and 1200V SiC MOSFETs. All parameters required to calculate losses are picked from datasheets. Losses is the main criteria for this part as the volume of the dies can be neglected compared to the heat sink volume induced by losses, even if the gate driver volume is added. Conduction losses are basically determined with the RMS value of switch current and the on-state resistance at 150°C, as this value is more representative for high density naturally cooled power converter. Even with WBG devices switching losses may represent a large part of losses at high switching frequency. A simple and fast model using datasheet parameters has been developed to quickly compare the different devices to each other. This model includes : commutation times (rise time tr, fall time tf) output capacitor (Coss) and the body diode's reverse recovery charge (Qrr). It is important to note that reverse recovery charge can generate

V DC I D1 I D2 0 t tr tf V SW (t) I SW (t) V DC .I D1 V DC .I D2 0 t tr tf Esw ON Esw OF F P SW (t)
Fig. 3: Simplified commutation waveforms. IDx corresponds to the switched current which depends on the switching instant on the grid period. VDC corresponds to the DC bus voltage value. high losses, in particular if SiC Schottky diodes are not used in parallel of MOSFETs. Hence, synchronous rectification is assumed to limit the impact of the body diode [START_REF] Yin | Comparison of SiC Voltage Source Inverters Using Synchronous Rectification and Freewheeling Diode[END_REF]. Switching energies are calculated with equations (1) and (2) which are derived from the Fig. 3, representing simplified commutation waveforms.

Esw ON x = 1 2 •V DC •I Dx •tr + 1 2 •Coss•V 2 DC +Qrr •V DC (1)
Esw OF F x = 1 2 • V DC • I Dx • tf (2)
The selected topology allows soft switching to be achieved for at least one of the switch in the HF legs, while switching losses are neglected in the LF leg. Details about ZVS and necessary conditions for the selected topology are presented in [START_REF] Le Leslé | Multi-objective Optimisation of a Bidirectional Single-Phase Grid Connected AC / DC Converter ( PFC ) with Two Different Modulation Principles[END_REF].

Inductors

Two types of inductor are investigated, planar inductors are used for discrete converter design and PCB embedded inductors for integrated converter. Typical current waveforms in PFC and/or inverter applications are composed of two different frequency components.

The low frequency and the high frequency components correspond to the grid frequency and the switching frequency, respectively. Both components impact copper and core losses.

Copper losses can be separated, on one side there is DC losses mainly induced by the current at the grid frequency (50 Hz), and on the other side the HF losses caused by the HF component (f sw ).

The equivalent resistor depends on skin effect and proximity effect. The equivalent high frequency resistor value is determined with 3D FEM simulation. Core losses are also impacted by these two components.

The low frequency induction generates one part of losses and the high frequency induction the second one. Each parts correspond to the major loop and the minor loop, respectively. Minor loops are moving along the main low frequency induction, hence additional losses are generated. Fig. 4 presents major and minor loops and illustrates the phenomenon. More details about this method which uses the improved Generalised Steinmetz Equation (iGSE) and its implementation are presented in [START_REF] Caillaud | Comparison of planar and Toroidal PCB integrated inductors for a multi-cellular 3.3 kW PFC[END_REF]. The design methodology is used for the input inductor (L PFC ) and for differential mode (DM) filter inductors.

EMI filter

The trade-off efficiency vs power density is realised for nominal power operation, but the converter has to be compliant with the EN55011 standard for the complete range of power (330W to 3.3kW). Contrary to quasi constant efficiency (Fig. 7.b) the cell shading impacts in the wrong way the design of the EMI filter.

The worst case concerning EMI perturbations is considered for the EMI filter design. The most constraining case corresponds to an operation mode using the minimal number of interleaved cells, selected equal to two, because N = 1 does not leads to a significant increase of the efficiency at low power. For a converter operating at fixed switching frequency, the lower the number of interleaved cells the higher the current ripple and the lower the apparent frequency, thus the bigger the EMI filter (Fig. 5). Details about the DM filter design methodology are presented in [START_REF] Le Leslé | Multi-objective Optimisation of a Bidirectional Single-Phase Grid Connected AC / DC Converter ( PFC ) with Two Different Modulation Principles[END_REF].

Common mode (CM) perturbations are also impacted by the cell shading, therefore the CM filter is designed for the worst case too. From Fig. 6 CM model is derived and used to determine the CM filter in a similar way as DM filter. Firstly the maximal capacitor (Y2 Type Ceramic) value is determined according to maximal earth current (3.5 mA). The global capacitor is then shared according to the number of CM filter stages. Note that the capacitor close to the converter is higher than the capacitor at the grid side to favour a short pass for CM current (equations ( 3) and ( 4)).

C CM tot ≤ 3.5 • 10 -3 260 • 2π • 50 = 43 nF (3)
K = 1 2 • N f • (N f + 1) → C CM min = C CM tot K (4)
Knowing the required attenuation, the dimensioning frequency and the different capacitor values it is possible to determine the value of the CM choke, which is the same for each filter stage, as it is presented with [START_REF] Wyss | Analysis of PCB embedded power semiconductors for a 30 kW boost PFC converter[END_REF].

L CM = 1 2 • N f Att req (2π • f D ) 2N f • C CM i (5)
With the required inductance, several solutions are tested depending of core and copper section. Nanocrystaline core are selected because of their high permeability, it is thus possible to reach high inductance with a reduced number of turns, which makes this technology very suitable for CM chokes. Losses generated by the CM chokes are calculated with the current flowing through windings. Natural convection is considered for CM chokes (no contact with the heat sink).

The maximal temperature increase for chokes is limited to 40°C, every solution with higher temperature increase are eliminated. Finally, the procedure of EMI filter returns several combinations of DM and CM filter with their respective volumes and losses.

In our case the impact of the cell shading induces an EMI filter 2.75 times higher than the EMI filter designed at nominal load using all the cells.

Results

The selected converter corresponds to the highest power density with a minimum efficiency of 98% at nominal power. Fig. 7a) presents the results of the procedure and highlights the impact of the number of interleaved cells. The selected converter corresponds to four interleaved cells (N = 4) achieving 98 % efficiency and 5.4 kW/L power density with a Fig. 8: PFC and inductor current waveforms for the selected converter, represented at the grid frequency with a zoom to see waveforms at the switching frequency. Note the inductor current ripple is large, this ensures that the inductor current change its sign during each switching period. Hence, both HF switches achieve ZVS along the complete grid period. Fig. 9: Discrete converter prototype composed of four switching cells and input EMI filter. Dimensions are 33.6cm x 20.5cm. Heat sink is oversized natural convection thermal management. Fig. 7b) presents the calculated efficiency of the selected converter according to the number of active cells. Thus it is possible to determine the optimal number of active cells according to the power range. Current waveforms for the selected converter are presented in Fig. 8. At first sight it seems to be counter-intuitive to tolerate such high current ripple in converter (16 A in this case). Commonly, high current ripple means high losses and substantial effort on EMI management. Nevertheless, the result highlights that high current allows semiconductor losses to be reduced because of ZVS is achieved for each HF switch along the complete grid period. Usually, to Tab. 2: Details about the selected converter. Note that the volume and losses presented for L PFC correspond to the four inductors. however the control of these types of modulation is more complicated due to the variable switching frequency. Moreover the DCM does not achieve ZVS for all commutations [START_REF] Marxgut | Ultraflat interleaved triangular current mode (TCM) single-phase PFC rectifier[END_REF]. Interleaving technique allows conduction losses to be shared between the four cells. EMI perturbation can also be managed quite easily with interleaving [START_REF] Kasper | Scaling and balancing of multi-cell converters[END_REF], even if the EMI filter is design for the worst case as explained in section 2.3. The efficiency and power density can be widely improved by the proposed configuration obtained with the procedure. Details about the selected converter are presented in Tab.2. The integrated prototype will be used to get a feedback for the design procedure, such as volumes, losses and parasitic elements especially common mode capacitors.

In parallel to the manufacturing of the integrated converter, a first prototype using off-the-shelf components (7L D2PAK 900V/35A SiC MOSFET) and planar inductors was designed to validate control schemes. This discrete prototype is built with only one board to simplify debugging and measurements. The estimated power density is 1.37 kW/L including input filter, switching cells, measurement circuit and thermal management. An important point which can be noticed with off-the-shelf components is the additional volume induced by interconnection. For example, the volume of power semiconductor with the associated gate driver is twice higher than the sum of discrete volumes. This prototype is used to develop the control.

Low voltage and low power tests were performed and validated the interleaving implementation. Further investigations are in progress. Efficiency measurements and EMI compliance will be tested.

Conclusion

This paper presents a design methodology for a 3.3 kW highly integrated AC/DC converter. This work highlights the fact that high efficiency and high power density can be achieved with the well-known CCM modulation. This main result is based on a particular association of interleaving technique and high current ripple. This association allows ZVS to be achieved along the complete grid period. Hence, the selected converter reaches an estimated efficiency of 98 % and a power density of 5.4 kW/L even with natural convection thermal management. The selected topology associated to the optimisation procedure permits to propose an uncommon converter configuration with a particular operation mode. A discrete version of the converter was built for upstream design and validation. The integrated version of the converter is in the manufacturing chain. Experimental results will then be compared to the predicted results and to the discrete version.

The feedback will permits to improve the optimisation procedure.

Tab. 1 :

 1 Specifications of the considered Converter V IN RMS (AC)

  Fig.2: Design Flow Chart representing the optimisation procedure which involves several inner optimisations for inductor, semiconductors and EMI filters for the worst operation case.

Fig. 4 :

 4 Fig. 4: Typical Hysteresis loop in PFC's inductors. The global hysteresis loop is composed of major and minor loops.

Fig. 5 :Fig. 6 :

 56 Fig.5: Impact of cell shading on the input current spectrum for high frequency components

Fig. 7 :

 7 Fig. 7: Results of the optimisation procedure. a) Pareto front obtained at the end of the procedure, the figure presents the impacts of the number of interleaved cells b) Calculated efficiency curves of the selected converter according to the number of operational cells, the selected converter achieves 98 % (at 3.3kW) efficiency and 5.4 kW/L.