P Amato

N Cesario

M Di Meglio

F Pirozzi Stmicroelectronics

Realization of a Virtual Lambda Sensor on a Fixed Precision System

The aim of this work is to study the implementation feasibility of a VLS (Virtual Lambda Sensor) by a TSK (Takagi, Sugeno, Kang) singleton FIS (Fuzzy Inference System). Such a sensor could be used in a model based EMS (Engine Management System) for trade gasoline engines. FIS design target is to obtain a system with a fixed data representation (i.e. 10 bit) and a limited number of inputs, outputs, rules and membership.

Introduction

In this work, we study the implementation feasibility of a Virtual Lambda Sensor (VLS) model by a TSK (Takagi, Sugeno, Kang) singleton FIS (Fuzzy Inference System). The VLS is a model able to forecast engine air-fuel ratio processing the cylinder pressure signal of the gasoline engine. In this work we study the implementation feasibility of an emulator of the trade on-off Lambda sensor and of an emulator of the trade linear Lambda sensor. The attribute on-off suggests us that the Lambda sensor determines only whether Lambda ratio is up or down the stoichiometric condition.

The target of our analysis is to develop the best solution, that is the best model of VLS, according to restrictive operating constraints. All data and FIS parameters must be transformed according to constraints on data representation (i.e. 10 bit parameter resolution). To validate the model we used both Matlab simulations with hardware real constraints and real-time experiments on a trade 125cc gasoline engine.

Virtual Lambda Sensor

In the last years, the engine manufacturers guideline is to achieve further reductions in the quantities of polluting gases emitted by the engine and a decrease in the engines fuel consumptions without vehicle characteristics, that are desirable to the driver, must be compromised. For these rea-sons, an efficient engine control and a comprehensive monitoring of the engine working parameters are required.

To maintain a strict control of the engines working parameters Engine Management Systems (EMS) are used. The EMS implements control strategies which achieve the optimum trade-off between several contradictory objectives. At the same time, in a spark-ignition engine, the EMS must bring the engine in an operating range in which the threeway catalytic converter can further reduce the harmful content of the exhaust gases. The EMS controls the amount of fuel injected in the engine combustion chamber (fuel pulse width), the point in the engine cycle the mixture air fuel is ignited (ignition timing) and other parameters in advanced engine designs, for example, the valve timings. The EMS determines values for these parameters from measured quantities such as speed, load torque, air mass flow rate, inletmanifold pressure, temperatures at various points and throttle angle.

EMS is essentially composed by three components: engine maps, controller and sensors, see figure 1.

In the figure 2 other sensors appear too. These additional devices are able to monitor if the engine is working according to the Systems Aims, such as fuel economy, high output power and low emissions. So, they have an active part in the real time update process of controlled variables and of engine maps. For instance, in a spark-ignition engine a sensor like this is the Lambda sensor. This device, mounted in the exhaust stream, determines whether the Lambda ratio (i.e. AF R/AF R s where AF R is the air/fuel ratio and the subscript s is for stoichiometric condition) is above or below unity from the amount of oxygen present. The EMS uses this information to adjust the fuel pulse width and/or the ignition timing to keep the Lambda ratio near to unity. In this value range of Lambda ratio, the three way catalytic converter, used in the current engines to reduce emissions levels to within legislative limits, "works in optimal conditions" (i.e. have the maximum percentage of conversion of exhaust toxic gases into less toxic products).

The last target of engine manufacturers is to achieve an enhanced engine control without additional sen- sory devices, that is without other costs. In these conditions, virtual-sensors techniques are much desirable. Virtual-sensors allow to estimate quantities of interest without real sensors dedicated to the measurements. In this field, intelligent system models, such as neural networks, fuzzy systems and neuro-fuzzy systems, are attractive because of their capabilities in pattern recognition and signal analysis problems [START_REF] Long | Virtual sensing: a neural-network-based intelligent performance and emissions prediction system for on-board diagnostics and engine control[END_REF].

Description of our Target FIS Constraints

We will consider a TSK singleton Fuzzy System, with some limiting constraints, as the target system to map our VLS. TSK is a fuzzy system proposed by T. Tagaki, M. Sugeno and G.T. Kang [START_REF] Takagi | Fuzzy identification of systems and its applications to modeling and control[END_REF][START_REF] Sugeno | Structure identification of fuzzy model[END_REF]. The output of each rule is a linear combination of input variables plus a constant term, and the final output is the weighted average of each rule's output. In this paradigm the rule set is made up of r rules having the following form:

Rule i: If x 1 (t) is M i1 , x 2 (t) is M i2 ,...., and x n (t) is M in , then y = w i0 + w i1 x 1 (t) + w i2 x 2 (t)+.....+w in x n (t)
. where x 1 , x 2 , ...., x n are the antecedent variables and y is the consequent variable. Moreover, M i1 , M i2 , ....., M in are fuzzy sets defined over the definition domains of x 1 , x 2 , ...., x n while w i0 , w i1 , ...., w in are constant coefficients which describe the linear relationship defined by the ith rule set, i = 1, ...., r. A T SK singleton is a fuzzy system in which the consequents are simply constants (crisp), w i0 with i = 1, ...., r. From a linguistic point of view, this means we have the following simplified if-then rules:

Rule i: If x 1 (t) is M i1 , x 2 (t) is M i2 ,...., and x n (t) is M in ,
then y = w i0 . For a sake of simplicity, we described TSK fuzzy systems with only one output but the system description can be merely extended to systems with vectorial outputs.

Our constraints are to use up to 256 if-then rules with up to 64 different serial inputs, 12 different outputs and 10 bit parameter resolution. TSK membership functions can be both triangular and trapezoidal. These constrains was suggested us by a neuro-fuzzy peripheral for MCU (micro controller unit) that STMicroelectronics has been developing.

Description of STMicroelectronics Laboratory Equipment

The experimental tests have had an important role in the Lambda prediction and in the definition of the Lambda control strategy. Particularly they helped us to find the parameters of the pressure cycle used by the soft computing Lambda prediction algorithms. Moreover they allowed us to set the soft computing algorithms and to test the whole Lambda control system (Lambda prediction + Lambda control). The experimental activity was performed on a 125cc engine equipped with an AVL pressure sensor mounted on the cylinder head and with a TAG linear oxygen sensor in the exhaust system.

The STMicroelectronic test bench is also equipped with:

• Asynchronous Dynamometer AVL APA 102 (Power 120 kW)

• Test Bed and Instrumentation Automation System AVL PUMA 5.6.2

• Fast Prototyping Control System dSPACE

• AVL Fuel Balance with Fuel Conditioner

• Indicating System AVL Indiset Advanced 631

• Air Flow Meter

• Exhaust Gas Analyzer AVL DIGas 4000

The injection and the ignition systems were controlled by the Fast Prototyping Control System dSPACE . The dSPACE system was set to work either in "map mode" (the engine is controlled using the engine maps) that in "manual mode" (for every engine condition it is possible to change in real time all the control parameters). The dSPACE system was also used to implement and to test in real time the new Lambda control strategies.

Data Analysis

Our VLS models were tested on a data set meausured by our laboratory on a real 125cc trade scooter engine. The choosing of the TSK model inputs from our data set (see figure 3) was based on the the pressure cycle signal processing according to several literature algorithms in which P ratio are used as pressure signal features in order to forecast Lambda values (i.e. P ratio is the pressure ratio defined by P (angle)/P (-angle) where angle is a fixed crank angle).

To make a pre-processing of the data set we used clustering analysis. We analyzed the clustering process between P ratio 40 (a possible input of the VLS model) and λ versus the number of the pressure cycle instantaneous values which we averaged on. Growing up this number, the correlation between P ratio 40 and λ highly grows. In the figure 4 we can see how this correlation corresponds to cluster spherical shape. In this case, clusters cover only a bounded range of variable domain such a way as a small input variation corresponds to a small output variation. The last condition is necessary in order to the model realization (i.e. building a mapping function) be a well-posed problem ([4], [START_REF] Tikhonov | On regularization of ill-posed problems[END_REF] and [START_REF] Tikhonov | Solution of Ill-posed Problems[END_REF]).

A more detailed description of used clustering analysis was in [START_REF] Meglio | Realization and performance analysis of m-dimensional data clustering algorithms[END_REF]. Using this approach we found that the optimal number of instantaneous input values, to average on, is 16. We decided that our model must have three inputs chosen by a clustering algorithm. With this algorithm we analyzed the correlation between groups of three input variables, in our measure set, and the Lambda values to be forecast. The inputs chosen with this technique were respectively the maximum pressure, the pressure ratio at 40 and at 50 degree.

VLS Development

After the analysis of experimental data and the choice of the input variables, we developed our VLS models according to the constraints on data representation. Indeed, we normalized data values in the range [0, 1023], that is, we used a data precision of 10 bits.

Workflow for VLS system development

The FIS system was made using pre-normalized integer data in [0, 1023], this binds the other FIS parameters to stay in the same range. In this way, FIS performance was evaluated directly on several input data combinations. The formula used to calculate the normalized data values in the range [0, 1023] is the usual one (x norm = (xx min )/(x maxx min ).

We previously fixed x max and x min , in this way successive data sets can have the same pre-processing. Data values less than x min are in underflow, similarly values greater than x max are in overflow. In this cases, they are respectively set to 0 and 1023. Considering the above remarks, it is needful formatting data in a suitable way according to the problem to be resolved. In figure 5 we can observe two different procedures to develop a FIS, modelling a system and fitting the constraints of a given device. We followed some approaches, which are complied to the above scheme, to solve both the problem of simulation of a linear Lambda sensor and the problem of simulation of an on-off Lambda sensor (i.e. classification problem). The implemented architecture, see scheme in the figure 6, allows us a rapid modelling process to create FIS and evaluating output in the current problem. We di-

Model for a Virtual linear Lambda Sensor

In order to develop a FIS model for a virtual linear Lambda sensor we used a technique proposed in [START_REF] Jang | Anfis: Adaptive-network-based-fuzzy inference system[END_REF], Matlab ANFIS tool. It is very important to highlight that the AN-FIS procedure is not completely compliant to our specifications, in fact the ANFIS tool, working with a data precision of 32 bits, does not allow us to fix the data resolution to 10 bits. In order to work with data normalized in range [0, 1023], we changed some parts of the ANFIS interface. Furthermore, the produced FIS was processed by an ad hoc "parser" developed by us, because it has a rule coding not compliant to our system simulator and consequent values not in range [0, 1023].

The input data set was divided in three different sets. The 1st is for the FIS training, the 2nd for the validation and the 3rd for the testing. The percentage error was obtained scaling the absolute error by the maximum experimental data. Final results are: mean error equal to 0.0288 and maximum error equal to 0.1271.

Model for a Virtual On-Off Lambda Sensor

From a mathematics viewpoint, the virtual on-off Lambda sensor design can be described as a classification problem. This problem, apparently simpler, can be approached in different ways. In this case a particular care must be taken in the choosing of a classifying way. The way we used to do this is to consider a linear sensor with a decoder circuit in the output, see figure 7. In figure 8, we can see that there are 14 errors on 200 testing samples.

Experimental Results

In this section we will show our results in testing the VLS, with a common fuzzy controller, on the real 125cc engine.

Testing of the Virtual Lambda Sensor: Results

The Virtual Lambda Sensor was tested by Simulink on experimental data acquired in laboratory and by dSPACE in real-time application on the 125cc mono-cylinder gasoline engine. The obtained results are collected in the tables 1 and 2: Our on-off Virtual Lambda Sensor is able to forecast without error the lean mixture condition for Lambda value grater than 1.03 and the rich mixture condition for Lambda value less than 0.97. The virtual sensor shows a classification error of 7% for 0.97 ≤ λ ≤ 0.99 and of 9% for 1.01 ≤ λ ≤ 1.03 (see next table for a summary of these results). This means that all errors are committed at the stoichiometric condition (λ = 1) with a bit polarization in the lean mixture condition zone. The above described phenomenon is due to two kind of factors:

• non uniformity of measured data

• greater variability of pressure cycle in the lean mixture condition

By our analysis we can state that the mean value of P max in lean condition is lesser than rich condition while the variance is greater. This last consideration means that in lean condition the signal is more instable. The table 3 shows the numerical results related to this analysis.

Testing of the Complete Control System: Results

The Lambda Control System is a closed loop control system based on soft computing models. It is composed by a Virtual Lambda Sensor and by a Lambda Controller.

We tested real-time the system on the 125cc engine. At first, we tested the Lambda control system in the same engine conditions used to train our soft computing models (4600 rpm, WOT (Wide Open Trottle) condition, 28 Celsius degree of the intake fold). The figure 9 describes the trend of Lambda values, measured by the laboratory real Lambda sensor on the real engine, when our control system was activated. As we can see, engine is maintained close to the stoichiometric condition with an error within 1%. Finally, we tested our control system in several transient conditions. After few seconds, the control system is able to bring the engine in stoichiometric conditions with an error within 1%. The figure 10 shows the result of one of these tests on the real engine in transient conditions.

Conclusions and Forecast Objective

In this work, we showed how is possible to use a system with precision constraints to realize either linear or on-off Virtual Lambda Sensor. The results are encouraging even if some optimizations are possible in different directions.

The first future improvement could be to find an experimental data statistical analysis technique in order to identify the optimal data distribution to obtain a FIS with a maximum forecasting capability. Another future improvement could be to develop a classifier with more classes in order to obtain a more detailed information on Lambda values forecasting. A last step regards the implementation of several FIS, with a minimum overlap, in order to optimize the forecast capability of our system. This technique, used in software engineering and for safety critical systems [START_REF] Amanda | The "test and select" approach to ensemble combination[END_REF], could allow us to yield systems more robust and with low sensibility to noisy input data.

Figure 1 .

 1 Figure 1. The block framework of a common EMS.

Figure 2 .

 2 Figure 2. The EMS block framework for spark ignition engines.

Figure 3 .

 3 Figure 3. List of the possible inputs for the VLS model.

Figure 4 .

 4 Figure 4. Clustering between Λ and P ratio 40 .

Figure 5 .

 5 Figure 5. The conceptual scheme of a solving process for two different problems.

Figure 6 .

 6 Figure 6. The conceptual scheme of data flow.

Figure 7 .

 7 Figure 7. How to use a virtual linear sensor to classify Lambda values.

Figure 8 .

 8 Figure 8. The classification error obtained using the classifier model.

Figure 9 .

 9 Figure 9. Trend of real Lambda values after that we activated the control system; steady state with 4600 rpm, WOT condition.

Figure 10 .

 10 Figure 10. Trend of real Lambda values after that we activated the SST control system; transient condition at 4600 rpm and WOT condition.

Table 1 . Experimental test results for the VLS on real engine

 1

	Mean Er-	Max Er-	Mean Er-	Max set-
	ror in lin-	ror in lin-	ror in ON-	tling time
	ear fore-	ear fore-	OFF fore-	at	4600
	cast	cast	cast	rpm
	1.18 %	4.5%	5%	250 ms

Table 2 . More detailed analysis of error distri- bution for the on-off VLS

 2

	Class. Er-	Class. Er-	Class. Er-	Class. Er-
	ror	for	ror	for	ror	for	ror	for
	λ ≤ 0.97	0.97	≤	1.01	≤	l.ambda >
			λ ≤ 0.99	λ ≤ 1.03	1.03
	0%		7%		9%		0%

Table 3 . Statistic analysis of pressure signals used as inputs for the VLS

 3

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Acknowledgements

We want to thanks our colleagues Ferdinando Taglialatela, Francesco Carpentieri, Pasquale Cassese, for the help given us in laboratory activity on the engine. We, also, want to thanks the referee whom proposed important corrections to our work. We apologize for the absence of more detailed block diagrams of our Virtual Lambda Sensor and the entire control system, but these systems are under patent approval.


Keywords: AC stability, small-signal circuit stability, frequency instability, closed loop system stability. 1

Presented are a methodology and a DFII-based tool for AC-stability analysis of a wide variety of closed-loop continuous-time (operational amplifiers and other linear circuits). The methodology used allows for easy identification and diagnostics of ac-stability problems including not only main-loop effects but also local-instability loops in current mirrors, bias circuits and emitter or source followers without breaking the loop. The results of the analysis are easy to interpret. Estimated phase margin is readily available. Instability nodes and loops along with their respective oscillation frequencies are immediately identified and mapped to the existing circuit nodes thus offering significant advantages compared to traditional "black-box" methods of stability analysis (Transient Overshoot, Bode and Phase margin plots etc.). The tool for AC-Stability analysis is written in SKILL and is fully integrated in DFII environment. Its "push-button" graphical user interface (GUI) is easy to use and understand. The tool can be invoked directly from Composer schematic and does not require active Analog Artist session. The tool is not dependent on the use of a specific fabrication technology or Process Design Kit customization. It requires OCEAN , Spectre and Waveform calculator capabilities to run.

INTRODUCTION

LTHOUGH small-signal stability of analog and mixedmode signal integrated circuits is a fairly old problem and has been studied in many ways both by circuit theory and in every-day practice, it is still a significant source of problems that may render a circuit non-operational under certain conditions. What is presented in this paper is a M. M. Milev is with High Performance Analog division, High Speed business unit at Texas Instruments Inc., Tucson, AZ 85749 USA (e-mail: milev_momtchil@ti.com).

Rod Burt is with High Performance Analog division, Precision Linear Products at Texas Instruments Inc., Tucson, AZ 85749 USA (e-mail: burt_rod@ti.com).

method [START_REF] Burt | Stability; A method for evaluating stability of a continuous time closed-loop systems[END_REF] and a tool that allow small-signal circuit ACstability to be evaluated for a continuous-time closed-loop systems without breaking the loop. This is especially useful where breaking the loop is very hard or impossible without affecting circuit's performance or biasing conditions. Moreover, if the methodology is employed by an automated design analysis tool, it can evaluate the stability not only of main-loop effects but also of local loops often present in current mirrors, bias circuits, emitter followers and other circuits that otherwise could go undetected and untested. Such a tool could allow for automatic loop identification and fullcircuit stability analysis, which gives better picture of the circuit's sensitive nodes/loops as opposed to black-box phasemargin AC-analysis. In this way, this method offers several advantages over the traditional methods of evaluating smallsignal circuit stability as node pulsing during transient analysis and Bode/phase-margin-plots in AC-analysis.

Method's principle

We use a technique that may be viewed as analogous to timedomain analysis 1 of circuit's transfer function response to a unit step-function [START_REF] Dorf | Modern Control Systems[END_REF]. Yet, the method differs from the latter significantly in performance and scope. The technique excites selected or all circuit nodes consecutively by applying an ACcurrent signal source to the tested node without changing the circuit under inspection at all. Then by frequency-domain analysis of circuit's AC-response it evaluates each node's sensitivity/stability over a broad range of frequencies. Besides the advantages already mentioned, this approach significantly speeds up the simulation compared to time-domain analysis and broadens the range of frequency coverage.

1.2

Assumptions and theory behind the problem It is assumed that the system response can be adequately described by a second-order system transfer function [START_REF] Dorf | Modern Control Systems[END_REF] with both real and complex roots -that is a set of real or complex poles and zeros. The complex poles that can cause the system to oscillate are referred to as dominant poles/roots. They determine the circuit's natural (oscillation) frequency. In an unstable loop, inherent device noise or any signal at this 1 also known as "node pulsing"

A Tool and Methodology for AC-Stability Analysis of Continuous-Time Closed-Loop Systems

Momchil Milev Rod Burt milev_momtchil@ti.com burt_rod@ti.com A frequency can start oscillations that lead to overall system instability. While in simulation such conditions are, generally, very difficult to simulate, an unstable system may begin to oscillate quite easily in the real-world. The natural frequency and damping factor of those oscillations are determined by the dominant root at this frequency, and thus not simply by the magnitude of the transfer function. That is why through means of AC-current excitation (at a node of the supposedly unstable loop) it is possible to determine the natural frequency and damping ratio by a simple Example Stability Plot with a performance index of -43.1 magnitude at 10.471MHz (natural frequency) pseudo-code of the macro for the JG instruction node (within the loop) without disrupting the normal circuit operation. This translates into a quantitative measurement of this loop's stability (performance index).

1.3

Method Limitations Oscillations that are induced by large-signal effects (as signal delays due to transistor saturation, transient charge etc) will not be detected by this method. Therefore the method should be applied to continuous-time systems, or systems that at a given point in time could be viewed as continuous-time systems.

METHOD IMPLEMENTATION

As already mentioned in the introduction, to obtain a quantitative measure of each circuit node's stability, we carry out a number of simulations applying an AC-current stimulus with a wide frequency range to every node of the circuit followed by a measurement of AC-circuit response at the same node. Consistent with the assumptions made in 1.2, a dominant root at a normalized natural frequency ( n =1) can be described by a second-order system transfer function:

2 1 ( ) 2 1 T s s s (1.1)
for the magnitude of the complex part we have ( s i ):

2 1 ( ) 2( ) 1 T i (1.2)
To define the stability plot we first take the derivative of the magnitude of the system response with respect to frequency and normalize to both to frequency and magnitude. We further take one more time the derivative of the result with respect to frequency and normalize again with respect to frequency also:

( ) . ( ) . ( ) d T d d P d T (1.3)
Through the second-order differentiation and normalization, this procedure filters out the effects of the real poles and zeros, while responding to the complex poles and zeros in the system. In this way, this function's plot will produce a negative peak at the natural frequency for every complex pole and a positive peak for every complex zero 2 . An example of a stability plot is shown on Fig. 4,considered in more detail in section 3. Furthermore, at the natural frequency

EXPERIMENTAL RESULTS

To demonstrate the virtues of the suggested method, we carried out a number of circuit simulations of which we include an example. For this example, we draw conclusions using a traditional approach (transient overshoot and phase margin plots) next. We compare these results and conclusions with the results produced by the suggested method of stability analysis using the stability plot (1.3) last.

Let's consider a simple 2MHz op-amp circuit shown on Fig. 1. At nominal values of rzero, cload and C1, the gain/phase plots on Fig. 3 show approximate phase margin of 20 degrees. Similarly, from the transient step response we measure approximately 50% overshoot -Fig. 2 . After running the tool and obtaining the stability plot at the output node (shown on Fig. 4), we see that the negative peak of the plot is at 3.2 MHz and its magnitude is about -29. From Table 1, and (1.4) we can approximate the phase margin at slightly below 20 degrees, which in turn corresponds to about 53% overshoot and damping factor of about 0.2. From the gain/phase margins on Fig. 3 can also be inferred that the natural frequency of the loop's oscillations should the phase/gain margins drop to 0 is expected to be between 2.4 MHz (0db gain crossover frequency) and 3.5 MHz (180 degrees phase lag). The latter observation is consistent with the Stability Plot's peak at 3.16 MHz.

While it was relatively easy to obtain the open-loop gain/phase plots for the circuit by opening the main feedback loop, the method proves especially useful in cases where opening the loop would be difficult, or a feedback loop is left "unverified".

To identify all circuit feedback loops and to verify the circuit against possibly unstable loops we applied the method (Section 2) and computed the Stability Plot (negative) peaks at every node of the op-amp circuit. By inspecting the resulting printed report in Table 2, besides the main loop at 3.3 MHz, we identified a local loop inside the zero-TC bias circuit (Figure 5) with natural frequency of about 50 MHz. From Table 1, we inferred that for the nodes of this local loop the equivalent transient step overshoot would range in between 16 and 25% with corresponding phase margin of less than 50 degrees. This helped us realize we needed to compensate this Therefore, the suggested method of using the stability plot to analyze circuit's stability without breaking the main feedback loop proved also very useful in identifying local feedback loops which may require compensation well.

THE STABILITY ANALYSIS TOOL

We have implemented a DFII based tool to carry out the task of running a number of circuit simulations determining each circuit node's stability peak value, more precisely -loop's performance index and natural frequency by the method described in sections 1 and 2. The tool is integrated with Analog Artist simulation environment through OCEAN 's application programming interface (API) functions. The tool presently supports Spectre and TIspice 3 circuit simulators, but tool's open and modular programming approach easily allows for use of other circuit simulators (Eldo , cdsSpice etc.).

Tool Features At present, the following features are fully implemented:

"Single Node" run mode -computes/simulates the stability peak and natural frequency of a single (selected on schematic) node (net). Generates stability peak plot and computes estimated phase margin "All Nodes" run mode -computes stability peaks and natural frequencies for all nodes in a circuit/sub-circuit.

Automatic & Manual Model Setup -auto-configures simulation device model files (if existing environment 3 Tool proprietary to Texas Instruments Inc setup is present), or allows for manual setup/configuration. Design Variables Support -existing design variables are imported and configured through a GUI "All Nodes" run report -a sorted by each node's natural frequency text report is generated. Stability Peak's Special Cases Identification -the "All Nodes" report has been recently augmented with notices alerting the user of special cases: "end-of-range" and "min/max" peak types. Analog Artists' scale environment variable support. Annotation of Results on circuit schematic. Automatic Error and Diagnostic Reporting -autogenerated e-mails will be sent to help in error resolution and tool support. Auto-zero all AC sources / stimuli in design prior to running the analysis Save and restore original Analog Artist result directory settings*

Features in development

The following features are in various stages of implementation:

In-tool corners setup In-tool sweeps (TEMP etc) Remote simulation/distributed/computer farm run capability

TOOL'S ARCHITECTURE

The tool programming structure is benefiting from modularized code architecture and existing application programming interface (API) functions to interface with the CAD environment of Design Framework II™ (DFII by Cadence Design Systems Inc.). The latter approach allowed us to write code that is tool-independent as much as possible providing for future functionality expansion and support different circuit simulators. The tool is programmed entirely in SKILL™ utilizing OCEAN™ and Analog Artist's API calls to control DFII's Simulation Environment™ (SE) and a target circuit simulator (Spectre™). Although the tool uses resources generally controlled through Analog Artist's interface, active Analog Artist™ session is not required for the tool to run. The simulation environment setup, simulation job control and simulation results processing is done through OCEAN procedural calls. The simulation task itself carried by a circuit simulator ("Specter" or other). Generalized architecture is shown on Figure 6.

PROGRAM FLOW CONTROL

Tool's procedural control starts with the user selecting either a single-node run mode or all-nodes run mode. In the case of a single-node analysis, an AC-current stimulus source is automatically attached to the net/node selected by the user on the schematic this and an AC-simulation is run across a broad frequency range. The small-signal amplitude of the response is obtained from the simulation results, and the stability plot function (1.3) is used to create the stability plot and to estimate the phase margin based on (1.4) and [START_REF] Dorf | Modern Control Systems[END_REF].

In a single-node and all-nodes analysis runs it is challenging to obtain most of the simulation setup parameters (including design variables) automatically from a "current" Analog Artist session. Because there may me more than one active Analog Artist sessions, the auto-configuration of the simulation settings and options is not always trivial. At present current Analog Artist session is considered to be the session referred to by the session-ID returned from asiGetCurrentSession() call. In the future, it is planned to offer a user a way to browse and select from not only his currently active Analog Artist sessions, but also to be able to choose a previously saved Analog Artist's "state" and load most of the simulation setup from there. Due to inconveniences in obtaining the input argument (sevSession-ID) for most of the sev-preffixed procedural calls (sevSaveState(), sevLoadState() etc.) these functions proved not very useful. At future time, when the tool is to be integrated fully under Composer/Analog Artist's GUI these functions will be used and their usage will simplify many of the tasks that need more complex implementation at present.

CONCLUSIONS AND FUTURE DEVELOPMENT

We showed that the assumption of a second-order system to describe the dominant root is quite adequate in most cases. It provided us with a valuable insight of the system's behavior in analyzing its local and main-loop effects. We developed a tool that proved very useful in determining circuit's feedback loops along with their natural frequencies and damping ratios.

A number of features are being added to this tool at present: remote server simulation and distributed computer farm run control, in-tool corner simulation, in-tool DC-sweep (TEMP, device parameters) simulation, importing configuration from Analog Artist's state files and others. Nevertheless, even with the functionality that is offered at present, the tool proved to be very useful in the troubleshooting and analysis of ACstability problems in a wide variety of linear circuits. The advantages of the method described combined with the automation of the simulation tasks by the tool are easily evident and encourage further development of the functionality of this tool.

Fig. 1 Figure 5

 15 Fig. 1 Simple 2 MHz op-amp circuit (connected as a buffer)

Figure

  Figure 6 Stability Analysis Tool architecture

Table 1 Key performance characteristics of a second order system or its dominant root.

 1

					n	1	we have:
			P	( ) n	2 1	(1.4)
	By virtue of (1.4), having measured stability plot peak at the
	natural frequency i.e. loop's performance index ( ) n P	, we
	determine loop's damping ratio , and according to Table 1 -
	loop's corresponding phase margin [1]
		Time domain		Frequency domain	Stability
		Percent		Phase	Max	Performance
		overshoot [%]	margin[Deg]	magnitude	index
	1.0	0		-	-	-1.0
	0.9	0		-	-	-1.2
	0.8	2		-	-	-1.6
	0.7	5		70	1.01	-2.0
	0.6	10		60	1.04	-2.8
	0.5	16		50	1.15	-4.0
	0.4	25		40	1.4	-6.3
	0.3	37		30	1.8	-11
	0.2	53		20	2.6	-25
	0.1	73		10	5.0	-100
	0.0	100		0		-

Table Stability Plot peak values for circuit nodes sorted by loop's natural frequency.

 Stability

	Node	Stability Peak	Natural Frequency, Hz
		Loop at 3.3 MHz
	Output	28.884067	3.16E+06
	net052	28.884063	3.16E+06
	net136	28.884748	3.16E+06
	net138	27.522194	3.16E+06
	net99	27.086771	3.31E+06
		Loop at 36.3 MHz
	net066	0.948229	3.63E+07
		Loop at 47.9 MHz
	net81	5.334409	4.79E+07
	net17	0.504486	4.68E+07
	net056	4.608340	4.79E+07
		Loop at 51.3 MHz
	net013	5.063032	4.90E+07
	net57	4.485003	5.01E+07
	net16	0.252345	5.01E+07
	net75	5.072788	4.90E+07
	net019	0.232893	5.13E+07

Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE'05) 1530-1591/05 $ 20.00 IEEE

Complex zeros (positive peaks in this plot) do not directly affect systems stability. In few cases though, it is important to consider the relative position of a complex zero with respect to a close complex pole to determine the significance of the complex pole on the overall system stability.

Rod Burt has been with Texas Instruments Inc (former Burr-Brown Corp) since 1982. As an Analog IC Design Engineer he has designed and led many successful projects helping to build Burr-Brown's high-precision linear products portfolio.

Momchil Milev has been with the High Performance

Analog EDA Group, of Texas Instruments Inc (former Burr-Brown Corp) since 1998. He has been developing and delivering Process Design Kits, as well as implementing tools and methodologies for electronic design automation. Since May 2004 he is with the High Speed business unit, High Performance Analog (HPA) division of the company. Interests outside Electronic Design Automation include research in Artificial Neural Networks applications and programming of handheld and embedded application devices.


K.-U Kirstein
email: kirstein@iqe.phys.ethz.ch

J Sedivy

T Salo

C Hagleitner

T Vancura

A Hierlemann

A CMOS-based Tactile Sensor for Continuous Blood Pressure Monitoring

A monolithic integrated tactile sensor array is presented, which is used to perform non-invasive blood pressure monitoring of a patient. The advantage of this device compared to a hand cuff based approach is the capability of recording continuous blood pressure data. The capacitive, membrane-based sensor device is fabricated in an industrial CMOS-technology combined with post-CMOS micromachining. The capacitance change is detected by a -modulator. The modulator is operated at a sampling rate of 128kS/s and achieves a resolution of 12bit with an external decimation filter and an OSR of 128.

Introduction

Current devices for blood pressure measurements show several drawbacks: External methods based on hand cuffs or other pressurized devices are only able to accomplish single measurements at a rate of some Hertz. Thus the continuous recording of a blood pressure waveform is not possible. Intravascular pressure sensors are capable of recording continuous blood pressure data, but they have to be implanted or need at least an open access to the vein of the patient. The presented sensor device enables a continuous recording of blood pressure extravascular or even percutaneously. It measures the displacement of a surface caused by the movement of a blood vessel wall, due to its overpressure inside, as shown Figure 1. This method, which is also known as tonometry, has been realized so far only with hybrid integration of sensor unit and signal conditioning circuitry, leading to very bulky solutions [START_REF]The Measurement, Instrumentation and Sensors Handbook[END_REF][START_REF] Steiner | Validation of a tonometric noninvasive arterial blood pressure monitor in the intensive care setting[END_REF]. The presented monolithic implementation of a blood pressure sensor overcomes this disadvantage and enables very compact and even portable devices. Additionally an invasive application, e.g., on the beating heart during surgery is also possible.

System Description

Figure 1 shows the application of the integrated sensor device for monitoring blood pressure of a vessel through the skin. The overpressure inside that blood vessel, vein or artery, causes a movement of the vessel wall. This movement leads to a local displacement of the skin surface. When a force sensor is applied at the right place of the surface, this displacement can be detected and gives a signal proportional to the blood pressure inside the underlying vessel. In order to relax the necessary accuracy of sensor placement, an array of force detectors is used and the

Overpressure

Blood vessel Skin

Sensor device sensor element with the strongest signal is selected during measurement. This can also be used for localizing blood vessels, buried in tissue.

Sensor Array

On the chip there is an array of square-shaped forcesensitive elements. A single element has a suspended elastic membrane with a top electrode for a capacitive readout of deflection. The membrane is made of CMOS dielectric layers (silicon oxide/ nitride) and metallization (aluminum). The bottom electrode is of polysilicon (Figure 2). The side length and thickness of the membrane are 100µm and 3µm, respectively. The pitch of the membranes in the array is 150 µm.

In order to release the membranes, a potassium hydroxide (KOH) etch is applied from the back of the chip to create an opening in the silicon substrate. Through this opening it is possible to access the first metal layer of the CMOS process. This revealed metal layer is then selectively removed from the wafer stack. Thus the membranes are released and are free to deflect. The approach of releasing the membranes from the back of the wafer avoids post-release sealing present in similar sensor structures [START_REF] Gray | A surface micromachined microtactile sensor array[END_REF][START_REF] Kane | A traction stress sensor array for use in high-resolution robotic tactile imaging[END_REF]. The sealing is necessary to protect the devices from the hostile environment of bodily fluids [START_REF] Salo | CMOS-based Sealed Membranes for Medical Tactile Sensor Arrays[END_REF].

For the application it is important to protect the electrical interconnections and provide a contacting surface to a biological tissue. This is carried out with a PDMS (polydimethylsiloxane) on top of the membrane array surrounded by gloptop epoxy to protect the electronics. Force is applied to the top of the sensor element and this leads to a deformation of the membrane layers. This displacement is detected by the change of capacitance between the top electrode and the bottom electrode, formed by the second metal layer and the polysilicon layer of the CMOS-process, respectively.

Readout Circuit

The measured displacement signal is filtered and converted to a digital value by the on-chip readout electronics as shown in the block diagram of Figure 3.

The two-by-two sensor array is connected to a single bit, second order -modulator via an analog multiplexer. This analog second order filter is realized by a fullydifferential switched-capacitor filter. Figure 6 shows the two stage SC-filter and the connected sensor and reference capacitors. For sake of clarity, a single-ended implementation is shown. When a constant voltage is applied to the inputs of sensor and reference element, a signal, proportional to the difference of sensor and reference capacitor is integrated at the first stage of themodulator [START_REF] Hagleitner | CMOS Single-chip gas detection system comprising capacitive, calorimetric and mass-sensitive microsensors[END_REF]. The output of the modulator is connected to an external digital decimation filter. Currently this filter is implemented in an FPGA, which also provides an interface (USB) to a computer system.

Figure 3: Block diagram of the readout circuitry

The transducer elements of a sensor array are connected via two synchronized analog multiplexers to the readout circuit as shown in Figure 4. This enables a modular design, which can be easily extended to larger array sizes. The settling when switching between different sensor elements is limited by the signal bandwidth of the -ADconverter.

Results

Figure 5 shows a micrograph of a demonstrator, fabricated in a standard 0.8 CMOS-technology with additional post-processing. The chip size is 2.6 x 1.9 mm 2 . It incorporates a 2x2 array of the pressure transducers, a reference structure and the -modulator to readout the change of capacity. The -modulator additionally has a differential voltage interface, so a full characterization of the analog to digital conversion of this circuit can be accomplished, independent of the connected transducer. The sensor chip is connected to an FPGA, which contains the digital decimation filter and an USB interface to deliver the measurement data to a computer system (Figure 3).

Electrical Measurements

To test the performance of the -analog-digital converter the additional voltage input is used. Figure 7 shows the spectrum of a converted sine-wave input signal.

The modulator was operated at a frequency of 128kHz and an oversampling ratio of 128 leading to a conversion rate of 1kS/s. The decimation filter was implemented as a two stage filter architecture, comprising a 3 rd order SINCfilter as first stage and a 32 tap FIR-filter as second stage. The cutoff frequency of the filter is 500Hz and the output resolution is 12bit. As can be seen from Figure 6, a signalto-noise ratio better than 72dB was achieved.

The power consumption of the sensor chip is 11.5mW at 5V supply voltage for 128kHz sampling frequency.

V+ V+ V - V - V ref + V ref - V ref + V ref - C fb C fb C ref C sense C int,1 C 2 C int,2
first stage second stage

Blood Pressure Measurement

Figure 8 shows the chip assembled on a PCB for blood pressure measurements. To apply a backpressure to the sensor membranes a pressure tube is connected to the backside of the sensor die. An applied overpressure bends the membrane layers upwards, so that they stick out and touch the surface of the measured object. In Figure 9 a recorded blood pressure waveform is shown. The sensor device has been attached to a test person's wrist and the acquired signal is relative to the pressure applied to the skin surface by the sensor device. In order to get absolute pressure values, a calibration has to be performed. This calibration can be accomplished by measuring the systolic and diastolic pressure with a conventional hand cuff device (see Figure 9).

Conclusion and Outlook

A novel monolithic pressure sensor for external blood pressure monitoring has been presented. The device is fabricated in a standard CMOS technology with additional post-processing steps. The integrated readout circuitry achieves a resolution of 12bit at a conversion rate of 1kS/s. Continuous blood pressure measurements using a CMOSbased tactile sensor array have been successfully demonstrated.

Future work will include an improvement of the resolution during blood pressure measurements. This can be achieved by adjusting the feedback capacitors of the first modulator stage. Also an increased conversion rate would be desirable. Field test have to be performed in order evaluate reliability and stability of blood pressure monitoring.

5

Figure 1 :

 1 Figure 1: Principle of monitoring blood pressure due to surface displacement

Figure 2 :

 2 Figure 2: Cross-section of the released membrane structure in standard CMOS-technology

Figure 4

 4 Figure 4: 2x2 transducer array with multiplexer for selecting a sensor element

Figure 5 :

 5 Figure 5: Chip micrograph of the sensor device.

Figure 6 :

 6 Figure 6: Block diagram of the two stage -modulator with sensor and reference capacitors connected to the first stage

Figure 7 :

 7 Figure 7: Measured spectrum of the 12b -ADC at 15.625Hz

Figure 8 :

 8 Figure 8: Top and bottom view of the PCB with assembled sensor chip

Figure 9 :

 9 Figure 9: Measured blood pressure wave with calibration of systolic and diastolic values

Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE'05) 1530-1591/05 $ 20.00 IEEE

Acknowledgements

The authors thank Professor Henry Baltes (on leave) for sharing laboratory resources and for his ongoing stimulating interest in their work. Special thanks goes also to Dr. J. Grünenfelder from the University Hospital Zurich, Switzerland, for many fruitful discussions. This work is funded by the National Science Foundation, Switzerland and is part of the NSF-CoMe project 11, "Robotics in Cardiovascular Surgery".


Johannes Sturm
email: johannes.sturm@infineon.com

Martin Leifhelm

Harald Schatzmayr

Stefan Groiss

Horst Zimmermann

Optical Receiver IC for CD/DVD/Blue-Laser Application

come   L'archive ouverte pluridisciplinaire

Introduction

The optical pickup units (OPU) in optical data storage systems like CD, DVD or future applications with blue laser light ("Blue-Ray") needs receiver optoelectronic ICs (OEICs) that convert the reflected light from a storage disc to an electrical output signal. On one hand the data rates in optical storage applications increase rapidly up to 500 Mb/s and on the other hand the reflected light intensity for read application is decreasing below 1µW . Therefore there is a strong demand on OEICs including integrated photodiodes with high-speed and sensitivity performance combined with high-bandwidth and low-noise transimpedance amplifier circuits. Due to the broad variety of operating conditions (CD, DVD, "Blue-Ray", read, write, single or double layer disc...) the transimpedance amplifiers must be programmable over a wide range of gains. In the presented prototype IC the circuits are implemented in a 0.5 µm BiCMOS technology including an integrated PIN-photodiode with a high speed and light sensitivity for all 3 wavelengths used for optical data storage like CD (780 nm), DVD (660 nm) and "Blue-Ray" (410 nm). The measured photodiode sensitivity is 0.35 A/W for 780 nm, 0.4 A/W for 660 nm and 0.25 A/W for 410 nm wavelength. The 3dB small-signal-bandwidth of the photodiode is above 700 MHz without slow diffusion effects of photo generated minority carriers [START_REF] Swoboda | A Low-Noise 1.8Gbps Bipolar OEIC[END_REF]. The photodetector configuration on the IC is the typical 8photodiode arrangement used by most of the OPU manufacturers [START_REF] Marchese | A BiCMOS 1X to 5X Combined Analog Frontend IC for DVD ROM&Movie Players[END_REF]. It consists of 4 central segments (A...D) and 4 satellite segments (E...H) used for data detection as well as for laser beam focussing and tracking. Each segment is connected to a programmable transimpedance amplifier (TIA) stage. Compared to classical solutions for the transimpedance amplifiers [START_REF] Takimoto | High speed Si-OEIC(OPIC) for optical pickup[END_REF] we used a new architecture that combines a classical TIA with an input current preamplifier. This architecture allows a very flexible gain programmig in combination with high-speed and low-noise performance. The IC has 12 different gain settings for read and write applications and additional 17 gain settings in a special write/clip mode programmable with a serial interface. Another critical issue for an OEIC in OPUs is the data transmission over the flex cable to the controller unit. We implemented an impedance matching of the output driver stage to the 130 Ω cable impedance to avoid signal reflexions.

OEIC Architecture and Building Blocks

The IC architecture is shown in Figure 1. The 8 photodiode segments (4 central segments A to D and 4 satellite segments E to H) are located in the center. Left and right to the segments the 8 amplifier channels can be seen. Every single photodiode current is amplified to a singleended output voltage V A to V H . In addition a differential signal RFP and RFM for the RF-data output is implemented which is a summation of the central photodiode signals (A to D). Every amplifier channel consists of a current preamplifier (CA to CH) as input stage, followed by a transimpedance amplifier (TA to TH) and an output buffer (Buf). All stages are programmable with a serial I 2 C-interface. A DC output reference voltage between 2V and 2.4V can be applied to an external pin V ref .

To avoid channel crosstalk and stability problems, every channel has its own decoder (Dec) with reference voltage and current generation and a power supply filter network is implemented.

Due to the high range of input signal levels for the different operating conditions as read, write and write/clip we implemented a large number of different transimpedance gain settings. The gains in read and write operation for the central segments A to D can be programmed between 130Ω and 270kΩ in steps of two. The gain for the satellite segments is even 4 times higher and the differential RF gain is 2/5 of the central segments gain. For the so called write/clip mode additional 17 gains can be programmed. The objective for the write/clip mode is to use a much higher central segments gain as RF-gain compared to the standard write mode. This allows a 'low' level measurement during write with a high central segment gain which is used for tracking calculation. During the write 'high' level a gain clipping circuit for the central segment becomes active. This circuit adaptively reduces the central amplifier gain at the input stage when the input current become too high for maximum central segment output voltage swing. The central segment output voltage swing is reduced to nearly 0 during the 'high' phase. This dramatically decreases the current consumption during write mode.

Transimpedance Amplifier Architecture

To implement the required number of different gains and operating modes we used a new multistage transimpedance amplifier (TIA) architecture. The TIA for one central segment and the differential RF-amplifier is shown in Figure 2. In difference to a classical TIA solution we used a 2-stage current preamplifier (CA1 and CA2) as input stage followed by a TIA stage and a buffer at the output. The input current I in,c coming from a central segment photodiode is preamplified in the current amplifiers CA1 and CA2 with a gain of A I1,c * A I2,c . For the offset compensation of output current I out,c a matched replica of amplifiers CA1 and CA2 are implemented without input current. The output offset current of the replica amplifiers is subtracted from current I out,c . The offset compensated current is then feed into a classical TIA with programmable transimpedance R t,c . Finally the TIA output voltage is buffered to an output voltage V out,c . The output reference voltage V ref is applied to the TIA and buffer amplifier inputs from an external pin. Also a differential TIA is implemented as shown in Figure 2. The input current of this TIA is the sum of the 4 central segment currents I out,rf coming from a second path in current amplifier CA2. The common-mode output voltage of the differential output buffer is defined by V ref .

Figure 2. TIA architecture for central and RF channel

All amplifier stages are programmable with the serial interface. The gains of the amplifier stages are shown in Table 1.

Current Amplifier Circuit

In Figure 3 a simplified schematic of the input current preamplifier stage is shown. The amplifier consists of a programmable regulated current mirror with a capacitivespeed-enhancement circuit (CSE) and a clipping circuit. The current mirror includes 2 bipolar NPN transistors T 1 and T 2 that are regulated with a transconductance amplifier (OTA). The OTA has a high transconductance g m = ipm vin which regulates the input node V in to a potential V in,ref . Due to this low-impedance input node the pole is shifted to high frequencies even for larger photodiode capacitances. This enables a high amplifier bandwidth which is defined by a dominant pole in node V pm and is quite independent of photodiode size. This current amplifier architecture has the advantage of a simple continuous gain adjustment with a variable voltage source V gain = V p -V m . Compared to other solutions [START_REF] De Jong | A DC-to-250Mhz current pre-amplifier with integrated photodiodes in standard CBiMOS for optical storage systems[END_REF] no switching in the current signal path is necessary. The current gain G is defined by the Equation ( 1) with V T is the thermal voltage of 26mV.

G = I out I in = exp V p -V m V T . ( 1
)
To enable the clipping functionality described in Section 2 an additional clipping circuit block is included. This circuit reduces the amplifier gain in the input stage via voltage source V gain after reaching a defined input current I in level. Therefore the high input currents up to 5mA in write operation are only flowing through the input transistor T 1 and the OTA to ground. This results in a lower current consumption for the write/clip mode compared to the normal write mode.

Figure 3. Current amplifier including capacitive-speed enhancement (CSE) and clipping circuit

The noise performance of the circuit is dominated by the shot noise of the transistors T 1 and T 2 . To minimize the input referred noise current, I in,dc must be as low as possible. On the other hand the small-signalbandwidth of the circuit depends on the transconductance g m of transistor T 1 and therefore decreases with lower I in,dc . To optimize the noise and bandwidth behaviour a capacitive-speed-enhancement circuit (CSE) is included that speeds up the circuit for high gains and low input currents with a capacitive feed-forward path. The circuit consists of a capacitance C ff that adds an additional current I ff to the output current I out according to the relation

I ff = AC ff dVpm dt .

Output Buffer

For RF data transmission over a flex cable an impedance matching is necessary for signal frequencies above 200 MHz. Therefore the output buffer stage has a 130 Ω ± 15 Ω output impedance matched to the flex cable. The 130 Ω impedance is generated with active impedance synthesis. Figure 4 show the circuit concept for a single ended output buffer with a positive feedback path. The resistor values for the buffer feedback circuit can be calculated according to Equation ( 2) with a synthesis factor m and Equation ( 3) showing the amplifier gain G including load. The factor k defines the relation between m and G. Therefore the integrated output resistor can be m-times smaller than the load resistor R L matching to the load impedance Z L . This increases the output voltage dynamic range by a factor of m. In our IC the synthesis factor m=2 and gain G=1.5. The maximum buffer output voltage swing is 0.8V. The IC is mounted in a LGA type package including supply filter caps. For characterization a PCB was developed with external 130 Ω load resistor simulating a flex-cable. The measurement setup is fixed on an optical bench. As light source we used laser diodes with a wavelength of 650 nm and 780 nm focused on the chip with optical lenses. The laser diode current is modulated with a pulse generator over a bias-tee circuit. The transient output voltages are measured on the external load resistors with a high impedance probe. The maximum output voltage swing for the single ended signals and for the differential output signal is 800 mV. The power consumption of the ASIC is 300 mW with a supply voltage of 5 V.

m = k + 1 k -1 (2)
G = m + 1 2 (3)

Measurement Results

Figure 8 shows a photograph of the ASIC. In the center the 8 photodiodes can be seen. The whole chip except the photodiodes are covered with a metal plane for light shielding.

Conclusion

An optical receiver IC for the data storage applications CD, DVD and "Blue Ray" has been realized. The IC consists of integrated PIN photodiodes connected to programmable transimpedance amplifiers (TIA). The new multistage TIA architecture gives a high flexibility in gain programming for read, write and write/clip operation mode with 29 different gain settings. A special write/clip mode with active gain control in the input stage is implemented. The rise/fall time for the central segments is 1.3 ns which means a small-signal-bandwidth of 260 MHz for the highest gain of 270 kΩ. In combination with the photodiodes this leads to a sensitivity of 100 mV µW which is an improvement by a factor of 2 compared to other publications [START_REF] De Jong | A DC-to-250Mhz current pre-amplifier with integrated photodiodes in standard CBiMOS for optical storage systems[END_REF]. For an optimized RF data transmission the amplifier output buffers are matched to the 130Ω flex cable impedance. To improve the amplifier output dynamic range the impedance is generated by an active impedance synthesis with a synthesis factor of 2.

Figure 1 .

 1 Figure 1. OEIC architecture

Figure 4 .

 4 Figure 4. Output buffer

Figure 5 .

 5 Figure 5. Transient signal of central channel

Figure 5

 5 Figure5shows a transient pulse of the central segments signal with highest gain value of 270 kΩ. The measured rise/falltime is 1.3 ns. This means a small signal bandwidth of approximately 260 MHz. The eye diagram of the differential RF signal at highest gain is shown in Figure6. The diagram shows a well opened eye with a 200 Mbit/s pseudo random data signal. Therefore a maximum data rate up to to 400 Mbit/s is possible even with the highest transimpedance gain value.

Figure 6 .Figure 7 .

 67 Figure 6. Eyediagram at 200MBit

Figure

  Figure 8. IC photo

Table 1 .

 1 Gain values of the TIA gain stages

		Central Segments Satellite Segments
	A I1	0.375/1.5/6	0.9/4/16
	A I2	0.25/0.5/1/2/4	0.5/1/2/4/8
	A I1,rf	0.375/1.5/6
	A I2,rf	0.25/0.5/1/2/4
	R t,c	1.4kΩ /11kΩ	1.4kΩ /11kΩ
	R t,rf	530Ω /4kΩ

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Acknowledgment

The authors would like to thank the partners in the project INSPIRED. This work was founded by the EC under reference IST-2000-28013 INSPIRED