J Chaste

L Lechner

P Morfin

G Fève

T Kontos

J.-M Berroir

D C Glattli

H Happy

P Hakonen

B Plaçais

Single carbon nanotube transistor at GHz frequency

Keywords:

We report on microwave operation of top-gated single carbon nanotube transistors. From transmission measurements in the 0.1-1.6 GHz range we deduce device transconductance gm and gatenanotube capacitance Cg of micro-and nanometric devices. A large and frequency-independent gm ∼ 20 µS is observed on short devices which meets best dc results. The capacitance per unit gate length ∼ 60 aF/µm is typical of top gates on conventional oxide with ǫ ∼ 10. This value is a factor 3-5 below the nanotube quantum capacitance which, according to recent simulations, favors high transit frequencies fT = gm/2πCg. For our smallest devices, we find a large fT ∼ 50 GHz with no evidence of saturation in length dependence.

Carbon nanotube field effect transistors (CNT-FETs) are very attractive as ultimate, quantum limited devices. In particular, ballistic transistors have been predicted to operate in the the sub-THz range [1,2]. Experimentally, a state-of-the-art cut-off frequency of 30 GHz has been reached in a low impedance multi-nanotube device [3], whereas 8 GHz was achieved with a multigate single nanotube transistor [4]. Indirect evidence of microwave operation were also obtained in experiments based on mixing effects or channel conductance measurement in single nanotubes [5,6,7,8,9].

The extraordinary performances of nanotubes as molecular field effect transistors rely on a series of unique properties. High-mobility "p-doped" single walled nanotubes can be obtained by CVD-growth, with a semiconducting gap ∆ ∼ 0.5-1 eV (diameter 1-2 nm) [10]. Low Schottky-barrier contacts, with Pd metallisation, and quasi-ballistic transport result in a channel resistance R ds approaching the quantum limit, h/4e 2 = 6.5 kΩ for a 4-mode single walled nanotube [11]. High saturation currents, limited by optical phonon emission, allow large biases, I ds ∼ 20 µA at V ds 1 V in short nanotubes [12,13]. The above numbers and the good gate coupling explain the large transconductances, g m ∼ I ds /∆ 10 µS, observed in dc experiments [1]. In the ac, an intrinsic limitation is given by the transit frequency f T = g m /2πC g , where C g is the gate-nanotube capacitance. Here C g = C geo C Q /(C geo + C Q ) is the series combination of the quantum and geometrical capacitances, C Q and C geo . Ultrathin oxide coating in CNT-FETs allows to approach the quantum limit with a capacitance per unit gate length l g , C geo /l g > C Q /l g = * Electronic address: Bernard.Placais@lpa.ens.fr 4e 2 /hv F ∼ 400 aF/µm for v F ∼ 4 × 10 5 m/s, a typical value for semiconducting NTs [14].

Beside basic interest for quantum limited nano-devices, single nanotube transistors offer new opportunities for fast charge detection due to unique combination of short time response and high charge sensitivity. At present, charge counting experiments performed in nanotube or semiconducting quantum dots use either single electron transistors [15,16] or quantum point contact detectors [17] which operate on microsecond timescales. High sensitivity of NT-FET has been demonstrated recently by monitoring tunneling events between the nanotube and a nearby gold particle [18] at the dc limit. Performing such experiments with quantum dots at nanosecond timescales would allow to extend charge counting in the coherent regime relevant for full quantum electronics [19]. Given the shot noise limitation of a nanotube detector of bandwidth 1/τ = 1ns -1 , overestimated by the poissonian value I ds τ /e = 250 electrons for I ds ∼ 10 µA, single charge resolution requires a charge gain g m τ /C g 250 or equivalently a transit frequency f T = g m /2πC g 40 GHz.

In this letter we demonstrate room-temperature broadband GHz operation (f = 0.1-1.6 GHz) of nanotransistors made of a single carbon nanotube, with l g = 0.3 µm and 3 µm (channel lengths 1 and 3.5 µm respectively). Our main results are the high g m ∼ 10-20 µS in short tubes, and the scaling C g ∝ l g . From the latter we deduce C g /l g ∼ 60 aF/µm, in accordance with previous low-frequency determinations [20], and f T ∼ 50 GHz for our l g = 300 nm devices. Double-gate carbon nanotube transistors were fabricated by e-beam lithography in a coplanar strip-line ge- ometry, with two symmetric top gates (see Fig. 1), on oxidized high-resistivity silicon substrates (resistivity 3-5 kΩ.cm). Nanotubes were synthetized from nano patterned catalyst pads using a standard CVD recipe. Palladium contact evaporation is followed by multistep oxidation of thin aluminium, for a total oxide thickness of ≃ 6 nm, and finally gold-gate deposition. This process provides full oxidation of Al into Al 2 O 3 with ǫ ≃ 9.8. From sample geometry and dielectric constants, we estimate C geo /l g ∼ 100 aF/µm.

Devices were characterized in a standard S-parameter measurement using an RF probe station and a network analyzer. Attenuators (-6 dB and -10 dB), followed by bias tees, are mounted directly at the input and output ports of the station to minimize standing waves in the Z 0 = 50 Ω cables due to large impedance mismatch R ds /Z 0 ∼ 300. To compensate for small voltage gain, Z 0 g m ∼ 10 -3 , output signals are amplified by two 0.1-2 GHz bandwidth low noise amplifiers in series. As a consequence, S-parameter measurement is restricted to the transmission coefficient S 21 (V ds , V g ), which in turn can be accurately calibrated.

Data reduction and analysis are based on the standard equivalent circuit of Fig. 1-B. Extrinsic elements, C gs0 ∼ C ds0 ∼ 10-20 fF, estimated from independent reflection measurements, and C gd0 ∼ 2 fF measured as explained below, are minimized by the coplanar sample design. The gate capacitance C g = C gd + C gs is splitted into gatedrain C gd and gate-source C gs contributions. These are associated to charge relaxation resistances R gd and R gs . We have R gd ≫ 1/C gd ω in the OFF state (V g 1 V)

and R gd ≪ 1/C gd ω in ON state (V g 0 V). Considering that Z 0 C gs0 ω ∼ 10 -2 , Z 0 C gd0 ω ∼ 10 -3 and Z 0 g m ∼ 10 -3 in the low-frequency range ω/2π ≤ 1.6 GHz of our experiment, we obtain

S 21 = S 0 21 + S p 21 (V g ) + S a 21 (V ds , V g ) with S 0 21 ≈  2Z 0 ωC gd0 (1) S p 21 ≈  2Z 0 ωC gd /(1 + ωC gd R gd ) (2) S a 21 ≈ -2Z 0 g m + ∆S p 21 (V ds ) (3)
being, respectively, the background transmission amplitude in the pinched state, the passive contribution at the onset of channel conduction in the zero bias state, and the active contribution under bias. Note that ∆S p 21 = S p 21 (V ds ) -S p 21 (0) constitutes the imaginary part of S a 21 . In order to check the validity of our analysis, we first consider the case of long FETs (l g = 3 µm) where gate capacitance contributions are easily resolved. Typical datas are exhibited in Figs.2. The inset of Fig. 2.A shows both quadratures of the background transmission S 0 21 (f ). From the slope of ℑ(S 0 21 )(f ) and Eq.( 1) we deduce the small C gd0 ∼ 1.5 fF. Substraction of this contribution, keeping zero bias conditions, gives the V g -dependent passive contribution S p 21 (f ) shown in (Figs. 2.A,B). In the ON state ℑ(S p 21 ) has a linear frequency dependence, whose slope is plotted in Fig. 2-C as a function of V g . The pinch-off transition appears here as a strong discontinuity associated with the divergence of the charge relaxation resistance R gd . From the step amplitude and using Eq.( 2), we deduce C gd ≃ 170 aF. This value is very representative of the five long samples which we have measured with an average of 160 aF and a standard deviation of 50 aF. A small monotonic dependence in ℜ(S p 21 )(V g ) (Fig. 2.A) is also observed which is possibly due to a residual substrate conduction, not taken into account in our analysis.

The active contribution (Figs.2.D-E) is obtained from the bias dependence of S 21 (f ) at constant V g . The in-phase signal ℜ(S a 21 )(f ) is prominent and almost frequency independent. Slow frequency oscillations are reminiscent of calibration imperfections.

Averaging ℜ(S a 21 ) over 0.2-1.6 GHz gives, according to Eq.( 3), the transconductance as function of V g shown in Fig. 2.F. It has a maximum g m 3 µS close to the maximum observed at the dc ON-OFF transition. Representative values are g m 1-4 µS. The small negative part, ℑ(S a 21 ) ∼ -ℑ(S p 21 ) in Fig. 2.E, is a capacitive contribution due to a shift of the pinch-off under bias. Altogether, these measurements show that one can quantitatively analyze the dynamical properties of a single nanotube transistor. With g m ∼ 1.5µS and C g ∼ 85aF (per gate finger), the transit of the 3 µm device of Fig. 2 is f T ∼ 3 GHz.

For short NT-FETs (l g = 300 nm in Fig. 1) we observe smaller C gd and larger g m to smaller channel resistance. Example shown in Fig. 3 These measurements show that NT-FET performances do improve drastically upon gate size reduction down to the nanometric scale (factor of 15 in f T for a factor 10 in size). We now discuss possible routes for improvements. First one is to increase g m by reducing access resistance due to the ungated NT sections at drain and source (see Fig. 1-A). This effect is significant on devices using deposited CNTs, it is minimized with in situ CVDgrown NTs which are naturally p-doped in the absence of gating. Actually ungated regions are needed to reduce direct gate-drain/source capacitive coupling. Our values for gate capacitance are close to estimate for the geometrical contribution and in accordance with previous low-frequency measurements in similar top-gated devices [20]. They are still smaller than above numbers for the quantum capacitance. One may wonder whether better performance could be achieved by working closer to the quantum limit in using high-κ and/or thinner oxides. This would improve gate coupling, but at the same time slow-down electron dynamics due to the screening of electronic interactions as discussed in Ref. [21]. In the absence experimental data and theoretical model, we shall rely on recent numerical simulations showing that transit frequency is maximized for C Q 3-5 × C geo [14]. This condition which is close to our experimental realization. The most promising route is further size reduction below 100 nm as we have not observed evidence for saturation down to 300nm. Finally noise performance remain to be characterized, in particular the conditions for shot-noise limited resolution.

In conclusion, we have demonstrated hightransconductance SWNT-FET properties up to 1.6 GHz. We observe that high sensitivity is preserved, and that gate capacitance scales with gate length down to 300 nm. Transit frequencies as high as 50 GHz have been inferred, indicating that nanotube FETs are promising fast sensors.

FIG. 1 :

 1 FIG. 1: Panel A : scanning electron microscope image of a single carbon-nanotube double-gate transistor. Gate length is 300 nm. Panel B : small-signal equivalent circuit of the carbon-nanotube transistor. Extrinsic components are displayed outside the dashed rectangle. Notations are explained in the text.

FIG. 2 :

 2 FIG. 2: A 3 µm gate transistor. Transmission amplitude S21 as function of frequency. Background contribution (inset of panel A), passive zero-bias (panels A and B) and active biased (panels D,E) contributions. Panels A and D (resp. B and E) have same scales for direct data comparison. Lines correspond to Vg = -2-2V with an increment of 0.4V. Panel C gives the slope dℑ[S p 21 (ω)]/dω as function of gate voltage. It shows a discontinuity at the opening of channel conductance associated with the gate-drain capacitance. Panel F shows device transconductance.

FIG. 3 :

 3 FIG. 3:Characterisation of a 300 nm gate transistor. Transmission amplitude of active contribution (panel A) and transconductance (panel B). Inset shows hysteresis in the dc characteristics as Vg is swept.

  represents a new state-of-the-art for RF operation with a maximum of g m (V g ) 20 µS (double gate fingers). Gate drain ca-pacitance is C gd ≃ 35 aF (standard deviation 25 aF). Average values for the six short NT-FETs measured are g m ≃ 12 µS and C gd ≃ 35 aF (double gate fingers). As seen on the dc characteristics in the inset of Figs.3.B, hysteresis is observed in these measurements which has been omitted elsewhere for clarity. Comparing our data for the 300 nm and 3 µm devices shows that, within experimental uncertainty, C gd scales with l g . Assuming symmetric distribution of gate-drain and gate-source capacitances at zero bias, we obtain C g /l g ≃ 2C gd /l g ≃ 60 aF/µm. With g m ∼ 10µS and C g < 30aF (per gate finger), the transit frequency of the 300 nm device of Fig.3 is f T 50 GHz.

Acknowledgments

Authors acknowledge fruitful discussions with S. Galdin-Retailleau, P. Dollphus, J.P. Bourgoin, V. Derycke, and G. Dambrine. The research has been supported by french ANR under contracts ANR-2005-055-HF-CNT, ANR-05-NANO-010-01-NL-SBPC, and EC STREP project CARDEQ under contract IST-FP6-011285.