Hadiseh Geramirad
email: hadiseh.geramirad@supergrid-institute.com

Florent Morel

Piotr Dworakowski

Philippe Camail

Bruno Lefebvre

Thomas Lagier

Christian Vollaire

Experimental EMI study of a 3-phase 100kW 1200V Dual Active Bridge Converter using SiC MOSFETs

This paper presents a system-level EMI investigation in a new 3-phase 1.2kV 100kW insulated DC/DC converter. In this prototype, achieving full operation was prevented by false triggering of semiconductors due to large common-mode current through gate drivers. A passive filter embedded into the structure of the transformer to connect it to the ground is proposed as a corrective and cost effective solution to mitigate the electromagnetic interferences. New grounding layout enabled to reduce the common-mode current through gate drivers by up to 75% without decreasing the switching rate. This allowed to proceed to measurements on the prototype at nominal operation. The method is validated in simulation and extensive experimental results have been obtained from the considered prototype. This proved the feasibility of the proposed solution and showed the effect of the transformer design in EMI behavior of insulated DC/DC converters.

Introduction

Proper electromagnetic compatibility (EMC) design during development process of any type of electronic device is necessary to ensure the stable operation. The proper EMC design is a challenge when power semiconductors generate high-speed voltage and current transients. In switched mode power converters, the high switching speed of power semiconductors constitutes an important source of electro-magnetic interference (EMI). This means that the interference can disturb other devices in the close common electromagnetic environment. Therefore, electromagnetic compatibility (EMC) of the converter is a must to ensure not only its operation but also the proper function of other electronic equipment in its vicinity [START_REF] Ronan | A power electronic-based distribution transformer[END_REF].

The common-mode (CM) current passes through the ground wire and return path which is caused usually by electrical capacitive coupling (𝐶 𝑑𝑣 𝑑𝑡 ) [START_REF] Miloudi | Analysis and reduction of common-mode and differential-mode EMI noise in a Flyback switch-mode power supply (SMPS)[END_REF][START_REF] Nagrial | Radiated and conducted EMI emissions in switch mode power supplies (SMPS): sources, causes and predictions[END_REF]. Due to the complexity of the converter, the existence of many capacitive parasitic elements is unavoidable in the converter layout. These parasitic capacitances provide a low impedance path for high frequency CM current in the converter. These parasitic capacitances lead to circulating of the CM current in layout [START_REF] Leslé | Multi-objective optimisation of a bidirectional single-phase grid connected AC/DC converter (PFC) with two different modulation principles[END_REF][START_REF] Lesle | Optimisation of an Integrated Bidirectional Interleaved Single-Phase Power Factor Corrector[END_REF][START_REF] Rondon | Impact of SiC components on the EMC behaviour of a power electronics converter[END_REF]. In switching power converters, CM current comes from the fact that switching operation involves charging and discharging of capacitances like semiconductor parasitic capacitances or capacitances in the layout of the converter. When compared to Si devices, wide band-gap semiconductors like GaN and SiC allow to operate at much higher switching frequency which leads to reduce the size of the passive components [START_REF] Aulagnier | High frequency EMC impact of switching to improve DC-DC converter performances[END_REF][START_REF] Yazdani | Conducted EMI modeling and reduction in a flyback switched mode power supply[END_REF][START_REF] Naayagi | Electromagnetic compatibility issues of dual active bridge DC-DC converter[END_REF]. Alos higher switching speed enables converter designs with potentially higher efficiency. However, higher switching speed leads to fast variations of the voltages all over the layout of the converter which generates high CM current (𝐶 𝑑𝑣 𝑑𝑡 ) [START_REF] Leslé | Optimum design of a single-phase Power Pulsating Buffer (PPB) with PCB-integrated inductor technologies[END_REF]. Therefore, CM current mitigation is often a challenge in SiC or GaN based switching based converters.

Several options have been presented for mitigating EMC issues in DC-DC converters including reducing the EMI from the source and reducing the parasitic elements value [START_REF] Yazdani | Classification and comparison of EMI mitigation techniques in switching power converters-A review[END_REF][START_REF] Hamza | Conducted EMI noise mitigation in DC-DC converters using active filtering method[END_REF][START_REF] Vilathgamuwa | EMI suppression with switching frequency modulated DC-DC converters[END_REF][START_REF] Wang | Parameter extraction of conducted electromagnetic interference prediction model and optimisation design for a DC--DC converter system[END_REF][START_REF] Rondon | Conducted EMC prediction for a power converter with SiC components[END_REF]. There are plenty of researches discussing EMI issues in systems with WBG devices. Some of them deal with the package layout of the semiconductors in order to reduce the EMI [START_REF] Zhang | An Overview of Wide Bandgap Power Semiconductor Device Packaging Techniques for EMI Reduction[END_REF]. Slowing down the switching speed in order to reduce the voltage variation in the layout of the converter is the most common solution but it increases losses. There are some studies focusing on the circulation of the CM current through the coupling paths [START_REF] Fu | Analysis and suppression of conducted EMI emissions for front-end LLC resonant DC/DC converters[END_REF][START_REF] Lee | Analysis and modeling of conductive EMI noise of power electronics converters in electric and hybrid electric vehicles[END_REF]. The effect of coupling paths in redirecting and reducing the CM current from sensitive part of the circuit has been studied through the use of shielding, filtering, interconnection modification or the combination of all of them [START_REF] Fu | Analysis and suppression of conducted EMI emissions for front-end LLC resonant DC/DC converters[END_REF][START_REF] Lee | Analysis and modeling of conductive EMI noise of power electronics converters in electric and hybrid electric vehicles[END_REF]. The coupling paths which correspond to physical layout must be taken into account seriously when it comes to the installation and the prototyping of the converter. The layout of the converter differs in each application which makes it difficult to have a general solution for different converters. Moreover, changing the parasitic elements of each components of the converter as well as the converter structure after prototype completion is time consuming and costly [START_REF] Liu | Fast prediction for conducted EMI in flyback converters[END_REF].

The CM current circulation is the major concern in this work. This current circulation was disturbing correct triggering of the semiconductors therefore it is considered as an obstacle for achieving the nominal operation of the converter. There are several studies illustrating the CM current circulation at simulation level and for small scale converters [START_REF] Quan | Suppression of common mode circulating current for modular paralleled three-phase converters based on interleaved carrier phase-shift PWM[END_REF]. However experimental study of a high voltage/power converter has a great interest since estimating and simulating all the existing parasitic elements in this kind of converter is not an easy task. Hence this work gives an insight into the physical layout which contributes to CM current circulation in a 3-phases insulated converter. This article proposes a method which improves the operation of the converter. The method consists in adding a filter between the transformer star-point and ground. The benefits and limitations of the proposed method are presented. This paper is organized as follows. The experimental platform is presented in the following section. Then the self-disturbance phenomenon which limited the operation of the converter is explained. After problem statement section, section introduces a solution to optimize CM current loops in the converter. The experimental results obtained from the proposed solution are depicted in this section. Finally, a conclusion is given. The article is finished by perspectives in the last section for improvements in future converter designs.

Experimental platform

The application under test in this work is a 3-phase Dual Active Bridge (DAB) converter (DAB3). In general, in DAB converters, two voltage-sources converters (VSC) are coupled through a mediumfrequency transformer (MFT) (Figure 1). The leakage inductance of the medium frequency transformer is used to control power transfer. In a phase shift controlled DAB, the leakage of the transformer also allows soft switching operation with the help of output capacitance of the switches [START_REF] Lin | Analysis and implementation of full-bridge converter with current doubler rectifier[END_REF][START_REF] Lagier | Theoretical and experimental analysis of the soft switching process for SiC MOSFETs based Dual Active Bridge converters[END_REF]. Besides transferring energy, MFT provides galvanic isolation (see Figure 1).

In the DAB3 prototype considered in this work, all legs inside both 3-phase VSCs are controlled to generate high-frequency square wave voltage (50% duty cycle). The voltages created by VSCs are phase shifted with respect to each other to control the power flow through the MFT. Thus the power can be transmitted from VSC1 to VSC2 (presented in Figure 1 as +P), or vice versa (shown in Figure 1 as -P). The novel 3-phase MFT prototype is presented in Figure 2. The transformer has been designed for 100kW power converter and 1.2kV [START_REF] Lagier | Theoretical and experimental analysis of the soft switching process for SiC MOSFETs based Dual Active Bridge converters[END_REF][START_REF] Lagier | A 100 kW 1[END_REF][START_REF] Dworakowski | 3-phase medium frequency transformer for a 100kW 1.2kV 20kHz Dual Active Bridge converter[END_REF]. The transformer ratio is set to 1:1 and the connection of windings is fixed to Yy (Figure 1). The 100kW SiC MOSFET based converter operates at 20kHz switching frequency.

Problem statement

As it has been explained in the introduction, there are many capacitive couplings in the converter layout. The schematic of the studied converter considering major capacitive couplings is shown in Figure 3. In practice, measuring the CM current passing through all the parasitic capacitances in the converter is difficult. In this paper, two groups of parasitic capacitances that contribute to the circulation of the CM current have been targeted. First, the parasitic capacitances in the structure of the transformer which allow the flow of CM current from one VSC to another one and also to the ground (𝐶𝑖𝑛𝑡𝑒𝑟𝑤𝑖𝑛𝑑𝑖𝑛𝑔 and 𝐶𝑛𝑔 in Figure 3). Secondly, there is a capacitive coupling in the isolated power supply of the gate drivers (𝐶𝑝𝑔 in Figure 3) [START_REF] Ghossein | State of the Art of Gate-Drive Power Supplies for Medium and High Voltage Applications[END_REF]. The gate drivers provide an interface between the control circuit and the power semiconductors. Parasitic capacitances of the semiconductors (𝐶 𝑑𝑔 𝑎𝑛𝑑 𝐶 𝑔𝑠 in Figure 3) provide propagation paths to gate drivers for parasitic currents created by 𝑑𝑣 𝑑𝑡 across the switches. With SiC MOSFETs, the high-speed highvoltage variation across switches induces a CM current which can disturb the gate bias and consequently jeopardize the correct triggering of the switch [START_REF] Geramirad | Experiemental study of the selfdisturbance phenomena in a half-bridge configuration of Si IGBT and SiC MOSFET switches[END_REF]. A significant amount of the CM current finds the gate drivers as a propagation path. This large CM current can continue flowing to the control circuit through the capacitive coupling in isolation stage of the gate driver. This may lead to disturbances of the control signals. This problem was preventing to reach the nominal operation of the considered converter. The altered control signal which leads to incorrect switching of SiC MOSFET is shown in Figure 4. It can be seen that the high side switch in phase B in secondary VSC at 1200V, 100kW, at the beginning of the period is not turning on which consequently stopped the operation of the converter. The phenomenon occurred when the dc bus voltage was higher than 800V and when the transmitted power was reaching 100kW. The CM current of the gate driver (input CM current in Figure 3) of phase B has been measured (Figure 5). The generated CM current pulse is repeated between the turn-on and turn-off transition of the corresponding switch. This shows that the CM current through a gate driver is not only due to the corresponding switch but also to the other switches in the same converter. Moreover, CM current pulses are observed in a gate driver power supply when a leg switches in the other VSC [START_REF] Geramirad | Conducted EMI reduction in a 100kW 1.2kV Dual Active Bridge converter[END_REF]. This shows that a current can pass from a VSC to the other. The presence of MFT parasitic capacitance (𝐶 𝑖𝑛𝑡𝑒𝑟𝑤𝑖𝑛𝑑𝑖𝑛𝑔 ) explains this phenomena.

Based on above mentioned experiments, CM current through gate drivers has been suspected to be the cause of false triggering. The false triggering due to large amount of CM current is called here ''selfdisturbance'' [START_REF] Geramirad | Experiemental study of the selfdisturbance phenomena in a half-bridge configuration of Si IGBT and SiC MOSFET switches[END_REF][START_REF] Geramirad | Conducted EMI reduction in a 100kW 1.2kV Dual Active Bridge converter[END_REF]. Therefore, in this work, "EMI performance" of the converter is assessed regarding to the magnitude of the input CM current of the gate drivers. In other words, solving the self-disturbance issue is addressed by reducing the magnitude of the CM current through the gate drivers.

Proposed solution and discussion

As it has been explained the parasitic elements in the layout provide paths for CM currents through gate drivers and solving EMI problems after prototyping is a challenge. In an optimized design, the solution has to be anticipated but in a completed prototype, the solution might be to redirect the CM from the victim of EMI to continue the operation of the converter. Adding a new path into the converter in order to divert the CM current from the victim of the EMI could be a better solution since the converter elements remain without changing. The influence of the parasitic elements can be reduced by creating a new circulation path for the CM current. Providing lower impedance path for CM current compared to isolation of the gate driver avoids gate drivers to experience large CM currents.

In order to limit the flow of CM current from the primary VSC to the secondary VSC and to reduce the input CM current of the secondary VSC, it is proposed to modify the electrical ground connection. In this way, the loops of the CM current are minimized. The proposed solution, is to connect the star-points (N in VSC1 and n in VSC2 in figure 3) of the MFT to the ground through a capacitor 𝐶𝑦𝑔 (see Figure 6). The main goal is to introduce another path to CM current in order to not pass through the gate drivers. The MFT model parameters (see Figure 7) have been measured at 20kHz which is the switching frequency of the converter. The measurement has been done for each winding of the MFT with an impedance measurement device (see Table. I). As it has been depicted in Table 1, the parasitic capacitance between the winding and ground 𝐶 𝑛𝑔 is about 30 𝑝𝐹 which is in the same order of magnitude as 𝐶 𝑝𝑔 (20 𝑝𝐹) of the gate driver. The proposed additional star-point capacitor 𝐶𝑦𝑔 should have a capacitance high enough compared to the one in the galvanic isolation of the gate drivers. So as, it can provide a path of lower impedance for the CM current. Lower impedance in the ground connection makes the path preferable for the CM current to the ground and redirect the noise that was flowing through the transformer. The star-point connection prevents propagation of the CM current to the secondary VSC (see Figure 6, dashed line in green). The 𝐶𝑦𝑔 value of 100 pF was chosen. The DAB3 has been simulated in Matlab Simulink considering the model of the transformer (see Table . I) and including 𝐶𝑦𝑔. The simulations have been carried out to evaluate the proposed solution in terms of voltage and current across the transformer. The simulation results are presented in Figure 8. The B phase voltage and current correspond to three cases: without 𝐶𝑦𝑔, with 𝐶𝑦𝑔 and with 𝐶𝑦𝑔 and 𝑅𝑦𝑔. It can be observed a significant voltage oscillation when the 𝐶𝑦𝑔 is added. However, adding the resistor 𝑅𝑦𝑔 damped the oscillation. The phase current is not influenced by 𝐶𝑦𝑔 or 𝑅𝑦𝑔. The proposed solution was applied to the prototype in order to verify its effectiveness and to measure the performance of the converter in a continuous test mode. Figures 9 illustrates the effect of the proposed connection in CM current of the gate drivers in VSC2. As it can be seen, the added capacitance shunts the CM current to the ground. Moreover, the magnitude of the transferred CM current from primary VSC to the secondary has been reduced. The peak of the CM current in secondary VSC is significantly reduced (by up to 75%) which allows converter operation above 800V. This confirms that self-disturbance was due to the level of CM current through the gate drivers. The current and voltage in phase B have been measured and have been compared with the corresponding waveforms without added filter in order to show that they are not significantly changed due to the proposed solution. Figure 10 illustrates that the added capacitance has not changed the normal behavior of the converter. Moreover, thanks to the proposed solution it is possible to increase the voltage of the converter and reach the nominal operation of the converter (see Figure 11).

Conclusion

This work gives an insight into the physical structure and the loops of the CM current in 3-phase dual active bridge prototype (DAB3). The experimental study in this work addressed the EMI problem of a 100kW, 1200V, SiC MOSFET based prototype. The big amount of the input CM current through gate drivers disturbed the control circuit of the converter. Indeed, the isolated supply of the gate drivers provides a propagation path for this current. Therefore, the amplitude of the CM current of the gate driver has been considered here as the indicator of EMI reduction for the prototype. As a corrective solution for a completed prototype, it has been proposed to connect the star-point of the transformer to the ground through a RC filter. This system-level strategy for ground connection of insulated converters allows to divert the CM current circulation from sensitive part of the system and reduce the magnitude of the CM current without decreasing switching speed. EMI behavior of the insulated DAB should be considered in an early stage of converter design, therefore, this work can help converter designer for further prototyping and installation.

The potential limitation of this study is the added resistance to the passive filter. In this specific design, implementing only the capacitance without the damping resistor adds voltage oscillations across the transformer terminals. The damping resistor reduces the voltage oscillations but it adds some power losses. Therefore, for further MFT designs the CM impedances should be considered as design constraints. At present, MFT design procedures rarely include this criteria in the optimization process. Also where the size specification allows to have a screen between primary and secondary windings, connecting the screen to the ground can minimize the CM current loop and provide a low impedance path for CM current.

Fig. 1 :

 1 Fig. 1: 3-phase dual active bridge converter schematic

Fig. 3 :

 3 Fig. 3: Some parasitic capacitances and common-mode current paths in the converter.

Fig. 4 :

 4 Fig. 4: Experimental result of false triggering of SiC MOSFET in secondary VSC, phase B, 1200V, 100kW.

Fig. 5 :

 5 Fig. 5: Experimental results, measured CM current, 800V, 100kW.

Fig. 6 :

 6 Fig. 6: Proposed solution for ground connection for CM current suppression of gate drivers ( 𝐶𝑦𝑔 in green ).

Fig. 7 :

 7 Fig.7: MFT model[START_REF] Lagier | A 100 kW 1[END_REF]

Fig. 8 :

 8 Fig. 8: Simulation results: Waveform with added filter at 1200V, 100kW (a) VBN (b) IB.

Fig. 9 :

 9 Fig. 9: Experimental results, measured CM current with integrated RC filter, 800V, 100kW.

Fig. 10 :

 10 Fig. 10: Experimental results with and without RC filter at 800V, 100kW (a) Voltage in phase B (b) Current in phase B.

Fig. 11 :

 11 Fig.11: Experimental waveform of DAB3 with RC filter to star point of MFT, 1200V, 100kW.

Table I : MFT parameters based on impedance measurement in 20kHz [23] Parameter Unit Value

 I

	𝐿 𝑓𝑝	µH 17
	𝐿 𝑓𝑠	µH 17
	𝐿 𝑚	𝑚𝐻 1
	𝐶 𝑝	𝑝𝐹 30
	𝐶 𝑠	𝑝𝐹 30
	𝐶 𝑝𝑠	𝑝𝐹 80
	𝐶 𝑛𝑔	𝑝𝐹 30

Acknowledgements

This work was supported by a grant overseen by the French National Research Agency (ANR) as part of the ''Investissements d'Avenir" Program (ANE-ITE-002-01).