T M Correia

S Kar-Narayan

J S Young

J F Scott

N D Mathur

R W Whatmore

Q Zhang

PST thin films for electrocaloric coolers

Relaxor behaviour in a thin film of partially ordered PbSc 0.5 Ta 0.5 O 3 (PST) was confirmed via slim P-E loops and the frequency dependence of the temperature at which the dielectric constant is maximum. Indirect measurements of the electrocaloric effect suggest that removing a field of 774 kV cm -1 yields a temperature change of -3.5ºC to -6.9ºC over a broad range of operating temperatures near room temperature (1 ºC-127 ºC), with a correspondingly large refrigerant capacity of 662 J kg -1 . In addition to low electrical hysteresis, there is negligible thermal hysteresis. PST thin films are therefore promising for EC cooling near room temperature.

Introduction

Electrocaloric (EC) coolers have stimulated great attention since the recent discovery of the giant EC effect in ferroelectric thin films [1][2]. This has sparked the desire to develop an environmentally friendly, powerful and low-cost EC refrigerator [3][4][5][START_REF] Liu | Huge electrocaloric effect in Langmuir-Blodgett ferroelectric polymer thin films[END_REF][START_REF] Chen | Giant electrocaloric effect in leadfree thin film of strontium bismuth tantalite[END_REF]. The EC effect is typically characterized by the entropy change, S, driven by the application/removal of an electric field, E, associated with a temperature change, T as follows: a) tatiana.correia@npl.co.uk Current address: National Physical Laboratory, Hampton Road, Teddington, Middlesex, TW11 0LW b) q.zhang@cranfield.ac.uk (2

)
where P is polarization, c is specific heat capacity, is density and E 1 and E 2 are the starting and final applied fields, respectively. These equations are not straightforward to apply if there is electrical or thermal hysteresis, e.g. near first-order phase transitions or within the "glassy" nonergodic state of some relaxors [5].

Lead scandium tantalate, PbSc 0.5 Ta 0.5 O 3 (PST), has a perovskite structure, A(B'B'')O 3 , in which B-site disorder leads to relaxor behaviour. Appropriate heat treatments promote B-site ordering, and so long-range ferroelectric order may be observed [8][9][10]. Relaxor PST undergoes a diffuse second-order phase transition whereas a first-order phase transition is found in highly ordered PST [8][9][10]. While a paraelectric (or relaxor)-ferroelectric phase transition is known to occur between 0 ºC and room temperature depending on the degree of PST ordering [8,10],

dielectric measurements of PST thin films have indicated the existence of several anomalies at cryogenic temperatures [START_REF] Dawber | AIP Conf. Proc[END_REF]. The underlying mechanisms are unresolved but could involve structural phase transitions and domain-wall dynamics. Here we investigate the EC effect in a partially ordered PbSc 0.5 Ta 0.5 O 3 thin film, which is expected to exhibit a high pyroelectric coefficient, a phase transition near room temperature and slim relaxor-like P-E loops [START_REF] Shorrocks | [END_REF][13][14][15].

Furthermore, PST compositions with W < 0.82 [8] have demonstrated a second-order phase transition and so no thermal hysteresis is expected.

Experimental

A partially ordered PbSc 0.5 Ta 0.5 O 3 thin film was fabricated by sol-gel using precursors of lead acetate trihydrate Pb(OAc) 2 .3H 2 O, scandium acetate (Sc(OAc) 3 , and tantalum ethoxide Ta(OEt) 5 . The scandium acetate and tantalum ethoxide were mixed together, dissolved in 2methoxyethanol (2ME) and refluxed for 10 hrs. Separately, lead acetate trihydrate was dissolved in 2ME, and the water was distilled out of the system. Both solutions were mixed and stirred at room temperature for 2 hrs. The final concentration of the synthesized PST sol was 0.3M. PST sol was spin-coated at 3000 rpm for 30 sec onto a Pt/Ti/SiO 2 /Si substrate. Each layer was pyrolized at 350 ºC for 1 min. After the deposition of 5 layers, the film was annealed at 650 ºC via Rapid Thermal Annealing with a heating ramp of 18 ºC/sec. The thickness of each layer was 20 nm, and the above-mentioned process was repeated ten times to obtain the desired 200 nm.

350¥ 350 m m 2 top electrodes of Cr/Au were deposited by thermal evaporation (Fig. 1). Dielectric constant measurements were carried out using a Wayne-Kerr impedance analyzer (Wayne Kerr Electronics, UK). P-E loops were obtained by means of a Radiant Technologies RT66A ferroelectric tester (Radiant Technologies Inc., USA). A Peltier element was used for temperature control.

Results and Discussion

X-Ray diffraction data (Fig. 2) suggest that the film adopts a single-phase perovskite structure and shows preferential {111} orientations. The degree of B-site chemical order was found to be = 0.32 from the relative intensities I of the ½ ½ ½ and 100 superlattice reflections, according to [16]:

1 , calculated 100 observed 100 ) ( ) ( 2 1 2 1 2 1 2 1 2 1 2 1 = W = W I I I I . (3)
The temperature dependences of the dielectric constant, e , and loss tangent, tan d , at different frequencies are illustrated in Fig. 3. Dielectric constant and loss tangent show maxima at T m near room temperature, and the strong frequency dependence indicates a relaxorferroelectric phase transition. The similarity in T d de below and above T m confirms a secondorder phase transition. The values of e in our PST thin film are smaller than those in previously reported partially ordered PST thin films (between 1000-6000) which were annealed at T > 700 ºC [10]. This may be due to the use of a lower annealing temperature here (650 ºC), resulting in a smaller average grain size.

In order to evaluate the EC effect in the PST thin film, P-E loops at 1 kHz were measured at different temperatures, as shown in Fig. 4. In addition to the frequency dependence of T m (Fig. 3), the slim P-E loops corroborate previously reported relaxor behaviour of partially ordered PST thin films [10]. The temperature dependence of the polarization at different fields, established from the upper branches of the hysteresis loops in E > 0 upon cooling and heating , is presented in Fig. 5. The PST thin film exhibits negligible thermal hysteresis. Given that we are in an ergodic regime, unlike the relaxor polymer poly(vinylidene fluoridetrifluoroethylenechlorofluoroethylene [P(VDF-TrFE-CFE)] for which direct and indirect measurements do not match [17], we may apply the indirect thermodynamic analysis to evaluate EC performance.

Using Equations ( 1) and ( 2), with c = 0.32 J K -1 g -1 and = 8.8 g cm -3 [START_REF] Sinyavsky | Experimental testing of electrocaloric cooling with transparent ferroelectric ceramic as a working body[END_REF], we determined S vs T and T vs T for different E using the cooling data (Figs 5a & b, respectively). There is evidence for peak in both S = -6.3 J K -1 kg -1 and T = -6.2 ºC at 68 ºC, probably due to a fieldinduced relaxor-ferroelectric phase transition. In our PST thin film, | S| = 4.5 -6.3 J K -1 kg -1 which does not exceed the values for e.g. PbZr 0.95 Ti 0.05 O 3 and P(VDF-TrFE) 55:45 mol % copolymers (8 J K -1 kg -1 and 60 J K -1 kg -1 , respectively) [1], as expected given that we are working near a second-order phase transition. However, a broad temperature range near room temperature may be exploited.

It has been suggested [19,20] that one may compare magnetocaloric materials by evaluating refrigerant capacity (RC), and by extension EC materials. From [19] we have:

D = 2 1 ) ( T T dT T S RC , (4)
where T 1 and T 2 are the cold and hot temperatures accessed via the EC effect. Within the temperature range studied, S varies by less than 27% (Fig. 6a) and contributes significantly to RC. We estimate RC = 695 J kg -1 in the limits T 1 = 1 ºC and T 2 = 127 ºC for E = 774 kV cm -1 .

The maximum hysteresis loss, determined from P-E loop area for E > 0 at 9 ºC, could at most reduce the RC by just 4.8% to 662 J kg -1 . Hence the RC we predict from Equation ( 1) is a reasonable estimate for our relaxor films. The fact that, the estimated RC value in PST thin film is much higher than that in magnetocaloric Gd-based materials (360 J kg -1 ) [20], indicates that electrocaloric PST thin films may be used as a media in a cost-efficient refrigeration system operating near room temperature.

Conclusions

A relaxor thin film of PbSc 0.5 Ta 0.5 O 3 with partial B-site order ( = 0.32) was fabricated by solgel, and subjected to rapid thermal annealing. Its relaxor nature near room temperature was confirmed by slim loops and the frequency dependence of T m . PST thin films could be promising for EC refrigeration, as they combine a set of remarkable properties: 1) a large EC effect below and above room temperature of S ~-5 J K -1 kg -1 for under 774 kV cm -1 , 2) no thermal hysteresis, 3) low electrical losses of 4.8% and 4) a small variation of S within 1 ºC -127 ºC which yields a large RC = 662 J kg -1 for E = 774 kV cm -1 .

Fig. 1

 1 Fig. 1 Schematic of the PST thin film structure.

Fig. 2 .Fig. 3 .

 23 Fig. 2. XRD patterns for the PST thin film.

Fig. 4 .

 4 Fig. 4. P-E loops at selected temperatures measured upon cooling.

Fig. 5 .

 5 Fig. 5. Polarization as a function of temperature at selected electric field values, as deduced from the depolarizing branch of P-E loops (E > 0) taken on cooling and heating. The inset shows the temperature evolution of polarization at low field (29 kV cm -1 ) in order to identify the fieldinduced relaxor-ferroelectric phase transition temperature (T C =68 ∞ C).

Fig. 6 .

 6 Fig. 6. EC (a) entropy change, S, and (b) temperature change, T, as a function of starting temperature, for different E (E 1 = 0), predicted using Equations 1 and 2 respectively with the averaged cooling data shown in Fig. 5.

Fig. 1 Intensity

 1 Fig. 1

  Fig.2

Fig. 5

 5 Fig.5

Acknowledgements

The authors thank the Engineering and Physical Sciences Research Council (EPSRC) for the financial support granted to this work under contract EP/E035043 (Cranfield) and EP/E03389X (Cambridge).


D Borah

M T Shaw

S Rasappa

R A Farrell

C O'mahony

M Faulkner

M Bosea

P Gleeson

J D Holmes

M A Morris

C M Faulkner

Plasma etch technologies for the development of ultra-small feature size transistor devices

Keywords: Plasma etch, reactive ion etching, inductively coupled plasma, block copolymer lithography, feature size, pattern transfer

HAL is

Introduction

It is often said that Moore's law has driven progress in microelectronics for over 40 years [START_REF] Moore | Lithography and the Future of Moore[END_REF]. This scaling not only enables greater device densities and computing power but also Confidential: not for distribution. Submitted to IOP Publishing for peer review 27 January 2011 decreases power usage and cost [START_REF] Pease | Lithography and other patterning techniques for future electronics Pro[END_REF]. State of the art integrated circuitry has feature sizes of 32 nm with around 1 billion transistors on a single die (chip) [START_REF]International Technology Roadmap for Semiconductors (ITRS) 2009 Edition Lithography ITRS[END_REF]. However, the industry is largely product demand driven and the need to deliver higher performance -in e.g. medical diagnostics such as MRI and personalised treatment, high resolution video capture and storage, 3D video demands, improved graphics, data encryption as well as high density storage -will drive the processor industry towards 4 nm features sizes and possibly less. Scaling has been achieved by photolithography, the process by which light passing through a patterned mask is incident on a photosensitive resist film at a substrate [START_REF] Ito | Pushing the limits of lithography[END_REF]. The incident light either stabilises or destabilises the resist (negative and positive tone resists) to a solvent so that by solution the mask pattern or its inverse is created in the resist film. In the simplest form of patterning, the patterned resist is used as an etch mask whilst exposed substrate is controllably removed to transfer the pattern to the substrate. Whilst originally wet chemistries were used as etches, the advantages of plasma etching where chemically active radicals/ions were used to remove material led to its' exclusive use [START_REF] Poulsen | Plasma etching in integrated circuit manufacture -A review[END_REF]. The advantages of inductively coupled plasma (ICP) and reactive ion etching (RIE) methodologies in terms of anisotropy (i.e. etching in vertical direction only with little or no lateral etching), large-area and high-density at relatively low pressures have led to the adaption of these sources in industry [START_REF] Hopwood | Review of inductively coupled plasmas for plasma processing[END_REF]. Perhaps the greatest advantage of plasma techniques in modern integrated circuit (IC) manufacture is the uniformity of the etch process which results in extremely uniform features [START_REF] Gottscho | Microscopic uniformity in plasma etching[END_REF].

However, in the last 10 or so years the fabrication industry has undergone and will undergo something of a revolution as both materials and device design change dramatically. Ever decreasing dimension and the role of line edge roughness on device variation [START_REF] Bnerjee | Analysis of systematic variation and impact on circuit performance[END_REF] will necessitate the development of ever more specific, anisotropic plasma etches (for silicon, silica, gate dielectric and other materials). The introduction of new materials such as ultralow-dielectric constant (ULKs) for interconnect isolation [START_REF] Farrell | Facile and controlled synthesis of ultra-thin low dielectric constant meso/microporous silica films[END_REF], high dielectric constant materials such as HfO 2 for the gate dielectric [START_REF] Lee | Thermal stability and electrical characteristics of ultrathin hafnium oxide gate dielectric reoxidized with rapid thermal annealing[END_REF] and the introduction of new device materials such as III-Vs for electron and Ge for hole transport [START_REF] Krishnamohan | K High mobility Ge and III-V materials and novel device structures for high performance nanoscale MOSFETS in ESSDERC[END_REF] will necessitate the development of new etches and etch techniques allowing high anisotropy and composition control in compositionally and structurally complex materials. Further, beyond feature sizes of 16 nm, fundamental changes to both the front end (device level) and back end (interconnect layers) processes will be required.

Devices are expected to move from simple planar designs to nanowire or so-called finFET (fin-field effect transistors) structures [START_REF] Li | Investigation of electrical characteristics on surrounding-gate and omega-shaped-gate nanowire FinFETs[END_REF]. A simplistic schematic of a 3 fin device is shown in Figure 1(a). Potentially, these devices have significantly enhanced performance compared to simple planar CMOS structures but require complicated plasma etch processing to create structures with highly regular sidewalls and relatively high height to diameter aspect ratios. They would be fabricated e.g. from silicon on insulator (SOI) substrates where significant material is removed to form the nanowires. Subsequent lithography-plasma etching is then required to create source/drain and the gate, again with fine control of sidewall regularity. As described above, the active device material is likely to change from silicon or strained silicon and gates are likely to become more complex oxides and oxide mixtures. Precision end-point control (where the etch is stopped) will be required because substrates and gates are likely to be complex, graded, multi-layer structures because of substrate-film lattice mismatch. The level of control of the plasma conditions and etch recipes will be significantly greater than current and likely to require significant methodology development. Besides their application in front end processes, plasma etching is used extensively in back end processing, particularly in the development of topography in which copper is deposited to form the interconnects and vias that connect devices. The Damascene process is a lithographic-etch combination where silica dielectric layers are etched to pattern channels and holes into which copper is plated [START_REF] Hu | Copper interconnections and reliability[END_REF]. The copper is then planarized to remove excess metal. This avoids difficult copper etching since fluorine and chlorine ions produce non-volatile products. Etch stops are used to prevent over etching and poisoning of the device layer. However, resistance-capacitive coupling and the time delay that results, has led to the use of porous silica in an effort to reduce the dielectric constant. This is problematical to etch controllably because of the thinwall structure between pores. The development of ordered mesoporous ULKs will challenge the plasma chemistry further [START_REF] Farrell | Facile and controlled synthesis of ultra-thin low dielectric constant meso/microporous silica films[END_REF] as shown in Figure 1(b) to 1(d). Unless the etch is highly controlled, poor sidewall regularity is difficult to avoid.

It is clear that implementing plasma techniques for surface etching will be a challenge as the nature of transistor devices changes. One potential method for extending the current scales achievable by 193 nm photolithography is the double exposure technique where e.g. features are patterned into resist and a plasma exposure is used to isotropically etch these features to a smaller size [START_REF] Shamiryan | Plasma etching: from micro-to nanoelectronics[END_REF]. A second application of resist and lithographic exposure then creates a resist pattern between the first set which are also isotropically etched to reduce feature size. A third etch is then used to transfer the resist pattern to a device layer. However, the ITRS clearly points to a number of solutions to overcoming barriers to ultra-small (<16 nm) feature size [START_REF]International Technology Roadmap for Semiconductors (ITRS) 2009 Edition Lithography ITRS[END_REF]. One of these involves the use of directed self-assembly where chemical interactions between moieties results in the spontaneous formation of a regular pattern at a substrate surface. These patterns then act as a resist for transfer to a device layer [START_REF]International Technology Roadmap for Semiconductors (ITRS) 2009 Edition Lithography ITRS[END_REF]. This form of chemical patterning will be used to illustrate some of the more interesting challenges facing plasma etch methodologies in the next few years.

Plasma processing for development of nanoelectronics

A plasma is a partially ionised gas containing, ions, radicals and neutrals. The energy to create the plasma is obtained via the coupling of an external magnetic field to the plasma gas. Industrial IC manufacture has been realised by two plasma etching techniques; reactive ion etching (RIE) and inductively coupled plasma (ICP) methods. RIE has been summarised by, e.g., Jansen et al [START_REF] Jansen | A survey on the reactive ion etching of silicon in microtechnology[END_REF]. An RIE apparatus consists of a glow discharge generated plasma where gas molecules (e.g. SF 6 for silicon etching) are dissociated and ionised to create reactive species. Substrates are placed on an r.f (radio frequency)-driven capacitively coupled electrode to generate a d.c. bias at the sample. Reactive species, such as F radicals and ions, impinge on the surface creating volatile silicon species. In most practical processes, RIE is actually a combination of the reactive species reactions that are highly species selective and ion bombardment where the reaction is a physical process caused by kinetic energy transfer. Radical etching (or true plasma etching) is limited to neutral radicals and the plasma is normally excited by microwaves. These plasma etches are chemical in nature and can have very high selectivity and impart little damage. They are, in essence 'isotropic'. This type of selective etch is used to remove photoresist after pattern transfer.

In silicon technologies, selectivity or contrast between the removal rate for the resist and the exposed substrate allow a pattern transfer process to take place generating sharp-edged substrate features with high aspect ratios. As feature sizes decrease, the critical dimension (CD, the regularity of feature size) becomes ever more important because of the need to reproduce devices with similar characteristics [START_REF] Bencher | Gridded design rule scaling: taking the CPU toward the 16 nm node[END_REF]. Thus, one of the main challenges will be how to produce topographic features in a substrate with high fidelity and low roughness when mask materials may not be of ideal composition or thickness (see below for examples). High aspect ratio (depth/feature size) features require 'anisotropic' etches and is achieved using plasmas that generate both radicals (i.e. chemical selectivity) and ions (physical removal of substrate species) and is described by the generic term RIE. In RIE, plasma exposure develops a negative charge at the substrate from electrons produced in the plasma. This charge accelerates positive ions towards the surface in a direction normal to the surface plane. This ion bombardment occurs causing accelerated substrate removal as well as roughening the surface to create more reactive surfaces. In order to achieve higher ion bombardment rates the RIE plasmas are characterised by low plasma potentials (< 100 V) and high r.f. biases (> 500 V) compared to plasma etching where there is only low sample bias (< 10 V). Sidewalls of features are largely unaffected by the bombardment process and so the sidewalls etch at a much lower rate than the substrate base allowing high aspect ratio features to be generated with vertical sidewalls and little change in resist feature size and spacing [START_REF] Tzeng | High-rate anisotropic etching of silicon by remote microwave plasma in sulphur-hexafluoride[END_REF]. It is important to note that RIE is a true combinatorial technique in that etch rates for RIE are higher than the total etch rate that might be achieved by ion beam and chemical etching separately [START_REF] Winters | Surface science aspects of etching reactions[END_REF].

Etch directionality in RIE can be achieved in two main ways. The first of these is simple ioninduced RIE where ion modification of the exposed surface leads to enhanced removal [START_REF] Oehrlein | Reactive ion etching: Handbook of plasma processing technology[END_REF]. Typical examples are Cl 2 sponsored etching of Si and O 2 etching of polymers. The most common technique in the microelectronics industry is ion-inhibition RIE where the as-created sidewalls are coated with a passive film that resists etching [START_REF] Jansen | A survey on the reactive ion etching of silicon in microtechnology[END_REF]. This film can be created by use of gases that e.g. form stable non-volatile carbon halogen materials [START_REF] Legtenberg | Anisotropic reactive ion etching of silicon using SF6/O2/CHF3 gas mixtures[END_REF], trapping volatile silicon products at the trench walls by cryogenic cooling [START_REF] Aachboun | Cryogenic etcing of deep narrow trenches in silicon[END_REF], using gases (e.g. C 4 F 8 ) that form polymeric barrier layers [START_REF] Kenoyer | Optimisation of Bosch etch process for through wafer interconnects Procs[END_REF] and erosion/re-deposition of mask materials such as metal halogens. Typical examples are chlorine and bromine based silicon etches, whilst SF 6 -O 2 based plasmas can also be used as anisotropic etches. An ever more important issue in RIE is aspect ratio dependent etching (ARDE) [START_REF] Yeom | Critical aspect ratio dependence of deep reactive ion etching of silicon[END_REF][START_REF] Lai | Aspect ratio dependent etching lag reduction in deep silicon etch processes[END_REF]. This has been important in micromachining for some time as high aspect ratio features are required. However, as device feature size reduces, this is becoming a general problem in nanocircuitry generation. ARDE describes the loss of fidelity that occurs in small feature sizes where feature width is comparable or less than the feature depth. ARDE is a result of several issues, e.g. deflection via ion scattering of ions towards the sidewall, diffusion effects in reactants/product reaching/leaving the base of the feature and diverging electric fields in the feature.

The inductively coupled plasma (ICP) technique can achieve much higher etch rates than RIE etching as they can operate at high plasma densities [START_REF] Mcauley | Silicon micromachining using a high-density plasma source[END_REF]. In comparison to RIE tools where the r.f. frequency is capacitively coupled to the plasma gas, in an ICP etcher power is input inductively. ICP etchers have their impedance matched to the plasma and consequently achieve high coupling efficiency between the plasma electrons and the applied field. Further, the plasma is much more controllably contained in ICP tools which further improve efficiency. ICP tools operate at low pressures (< 20 mT) which have important consequences. The general principles of plasma etching described above (such as etch chemistry, etch anisotropy, sidewall modification etc.) for RIE are maintained for ICP systems but there are proven advantages of the ICP technique. The low pressure improves diffusion of reactive species into small features enhancing the rather low etch rates achieved by RIE in very small feature sizes. It also reduces ion scattering and so improves the anisotropy of an etch. There are also distinct disadvantages of the ICP etch process. The low pressure reduces selectivity of the etch process and so results in mask damage and removal. The use of thick etch masks limits feature depth. For these reasons, combination ICP-RIE etch tools are frequently used to achieve optimum results.

The following will describe how very small feature sizes can be achieved at silicon substrates using block copolymer nanolithography. The use of block copolymers (BCPs) for generating highly regular patterns at surfaces is now well-established and has been ear-marked as a possible solution for achieving ultra-small features for silicon and related materials [START_REF] Farrell | Chemical Interactions and Their Role in the Microphase Separation of Block Copolymer Thin Films[END_REF][START_REF] Farrell | Self-assembled templates for the generation of arrays of 1-dimensional nanostructures: From molecules to devices[END_REF]. These systems form ordered patterns by a process of microphase separation [START_REF] Farrell | Chemical Interactions and Their Role in the Microphase Separation of Block Copolymer Thin Films[END_REF][START_REF] Farrell | Self-assembled templates for the generation of arrays of 1-dimensional nanostructures: From molecules to devices[END_REF]. However, the need to achieve pattern transfer of the very small features realised by these methods via plasma etching methods is a serious challenge [START_REF] Farrell | Monitoring PMMA elimination by reactive ion etching from a lamellar PS-b-PMMA thin film by ex situ TEM methods[END_REF].

Experimental

Self-assembled PS-b-PMMA (polystyrene-b-polymethylmethacrylate) block copolymer patterns are used for nanolithography -pattern transfer of the substrate to silicon substrates. The concept is simple. A selective ion etch is used to selectively remove the more reactive PMMA leaving a topographic PS pattern over the silicon surface. The PS is used as mask to protect underlying silicon from a silicon ICP etch.

Plasma etching: PMMA dry etch removal was performed with an Oxford Instruments Plasmatech 100 system in RIE mode using various oxygen (O 2 ) and tri-fluoromethane (CHF 3 ) mixtures at a pressure of 10 mTorr at 10 °C. For homopolymer etching, both PS and PMMA films were loaded within the same etch sequence to ensure both films were exposed to identical processing. Two silicon pattern transfer procedures were utilised using a combination of silicon hexafluoride (SF 6 ) and octafluorocyclobutane (C 4 F 8 ) in ICP mode at a pressure of 15 mTorr at 10 °C. In the first method the flow rates were 90 sccm and 40 sccm for C 4 F 8 and SF 6 respectively and the etch time was 30 s at an ICP power of 400 -600 W. In the second method the flow rates were 80 sccm and 15 sccm for C 4 F 8 and SF 6 respectively and the etch time was 12 s at an ICP power of 1200 W. A third oxygen plasma etch was used to remove residual PS after pattern transfer. This PS strip was centred on a 2000 W ICP etch at a pressure of 10 mT with an O 2 flow of 30 sccm for a time of 10 s.

The etch conditions to provide maximum selectivity to PMMA were found by studies of PS and PMMA homopolymer samples which allowed etch contrast between the blocks to be carefully optimised. The RIE etch uses a combination of oxygen and fluorine sources since the addition of oxygen dramatically increases production of fluorine ions and increasing etch anisotropy whilst enhancing selectivity to the oxygen containing PMMA block. In the ICP etch SF 6 acts as the source of ion and radical fluoride species whilst the C 4 F 8 forms a polymeric layer at the sidewalls allowing high etch anisotropy and relatively deep feature sizes (i.e. high aspect ratio) to be produced.

Block copolymer polymer development:

Symmetric PS-b-PMMA copolymers with molecular weights of approximately, 90-85, 52-52, 37-37 and 18-18 kg mol -1 (the polymers are indicated as e.g. PS-b-PMMA 37 k -37 k through the text) and a neutral polystyrenerandom-polymethylacrylate (PS-r-PMMA) with a PS content of 58% were purchased from Polymersource of Canada. For this study, a 1.5% weight solution of PS-b-PMMA in toluene was deposited at 3000 rpm onto a PS-r-PMMA brush layer. The brush layer was deposited by spincoating and annealed for up to 12 h at 180 °C. A thin approximately 3 nm layer remains after repeated washing of the non-reacted PS-r-PMMA layer in toluene. The brush layer is needed to assure vertical (to the surface) arrangements of lamellar blocks of the two polymer types which would tend to form parallel layer structures without use of the brush [START_REF] Farrell | Chemical Interactions and Their Role in the Microphase Separation of Block Copolymer Thin Films[END_REF]. For homopolymer films, solution concentrations of 2 wt. % polystyrene (PS) and 4 wt. % polymethylacrylate (PMMA) were used. This provided homopolymer films with final thickness values in the range of 100 to 150 nm which were used to establish preliminary etch rates. Block copolymer films were annealed at 180 °C under vacuum for around 12 h. Film characterisation: A J.A. Woolam (M-2000U) spectroscopic ellipsometer was used to evaluate homopolymer film thicknesses before and after etching. Scanning probe microscopy measurements were performed using a DME DS-50 dual scope in tapping mode. SEM images were obtained using Hitachi S4800 cold emission microscope and FEI dualbeam strata 400 operating between 2 and 10 kV. In order to minimize charging effects, samples were coated with a thin layer of Au/Pd sputtering methods. TEM samples first received a 25 nm gold protection layer by electron beam evaporation (Temescal FC-2000) at room temperature. This can be observed in some of the images described below. The gold protects the delicate polymer films during cross-section preparation and provides image contrast because of the low atomic number of carbon which ensures that only silicon and SiO 2 are generally seen. Electron transparent cross sectional samples were prepared using FIB or via a sequence of grinding and precision polishing steps (Gatan Series, model no. 691) resulting in a region of electron transparency at the thin film/silicon interface. All FIB samples were also precision polished to obtain the highest quality images possible. Cross sectional images of the etched films were taken on a JEOL 2000 FX operating at 200 kV.

Results and Discussion

As outlined above, to estimate the etch rate of the individual PS and PMMA blocks and, more importantly, to establish the ideal conditions for achieving etch selectivity (etch contrast) between the PS and PMMA blocks, etch rates of homopolymer films were investigated in a similar manner to methods outlined elsewhere [START_REF] Asakawa | Nanopatterning with microdomains of block copolymers using reactive-ion etching electivity Japanese[END_REF]. Briefly, Asakawa showed that the higher the oxygen content within the polymer backbone, the faster it's etch rate was for a specified set of parameters in a CF 4 RIE configuration [START_REF] Asakawa | Nanopatterning with microdomains of block copolymers using reactive-ion etching electivity Japanese[END_REF]. Thus, as PMMA contains an ether linkage and PS is an aromatic hydrocarbon, etch contrast between the two polymers is possible. Using the homopolymer films, the RIE gas flows were adjusted to provide the highest PMMA etch rates and minimum PS etch rates. Data are provided in Table 1 which provides the gas flow rates for trifluoromethane (CHF 3 ) and oxygen (O 2 ) mixtures, homopolymer film thickness, resultant etch rates per minute and PS to PMMA selectivity for a series of RIE etches. We emphasise of course, that these values are provided as a guide for other researchers but it is noted these will generally not be transferable to other equipment as etching is reliant on plasma properties and, hence, experimental configuration etc and these values represent optimum performance for the apparatus used here. We do note that gas flow rates did have considerable effect on the etch profile of the nanostructures generated. This is in itself an unusual observation and we suggest this may be related to etch product removal rate variation which is critical in these ultra-small topographies generated. It can also be seen that the introduction of fluorine deficient CHF 3 into the O 2 RIE which is often used for polymer etching results in improved selectivity and this can be suggested to be as a result of polymerization in the etch process [START_REF] Zhang | Deep reactive ion etching of PMMA Applied Surface[END_REF]. Careful process control through flow rate control allows etch selectivity optimization. It was found that a RIE using CHF 3 /O 2 with the following flow rates of 40 sccm/5 sccm provided a PMMA etch rate of 45 nm min -1 but more importantly a reduced etch rate for PS of 13 nm min -1 over the same time window. This represented an etch selectivity of PS to PMMA of 3.5 for the PS and PMMA homopolymer films.

These etch conditions were then used to selectively etch the PMMA block a self-assembled patterned PS-b-PMMA film. Figure 2(a), is a topographic AFM image of a PS-b-PMMA (37 k -37 k) film produced by deposition and vacuum annealing of the BCP onto a silicon substrate with a neutral PS-r-PMMA brush layer pre-deposited as described above. The film adopts a characteristic fingerprint pattern with the blocks oriented vertically. The feature size was measured at 21 nm. The film has an overall thickness of ~56 nm (inclusive of polymer brush) as determined by TEM. Based on the conditions identified for maximum selectivity for the homopolymer etching, the patterned PS-b-PMMA films were etched for different times ranging from 30 to 120 seconds and examined ex-situ at 30 second interval by TEM, AFM and SEM.

Figure 2 a-f represents a topographic AFM study of various etch times for the PMMA removal step. It can be seen that the plasma etch does not damage the pattern and the finger print pattern is maintained. The height difference in the pattern (between light and dark stripes) increase through the etch times from 6 to 30 nm showing that PMMA removal is taking place. It should be noted that this height difference is not quantitative because it cannot be proven that the tip reaches the silicon substrate from which it may be blocked by the topography of the film produced by etching. However, it is close to what might be expected if the PMMA is removed with an etch selectivity of 3.5. The removal of PMMA can be confirmed by SEM. In Figure 3(a) a 70°tilt cross SEM image displays the structure of a PS-b-PMMA film after 120 seconds exposure to RIE. Figure 3(b) shows a higher resolution SEM image where the average size of the PS features can be estimated as about 19 -20 nm. It was not, however, possible to ascertain from the SEM images whether a residual layer of PMMA remained or that silicon had been removed.

To obtain a more quantitative insight into the PMMA removal step, it was necessary to use cross sectional TEM to resolve the end point of the etch. The end point is the etch time that corresponds to the complete removal of PMMA but no (or only a vanishingly small amount of) silicon is removed. This is critical because as much PS must remain as possible so that the pattern can most effectively transferred. The PS height defines the maximum feature depth that can be achieved in a plasma etch process. Figure 4(a)-(d) represents the TEM cross section at various time intervals throughout the PMMA removal etch process. It should be noted that these samples need to be very carefully prepared to ensure that the arrays of interest are propagating towards the incident beam. This was not always possible and 'ghosting' of the images occurs because of non-perfect alignment (see e.g. Figure 4(d)). It is clear that the silicon-polymer interface can be readily observed in these images. At 30 second etch time, the removal of PMMA can be detected by the emergence of etch pits. These become more apparent at longer etch periods. These etch pits are rounded at the base and this becomes quite pronounced at longer times. The origin of the rounding may result from the diffusion of gas species or from the nature of the electric fields gradients within complex narrow feature size trenches. These two effects can change species densities etc. across the feature base and re-deposition of polymer components at the sidewalls may occur. It might be noted that this re-deposition problem might be expected to be more pronounced in these complex fingerprint patterns than might be expected from idealised directed structures where the lines are parallel. Rounding may also be exacerbated by PS block penetration into the edges of the PMMA feature. It should be noted that the etch rates of both PS and PMMA appear to have increased during the 60 to 90 second interval suggesting that the etch rate is not linear. This is confirmed in Figure 5 which displays plots of the PS and PMMA thickness as a function of etch time. Variation in etch efficiencies with time are typical of many processes and probably result from variations in etch species resulting from plasma stabilization after being struck. After etching for 120 seconds it can be seen that the features have almost reached the silicon surface with only a residual layer of thickness 1-3 nm remaining. This probably represents the remnants of polymer brush. The final PS thickness is only some 14 nm and this is inconsistent with the etch selectivity optimised by use of the homopolymer films. An etch selectivity of 3.5 for a film of 56 nm would suggest the PS would be around 40 nm thick at the end point. Indeed, the data shown in Figure 5 and indicates that high etch selectivity is maintained only for the first 60 s of the etch. The accelerated removal of PS with time could result from plasma variations with time or from differences in homopolymer properties compared to the block copolymer. We would suggest a simple explanation where products of the PMMA removal increase with time and these species assist PS removal. The relatively poor etch selectivity observed in these structures represents a significant challenge for etch processing to generate very small structures because thin resist layers will be required.

An important point to note that the etch anisotropy is excellent. The width of the PS features after PMMA removal is estimated at 19 nm compared to the feature size of unetched blocks of 22 nm. This is close to the value estimated by SEM (Figure 3(b). Thus only some 1.5 nm of the etch process is removed from each side of the PS block. Considering some polymer chain inter-penetration occurs, sidewall removal is negligible in this process.

The ability to selectively etch these structures is a precursor to pattern transfer to the substrate as the PS structure will form a resist during silicon removal in an ICP etch as described in detail below. It also allows direct (secondary) electron microscopy imaging of the selfassembled polymer structures. The ability to pattern over a range of BCP molecular weights is shown in Figure 6. As can be seen, the molecular weight of the blocks determines the feature size. Analysis of the images shows that the variation in feature size is 44 nm (90 k-85 k), 32 nm (52 k -52 k), 20 nm (37 k -37 k) and 11 nm (18 k -18 k). It should be noted that the PS-b-PMMA (18 k -18 k) system provided almost ideal straight line patterns using normal procedures. This was found to be highly reproducible. It appears that at these small polymer chain lengths that the random coil structure of the blocks is becoming highly extended allowing more ordered arrangements of the micro-phase separated structures.

Figure 7 shows SEM and TEM images of a fully pattern transferred surface following the silicon plasma etch process and residual PS strip as described above (derived from a PS-b-PMMA 37 k -37 k film). PMMA had been removed using normal etch conditions for 120 s. From the 70°tilt SEM image (Figure 7(a)) it can be readily seen that the etch process has facilitated good pattern transfer. The fidelity of the pattern transfer can be more directly observed using TEM cross-section as can be seen in Figure 7(b). Etch selectivity is high as the 14 nm PS feature remaining from the PMMA removal has resulted of a feature depth of around 32 nm. However, the silicon line features are not as regular as might be hoped. Both the base of the features and the top of the silicon lines are rounded somewhat. The rounding of the features at the base of the silicon lines produced probably reflects the rounding seen in the PMMA removed samples (Figure 4). The rounding of the silicon lines probably results from the rounded PS features seen in Figure 4 as well as only limited etch anisotropy. As discussed more extensively below, the rounding is a result of several processes. Certainly etch selectivity and anisotropy contributes as film thickness variation does. However, dimension and pattern regularity are important as they can determine product removal and redeposition. The problems associated with using relatively soft resists such as PS at these nanometre dimensions is clear. It should be stressed that although these features have become rounded, dimension control through the silicon pattern transfer has been maintained. The features have an average base width of 19-20 nm in close agreement with the PS feature size noted above.

The same pattern transfer treatment was used to look at the various polymer molecular weights used (18 k -18 k through to 90 k -85 k) and the data are described in Figure 8. The feature widths at the base agree reasonably well with the SEM data presented in Figure 6 (42 nm (90 k-85 k), 33 nm (52 k -52 k), 19 nm (37 k -37 k) and 11 nm (18 k -18 k). This suggests that etch selectivity is high through the feature size regime. It is also apparent from all the TEM images that the crystallinity of the silicon is maintained and there is no indication of amorphitization following the etch processes. This is true of even the smallest features even at the narrowest points of the lines suggesting this is a well optimized process. Two further points may also be noted. For the largest feature size, rounding at the base and the silicon lines is the smallest observed. This suggests our proposed mechanism of diffusion limitations leading to product re-deposition is probably correct. The other point that is important is that rounding appears reduced for the 18 k -18 k small features. This is again consistent with our mechanism as these straight line features should allow easier gas transport. These data suggest that as feature size is reduced in microprocessors that complex designs will become progressively harder to maintain. This latter point is confirmed by studies of idealised PS-b-PMMA 37 k -37 k samples that had been aligned using x-ray interference lithography where the brush is chemically prepatterned by exposure to the x-rays [31]. SEM and cross-section TEM provide detailed analysis of these samples in Figure 9. SEM data (Figure 9(a)) clearly indicates the line structures which can now be accurately described as nanowires. The width of the wires is consistent with previous measurements at about 20 nm. TEM data (Figure 9(b) through (d)) show the uniformity of the processing. As previously, the crystallinity of the process is maintained. Figure 9(b) shows several nanowires and the first few are indicated by arrows. The dark area between them is metal used in the sample preparation. This and similar images can be used to estimate the reproducibility and regularity of the polymer structure and the processing. The width of 35 nanowires was measured from images using Gigital micrograph GATAN Software. The mean half width of the wires was 17 nm with a standard deviation of 0.56 nm. This can be considered as providing a measure of the line edge roughness (LER about half the standard deviation, 0.28 nm) and reproducibility of the process. Line edge roughness is a critical parameter in device functionality as it determines the drive voltage needed for on-off operation [32]. It is obvious from the images that the shapes are much more regular structures than for the non-aligned systems. Indeed, the top of the wires and the sidewalls show little sign of curvature. The base of substrate between features shows little sign of rounding compared to the previous data and this is consistent with reduced material re-deposition. There is a small slope to the sidewalls indicating some anisotropy but this is much reduced compared to previous. Overall, the regularity of the BCP structure has resulted in dramatic improvement of the etch process. This work has shown that very small features can be produced in silicon using block copolymer lithography. However, the work has highlighted several issues that will result in challenging demands on the plasma etch processes used in industry. These are discussed in more detail below.

Conclusions and Outlook

The use of self-assembled patterns to generate circuitry is in its infancy and it is clear that block copolymers are showing some promise. Significant developmental work is required to generate large-scale wafer processing techniques of sufficient reliability, reproducibility and predictability if these 'bottom-up' methods are to be commercialised for integrated-circuit manufacture. However, whether resist patterns are generated by these emerging methods or other techniques such as nanoimprint lithography, x-ray lithography, e-beam techniques etc. it is obvious that plasma chemistry and apparatus must be further developed in parallel with the patterning science. This work has shown that very small feature size silicon nanowire structures can be created from conventional plasma etch methods and etches can be developed that are reasonably reproducible and reliable. However, many challenges will need to be addressed if ultra-small feature size nanolithography is to be developed to meet future requirements.

These include:a) It will be necessary to designing circuitry based around on simple structures which allow rapid diffusion of etch gases to prevent re-deposition of products and ensure regularity of structure. This is consistent with industry design changes which have allowed circuitry to be generated from parallel line structures rather than using complex shapes or patterns that were seen as a limitation in self-assembly generated patterns [START_REF] Liu | Integration of density Multiplication in the formation of device-oriented structures by directed assembly of block copolymer-homopolymer blends[END_REF]. b) There will have to be precision end-point control of the etch processes of sensitive materials so that shape control of features is as exact as possible. Techniques such as optical interferometry will need to be extended into the nanometre range to facilitate precise measurement of not only end-point but also defect density in self-assembled patterns [START_REF] Boning | Plasma etch endpoint via interferometric imaging[END_REF]. c) Achieving high etch selectivities or contrasts to allow high aspect ratio features may not be possible using conventional resist materials. This will affect the shape of features particularly at sidewalls etc. The development of novel resists such as metal oxides for patterning of etch sensitive materials such as complex III-V systems is a key challenge for both plasma scientists and chemists [START_REF] Liu | Nanolithography using spin-coatable ZrO2 resist and its application to sub-10 nm direct pattern transfer on compound semiconductors[END_REF][START_REF] Hildreth | Tungsten as a CMOS compatible catalyst for the metal-assisted chemical etching of silicon to create 2D and 3D nanostructures Electronic Components and Technology Conference[END_REF]. d) In order to achieve the required etch selectivities and anisotropies, plasma conditions and apparatus will require careful attention to achieve required shape/size regularity.

There will be further needs to design new etch chemistries and methods. One of the methods that has attracted some attention has been the development of isotropic etches to reduce feature roughness [START_REF] Wallow | Line-edge roughness in 193-nm resits: lithographic aspects and etch transfer Proceedings[END_REF]. New plasma methodologies being developed may be key to generating nanofeatures of required regularity and techniques such as pulsed ICP methods have shown promise [START_REF] Agarawal | Characteristics of pulsed capacitively coupled plasma sources for plasma etching 61 st Annual Gaseous Electronics Conference[END_REF]. Authors have shown monolayer control of etch depth has been demonstrated using pulsed polymer -deposition steps via modulation of the bias power [START_REF] Agarwal | Plasma atomic layer etching 33 rd[END_REF]. e) The limitations of resist chemistry may require the use of hard masks -materials such as metal oxides whose rate of removal in an etch is very small. This would allow high aspect ratio features to be produced and help improve shape profiles and etch anisotropy. This can be achieved in block copolymer lithography by transferring the pattern to an underlying oxide prior to etching the material of choice. This is illustrated in Figure 10. In step (b) a hard mask resist layer is deposited onto the substrate. (c) and (d) represent BCP development and selective block removal. (e) and (f) represent pattern transfer to the substrate and resist strip. This hard mask technique may be of particular value to unconventional materials such as Ge and III-Vs which are expected to play important roles in devices due to mobility limitations. In block copolymer lithography, pseudo hard-mask methods may be developed by use of polymer blocks that have hetero atoms included to provide high etch contrast in e.g. RIE etches [START_REF] Cheng | Rapid directed self assembly of lamellar microdomains from a block copolymer containing hybrid[END_REF].

It is clear that significant research and development will be required to meet the etch requirements outlined here. Whilst much of the article is focussed in silicon etching, the need to develop non-Si etches of the highest quality will be required. There will be a pressing need to develop etches for non-conventional materials of complex composition and structure which result in high pattern transfer fidelity whilst maintaining that structure and composition of the materials. It is likely in the next few years that plasma science, which has had something of a low profile in the area of microelectronics, will adopt a more significant role in delivering solutions for the nanoelectronics industry.

Table 1:

As-deposited and post etch homopolymer film thickness, etch rates nm min -1 , gas flow rates and PS to PMMA selectivity for 2% wt PS and 4% wt PMMA homopolymer films after 1 minute of etching. Etch 3 was used for all diblock copolymer etching. Base Pressure and temperature were set at 10 mTorr and 10 C respectively. Please note that etch rates are measured to ane experimental accuracy of around 15 nm min -1 . These errors are based on reproducibility of three similar measurements.

RIE

Figure 1 :

 1 Figure 1: (a) simple schematic of a FIN-FET structure -a proposed novel device structure. (b) through (d) illustration of the challenges in etching porous materials (as illustrated in (a) where etching can leave open (c) or closed pores (d). See text for details.

Figure 2 :

 2 Figure 2: AFM topographic 2 x 2 micron scans for 0, 15, 30, 45 60, 90 and 120 second etch intervals of a 1.5% PS-b-PMMA film deposited on a neutral PS-r-PMMA brush layer (etch times are shown for each AFM in the figure).

Figure 3 :

 3 Figure 3: SEM images of PS-b-PMMA film after 120 s PMMA etch period. (a) tilt image indicating PS removal and (b) higher resolution top down image.

Figure 4 :Figure 5 :

 45 Figure 4: Progressive PMMA removal observed via TEM images of films post 40 sccm CHF 3 /5 sccm O 2 RIE plasma etches ((a) to (d) from top to bottom respectively and times illustrated in figure). (a) and (b) the formation of etch pit after 30 and 60 seconds respectively. (c) the formation of well developed etch cavities at the 90 second interval and full removal of PMMA after 120 second (d). Gold metal capping layers ensure that polymer profile is protected from thermal and chemical processing during TEM sample thinning.

Figure 6 :

 6 Figure 6: Top down SEM images of BCP patterns of various molecular weight PS-b-PMMA films on silicon substrates. Molecular weights as indicated in figures. All scale bars 1 um.

Figure 7 :

 7 Figure 7: (a) SEM tilt image of pattern transferred polymer pattern. (b) TEM cross-section of same.

Figure 8 :

 8 Figure 8: Cross-section TEM images of silicon lines formed via BCP pattern transfer. (a) PS-b-PMMA 90 k -85 k, (b) PS-b-PMMA 52 k -52 k, (c) PS-b-PMMA 37 k -37 k, (d) PSb-PMMA 18 k -18 k.

Figure 9 :

 9 Figure 9: SEM (a) and TEM (b) to (d) of aligned PS-b-PMMA silicon nanowire structures developed on silicon-on-insulator substrates by plasma etching processes.

Figure 10 :

 10 Figure 10: Schematic of how block copolymer lithography could be combined with a hard mask to generate small size features in substrates. See text for details.

Acknowledgements

The authors would like to acknowledge SFI grant 03-IN3-I375 and the SFI CRANN CSET grant which supported this work. The authors would like to thank Intel Ireland for provision and development of patterned wafers under the Adaptive Grid Substrate CRANN programme. Tyndall are thanked for provision of laboratory and fabrication infrastructure. We would like to Thank Paul Nealey for provision of the XIL patterned substrates. Intel are also thanked for assistance with electron microscopy and sample preparation. Several coworkers are also acknowledged; N Petkov and L West for making significant contributions to the data presented here.


U Cvelbar
email: uros.cvelbar@ijs.si

Towards large-scale plasma-assisted synthesis of nanowires

Towards large-scale plasma-assisted synthesis of nanowires

U Cvelbar

Intoduction

With the development of new technologies, especially for semiconductor industry, a requirement for smaller size materials grew as fast as the size of applications decreased. The quest for a new material lead to nanosize materials, like nanotubes, nanowires, quantum dots, nanopyramids, nanopowders, etc., which are synthesized by numerous methods. Today we can basically make most types of nanosize material (e.g. oxides, sulfites, alloys, etc.) which can be of different sizes, shapes or even crystal structure. In most cases, synthesis processes cannot be well controlled or even more, they are not always reproducible due to many parameters which can influence synthesis reactions. Repeatability off course depends on the method and the synthesis system. And normally the synthesis is easier to control in small volumes, systems or reactors.

Going to larger volumes and scales increases cost, process control problems & reproducibility as well as influences material quality. Therefore, the biggest problem is still large-scale & largequantity production of nanosize materials.

The easiest shape of nanomaterials to synthesize in large-quantities is nano-sphere like material, e.g. different nanopowders or quantum dots. More exotic and difficult shapes are nanopyramids, nanoflowers, nanocones, etc., but at the same time they don't poses high values for general applications. More desired shape is nano-cylinder-like including nanowires, nanorods or nanotubes, which are alternative nanomaterials by function to nano-spheres, either for solar cells, batteries or other photochemical and electrochemical applications. In this paper we will focus only on nanowires, especially metal (iron and zinc) oxide nanowires, which found wide use as chemical sensors [1], optoelectronic devices [2], dye-solar cells [3], gas sensors [4], etc.

Metal oxide nanowires (NW), e.g. iron oxide can be synthesized on a large-scale thru many routes; either with wet chemical treatments (sol-gel mediated reactions [5][6][7], hydrothermal [8][9] or solvothermal processes [10]), thermal and/or gas decomposition [11][12][13][14][15][16][17][18][19], chemical vapor deposition (CVD) [20] and plasma-assisted methods [21]. The so-called wet chemical procedures which include sol-gel mediated reactions, hydrothermal processes or solvothermal processes and their variations are widely spread for synthesis of iron oxide or zinc oxide. However these processes are typically difficult to control on a nanosize level and yield rather small amounts of material as well as have relatively large synthesis time which can be hours long (Figure 1).

Additionally, we have problems with impurities, reaction catalysts or surfactants, which need to be separated from synthesized nanowires and this represents in many cases a serious problem.

Alternative to wet chemical procedures are thermal procedures which include also a gas decomposition typically on hot surfaces. In this group we can categorize also a flame synthesis [22], resistive heating [18], thermal oxidation [17,19,23] or hot surface gas mixture decomposition (e.g. decomposition of gas mixture CO 2 , SO 2 , NO 2 , H 2 O on 504-600 o C heated Fe substrates [11] or decomposition of Fe(CO) 5 vapors on 300-400 o C Si or glass substrates [15]).

These thermal procedures yield rather sufficient amounts of NWs on surfaces which are pure without any impurities. Their growth can be well controlled, meaning that their morphology can also be well determinated during growth. Whereas the downturn of thermal processes are intermixed forms of metal oxides (e.g. Fe 1-x O, -Fe 2 O 3 and Fe 3 O 4 ) and sometimes relatively large synthesis times hours long (Figure 1) [22,12]. However, some faster thermal growth methods have been demonstrated [18,22]. Generally, more time-efficient are normally CVD procedures which yield same amounts of material in much shorter periods, even below hours or tens of minutes. However, downside is a use of templates, NWs are in most cases polycrystalline, processes are hard to control and tailoring NW shapes is difficult. One of efficient methods for such material productions is mixed method with the thermal/gas synthesis method and is called hot-wire or hot filament CVD [24,25].

Most of these stated methods unfortunately don't produce sufficient amounts of NWs in milligram or gram amounts which would help to overcome a large market value of NWs and consequential a wider use in applications. Here we need to find new ways to produce more NWs in shorter time periods which will take us less than one hour. The answer can be found in plasma-assisted synthesis methods, which can yield in some cases gram amounts [26,27], but there are still some drawbacks to the plasma technology, which need to be addressed. Generally, plasma-assisted methods can be divided into 4 routes for NW synthesis plus mixed routes which employ two or more methods. These methods can be used for synthesis of different NW types on different substrates or NW can be simply collected after the synthesis. To demonstrate applicability of different routes, we will concentrate only on iron oxide and zinc oxide NWs.

Synthesis routes for iron oxide NW (e.g. -Fe 2 O 3 ) can be also compared with the routes for CuO 2 , V 2 O 5 , Nb 2 O 5 or ZnO with SnO 2 NW.

Fast plasma routes for synthesis

Plasma-enhanced chemical vapor deposition

Plasma-enhanced chemical vapor deposition (PECVD) is modified version of CVD which

incorporates plasma and is used to deposit nanostructures including NWs from gas state (vapor) to solid state on a substrate. Chemical reactions involved in the process occur after creation of plasma of the reacting gases with vapors. The schematic of the process is presented in Figure 2a, where we can see that the material, in our case metal M (Fe, Zn) or metal oxide, is evaporated or chemically sputtered from a target, interacts with plasma species or carrier gases and then is deposited from plasma to the substrate surface. Here is worth mentioning that when we have a physical sputtering of target material into plasma and deposition, the method should be called Plasma-enhanced physical vapor deposition. Unlike physical sputtering, in chemical sputtering, plasma ions react chemically with the target material and the so formed compound evaporates out thru one of several possible mechanisms.

With PECVD route is relatively easy to prepare ZnO NWs, but it seems much harder for iron oxide NWs. This is due to almost 3-times lower melting temperature of zinc and needed heat for vaporization compared to iron. There are almost no reports on PECVD synthesis of iron oxide nanowires. The only report worth mentioning is synthesis of pyramid-line Fe 3 O 4 NWs by Gao [21], where they used CH 4 and N 2 for sputtering of hematite -Fe 2 O 3 into plasma, and consequently deposited onto Fe 2 O 3 substrate.

Contrary to iron oxide NW, there are numerous reports on synthesis of ZnO by PECVD route. The PECVD synthesis of ZnO NWs can be performed in a single step thru self-assembly [28][29][30] or a two-step method [31]. The single step procedure reported by Iizuka et al. the zinc is sputtered from a zinc target, reacts with oxygen on the substrate to form ZnO nanostructures in O 2 +Ar plasma [32,33]. Authors used a hollow-type magnetron (HTM) RF plasma source at a frequency of 13.56 MHz, where the sputtering rate of Zn is controlled by the biased voltage and the oxygen flow rate. On the other hand, the neutral oxygen atoms in plasma play a key role in oxidation of sputtered Zn and enable deposition of ZnO as NWs on SiO 2 substrate. [32] Experiments revile that the synthesized ZnO NWs are folded and bundled on the substrate. [33] Whereas the alignment of NW depends on density of sputtered Zn atoms, seen in optical emission spectra (OES) from Zn/Ar spectral line intensity ratio. [33] The best line intensity ratio for NW synthesis is supposed to be Zn/Ar with a ratio 2/1. Then Zn can also be vaporized in air (N 2 +O 2 ) plasma and deposited as ZnO NWs in order to get other shapes, e.g. hexagonal columns [34], or can be synthesized with other carrier gases e.g. H 2 [35].

The two step PECVD method for ZnO NW growth employ evaporation of solid zinc powder thru thermal heating by hollow-cathode discharge to over 1000 o C in a protective Ar atmosphere, followed by oxidation with atomic oxygen, and condensation from the gaseous phase on the Si substrates. [36] In this case the surface temperature, oxygen radical flux, quantity of zinc powder and polarity are the most important factors for ZnO NW fabrication on the industrial scale. The two step method can be also separated into the nucleation and the growth step. Typical example of nucleation step is variation of oxygen content in a gas mixture with diethylzinc to create a precursor for zinc and oxygen on c-plane sapphire, Pt film on SiO 2 /Si and Si (100) substrates. [31] Within the two step PECVD method, the special cases of ZnO NWs can be found, e.g ZnO/a-C core shell nanowires. [37]

Plasma-catalyst assisted

Plasma-catalyst assisted synthesis of NWs is performed when substrates are coated with a thin film or a layer of separate catalyst particles, which can lead to a metal oxide NW growth with catalyst particles at their tips or at the bottom (Figure 2b). [START_REF] Meyyappan | Inorganic Nanowires[END_REF][START_REF] Levchenko | [END_REF][40] In many cases, the metal containing gas or the liquid with catalyst particles are not readily available for a deposition of many metal oxides from plasma to the surface. Therefore, it is easier to start with either solid metal or metal oxide nanoparticles deposited in a nanometer layer, using sputtering or evaporation. These particles are then used as a nanometer-sized nuclei which catalyze reactions with plasma species or selectively attach certain building units supplied from plasma gas phase (Fig. 2b). As a result we get various nanostructures including NW. In this process, the size of nuclei (catalyst particles) or a catalyst layer thickness can determine the thickness of synthesized NWs on the sample surface. [START_REF] Meyyappan | Inorganic Nanowires[END_REF]41,42] There are no reports on a synthesis of iron oxide nanowires with plasma-catalyst assisted route. Whereas for ZnO NW growth, there are some reports on such synthesis thru vapor-liquidsolid (VLS) mechanism. In this case, the gold (Au) nanoparticles are used as catalysts to grow ZnO nanostructures. However, there are some drawbacks to VLS growth, since it requires a very high temperature up to 925 o C, so that Zn vapor can be dissolved into the Au catalyst to form an alloy droplet. After saturation, Zn precipitates out from the droplet and is oxidized as ZnO NWs grow. [43]

Plasma flight-thru

The plasma flight-thru method encircles various processes that can reshape or/and synthesize new NWs from particles, e.g. solid-liquid-solid (SLS), solid-vapor-solid (SVS), solid-liquidvapor-solid (SLVS) growth mechanism during their time of flight thru plasma. In this method, particles passing thru gaseous plasma, typically with a free fall, can be either melted or vaporized and then interacted with plasma species for reshaping or tailoring into new types of NWs (Figure 2c). [44][45][46] This method works very well with non-thermal or even with thermal plasmas created in high-frequency discharges and at high gas pressures. This method is relatively new for synthesis of NWs and has very high yields. However, there are no reports on synthesis of any iron oxide nanowires thru this route. The main problem could be the time iron or iron oxide particles spend inside the plasma during the flight thru. This time of flight should be much longer, so that we could get reshaping thru SVS phase, since iron or iron oxide need relatively high temperatures for melting or evaporation. Meaning, we need to apply more aggressive plasmas with higher densities of radicals or longer dwell time.

On contrary to the iron oxide, the ZnO NW flight thru synthesis has been reported in 5 papers by 3 different groups, which used either DC, RF or MW discharge. The group from Taiwan used DC plasma discharge operated at 70 kW and atm pressure, where Zn powders were fed into plasma jet thru carrier gas and subsequently underwent vaporization, oxidation and quench process. [44,47] They noticed that the ratio between carrier gases significantly influences the formation of shape and length of NWs. In the case of N 2 carrier gas, the addition of Ar helped reshaping the precursors-zinc powders of average size 10µm from spheres into elongated or NW-like structures, and less N 2 gas in plasma should favor formation of elongated rod/NW-like nanostructures. [44] Therefore different types of plasma gases can affect the nanopowders morphology. The same group has also concluded that the feeding powder impurities, input power and residence time of powder, influence the shape of nanoparticles including synthesis of tetrapot-like elongated structures. The ZnO NWs had higher length vs. diameter (l/d) ratio with increased input energy and longer residence time. [47] Similar experiment was carried in RF discharge operating at 4 MHz and 30 kW, where also Ar and N 2 were used as forming gas and sheath gas, respectively. [48] The Zn powder underwent vaporization, oxidation and growth process following the flowing gas in the reactor.

In order to get ZnO, oxygen gas was injected into system together with sheath gas which reacted with Zn powder. They also demonstrated that different amount of oxygen, given at different flow rates can tailor the length and diameter of NW at the same conditions. The optimal flow rate for NW synthesis was found between 2.5 and 5 l/min. They concluded that the oxygen partial pressure and supersaturation of zinc vapor, controlled by feedstock rate of starting material, play key roles in a growth of ZnO NWs or nanorods (NR). [48] The highest NW l/d dimension ratio and yield of ZnO NWs by plasma flight-thru method was achieved by Sunkara et al. They used 2.45 GHz MW plasma jet reactor at atm pressure and input power ranging from 300 W to 3 kW. [26,27] In their experiments, the sheath gas was air with flow rate 10-15 slpm. To sheath gas they added also a reforming gas H 2 (100 sccm) and O 2 (500 sccm). This method uses the same mechanism of particle reshaping as stated above, but has higher efficiency of synthesis, since 80-90% of all powders are reformed into NWs already after the first run. Because of this, it presents a large potential for future large scale industrial NW production, taking into account also the lowest energy consumption needed for reshaping Zn powders into ZnO NWs compared to other discharge sources.

Direct plasma synthesis

Direct plasma synthesis is process where NWs are grown after exposure to gaseous plasma, directly from the substrate with epitaxial growth -bottom up principle. The method is simple and doesn't use any templates, catalysts or deposition from a vapor phase. In this method, typically metal foils or pieces are exposed to gaseous plasma radicals, which interact with metallic surfaces, are dissolved into material, and consequentially create nanostructures on the surface.

For SLS growth mechanism, the NWs grow on the top of melts. This SLS growth is typically used for a low-melting metals or metal oxides. [49] In this case, plasma or temperature liquefies the solid metal, on top of which at first stage solid metal-oxide nuclei are created, and in second stage NWs are grown. [49][50][51] The selective growth at the molten metal, sometimes referred as self-catalytic growth on molten phase occurs thru liquid-phase epitaxy. Whereas for the solidsolid (SS) phase, epitaxial NW growth occurs after a similar spontaneous nucleation, when nuclei are created due to the phase transformation of metal to metal oxide (Figure 2d). In this respect it resembles plasma-catalyst assisted growth, but from its own nuclei. With this method, NWs can be raised from the nuclei only when we overcome the initial surface instability created by plasma. At the same time this method enables precise tailoring of NW shapes and lengths by just controlling the plasma radical flux to the surface [52][53][54][55][56][57], the electrical conditions and the surface temperature [58,59]. And more, NWs grow directly on the metallic surfaces which can be directly employed for various applications without any additional procedure steps, what lowers production costs and problems. [60][61][62] This route is rather new, and has been first reported in 2005 for the growth of Nb 2 O 5 NWs on niobium foils. [63] Authors used radiofrequency ICP plasma, generated in O 2 gas at low gas pressures . Since then, the method was demonstrated also for other metal oxide NWs including hematite -Fe 2 O 3 . [51,63,64] Authors found that single crystalline -Fe 2 O 3 NWs array growth can be controlled by the flux and the dose of neutral oxygen atoms and oxygen ions to the surface. [65] Since atoms and ions heat the surface thru recombination processes, the released heat can be used to overcome surface temperature of 570 o C for Fe to undergo spontaneous nucleation to hematite phase -Fe 2 O 3 . [64] This can be effectively achieved also by controlling the electrical conditions on iron surfaces exposed to reactive oxygen plasma. [58] After nuclei are created, the surface temperature need to be controlled, since increase in temperature can result in different nanostructures, e.g. -Fe 2 O 3 nanobelt structures, due to increased mobility of atoms, or even absents of any nanostructures. [64] Therefore the growth of NWs can be only done in narrow well defined temperature range. Although the proper surface temperature is required for NW growth, it is not the most important growth parameter. The most important is the flux of neutral atoms and ions, which supports growth "supply and demand" and can tailor the shape, thickness and length of NWs which are erected from nuclei. [58,64,65] Conversely, there are no reports of such growth for ZnO NW. This is probably due to low heat evaporation energy needed for sublimation of zinc in vacuum, where zinc leaves surface into gaseous plasma during processing before the stable ZnO nuclei can be created. For this case SLS growth mechanism should be applied.

Mixed plasma routes

Mixed plasma routes are methods which combine two or more of stated NW synthesis routes.

The typical example of such method would be synthesis of NWs with catalytic particles mixed together with other metallic particles in plasma flight-thru. Here the catalytic particles would represent the nucleation cores on which the other vaporized metallic particles could recombine into NWs from gaseous phase. Although there are no reports on such synthesis of zinc oxide or iron oxide NWs, this method can be found in reports for synthesis of other NWs or nanotubes, including CNT. [66][67][68][69] As a mixed plasma route we could also classify mixed PECVD and plasma flight-thru route where Zn powders are deposited into quartz tube which is feed with O 2 gas and a swirled gas N 2 +O 2 (air) which blows particles into MW plasma torch. These particles are then evaporated, reformed and deposited in colder region of quartz tube as ZnO NWs. [70,71]

3 parameters for large-scale synthesis of nanowires

Time

The time is important parameter when we look for the large-scale nanomaterial synthesis, but depends on the material that we would like to synthesize. Before we saw that some plasma routes are not useful for synthesis of some nanomaterials or have not yet been developed. And more these synthesis routes predominantly depend on material which is being synthesized.

If we concentrate on synthesis of iron oxide nanowires or nanorods, then we can see that there are no reports on plasma synthesis by flight-thru or by plasma-assisted catalyst support, which is used for many NWs (Figure 3). On the other hand we have some alternative methods such as Pulsed laser deposition (PLD), which takes 60 to 140 minutes to synthesize exotic -Fe 2 O 3 NW. [72] Better process efficiency can be found in some thermal routes such as rapid flame synthesis, which can take about minimum 20 to 30 minutes [20] or resistive heating with only a couple of minutes [18]. Otherwise thermal processes over different sub-routes can generally take rather long time periods with anything between 20 min to 12 h or a couple of days. [12,13,73,74] The most time-efficient process reported is direct plasma synthesis during the synthesis of -Fe 2 O 3 NWs. This process takes only several minutes, and produces large amounts of NWs (Figure 3).

Better efficiency of this plasma process compared to thermal processes is somehow logical, since plasma uses already dissociated molecules into atoms or ions which readily interact with surfaces without any intermediate states like in thermal gas-surface interactions. Result of this is better time-efficiency, since no molecule sticking, adsorption and dissociation due to increased temperature is needed. This better time-efficiency can be found also for plasma-enhanced chemical vapor deposition (PECVD) compared to standard CVD processes. The PECVD can be even 10-times more time-efficient in respect to CVD. Rather large variation of time required for synthesis is seen in the wet chemical processes such as hydrothermal or solvothermal. These processes take a couple of hours or even days, and depend on too many parameters and stepoperations. Based on distribution of all reported syntheses for iron oxide NWs seen in Figure 3, the least time-efficient is gas decomposition method, which can take several days. [15,75] For the zinc oxide NW/NRs, the reports are displayed in Figure 4. The most time-efficient plasma synthesis process is flight-thru method, where Zn or zinc oxide particles are reformed when passing thru plasma. This process normally takes less than a second, and has been reported for the time periods from 1.7×10 -4 to 5×10 -3 min. [26,27,44,47,48] Very fast is also combination of PECVD and plasma flight-thru, where NWs are synthesized in only one second (1.7×10 -2 min). [70,71] This method is followed by direct plasma synthesis with several tens of seconds, but the slowest is PECVD process, which takes more than 10 min. [32][33][34][35][36][37] And more all shown plasma cases are several orders of magnitude faster then thermal, wet chemical and gas decomposition processes (not shown in Figure 4), and therefore more promising for industrial scale-up.

Quantity

The time-efficiency is important for a large-scale synthesis, but it needs to be correlated with the quantity of synthesized material. Processes that are time-efficient, but yield small amounts of material are generally not very usefully, except for specific applications. Therefore, we need to look for fast and high-yield routes.

In Figure 3 we can see that plasma processing is superior to gas decomposition, hydrothermal and solvothermal processes as well as to CVD and PLD processes. The highest quantities of iron oxides are reported for direct plasma synthesis with 5×10 -5 g/min of -Fe 2 O 3 NWs. [64,65] PECVD method doesn't yield high quantities of iron oxide NWs to be adequate for industrial use. The maximum quantity of pyramid-like Fe 3 O 4 NWs reported for PECVD was 8.3×10 -8 g/min. [21] Therefore even PLD and CVD processes yield higher quantities, 6×10 -6 g/min and 1×10 -4 g/min, respectively. [72,20] The only competitive process to direct plasma synthesis is thermal, where the highest quantity of synthesized -Fe 2 O 3 NWs reported was about 5×10 -5 g/min. [18,19,20] Although iron oxide NW have never been synthesized by plasma flight-thru method, far the best results for the large-quantity of ZnO NWs have been achieved by this method (Figure 4).

With plasma flight-thru we can synthesize several tens of grams per minute. More precisely, the best results feature 20 to 50 g/min, which is enough to make NWs widely available for everyday use. [26,27,44,47,48] High plasma flight-thru yields are followed by direct plasma synthesis on foils by maximum 6×10 -4 g/min. Much smaller amounts of ZnO NWs can be synthesized by mixed methods [70,71] or by large selection of PECVD methods [32][33][34][35][36][37]. Results are even more discouraging for other methods, such as wet chemical procedures.

Quality

Additional requirement for a successful large-scale synthesis is nanomaterial quality, which encompasses the dimensions and shape of material, crystallinity, special crystallographic features, surface density, electrical and mechanical properties, purity as well as the process control. In many cases, even when time and quantity are appropriate for a large-scale manufacturing of NWs, it can happen that the quality of synthesized material is not good enough.

One of key points is purity in shape and dimension of synthesized NWs featured by ratio between length and diameter (l/d) of NWs. These two are especially important for plasma flightthru route, since most of material that passes thru plasma doesn't reform into NWs, but remains in particle shape or starts reforming into tripod or tetrapod NWs at higher temperatures [47,48]. Such NWs are in many cases not desirable and need to be separated from other NWs. Whereas at too low plasma temperatures or higher amounts of feeding powder, the densities of plasma species are not high enough to reform all passing material. The result is mixed product of nanoparticles and NWs which are typically sticked together and inseparable (Figure 5a). The optimal yield vs. quality for ZnO NWs was reported for plasma flight-thru method with 30 kW RF thermal torch operating at atmospheric pressure, which gave 20 g/min with l/d ratio 14. In this case, increase of feeding powder to 37 and 53 g/min, lowered l/d ratio to 8 and 2, respectively. [48] Better reformation of NWs was achieved by Sunkara's group in 1.7 kW MW plasma. Their process yield 20 g/min at l/d ratio of 50, while the reformation of powder to NWs during the first run was already 80-90%. [26] Better purity of material in single NWs or NW arrays can be achieved in plasmas, compared to other synthesis processes. Thermal routes normally produce different types of metal oxides and not only the desired ones. While the wet chemical routes or gas decomposition contain impurities which are residuals, side products of synthesis or foreign atoms build into NWs. These direct plasma synthesis (Figure 5b). In application as electrode such thermally prepared sample will not be useful, since a thick iron oxide layer with multiple iron oxide phases will act as a trap for passing electrons. While in the case of plasma synthesized NW array, electrons will easily pass thru the layer without any significant losses. Additional advantage of plasma synthesized NWs is also so-called lattice superstructure, which is in -Fe 2 O 3 NWs featured by periodic oxygen vacancy planes (Figure 6a). [64,76] These planes are probably created due to surfacethermal stress initiated during fast epitaxial growth. And more these structures give nanowires p/n-type properties without any doping, and enable more efficient charge transport along the wires. On contrary there are no such structures observed on thermally prepared samples (Figure 6b), when the NW grow slowly and in thermal equilibrium. On the other hand this doesn't necessary hold for some -Fe 2 O 3 NWs made with fast thermal flame synthesis.

For many applications, single crystallinity of NWs is desirable. Therefore we aim to create only single-crystalline NWs during the large-scale plasma synthesis. This is hard to achieve especially for PECVD and plasma-catalyst assisted processes, where typically long winding wires are composed of polycrystalline particles or catalyst atoms which are incorporated into the NW structure. The single-crystalline NWs are also very often converted to polycrystalline after subsequent annealing process in various gas mixtures during synthesis process.

Last but not the least the shape control of NWs is important, not only l/d ratio, but the morphology of the wire. Changing plasma parameters during the growth enables us to tailor NW in different ways. The NWs can be thicken or narrowed during the growth or widen at the bottom, etc. Tailoring of NWs can be achieved by controlling the flux of neutral atoms or ions to the treated surface. If the incoming flux of ions and the ion energy is increased during the synthesis, then the basal diameter of NWs widens, making them a tip-like and appropriate for application as AFM tips. However in order to control the shape as well as the surface density of synthesized NW, we need to fully control plasma parameters. This is a ground requirement for transfer of nanotechnology to the industrial scale. Additionally plasma parameter control enables optimization of synthesis, since we can link plasma species such as neutral atoms, ions and metastables and their fluxes to surface to growth dynamics. Nevertheless there is still big gap of accessible measurement techniques to control these plasma species. In recent years many groups have successfully applied the new characterization tools for determination of plasma parameters; e.g. catalytic probes [77][78][79][80][81] or LIF [56,82,83] for measuring neutral atom densities, and Langmuir probes [84,85] for charged species. And more, even simple optical emission spectroscopy is becoming more widely accessible and used for monitoring of plasma processes.

[86-88] Therefore, we need use these tools to control plasma parameters in order to optimize plasma synthesis, and control more efficiently processing time, quantity and quality of NWs.

Consequently by controlling and optimizing processes we can optimize energy used for synthesis. The process energy efficiency will play important role in future selection of synthesis route, where we will have to look at input energy per synthesize gram of NWs. And here, plasma routes have certainly advantages over the energy-consuming competitive thermal processes.

Concluding remarks and future challenges

Plasma routes represent alternative which will replace the standard processes such as thermal, hydrothermal, solvothermal, CVD or gas decomposition processes used for synthesis of NWs.

Not only they are faster, but also yield significant gram per minute quantities of NWs. Today, the best results are obtained by plasma flight-thru method with 20 g/min, where powder is passing thru plasma and is reformed. The NWs are typically collected at the bottom of plasma reactor.

When we require NWs on the top of sample, then the fastest large-quantity method to grow them is direct plasma synthesis with approx. 10 -4 g/min. Additional benefit of NW synthesis is production of single-crystalline, pure NWs without any atomic impurities and with the lattice superstructure. Beside this, in plasma synthesis process is relatively easy to control by monitoring plasma parameters which can determine other NW features e.g. l/d ratio and shape.

For development and optimization of the large-scale NW manufacturing, we need to address 6 future challenges. These challenges are: 1) Understanding better the growth origin of NWs and the role of plasma parameters;

2) Development of the theory that describes NW growth;

3) Further optimization and exploration of plasma flight-thru and direct plasma synthesis process; 4) Exploration of new plasma routes for the synthesis of other NW types (other metallic oxides, sulfites, etc.); 5) Development and implementation of the tools for control and monitoring of plasma parameters during synthesis; 6) Improvement of the process energy efficiency [89] with the maximization of input energy per synthesized quantity of nanowires at better material quality.

Figure captions

  impurities significantly affect properties of synthesized material. In thermal oxidation of Fe foil the thick basal layer contains also other iron oxide phases e.g. -Fe 2 O 3 and Fe 3 O 4 , beside -Fe 2 O 3 NWs. At the same time we get only -Fe 2 O 3 NWs with thin basal layer of -Fe 2 O 3 after

Fig. 1 :Fig. 2 :Fig. 3 :Fig. 4 :Fig. 5 :

 12345 Fig.1: Schematic representation of methods for the large-scale synthesis of nanowires on the time

Fig. 6 :FiguresFig. 1

 61 Fig.6: (a) HRTEM image of a typical (direct) plasma-grown α-Fe 2 O 3 NW showing an edge-on

Fig. 2

 2 Fig.2

29

 29

Fig. 3

 3 Fig. 3

Fig. 4 31Fig. 5

 45 Fig. 4

Fig. 6

 6 Fig.6

Acknowledgement

The author gratefully acknowledges Slovenian Research Agency (ARRS) for financial support thru US-SLO bilateral collaboration grant and national project research grant.