Olivier Sentieys
email: olivier.sentieys@inria.fr

Daniel Menard
email: daniel.menard@insa-rennes.fr

Customizing number representation and precision

  L'archive ouverte pluridisciplinaire

Introduction

There is a growing interest in the use of reduced-precision arithmetic, exacerbated by the recent interest in artificial intelligence, especially with deep learning. CPU, GPU and TPU architectures already provide interesting, but limited, reduced-precision capabilities. 8-bit integer, 16-bit floating point (e.g., float16, bfloat16) are typical examples of low-precision computations included in the architectures. Through the use of hardware acceleration on FPGA architectures, and thanks to their reconfiguration features, arithmetic customisation can be further extended and almost any number format and word-length can be leveraged in the accelerator. All these examples illustrate the growing interest in the use of custom arithmetic.

In computer arithmetic, the representation of real numbers is a major issue. Indeed, most algorithms are using mathematical functions, and their accuracy and stability is directly related to the accuracy of the number representation they use. To represent real numbers, there exist two main formats: fixed-point and floating-point. Fixed-point (FxP) representation encodes real numbers as an integer value scaled by a fixed factor, thus leading to a format comprising an integer part and a fractional part, the point of the real number being at a fixed position. In the floating-point (FlP) representation, the scaling factor is encoded in the format, which comprises a mantissa (or significand) and an exponent, the point being floating along with the computations.

Fixed-point arithmetic is sometimes favoured due to its high efficiency in terms of energy consumption, cost, and performance, with a reputed clear advantage compared to floating-point. This comes at the cost of the pain of the programmer, who needs to manage all scaling operations to respect the rules imposed by FxP arithmetic. Floating-point representation can be considered as the main representation for real numbers, especially in high-performance computing. In contrast to FxP, FlP provides a high dynamic range, is able to represent with high accuracy both small and large numbers, and is very easy from a programmer point of view, since all scaling and rounding operations are totally managed by the hardware. However, this ease of use comes with relatively important area, delay and energy penalties when compared to FxP.

This chapter presents both number representations, and tries to draw a fair a comparison between customized fixed-point and floating-point arithmetic. One conclusion is that the choice between FxP and FlP is not obvious and depends on the application considered. It is shown that, in some cases, low-precision floating-point arithmetic can be the most effective and provides some benefits over the classical fixed-point choice for energy-constrained applications. Indeed, combining the ease of use of floating-point representation associated to low-energy benefits of small bit-width, make reduced-precision floating-point arithmetic very promising, but not always useful. Section 2 presents in detail the fixed-point representation, the rules governing the propagation of the fixed-point formats through operations, the quantization error process associated with computations relying on reduced-precision fixed-point arithmetic, and how overflow should also be considered. Overflow is critical in FxP since the dynamic range to represent real values is very limited in this format.

As already mentioned, a fixed-point number is composed of an integer and a fractional part. The aim of the fixed-point conversion process is to determine for each data the binary-point position and more specifically the number of bits for the integer part and the fractional part. This process is explained in Section 3, more details can also be found in Chapter 9.

Section 4 details the floating-point representation, the principle of FlP addition and multiplication, and provides some fair comparisons of their cost and performance with regard to FxP. Section 4 also presents some opportunities to reduce the cost of FlP operators as well as some libraries that can be used to simulate and perform hardware synthesis of customized, low-precision floating-point computations.

Finally, Section 5 gives some comparison results in terms of area, delay, and energy between the two number representations FxP and FlP, first at the operator level, and then in the context of their use in applications, thus considering the errors due to low-precision computations.

2 Fixed-point arithmetic

Fixed-point representation

Fixed-point (FxP) representation is a way to encode real numbers with a virtual binarypoint (BP) located between two bit locations as shown in Figure 1. A fixed-point number is made-up of an integer part (left to the BP) and a fractional part (right to BP). The term m designates the integer part word-length (IWL) and corresponds to the number of bits for the integer part when this term is positive. This IWL includes the sign bit for signed numbers. The term n designates the fractional part word-length (FWL) and corresponds to the number of bits for the fractional part when this term is positive. The fixed-point value x f xpt is computed from the following relation

x f xpt = -2 m-1 .S + m-2 i=-n b i 2 i (1)
Numbers in the dynamic range [-2 m-1 , 2 m-1 -2 -n ] can be represented in this fixed-point format with a precision of q = 2 -n . The term q corresponds to the quantisation step and is equal to the weight of the least significant bit b -n . The Q-format notation can be used to specify fixed-point numbers. For a fixed-point number having an IWL and FWL equal to m and n, respectively, the notation Q m.n is used for signed numbers and uQ m.n for unsigned numbers. The total number of bits w is equal to m + n. In fixed-point arithmetic, m and n are fixed and lead to an implicit scaling factor equal to 2 -n which does not change during the processing. The fixed-point value x f xpt of the data x can be computed from the integer value x int of the data x such as

x f xpt = x int .2 -n

Integer part

Fractional part

2 0 2 1 2 n 2 m 1 b m 2 b m 3 S 2 2 b n b 0 b 1 b 1 b 2 2 m 2 m n 2 1
Figure 1: Fixed-point specification

Format propagation

In this section the rules governing the propagation of the fixed-point formats through operations are described for the different arithmetic operations. Let us consider an operation having x and y as input operands and z as output operand. Let Q mx.nx , Q my.ny and Q mz.nz be the Q-format of the operand x, y and z, respectively.

Addition -subtraction

The addition or the subtraction of two fixed-point numbers

x and y can lead to an overflow if the operation result is not in the dynamic range of x and y. In this case one more bit must be used to represent the integer part. Thus, dynamic range of the output result must be taken into account. A common IWL, m c , must be defined to represent the input and the output

m c = max(m x , m y , m z ) (2)
where m z is computed from the dynamic range of the variable z. This IWL allows aligning the binary-point of the two input operands before computing the addition or the subtraction. The fixed-point format of the operation output is as follow

m z = m c n z = max(n x , n y ) (3)
Multiplication In contrast to the addition or the subtraction, there is no risk of overflow for the multiplication if the format of the output respects the following conditions. Thus, the fixed-point format of the output z = x × y is obtained from the input x and y fixed-point format with the following expression

m z = m x + m y n z = n x + n y (4)
The multiplication leads to an increase of the number of bits to represent the operation output. The total number of bits w z is equal to w x + w y = m x + n x + m y + n y .

Division For the division operation z = x/y, the value 0, must be excluded of the divisor y interval [y, y] leading to the interval [y, -2 -ny ] ∪ [2 -ny , y] if we consider the case that y is strictly negative and y is strictly positive. The IWL of the division output must be able to represent the largest value of the division result. This one is obtained by dividing the largest dividend by the smallest divisor. The largest possible dividend is -2 mx-1 while the smallest divisor is 2 -ny .

The FWL of the division output must be able to represent the smallest absolute value of the division result. This one is obtained by dividing the smallest dividend by the largest divisor. The smallest dividend is 2 -nx while the largest divisor is -2 my-1 .

Thus, the fixed-point format of the output z = x/y is obtained from the input x and y fixed-point format with the following expression

m z = m x + n y n z = n x + m y . (5)
Like for the multiplication, the total number of bits w z is equal to w x + w y = m x + n x + m y + n y .

Quantisation process and rounding modes

In DSP applications, a sequence of arithmetic operations leads to an increase of data word-length when multiplication and division operations are involved. To maintain data word-lengths in reasonable range, the number of bits must be reduced. In fixed-point arithmetic, the least significant bits are discarded. Let x , be a fixed-point variable with a word-length of w x bits. The quantisation process Q() leads to the variable x, depicted in Figure 1, and having a word-length w = w xd. Let S x be the set containing all the values which can be represented in the format after quantisation.

Truncation In the case of truncation, the data x is always rounded towards the lower value available in the set S x :

x = x • q -1 • q = kq ∀x ∈ [k • q; (k + 1)q[ ( 6
)
with • , the floor function defined as x = max (n ∈ Z| n ≤ x) and q = 2 -n the quantisation step. The value x after quantisation is always lower or equal to the value x before quantisation. Thus, the truncation adds a bias on the quantised signal and the output quantisation error will have a non zero mean. Truncation rounding is widely used because of its cheapest implementation. The d LSB of x are discarded and no supplementary operation is required.

Conventional rounding

To improve the precision after the quantisation, the rounding quantisation mode can be used. The latter significantly decreases the bias associated with the truncation. This quantisation mode rounds the value x to the nearest value available in the set S x :

x = x + 1 2 q • q -1 • q = kq ∀x ∈ [k • q; (k + 1 2 )q[ (k + 1)q ∀x ∈ [(k + 1 2 )q; (k + 1)q] (7)
The midpoint q 1/2 = (k + 1 2 )q between kq and (k + 1)q is always rounded up to the higher value (k + 1)q. Thus, the distribution of the quantisation error is not exactly symmetrical and a small bias is still present.

The conventional rounding can be directly implemented from [START_REF] Muller | Handbook of floating-point arithmetic[END_REF]. The value 2 -n-1 is added to x and then the result is truncated on w bits. In the technique presented in [START_REF] Lapsley | DSP Processor Fundamentals: Architectures and Features[END_REF], the conventional rounding is obtained by the addition of x and the value b -n-1 .2 -n and then the result is truncated on w bits. This implementation requires an adder of w bits.

Convergent rounding

To reduce the small bias associated with the conventional rounding, the convergent rounding can be used. To obtain a symmetrical quantisation error, the specific value q 1/2 must be rounded-up to (k + 1)q and rounded-down to kq with the same probability. The probabilities that a particular bit is 0 or 1 are assumed to be identical and thus the rounding direction can depend on the bit b -n value.

x =        kq ∀ x ∈ [k.q; (k + 1 2 )q[ (k + 1)q ∀ x ∈](k + 1 2 )q; (k + 1)q] kq ∀ x = q 1/2 and b -n = 0 (k + 1)q ∀ x = q 1/2 and b -n = 1 (8)
The specific value q 1/2 has to be detected to modify the computation in this case. For this specific value, the addition of the data x with the value 2 -n-1 has to be done only if the bit b -n is equal to one.

The alternative to this conditional addition is to add the value b -n-1 .2 -n in every case. Then, for the specific value q 1/2 , the least significant bit b -n of the data x is forced to 0 to obtain an even value. This last operation does not modify the result when b -n is equal to 1 and discard the previous addition operation if b -n is equal to 0. The convergent rounding requires a supplementary addition operation and an operation (DTC) to detect the value 2 -n-1 and then to force bit b -n to zero.

Overflow modes

In DSP applications, numerous processing kernels involve summations requiring to accumulate intermediate results. Consequently, the dynamic range of the accumulation variable grows and can exceed the bounds of the values that can be represented leading to overflows. When an overflow occur, if no supplementary hardware is used, the wraparound overflow mode is considered. For the wrap-around overflow mode, the value x wa of variable x coded with m bits for the IWL is equal to

x wa = (x + 2 m-1 ) mod 2 m -2 m-1 (9)
with mod the modulo operation. To avoid overflow, the fixed-point conversion process described in the rest of this chapter must be followed conscientiously. Especially, the dynamic range of the different variables must be carefully evaluated for sizing the IWL.

For variables having a long tail for its probability density function, the IWL can be large and thus leading to an over-estimation for numerous values. In this case, saturation arithmetic can be used to reduce the IWL. Let consider a variable x coded with m bits for the IWL. In saturation arithmetic, when the value x is lower than -2 m-1 the value x is set to -2 m-1 . When the value x is higher than -2 m-1 the value x is set to -2 m-1 -2 -n .

Fixed-point conversion process

As described in Section 2, a fixed-point number is made-up of an integer part and a fractional part. The aim of the fixed-point conversion process is to determine for each data the binary-point position and more specifically the number of bits for the integer part and the fractional part. The total number of bits w i = m i + n i to encode a data influence the implementation cost C. The implementation cost reduction imply to minimize the integer and fractional part word-lengths. The reduction of the number of bit leads to unavoidable error between the finite precision values and the infinite precision ones and thus degrades the quality of the application output. Consequently, the implementation cost minimization through word-length optimization is achieved with the constraint that the output quality degradation ∆λ is limited and below a maximal value λ max . This fixed-point conversion process can be modeled by the following optimization process min w (C(w)) subject to ∆λ(w) ≤ λ max [START_REF] Fang | Open-source variable-precision floating-point library for major commercial fpgas[END_REF] where w is a N -length vector containing the word-lengths of the N data inside the application, C(•) is an implementation cost function that models the cost such as area or energy consumption according to the data word-lengths. ∆λ(•) computes the quality degradation due to the tested word-length configuration w [START_REF] Menard | SQNR determination in nonlinear and non-recursive fixed-point systems[END_REF][START_REF] Rocher | Accuracy evaluation of fixedpoint LMS algorithm[END_REF][START_REF] Menard | Analytical Fixed-Point Accuracy Evaluation in Linear Time-Invariant Systems[END_REF], and λ max represents the maximal quality degradation tolerable by the application.

Reducing the number of bits for the integer part or for the fractional part leads to different effects. The integer part word-length m, defines the range of values that can be represented. When m is too low, overflows occur, leading to non-linearity in the processing and a significant amplitude for the error compared to infinite precision. As long as m is higher than m min , the minimal value ensuring no overflow, modifying m will not have effect on the output quality. When m is lower than m min , overflow occurs and quickly the output quality is highly degraded. To determine the integer word-length, the data dynamic range is evaluated and the minimal value of m ensuring no overflow or a sufficiently low overflow probability is selected.

The fractional part word-length n defines the accuracy. The larger n is, the smaller the error between finite and infinite precision is and the higher the accuracy is improved. Unlike for the integer part, reducing the number of bit the fractional part will progressively reduce the accuracy and increase the output quality degradation. Thus, the determination of the fractional part word-length is a trade-off between the implementation cost and the quality degradation. This trade-off is explored through the solving of the optimization process described in Equation 10. The word-length of each data is optimized through the minimization of the implementation cost under quality degradation constraint. This optimization process requires three elements, an optimization algorithm, a cost function C(•) and a quality degradation function ∆λ(•). The quality degradation function depends on the fractional part word-length of each data. The cost function C(•) requires the knowledge of the total word-length of each data. Thus, for this optimization process, the integer part word-length has to be known.

Consequently, the fixed-point conversion process is split into two parts. Firstly, the integer part word-length is determined from the results of the data dynamic range evaluation.Secondly, the fractional part word-length is optimized by solving the optimization process described in Equation 10.

Integer-Part Word-Length Determination

The first stage of the fixed-point conversion process aims at determining the number of bits for the integer part of each data in the considered application. The goal is to minimise the number of bits while protecting against overflows which degrade significantly the application quality. Firstly, the dynamic range of each signal is evaluated. The different types of techniques available to estimate the dynamic range are presented in Section 3.1.1. Secondly, the IWL is determined from the dynamic range and the fixed-point format propagation rules. Scaling operations are inserted to adapt fixed-point formats. This process is described in Section 3.1.2.

Dynamic range evaluation

The determination of the number of bits for the integer part requires to evaluate the signal dynamic range. existing techniques to evaluate the dynamic range can be classified according to the targeted applications. Critical systems do not tolerate high computational errors. Any overflow occurrence may lead to a system failure or a serious quality degradation. For example, in 1996, the first launch of the Ariane 5 rocket ended in explosion due to software failure. This failure was caused by the overflow of the variable representing the rocket acceleration. Thus, for critical systems, the integer part word-length has to cover the entire range of possible values. In this case, the bounds should be determined by techniques that guarantee the absence of overflow occurrence and allowing to certify the data dynamic range. Techniques based on interval arithmetic or affine arithmetic satisfy these constraints, but at the expense of an overestimation of the bounds. Statistical approaches that determine bounds from a set of simulation results can reduce the overestimation, but can not ensure the absence of overflow occurrence.

Overflows occur when the number of bits of the integer part is not sufficient. Overflow occurrence degrades the result quality at the system output. However, the hardware implementation cost is unnecessarily increased if the number of bits exceeds the needs. Many systems are tolerant to overflows if the probability of overflow occurrence is low enough. In this case, determining the number of bits of the integer part is a trade-off between the implementation cost and the output system quality degradation. This is translated into an optimisation problem where the integer word-length of each variable of the system is reduced while maintaining an overflow probability lower than the accepted probability [START_REF] Nehmeh | Fast integer word-length optimization for fixed-point systems[END_REF]. The challenge is to estimate the probability density function (PDF) of the data in order to be able to compute the overflow probability. Stochastic approaches, which model the variable PDF by propagating data PDF model from the inputs to the system output, can be considered.

IWL determination and insertion of scaling operations

The IWL is determined by propagating the IWL thought the operations from the inputs to the outputs with the help of the dynamic range evaluation results. This propagation process uses the format propagation rules provided in Section 2.2.

To illustrate this stage, let us consider the sequence of operations depicted in Figure 2. The data d is the output of the operation O j and the input of operation O k . Let m s , m d and m i be respectively the IWL for the operation O j output, the data d and the operation The IWL of the signed data d is computed from its dynamic range [x, x] with the following expression

O k input. d o i O k O j
m x = max ( log 2 (| x |) + 2, log 2 (| x |) + 1) . ( 11
)
The IWL m o is computed from the propagation of the IWL of the operation O j inputs with the help of the rules provided in Section 2.2. A scaling operation is inserted at the operation O j output if s o = m dm oj is strictly negative. In this case, a left shift of s o bits is required to modify the IWL. It means that the IWL of the operation O j was too important compared to the data dynamic range of d and the s o most significant bits of x are a copy of the sign bit and can be discarded. For multiplication and division, the IWL m i is equal to m d and no scaling operation is required at the operation O j input. For addition and subtraction, a common IWL m c for the input and the output must be determined and m i = m c . A scaling operation is inserted at the operation O k input if s i = m oi -m d is strictly positive. In this case, a right shift of s i bits is required to modify the IWL of the data d. It means that supplementary bits are required for the addition or subtraction O j to avoid overflow.

Fractional-Part Word-Length Determination

The fractional part word-length is optimized by solving the optimization process described in Equation 10. The search space for this combinatorial optimization problem is huge and numerous algorithm have been proposed to find an optimized solution in a reasonable execution time. In Chapter 9 (Word-Length Optimization of Fixed-Point Algorithms), a survey of the different optimization algorithms is proposed. These optimization algorithms are iterative process, testing different combinations of word-length and moving in the search space. Consequently, the cost function C(•) and the quality degradation function ∆λ(•) are evaluated numerous time. The challenge is to develop techniques able to evaluate efficiently and accurately the quality degradation. In Chapter 9, a survey of the different existing techniques to evaluate the quality degradation is proposed.

Floating-Point Arithmetic

Floating-point (FlP) representation is today the main representation for real numbers in computing, thanks to a potentially high dynamic range and to its ease-of-use since all scaling and rounding operations are totally managed by the hardware, contrary to fixed-point arithmetic. However, this ease of use comes with relatively important area, delay and energy penalties. The floating-point representation is presented in Section 4.1. Section 4.2 details the principle of FlP addition and multiplication and provides some fair comparisons of their cost and performance with regard to FxP. Then, Section 4.3 presents some opportunities to reduce the cost of FlP operators, without jeopardizing the accuracy of the computations too much. Finally, Section 4.4 describes some libraries that can be used to simulate and perform hardware synthesis of customized, low-precision floating-point computations.

Floating-Point Representation for Real Numbers

In computer arithmetic, the representation of real numbers is a major issue. Indeed, most algorithms are using mathematical functions, and their accuracy and stability is directly related to the accuracy of the number representation they use. The floating-point (FlP) representation is a way to encode real numbers with a scaling factor encoded in the data. Given an unsigned M -bit mantissa m, a signed integer exponent of value e coded on E bits, often represented in biased representation, and a sign bit s, the radix-2 floating-point value x f lpt is represented as

x f lpt = (-1) s × 1.m × 2 e . ( 12
)
Contrary to fixed-point representation, the point in the FlP representation of the number is "floating" and scaled by the exponent, similarly to the scientific representation in decimal arithmetic that we use in our daily life. The mantissa m -or the significand of the representation -is used to generate a normalized number with an implicit "1" conforming the integer part belonging to [1, 2[. This "1" being implicit, it is not represented in the format, freeing space for one more digit. This number is then scaled by means of the exponent e, and the sign is controlled by the value of the sign bit s. e being a signed number, the exponent is usually represented in the number format as biased by a constant value b. With this representation, any number under this format can be represented using M + E + 1 bits as shown in Figure 3. ) and the values 0 and infinity also represents an overhead. Despite this additional cost, FlP representation is today established as the defacto standard for real number representation. Indeed, besides its high accuracy and high dynamic range, it has the huge advantage of leaving the whole management of the representation to the hardware instead of leaving it to the software designer, significantly diminishing developing and testing time. This domination is sustained by IEEE 754 standard, lastly revised in 2008 [START_REF]Ieee standard for floating-point arithmetic[END_REF], which sets the conventions for floating-point number possible representation, subnormal numbers management and the different cases to be handled, ensuring a high portability of programs. Table 1 gives the representations of the FlP numbers following the IEEE 754-2008 standard. Mantissa width M is without the implicit 1. The bias b is equivalent to the maximum exponent value e max . However, such a strict normalization implies:

• an important overhead for throwing flags for the many special cases, and even more for the management of these special cases,

• and a low flexibility in the widths of the mantissa and exponent, which have to respect the rules of Table 1

Floating-Point Operators

Integer addition (or subtraction) is the simplest arithmetic operator. However, in floatingpoint arithmetic, addition suffers from a high control overhead, which requires several steps to be performed:

• First, the difference of the exponents is computed.

• Depending on the difference of the exponents, one among two computing paths may be selected [START_REF] Muller | Handbook of floating-point arithmetic[END_REF]: The close path is for situations where a massive cancellation (more than 1 bit) may occur, or effective subtractions of inputs with exponents that differ by at most 1. The far path is for distant exponents, where their difference is at least 2 bits. The following computations may slightly vary depending on the choosen path.

• The addition of the mantissas is performed.

• Then, rounding is performed on the mantissa, depending on the dropped bits and the rounding mode (to zero, to nearest, etc.) selected.

• Special cases are then handled (zero, infinity, subnormal results), and the output sign.

• Then, mantissa is shifted so it represents a value in [1, 2[.

• And the exponent is modified depending on the number of shifts.

More control can be needed, depending on the implementation of the FlP adder and the specificities of the FlP representation. For instance, management of the implicit 1 implies to add 1s to the mantissas before addition, and an important overhead can be dedicated to exception handling. For a figure illustrating the FlP addition principle and more details on its hardware implementation, the reader can refer to Figure 8.13 of [START_REF] Muller | Handbook of floating-point arithmetic[END_REF] and the related chapter of the book.

For cost, delay, and power comparison, Table 2 shows the performance of 32-bit and 64-bit FlP addition compared with 32-bit and 64-bit integer addition, synthesized using Synopsys Design Compiler targeting 28nm FDSOI with a 200 MHz clock. Power is estimated using 10, 000 uniform input samples. FlP addition power was estimated activating in an equivalent way the close and far paths 50% of the time. 2: Cost, delay, and power of FlP addition vs. integer addition the overhead of floating-point addition. For 32-bit, the FlP addition is 3.5× larger, 2.3× slower and consumes 27× more energy than integer addition. For 64-bit, the FlP addition is 3.9× larger, 1.9× slower and consumes 30× more energy. The overhead seems to be roughly linear with the size of the operator, and the impact of numbers representation is highly impacting performance. However, it is showed later in this chapter that this high difference reduces with the bitwidth of the operands.

FlP multiplication is less complicated than addition as only a low control overhead is necessary to perform the operation. Input mantissas are multiplied using a classical integer multiplier, while exponents are simply added. At worse, a final +1 on the exponent can be needed, depending on the result of the mantissas multiplication and the related rounding and normalization required. For a figure illustrating the basic architecture of a FlP multiplier, the reader can refer to Figure 8.14 of [START_REF] Muller | Handbook of floating-point arithmetic[END_REF] and the related chapter of the book.

Obviously, all classical hardware overheads needed by FlP representation are again necessary (rounding logic, normalization, management of particular cases), but the overhead is less than for addition. Table 3 shows the difference between 32-bit and 64-bit floatingpoint multiplication and 32-bit and 64-bit fixed-width integer multiplication, with the same experimental setup than discussed before for the addition.

A first observation on the area shows that the integer multiplier is 48% larger than the FlP version for 32 bits, and 37% larger for 64 bits. This difference is due to the smaller size of the integer multiplier in the FlP multiplier, since it is limited to the size of the mantissa (24 bits for 32-bit version and 53 bits for 64-bit version). Despite the management of the exponent, the overhead is not large enough to produce a larger operator. However, the 32-bit FlP multiplication energy is 11× higher than for the integer version, while 64-bit version consumes even 37× more energy. This can be justified by the higher activity of the logic in the FlP operator due the management of the exponent and special cases. It is interesting to note that the difference of energy consumption between 3: Cost, delay, and power of floating-point multiplication vs. integer multiplication addition and multiplication is much more important for integer operators than for FlP. As an example, for 32-bit, integer multiplication consumes 4.7× more energy than integer addition, while this factor is only 1.4× for 32-bit FlP multiplier compared to 32-bit FlP adder. Therefore, using multiplication in FlP computing is relatively less penalizing than for integer multiplication, typically used in fixed-point arithmetic.

Low-Precision Floating-Point Arithmetic

There is a growing interest in the use of reduced-precision arithmetic, exacerbated by the recent interest in artificial intelligence, especially with deep learning. CPU, GPU and TPU architectures already provide interesting, but limited, reduced-precision capabilities. 8-bit integer, 16-bit floating point (e.g., float16, bfloat16) are typical examples of low-precision computations included in the architectures. Through the use of hardware acceleration on FPGA architectures, and thanks to their reconfiguration features, arithmetic customisation can be further extended and almost any number format and word-length can be leveraged in the accelerator. All these examples illustrate the interest of customizable floating-point architectures. Indeed, combining the ease of use of floating-point representation associated to low-energy benefits of small bit-width, make reduced-precision floating-point arithmetic very promising.

There are several possible opportunities to relax accuracy in floating-point arithmetic to increase performance and save power and hardware cost. Of course, the main technique is to reduce the size of the mantissa and exponent (i.e., smaller operand bit-width or wordlength). With a mantissa normalized in [1, 2[, reducing the word-length corresponds to pruning the LSBs, which comes with no overhead, except if faithful rounding is performed. For the exponent, the transformation can be more complicated if it is represented with a bias. Indeed, if E is the exponent width, an implicit bias of 2 E -1 applies to the exponent in classical exponent representation. Therefore, reducing the exponent to a width E means that a new bias must be applied. The original exponent must be added 2 E -2 E (< 0) before pruning the MSBs, implying hardware overhead at conversion. The original exponent must represent a value in -2 E -1 + 1, 2 E -1 to avoid overflow. In practice, it is better to keep a constant exponent width to avoid useless overhead and conversion overflows, which would have a huge impact on the quality of the computations.

A second way to improve computation at reduced precision is to play with the implicit bias of the exponent. Indeed, increasing the exponent width increases the dynamic towards infinity, but also the accuracy towards zero. Thus, if the absolute maximum values to be represented are known, the bias can be chosen so it is just large enough to represent these values. This way, the exponent gives more accuracy to very small values, increasing accuracy. However, using a custom bias means that the arithmetical operators (addition and multiplication) must consider this bias in the computation of resulting exponent, and the optimal bias along computation may diverge to -∞. To avoid this, if the original 2 E -1 exponent bias is kept, exponent bias can be simulated by biasing the exponents of the inputs of each or some computations using shifting. For the addition, biasing both inputs adding 2 Ein to the exponent implies that the output will also be represented biased by 2 Ein . For the multiplication, the output will be biased by 2 Ein+1 . Keeping an implicit track of the bias along computations allows to know any algorithm output bias, and to perform a final rescaling of the outputs.

Finally, accuracy can be relaxed in the integer operators composing the considered FlP operators, e.g., the integer adder adding the mantissas in FlP addition or the integer multiplier in the FlP multiplication. Indeed, they can be replaced by approximate adders and multipliers as described in other chapters of this book, to improve performance while relaxing accuracy. However, as most of the cost relies in control hardware, the impact on accuracy would be strong for a very small cost or performance benefit. The same approximation can be applied on the exponent management, but the impact of approximate arithmetic would be too high on the accuracy and this is therefore strongly unadvised.

Reduced-Precision Floating-Point Libraries

The past years have hosted the creation of several customizable floating-point libraries. As part of the synthesizable C++ libraries AC Datatypes [START_REF] Graphics | Algorithmic c (ac) datatypes v4.2[END_REF], Mentor Graphics proposes the custom floating-point class ac float. Based on the fixed-point library ac fixed, ac float allows for light floating-point computation, thanks to simple operators. The mantissa in the representation is not normalized and has no implicit 1. This allows for easy management of subnormals, but induces a potential loss of accuracy in computations. The mantissa is represented in signed two's complement, so the sign information is contained in the mantissa instead of using an extra sign bit. However, there is no benefit to this choice since two's complement represents a loss of 1 bit of precision compared to unsigned representation. The choice of two's complement representation on the mantissa also turns comparison operator more complex. Moreover, many cases are not handled such as zero or infinity. ac float also supports custom exponent bias, but managing the exponent bias comes with an overhead.

FloPoCo (for Floating-Point Cores, but not only) is a generator of arithmetic cores [START_REF] De Dinechin | Designing custom arithmetic data paths with flopoco[END_REF]. Also based on C++, it has its own synthesis engine and directly returns VHDL. More than simple arithmetic operators, it is able to generate optimized floating-point computing cores performing complex arithmetic expressions. In this Section, we will only get interested in FloPoCo's custom floating-point addition and multiplication. The main difference of FloPoCo's floating-point representation is the extra 2-bit exception field transported in data. Like for ct float subnormals are not handled by FloPoCo. Unlike ac float both ct float and FloPoCo do not support custom exponent bias.

Other alternatives such as VFLOAT [START_REF] Fang | Open-source variable-precision floating-point library for major commercial fpgas[END_REF][START_REF] Fang | Open-source variable-precision floating-point library for major commercial fpgas[END_REF] or OptiFEX [START_REF] Mahzoon | Optifex: A framework for exploring area-efficient floating point expressions on fpgas with optimized exponent/mantissa widths[END_REF] do exist but are not taken into account in the study led in this chapter. VFLOATproposes IEEE 754-2008 compliant customizable computing cores for existing FPGA. OptiFEX generates floatingpoint computing cores targeting FPGA like FloPoCo. ct float [START_REF] Barrois | Customizing Fixed-Point and Floating-Point Arithmetic -A Case Study in K-Means Clustering[END_REF] 1 offers a balance between computational safety and simplicity. Inspired by ac float, it is provided as C++ template for High-Level Synthesis (HLS), compatible with Mentor Graphics CatapultHLS and Xilinx Vivado HLS. As ct float will be used for comparison with fixed-point representation in the rest of this chapter, we provide below more details on the library. The declaration of an instance of ct float requires three template parameters: the exponent width E, the mantissa width M , and the rounding mode. The mantissa also includes a sign bit and is represented as sign plus absolute value, as in standard FlP. The total number of bits in memory is therefore equal to E + M . Currently, two rounding modes are supported: CT RN rounding to nearest with halfway-to-even tie-breaking rule, and CT RZ rounding towards 0, or truncation. ct float representation and arithmetic operators were created to remain simple and energy efficient, thanks to the combination of several implementation choices. ct float mantissa is represented in [1, 2[ with an implicit 1. However, subnormal numbers are not handled, which implies that a certain range of numbers are not representable around 0. The exponent is represented in a biased representation. The bias is set at the center of the exponent range, similar to the IEEE 754 representation. Using biased representation instead of two's-complement results in simpler exponent value comparisons, which are omnipresent in arithmetic operators. In variants of the ct float library, the bias can also be customized.

The library provides a rich set of synthesizable operator overloading: unary operators (unary -, !, ++, --), relational operators (<, >, <=, >=, ==, ! =), binary operators (+, + =, --=, * , * =, <<, <<=, >>, >>=), and assignment operator from/to another instance of ct float. It also provides non-synthesizable operator overloading features, such as conversion from/to C++ native datatypes (float, double), and output operator << for easy display and writing in files. Other built-in functions allow easy manipulation of floating-point values, such as functions to get information about the extreme representable values for a given floating-point representation, to test if a given value is representable, etc.

An example (not including all statements and declarations) of the use of ct float is given below. ct_float<7, 9, CT_RN> h = 1.046978e-3; ct_float<7, 9, CT_RN> x, y; x = -0.02266398; y = x * y + 0.55; cout << y << endl;

This example can be simulated and synthesized to hardware using HLS. In the example, all variables have the same representation (i.e., E = 7 and M = 9, rounding mode is CT RN). It is also possible to deal with various representations. If the inputs are on (E 1 , M 1 ) and (E 2 , M 2 ) representation, the output representation (E o , M o ) is given by:

E o = max (E 1 , E 2 ) M o = max (M 1 , M 2 ) . ( 13
)
Moreover, as subnormals are not representable by ct float, the output is always saturated to the smallest absolute possible representable value with the same sign. Towards infinity, the operators do not under/overflow. Saturation to the highest absolute representable value of the same sign is returned.

Table 4 recapitulates the different known properties of ac float, ct float and FloPoCo floating-point representation. In this table, the number of additional bits in the representation is taking for reference a representation with implicit 1 in the mantissa and with one bit of sign in the representation. For an equal general accuracy, ac float needs one more bit on the mantissa than ct float and FloPoCo. However, with its 2-bit exception field, FloPoCo has the representation requiring the largest width, but also the highest computing reliability.

Then, the hardware performance comparison process for ac float, ct float and FloPoCo is as follows. All operators are characterized for a 28nm FDSOI @ 1.0V, 25°C ASIC library. All designs are synthesized and estimated with a clock of 200 MHz. For power analysis, the random inputs generated for adder/subtracter characterization are ensuring an activation of the close path for at least 50% of the computations. However, the benchmark generated by FloPoCo does not insure any proportion of activation of the close path, so the dynamic power could be underestimated. Moreover, FloPoCo's benchmark does not consider any input and output data registers, whereas ac float and ct float, synthesized with HLS, do. This may represent about 5 to 10% underestimation in the total power for FloPoCo operators, which has to be kept in mind for the analysis of results. All operators are generated so they execute in 1 cycle. It may not be the most efficient implementation because of possible glitches, but it is a good starting point for a fair comparison.

For this comparative study, half-precision (E = 5, M = 11) and single-precision (E = 8, M = 24) floating-point representations are considered. Results for 16-bit (resp. 32-bit) addition/subtraction (resp. multiplication) are given in Tables 5,7, 6 and 8. The two last lines of the tables refer to the relative performance of ct float vs. ac float (resp. FloPoCo) (e.g., ct float area is 2.15% higher than ac float).

The main conclusion is that the three custom floating-point libraries provide results in the same order of magnitude. For 16-bit addition/subtraction, ct float consumes 15% more energy than both ac float and FloPoCo, despite an area being equivalent to ac float and 12% smaller than FloPoCo. The fastest 16-bit adder/subtracter is ac float, followed by ct float, which is 19% slower but 27% faster than FloPoCo. All metrics are slightly in favour of ac float for 16-bit addition/subtraction. For 16-bit multiplication, FloPoCo's multiplier is the smallest and with the lowest energy consumption. However, ct float is 25% faster but consumes 32% more energy.

32-bit addition/subtraction gives similar energy for ac float, ct float and FloPoCo. FloPoCo is the slowest operator, ct float being 27% faster. The energy of 32-bit multiplication is strongly in favour of ct float, saving more than 45% more energy than both ac float and FloPoCo. ct float is 13% smaller than ac float and 49% smaller than FloPoCo. However, ac float is 5% faster. As a conclusion, ac float, ct float and FloPoCo addition/subtraction and multiplication provide similar results. Though they all have different features (implicit 1 or not, particular cases management, etc.), they all are quite close in terms of performance. In the following section, ct float alone is then used as a reference for the comparison with fixed-point arithmetic.

Area (µm

Comparison between fixed-point and custom floatingpoint

This section draws a comparison between customized fixed-point and floating-point arithmetic. Section 5.1 compares FxP and FlP in terms of area, delay, and energy at the operator level. Then, Section 5.2 compares the two number representations in the context of their use in applications, thus considering the errors due to low-precision computations. One conclusion is that the choice between FxP and FlP is not obvious and depends on the application considered. It is shown that, in some cases, low-precision floating-point arithmetic can be the most effective, providing some benefits over the classical fixed-point choice for energy-constrained applications.

Operator-level comparison

This section compares FxP and FlP operators in terms of area, delay, and energy, and does not consider computing errors at the operator level. Indeed, floating-point error magnitude is related to data values. Low-amplitude data have low error magnitude, whereas high amplitude data have much higher error magnitude. Oppositely, fixed-point has a very homogeneous error magnitude, uniformly distributed between fixed bounds. Therefore, its relative error depends on the amplitude of the represented data. It is low for high amplitude data and high for low amplitude data. This duality makes these two paradigms impossible to be atomically compared using the same error metric. The only interesting Area (µm error comparison which can be performed is to compare the error behaviour inside the same application, which is reported in Section 5.2 on FFT and K-means clustering.

The study in Section 5 uses the ct float library for custom floating-point and ac fixed datatypes. A 100 MHz clock is set for synthesis and power estimation. All the other parameters are the same as for the previous section.

In this section, 8-, 10-, 12-, 14-and 16-bit operators are compared. For each of these bit-widths, several versions of the floating-point operators are estimated with different exponent widths and compared with fixed-point. 25.10 3 uniformly distributed inputs are used for each operator characterization. For the floating-point adder, inputs are distributed such that the close path, which has the highest energy by nature, is activated 25% of the time. Adders and multipliers are all tested in their fixed-width version, meaning their number of input and output bits are the same. The output is truncated.

Figure 4 (resp. Figure 5) shows the area, delay and energy of adders (resp. multipliers) for different bit-widths, relative to the corresponding fixed-point operator. FlP N (E) represents N -bit floating-point with E bits for exponent. As discussed before in this chapter, the floating-point adder shows an important overhead compared to fixed-point. For any configuration, area and delay are around 3× higher for floating-point. As a consequence, the higher complexity of the floating-point adder leads to 5× to 12× more energy per operation.

Results for the multipliers are very different. Floating-point multipliers are 2-3× smaller than fixed-point. The control part of floating-point multiplier being less complex than for adder and, as multiplication is performed only on the mantissa, the area gets smaller. Timing is also slightly better for floating-point, but still constrained by operand shifts during computations. These shifts also significantly impact energy per operation, especially for large mantissas, which results in an overhead of 2× to 10× on the energy per operation for floating-point multiplication.

However, it must be kept in mind that, when using fixed-point numbers in an application, shifting is often needed at many steps during execution to align the number formats. The cost of shifting in the case of FxP is not considered in the results presented here, whereas it is already present in the case of floating-point. Thus, the advantage of fixedpoint highlighted by Figures 4 and5 is expected to be tempered when full applications ae considered. This is the main objective of the next section.

Application-level comparison

In this section, floating-point and fixed-point operators are compared in the context of their use in applications. Indeed, as stated below, they have very different error nature and thus their error can not be fairly compared when considering only a single operation.

Both number representations are compared first using the K-Means clustering algorithm (also in [START_REF] Barrois | Customizing Fixed-Point and Floating-Point Arithmetic -A Case Study in K-Means Clustering[END_REF]) and then on the Fast Fourier Transform (FFT).

Results on K-Means clustering

This section first describes the K-means clustering algorithm before to provide comparative results between FxP and FlP.

K-Means clustering principle, algorithm and experimental setup Kmeans clustering is a well-known method for vector quantization, which is mainly used in data mining, image classification or voice identification. It consists in organizing a multidimensional space into a given number of clusters, each being totally defined by its centroid. A given vector in the space belongs to the cluster in which it is nearest from the centroid. The clustering is optimal when the sum of the distances of all points to the centroids of the cluster they belong to, is minimal, which corresponds to finding the set of clusters

S = {S i } i∈[0,k-1] satisfying arg min S k i=1 x∈Si x -µ i 2 , (14)
where µ i is the centroid of cluster S i . Finding the optimal centroids position of a vector set is NP-hard. However, some iterative algorithms find good approximations of the optimal centroids by an estimation-maximization process, with a linear complexity (linear with the number of clusters, number of data to process, number of dimensions, and number of iterations). Lloyd's iterative algorithm [START_REF] Lloyd | Least squares quantization in pcm[END_REF] is used in our case study. It is applied to bidimensional sets of vectors to ease display and interpretation of the results. From now, we only refer to Lloyd's algorithm in two dimensions. Figure 6 shows results of K-Means on a random set of input vectors, obtained using double-precision floating-point computations with a very restrictive stopping condition; these values are then considered as the reference golden outputs. The algorithm consists of three main steps:

1. Initialization of the centroids.

2. Data labelling.

3. Centroid position update.

Steps 2 and 3 are iterated until a stopping condition is met. In our case, the main stopping condition is when the difference of the sums of all distances from data points to their cluster's centroid between two iterations is less than a given threshold. A second stopping condition is the maximum number of iterations, required to avoid the algorithm getting stuck when the computations are too approximated to converge. The detailed algorithm for one dimension is given by Algorithm 1. Inputs are represented by the vector data of size N data , output centroids by the vector c of size k. The accuracy target for stopping

The experimental setup is divided into two parts: accuracy evaluation and cost/performance/energy estimation. Accuracy estimation is performed on 20 data sets composed of 15.10 3 bidimensional data samples, all generated in a square delimited by {± √ 2, ± √ 2}, using Gaussian distributions with random covariance matrices around 15 random mean (centroid) points. Several accuracy targets are used to set the stopping condition: 10 -2 , 10 -3 , 10 -4 . As stated, the reference for accuracy estimation is IEEE-754 double-precision floating-point (Fig. 6). The error metrics for the accuracy estimation are: (i) the Mean Square Error of the resulting cluster Centroids (CMSE), and (ii) the classification Error Rate (ER), which is defined as the proportion of points not being tagged by the right cluster identifier. The lower the CMSE, the better the estimated position of centroids compared to golden output. Energy estimation is performed using the first of these 20 data sets, limited to 20.10 3 iterations of distance computation for time and memory purposes. As data sets were generated around 15 points, the number of clusters researched is also set to 15. Area, latency of execution and energy are estimated using the same library and tools as in the previous section. Iterative distance computation is specified in C++ and HLS is used to generate the hardware under evaluation.

Experimental results on K-Means clustering Section 5.1 showed that FxP additions and multiplications consume less energy than their FlP counterparts for the same bit-width. However, these results do not yet consider the impact of the number formats on accuracy. This section details the impact of accuracy on the 2D K-means clustering algorithm.

A first qualitative study on the K-Means clustering showed that, to get correct results (no artefacts), FlP data must have a minimal exponent width of 5 bits in distance computation (smaller exponents are too inaccurate in low distance computations) and fixed-point data a minimal number of 3 bits for its integer part. Thus, all the following results use these two configurations and vary the mantissa and fractional part for FlP and FxP, respectively. The total energy is defined as

E K-means = E dc × (N it + N cycles -1) × N data , (17)
where E dc is the energy per distance computation estimated as in the previous section, N it the average number of iterations necessary to reach K-means stopping condition, N cycles the number of pipeline stages in the distance computation core, as determined by HLS, and N data the number of processed data per iteration. Results for 8-bit and 16-bit FlP and FxP arithmetic operators are detailed in Table 9, with a stopping condition set to 10 -4 . For the 8-bit version of the algorithm, several ct float 8 (5) ct float 16 [START_REF] Nehmeh | Fast integer word-length optimization for fixed-point systems[END_REF] 7a and7b show the output for floating-point and fixed-point 8-bit computations, applied on the same inputs as the golden output of Fig. 6. A very neat stair-effect on data labelling is clearly visible, which is due to the high quantization levels of the 8-bit representation. However, in the floating-point version, the positions of clusters' centroid is very similar to the reference, which is not the case for fixed-point.

For the 16-bit version, all results are in favor of fixed-point, floating-point being twice bigger and consuming 1.7× more energy. FxP also provides slightly better error results (2.9% for ER vs. 0.6%). Figures 7c and7d show output results for 16-bit floating-point and fixed-point. Both are very similar and nearly equivalent to the reference, which reflects the high success rate of clustering. an accuracy equivalent to FlP with much less energy. The stopping condition does not seem to have a major impact on the relative performance.

Results on Fast Fourier Transform

In the previous section, a comparative study between custom FxP and FlP was performed on K-means, showing that, contrary to what could be expected, floating-point can be very competitive for small bit-widths. In this section, a similar study is performed on the Fast Fourier Transform (FFT). The implementation of the FFT is Radix-2 Decimation-in-Time (DIT), which is the most common form of the Cooley-Tukey algorithm [START_REF] Cooley | An algorithm for the machine calculation of complex fourier series[END_REF]. For the hardware estimation, only the kernel computations of the FFT are considered, i.e.,

X k = E k + e -2πi N k O k , X k+ N 2 = E k -e -2πi N k O k , (18)
equivalent to 6 additions/subtractions and 4 multiplications. For each version of the FFT, all constants and variables are represented with the same parameters (same bitwidth, same integer part width for FxP, same exponent width for FlP). The absence of over/underflow for the FxP version is ensured. For the FlP version, the repartition of the exponent and mantissa widths is chosen for giving the smallest error after an exhaustive search. For hardware performance estimation, only FFT-16 (FFT on N = 16 samples) was characterized. The error metric is the Mean Square Error (MSE) at the output compared to double-precision floating-point. Energy per operation (pJ) related to error (MSE in dB) for FFT-16 is depicted in Fig. 9. The error-energy trade-off is better when reaching the bottom-left corner. For each curve, each point going from the top left to the bottom right represents an increase of two digits in the bit-width.

For this application, the advantage is clearly in favour of fixed-point. Indeed, for any identical bit-width, FxP outperforms FlP in both energy and accuracy. As already showed in Section 5.1, FlP operations, and additions in particular, are much more expensive than FxP. However, FFT output quality is not as dependent on accuracy on a dynamic as large as for K-means clustering. This makes FlP even less accurate than FxP at equal bit-width, because of a smaller significant part, mantissa for floating-point, all bits for fixed-point. Indeed, in the experiment, the exponent takes 7 bits of the total width, which are not assigned to more accuracy on the significant part. Another interesting point is the data points presenting an energy peak, which are occurring for 12-, 18-and 28-bit floating-point and 22-bit fixed-point. These peaks are most probably due to differences of implementation in the HLS process. E.g, larger adder or multiplier structures may have been selected by the tool to meet constraints of delays, leading to energy overhead.

Conclusion

Computing with low-precision arithmetic is an efficient way to maximize performance-per-Watt [START_REF] Barrois | The Hidden Cost of Functional Approximation Against Careful Data Sizing -A Case Study[END_REF]. Customization is then ruled by finding a trade-off between reducing precision to improve energy efficiency and respecting constraints on application output quality. This chapter mainly focused on floating-point and fixed-point number representations, presented their principle and some opportunities for arithmetic customization on both formats, and provided a comparison between their cost, performance and energy, as well as their impact on accuracy during computations.

Comparing floating-point and fixed-point arithmetic at the operator level gives a clear advantage in area, delay and energy efficiency for fixed-point. However, when considering real applications, e.g., the study on K-means clustering algorithm in this chapter, custom floating-point arithmetic can provide interesting features, and tends to show a better energy/accuracy trade-off for very small bit-widths (8 bits in this study). However, the advantage come back to fixed-point when the considered application is an FFT (same is true for digital filters or most classical signal and image processing algorithms). One explanation is that applications requiring both large dynamic range and high accuracy, are more tolerant to low precision when the floating-point representation is used. An interesting follow-up of this study would be to consider larger FFT, which would lead to larger dynamic range, and to see how the MSE vs. energy-per-operation would scale for both representations.

Another important aspect of the study is from a hardware-design point of view. Floating-point is very complex compared to fixed-point arithmetic for large bit-widths, but the overhead is shrinking when lowering precision. Moreover, the cost of multiplication can be considered at the advantage of floats. Also, the overhead of scaling instructions required to be added to deal with fixed-point data types is often not studied. It is an interesting perspective to include this overhead in the choice of the right representation.

Hence, in the aim of designing general-purpose low-energy processors, low-precision floating-point arithmetic can provide major advantages compared to classical integer operators embedded in microcontrollers, with a better compromise between ease of programming, energy efficiency and computing accuracy. In the context of inference and training of deep neural networks, custom float is also a serious competitor. This is one of the objectives of Chapter 15 presenting opportunities for Approximations in Deep Learning.

Figure 2 :

 2 Figure 2: Example of a sequence of operations: data d is the output of the operation O j and the input of operation O k .

Figure 3 :

 3 Figure 3: Floating-point representation

Figure 4 :Figure 5 :

 45 Figure 4: Relative area, delay and energy-per-operation between fixed-point and floatingpoint of adders for different bit-widths

Figure 6 : 2 -

 62 Figure 6: 2-D K-Means clustering golden output example, obtained using double-precision (64-bit) floating-point

Figure 7 :

 7 Figure 7: K-Means clustering outputs for 8-and 16-bit floating-point and fixed-point, with accuracy target of 10 -4

Figure 8 :

 8 Figure 8: Energy vs. classification error rate for K-Means clustering with stopping conditions of 10 -4 (top), 10 -3 (center) and 10 -2 (bottom)

Figure 9 :

 9 Figure 9: Fixed-point and floating-point energy per operation (pJ) vs MSE for FFT-16 for different bit-widths

Table 1 :

 1 for 16, 32, 64 and 128-bit precisions. IEEE 754 normalized floating-point representation

	Precision	Mantissa width (M ) width (E) Exponent Minimum exponent Exponent bias (b) value (e min ) (also e max )
	Half precision (16 bits) Single precision (32 bits) Double precision (64 bits) Quadruple precision (128 bits)	10 23 52 112	5 8 11 15	-14 -126 -1022 -16382	15 127 1023 16383

Table

  These results clearly show

		Area	Total	Critical Power-Delay
		(µm 2 ) power (mW) path (ns) Product (fJ)
	32-bit float	653	4.39E-4	2.42	1.06E-3
	64-bit 1453 float	1.12E-3	4.02	4.50E-3
	32-bit int	189	3.66E-5	1.06	3.88E-5
	64-bit int	373	7.14E-5	2.10	1.50E-4

Table

	Area	Total	Critical Power-Delay
	(µm 2 ) power (mW) path (ns) Product (fJ)
	32-bit 1543 float	8.94E-4	2.09	1.87E-3
	64-bit 6464 float	6.56E-3	4.70	3.08E-2
	32-bit 2289 int	6.53E-5	2.38	1.55E-4
	64-bit 8841 int	1.84E-4	4.52	8.31E-4

Table 4 :

 4 Main properties of the custom floating-point libraries ac float, ct float and FloPoCo

		ac float ct float FloPoCo
	Custom exp. bias	yes	no(yes)	no
	Mantissa Implicit 1	no	yes	yes
	Zero and inf. exception flags	no	no	yes
	Zero and inf. internal handling	no	yes	no
	Subnormal exception flag	no	no	yes
	Subnormal internal handling	yes	no	no
	Additional bits in representation	+1	+0	+2

Table 5 :

 5 Comparative results for 16-bit FlP addition/subtraction with F clk = 200MHz

		2 )	Critical path (ns) power (mW) operation (pJ) Total Energy per
	ac float	312	1.44	1.84E-1	9.07E-1
	ct float	318	1.72	2.13E-1	1.05
	FloPoCo	361	2.36	1.84E-1	9.06E-1
	ct float/ac float +2.15% +19.4% +15.4% ct float/FloPoCo -11.8% -27.0% +15.7%	+15.7% +15.8%
		Area (µm 2 )	Critical path (ns) power (mW) operation (pJ) Total Energy per
	ac float	488	1.18	2.15E-1	1.05
	ct float	389	1.13	1.76E-1	8.59E-1
	FloPoCo	361	1.52	1.34E-1	6.50E-1
	ct float/ac float -20.4% -4.24% ct float/FloPoCo +7.68% -25.6% +31.7% -18.2%	-18.2% +32.1%

Table 6 :

 6 Comparative results for 16-bit FlP multiplication with F clk = 200MHz

Table 7 :

 7 Comparative results for 32-bit FlP addition/subtraction with F clk = 200MHz

		2 )	Critical path (ns) power (mW) operation (pJ) Total Energy per
	ac float	678	2.49	4.46E-1	2.21
	ct float	720	2.84	4.86E-1	2.41
	FloPoCo	772	4.10	5.05E-1	2.51
	ct float/ac float +6.06% +14.1% +8.92% ct float/FloPoCo -6.85% -30.8% -3.69%	+9.12% -4.15%
		Area (µm 2 )	Critical path (ns) power (mW) operation (pJ) Total Energy per
	ac float	1, 689	2.19	1.02	5.03
	ct float	1, 469	2.30	5.84E-1	2.70
	FloPoCo	2, 890	3.20	1.03	5.07
	ct float/ac float -13.0% +5.02% -42.8% ct float/FloPoCo -49.2% -28.2% -43.3%	-46.3% -46.8%

Table 8 :

 8 Comparative results for 32-bit FlP multiplication with F clk = 200MHz

Table 9 :

 9 ac fixed 8 (3) ac fixed 16[START_REF] Rocher | Accuracy evaluation of fixedpoint LMS algorithm[END_REF] This results in making the floating-point version for the whole K-means algorithm consuming only 1.6× more energy than fixed-point. Moreover, the FlP version provides a huge advantage in terms of accuracy of results. Indeed, CMSE is 10× better for FlP and ER is 1.8× better. Figures

	Area (µm 2 )	392.3	1148	180.7	575.1
	N cycles	3	3	2	2
	E dc (nJ)	1.23E-4	5.99E-4	5.03E-5	3.25E-4
	N it	8.35	59.3	14.9	65.1
	E K-means (nJ)	38.24	1100	23.90	644.34
	CMSE	1.75E-3	3.03E-7	1.85E-2	3.28E-7
	Error Rate	35.1 %	2.94 %	62.3 %	0.643 %

8-and 16-bit area, energy and accuracy for K-Means clustering experiment interesting results can be highlighted. First, the custom FlP version is 2× larger than FxP version, and FlP distance computation consumes 2.44× more energy than FxP. However, the FlP version of K-means converges in 8.35 cycles on average, against 14.9 cycles for FxP.

https://gitlab.inria.fr/sentieys/ctfloat

The competitiveness of FlP over FxP on small bit-widths, and the higher efficiency of FxP on larger bit-widths, are confirmed by Fig.8depicting energy vs. classification error rate. Indeed, for different accuracy targets (10 -{2,3,4} ), only 8-bit FlP provides higher accuracy for a comparable energy cost, whereas 10-to 16-bit FxP versions reach

condition is defined by acc target and the maximum allowed number of iterations by max iter. In our study, we use several values for acc target, and max iter is set to 150,

which is never reached in practice.

The impact of fixed-point and floating-point arithmetic on performance and accuracy is evaluated considering the distance computation function distance comp, defined by

In the 2D case, the distance computation becomes

which is equivalent to 1 addition, 2 subtractions, and 2 multiplications. However, as distance computation is cumulative on each dimension, the hardware implementation relies only on 1 adder (accumulation), 1 subtracter, and 1 multiplier.


Romain Moury

Angelina Gigante

Arndt Remhof

Elsa Roedern

Hans Hagemann

Experimental Investigation of Mg(B 3 H 8 ) 2 Dimensionality, Materials for Energy Storage Applications

Mg(B3H8)2 is a crucial reaction intermediate in the thermal decomposition of the hydrogen storage material Mg(BH4)2 and is discussed as a potential solid-state Mg-ion conductor. We successfully synthesized unsolvated Mg(B3H8)2 and highlighted that Mg(B3H8)2 exists mainly as a low dimensional solid. Additionally, Mg 2+ conductivity was evaluated at 1.4.10 -4 S.cm -1 at 80°C. 2

Metal borohydrides M(BH4)n have attracted a lot of interest in the past decades as candidates for solid-state hydrogen storage, leading to wealth of new compounds. [1][2][3] Magnesium borohydride Mg(BH4)2 has particularly caught attention owing to its high gravimetric hydrogen content (14.8 wt %). [4][5][6] However, the lack of hydrogen release and uptake in mild conditions prevent any practical applications. [7][8][9][10] The rehydrogenation of the intermediates formed during thermal decomposition of Mg(BH4)2 below 500°C could lead to interesting reversible systems. However, the decomposition pathway of Mg(BH4)2 has been long known as being complex, subject to controversy and still open questions remain. Chong et al. reported the first reversible Mg-B-H system, namely Mg(B3H8)2-Mg(BH4)2, which provides 2.5 wt% H2 cycling capacity under mild conditions. The authors found that Mg(B3H8)2 was the main product through the thermal treatment of Mg(BH4)2 at 200°C under vacuum after 5 weeks. They successfully converted Mg(B3H8)2 back to Mg(BH4)2 in 48h at 200°C under 120 bar H2. 11 This result paved the way of reversible hydrogen storage in Mg-B-H systems. However, a comprehensive theoretical study predicted that Mg(B3H8)2 would be highly unstable and could not be a thermodynamic by-product of Mg(BH4)2 thermal decomposition. The authors addressed this contradictory result by the formation of Mg3(B3H6)2 instead of Mg(B3H8)2. 12 Experimental attempts to synthesizing Mg(B3H8)2 using solvent based method, failed to remove the coordinating solvent, indicative of the instability of dry Mg(B3H8)2. 13 Furthermore, they noticed a drastic improvement in the conversion rate: 5h at 200°C and 50 bar H2. They concluded that THF assists the hydrogenation process through kinetics control. 13 A recent theoretical study claimed that unstable intermediate compounds may form in low dimensionality morphologies: clusters, chains or dispersed molecular species, growing at solid state interfaces. 14 In addition, they showed that the energy landscape of Mg(BH4)2 decomposition intermediates is flattened at lower dimensionality, that is different local minimal are kinetically reachable. This is consistent with the control of selectivity toward different intermediate compounds through addition of metal hydride or modifying the chemical environment with the nature of the ligands, observed for Mg(B3H8)2•2THF and Mg(BH4)2•L (with L = ligand). 13,15 Therefore, understanding the role of the chemical and structural environment on selectivity require detailed comparative and experimental studies. In addition to hydrogen storage applications, metal borohydrides and related compounds are also discussed as as solid electrolyte for all-solid-state batteries. [16][17][18] In this context, metal octahydrotriborates were found to be attractive; first as precursor for closo-hydroborates synthesis, 19,20 which have demonstrated to be excellent solid electrolyte 17,21 and second as solid electrolyte themselves. 22 Therefore, the synthesis and characterization of unsolvated Mg(B3H8)2 appears crucial to address the mechanistic issue and move a step forward to reversible hydrogen storage within Mg-B-H system. Herein, we report on the synthesis of unsolvated Mg(B3H8)2 and its deuterated derivative. We illustrate the dimensionality of the freshly prepared Mg(B3H8)2 from combined vibrational spectroscopy (experimental and calculated), X-ray diffraction (XRD) measurements, and calorimetric analysis. In addition, we demonstrate the high mobility of magnesium in Mg(B3H8)2 through impedance spectroscopy with an ionic conductivity of 2.5.10 -4 S cm -1 at 80°C. The salt metathesis between NaB3H8 and magnesium bromide (MgBr2) using mechanochemical approach, allows to synthesize unsolvated Mg(B3H8)2 with sodium bromide. Figure 1 shows FTIR and Raman spectra of Mg(B3H8)2 and NaB3H8 and their deuterated derivatives. A careful inspection of the B-H bending region (bellow 1500 cm -1 ) reveals the absence of residual bands of NaB3H8 on Mg(B3H8)2 spectra confirming a complete exchange reaction between magnesium and sodium. We performed 11 B{ 1 H} NMR (Figure S1) on the freshly prepared Mg(B3H8)2 sample. The spectrum displays a nonet centred at δ = -30.8 ppm with a coupling constant 1 JBH = 33 Hz in agreement with our previous study. 19 The chemical shift, together with the coupling constant, the multiplicity and the relative normalized intensity undoubtedly prove the presence of B3H8 -anion in the compound. Both NMR and vibrational spectroscopies support the successful synthesis of Mg(B3H8)2. The XRD diffraction pattern (Figure S3) recorded on Mg(B3H8)2 exhibits few weak reflexions. While the sample is mainly amorphous, existence of coherent diffraction domains attest the existence of 3D crystalline domains, contrary to theoretically prediction. 12 However crystalline Mg(B3H8)2 is not representative of the whole sample in which the main part is amorphous a priori lower dimensional solids (0D single molecule and/or 1D chains and/or 2D plan) as suggested therein. 14 The examination of the B-H stretching region (2000-2600 cm -1 ) in the Raman spectrum of Mg(B3H8)2 (Figure 1c) shows 6 distinguishable bands where only 4 are expected for B3H8 -in the gas phase with the ideal C2v point group. 23 The NaB3H8 Raman spectrum exhibits only three separated bands at 2132 (bridging B-H-B), 2340 and 2450 cm -1 (terminal B-H). The lower splitting of the B-H stretching bands in NaB3H8 Raman spectrum compared to Mg(B3H8)2 can be rationalized by examining the environment of B3H8 -anion in its crystal structure which is rather symmetric. 24 The anions are surrounding by a slightly distorted octahedron of Na + (Figure 2a) hence all hydrogen experience quasi similar interactions leading to low discrepancy in the B-H bonds lengths. Besides, one of the boron (B2) and two hydrogen (H4 and H5) lie on the2a Wyckoff position possessing a Cs symmetry which restricts some B-H bonds lengths to equality: two B1-H1 at 1.08(2) Å and two B1-H2 at 1.10(2) Å (Figure 2d). To satisfy Na + coordination sphere, two of the octahedron's vertices are bent by 123.7° toward H1 and H2 (Figure 2b). Interestingly, the geometrical centre of B3H8 -, lying on the 2a Wyckoff position, almost coincide with the geometrical centre of the octahedron rectangular base, shifted by solely 0.57 Å. Owing to these features, Na + possesses a quasi identical octahedral environment, slightly more symmetric (Figure 2c). Therefore, NaB3H8 possesses relatively high cohesive energy which explains its stability as 3D crystalline material. Unlike NaB3H8, the splitting of the B-H stretching modes in Mg(B3H8)2 Raman spectrum indicates a lower symmetry around B3H8 - anions compared to B3H8 -in NaB3H8. The longer B-H bonds corresponding to the bridging B-H-B stretching modes appear at 2097 and 2134 cm -1 . At higher frequencies, the bands at 2342, 2437, 2472 and 2535 cm -1 are attributed to shorter B-H terminal stretching modes. The sharpness of the two bands at high frequencies (2472 and 2535 cm -1 ) may originate from "free" B-H stretching modes which would mean not strongly involve in B-H•••Mg interactions therefore do not satisfy Mg 2+ coordination sphere. "Free" B-H bond and low number of coordination of Mg 2+ would support that first Mg(B3H8)2 could exist as low dimensional solid molecular 0D solid, 1D and/or 2D, 14 and second its low stability as a bulk 3D crystalline material. 12 These significant shortening would give some B-H bonds length close to 1 Å. With respect to the deuterated spectra, as expected, all B-H stretching modes are shifted at lower frequencies, between 2000 cm -1 and 1500cm -1 , confirming the successful synthesis of labelled Mg(B3D8)2. It is further interesting to note that the shape of the B-D stretching bands both in the IR and the Raman spectra is different from the shape of the corresponding B-H stretching bands, which reflects experimentally the presence of Fermi resonances in this spectral region similar to those observed and quantitatively described for BH4 -. 27 Figure 3 shows the experimental FTIR and Raman spectra of magnesium octahydrotriborate below 1800 cm -1 compared with calculated spectra obtained using anharmonic DFT calculations of free B3H8 -and isolated Mg(B3H8)2 in the gas phase 23 . The FTIR spectrum of NaB3H8 satisfactory match the calculated spectra for free B3H8 -(Figure 3a), however, the observed spectrum show rather broad bands which could be associated with some fluxional behaviour of the B3H8 -ion (exchange of the bridging hydrogens). [28][29][30][31] Anharmonic DFT calculations for B3H8 -indicate appreciable intensities of overtones and combination bands. 32 Comparison of experimental and theoretical FTIR spectra of Mg(B3H8)2 (Figure 3b) reveal a strong shift to higher frequencies for all bands of the calculated spectrum. This could be explained as follows:

For the isolated molecule in the gas phase, the two B3H8 -ions are strongly attracted to the central Mg 2+ ion therefore experience a "chemical pressure" leading to shorter bond lengths thus higher vibrational frequencies. This significant difference suggests that the solid Mg(B3H8)2 is not a molecular solid (0D) with isolated neutral molecules as suggested, 14 but rather higher dimensional (1D and/or 2D) solids in which the charge of the B3H8 -ion is attracted by at least two Mg ions and allows thus for a relaxation of this "chemical pressure".

We studied the thermal decomposition of Mg(B3H8)2 (Figure 4a) and its corresponding deuterated compound (Figure 4b) using thermogravimetry (TG) and differential scanning calorimetry (DSC) analyses removing NaBr dead mass. The weight loss occurs in an apparent single step during which 29 and 38 wt. % is lost for Mg(B3H8)2 and Mg(B3D8)2 respectively. The onset temperature for the hydride is 87°C whereas for the deuteride it is shifted to higher temperature 95°C. This could imply that the kinetics is governed by the B-H and B-D breaking bonds, then decomposition of Mg(B3H8)2 would mainly release hydrogen. Nevertheless, the experimental mass loss exceeds the theoretical gravimetric hydrogen content: 15.2 wt. %, then, it can be postulated that some boron containing gases formed during the decomposition. Previous studies reported that B2H6 and B5H9 were released during heat treatment of NaB3H8 and KB3H8. 22,33 Besides B2H6 and B5H9, if Mg(B3H8)2

Please do not adjust margins Please do not adjust margins would be a molecular solid, one could expect its sublimation, however, the total weight loss does not suggest a strong emission of Mg(B3H8)2. Furthermore, the difference of weight loss between the deuteride and the hydride compounds is substantial: ̴ 9 wt. % which indicates, as previously noticed, that the main releases during their decomposition are H2 and D2. To illustrate this point let us assume that the 8 equivalents of H2 and D2 are released without others boranes, then the difference would be of 11 wt. %. Now, we assume that only B2H6 (and B2D6) is formed and to keep the 29 wt. % loss only 1.1 equivalents can be released which would give a difference of 1.6 wt. % between both profiles. With respect to B5H9 (B5D9) the difference is always negatives and zero for Mg(B3H8)2 (and Mg(B3D8)2). Consequently, emission of Mg(B3H8)2 is unlikely, or at the trace level, and low for others boranes to keep the difference as high as 9 wt. %. The DSC measurements reflect complex multistep decomposition mechanisms with endo-and exothermic events strongly overlapped hindering proper integration to assess thermodynamics data. The DSC profiles are comparable between the hydride and the deuteride samples suggesting similar decomposition mechanisms. The apparent one step weight loss, in the TG profile involves with at least two endothermic and one exothermic processes. For Mg(B3D8)2 DSC profile, a clear endothermic phase transition is observed between 177 and 192°C which is also observed in the DSC profile of Mg(B3H8)2 but broader in the temperature range 135-175°C.

Hydroborates have demonstrated excellent properties as solid electrolyte. Hence, we performed electrochemical impedance spectroscopy on Mg(B3H8)2 as a function of temperature in symmetric cells with Mg-blocking molybdenum electrodes (Figure 5a). The temperature dependence conductivities are extracted from Nyquist plots, which exhibit a single semicircle indicating negligible grain boundary contribution. We attribute the total conductivity to Mg-conductivity, as proton and/or anion and/or electronic conduction has not been observed for hydroborates. The results are displayed in Figure 5b andc. At room temperature, the initial Mg 2+ conductivity of Mg(B3H8)2 is 1.2.10 -6 S cm -1 exceeding the one of Mg(BH4)2 by eight orders of magnitude. [34][35][36] Upon heating, the conductivity steadily increases to reach 1.4.10 -4 S cm -1 at 80°C. The temperature dependant conductivities of Mg 2+ follow an Arrhenius behavior with apparent activation energy of 0.83 eV which is lower than other Mg solid-state electrolyte. 34,37 The high conductivity in Mg(B3H8)2 reveals high mobility of Mg 2+ within the material which is higher than the only other octahydrotriborate ever tested for ionic conductivity: KB3H8 with K + conductivity of 10 -7 S cm -1 above 100°C. 22 This could confirm that Mg 2+ is in a low coordinating environment facilitating is motion to satisfy its coordination sphere.

In summary, formation of magnesium octahydrotriborate Mg(B3H8)2 during thermal decomposition of Mg(BH4) has been long time subject to controversy with respect to its thermodynamic stability. Theoretical calculations have predicted that the formation of bulk 3D Mg(B3H8)2 is unlikely, 12 yet several experimental works have shown its formation during thermal decomposition of Mg(BH4)2. 11,38 In the recent theoretical work, 14 the controversy was addressed using a morphology dependent approach and low dimensional 0D, 1D and 2D Mg(B3H8)2 was suggested to grow at the solid interface of others solids and no driving force for 3D crystallization was found. We succeeded in the synthesis and characterization of Mg(B3H8)2 and its deuterated derivative. Our investigations have shown, through vibrational spectroscopy and XRD, that while Mg(B3H8)2 mainly formed as a low dimensional compounds some coherent diffraction domains revealed the presence of 3D crystal structure. A close inspection of the bending modes in the experimental FTIR spectrum and the calculated FTIR spectrum for molecular Mg(B3H8)2 would discard 0D dispersed molecules within a secondary phase. TG measurements have shown that Mg(B3H8)2 is stable up to 87°C whereas the onset is shifted to higher temperature for the deuteride, which suggest that the kinetics of decomposition is governed by B-H or B-D breaking bonds. This statement is further confirmed by the significant difference between the weight loss of the hydride and the deuteride implying a substantial emission of hydrogen compared to other boranes or Mg(B3H8)2 gases. Owing to the low mass loss during the thermal decomposition, the release of Mg(B3H8)2 is unlikely or at the trace level. At this point, it is worth mentioning that the calculations were performed in MgH2 and H2 environment, 14 in our conditions low dimensional solid form at sodium bromide interface or grain boundaries. It is then interesting to ask what is the role of sodium bromide in Mg(B3H8)2 stabilization? This gives new opportunity to stabilize unstable intermediate and find new reversible hydrogen storage systems. Finally, evaluation of the Mg 2+ conductivity in Mg(B3H8)2 has revealed a high magnesium mobility suggesting a potential application in magnesium all-solid-state batteries. This could be rationalized by the fact that B3H8 2-anions don't strongly bind Mg 2+ . An obvious extension of this work will be to investigate it behavior upon hydrogen back pressure in different environment.

Conflicts of interest

"There are no conflicts to declare".

Notes and references

Figure 1 .

 1 Figure 1. Comparison of FTIR spectra between Mg(B3H8)2 and NaB3H8 (a) Mg(B3D8)2 and NaB3D8 (b). Comparison of Raman spectra between Mg(B3H8)2 and NaB3H8 (c) and Mg(B3D8)2 and NaB3D8 (d).

Figure 2 .

 2 Figure 2. Representation of: the octahedral environment of B3H8 -in the NaB3H8 crystal structure (a), and the bending of the octahedral vertices toward H1 and H2 (b), the octahedral environment of Na + in NaB3H8 crystal structure (c) and the 2a Wyckoff position of B3, H4 and H1 lying on the mirror plane represented in blue (d).24

24

 24 Figure 2. Representation of: the octahedral environment of B3H8 -in the NaB3H8 crystal structure (a), and the bending of the octahedral vertices toward H1 and H2 (b), the octahedral environment of Na + in NaB3H8 crystal structure (c) and the 2a Wyckoff position of B3, H4 and H1 lying on the mirror plane represented in blue (d).24

  journal is © The Royal Society of Chemistry 20xx Please do not adjust margins Please do not adjust margins

Figure 3 .

 3 Figure 3. Comparison of the experimental FTIR spectra of NaB3H8 with the calculated FTIR spectra of B3H8 -in the gas phase (a), and comparison of the experimental Raman spectra of Mg(B3H8)2 with the calculated Raman spectra of Mg(B3H8)2 in the gas phase (b).

Figure 4 .

 4 Figure 4. TG and DSC profiles of Mg(B3H8)2 (a) Mg(B3D8)2 (b).

Figure 5 .

 5 Figure 5. Temperature dependence of Mg 2+ conductivity in Mg(B3H8)2 (a), and typical Nyquist plot at 60°C (b) inset at 80°C.


Guillaume Dezecache

Christine Sievers

Thibaud Gruber

What non-humans can teach us about the role of emotions in cultural evolution 2

published or not. The documents may come   L'archive ouverte pluridisciplinaire

) and even chemosensory signals [START_REF] De Groot | I can see, hear, and smell your fear: 115 Comparing olfactory and audiovisual media in fear communication[END_REF], which can in turn be picked up 27 by members of the audience [START_REF] Dezecache | An evolutionary approach to 123 emotional communication[END_REF], through so-called emotional contagion 28 or emotional transmission [START_REF] Dezecache | Emotional contagion: Its scope and limits[END_REF]. This process then facilitates learning about 29 features of our environment and solutions that can be used to deal with them, through 30 associative learning (Olsson et al., 2020). In humans, ostensive communication (sensu Sperber

31&

  Wilson, 1987) also facilitates the mutual recognition of solutions to recurrent problems and 32 their integration in publicly acknowledged group-specific behavioral repertoires (Kashima et 33 al., 2020). The attractive character of solutions (and the emotions they trigger in individuals 34 observing them) act as a force that selects cultural solutions over others, and actively transform 35 behavioral repertoires (Eriksson & Strimling, 2020). 36 37 While we overall agree that the above-mentioned process actively participates in the 38 construction and maintenance of cultural phenomena, at least two important aspects remain 39 unanswered and threaten the usefulness of such theoretical narrative. First, signals associated 40 with the experience of emotion (which may inappropriately be called 'emotional signals') are 41probably only contingently read-outs of the affective state expressers experience(Crivelli & 42 Fridlund, 2018[START_REF] Whiten | Cultural Evolution in Animals[END_REF]. Indeed, environmental challenges cause emotions in individuals which 43 can then be shared with other members of a community(Kashima et al., 2020; Rimé, 2019), 44 provided there is a match between the emotion being felt and associated expressive displays recognition are necessary for cultural phenomena to appear; or, second, 77 emotional sharing is present in a larger number of species than suggested, and may even provide 78 an elegant way to come out of the conundrum of animal culture. Note that such argument can 79 also be made regarding early hominin cultures, whose brain organization may have differed 80 from ours(Bruner, 2018; Gruber, 2020). 81 82 The question then becomes: do emotions play any role in the emergence of non-human and 83 early human cultural forms? Beyond the largely cognitive layer attached to modern human 84 cultures, can these forms truly be considered 'primeval', not because of their seemingly 85 ancestral state, but rather because of the direct impact of emotion on their development? 86 Affective variables certainly do play a role in the display of animal cultural behavior: 87 physiological forces like thirst, hunger and other motivational forces surely make organisms 88 more likely to invest physical and cognitive efforts in solving environmental problems (Gruber 89 et al., 2016). They also likely make organisms pay attention to their conspecifics when facing 90 environmental problems, in search for solutions. In fact, the emotions of the agents -regardless 91 of whether they are being shared or not with others -may be one of the leading forces behind 92 social learning, as recently argued by Dukes and Clément (2017; 2019), with the novel 93 framework of Affective Social Learning. These solutions in turn, could become cultural, 94 without language nor mutual recognition. Elsewhere, some of us have argued that emotions 95 provide a fertile ground to study culture and communication in non-humans (Gruber & Sievers, 96 2019; Sievers & Gruber, 2020). In this light, emotions may truly be one of the leading forces 97 in the emergence of culture across species.