text:
Dutch/Vocabulary/Animals

Dutch/Vocabulary/Animals/Selftest

Quizlet
There is also a Quizlet set on animals to practice on.

title: Dutch/Vocabulary/Animals


text:
Lucid Dreaming/Appendices

These documents are currently kept here but at some point all the useful information in them will be in the rest of the Lucid Dreaming wikibook!

 * The Lucid Dreaming FAQ is frequently posted on alt.dreams.lucid and describes many less common techniques.
 * Pedro's VILD documentation is Pedro's original description of the VILD technique, along with some other things.

license: Creative Commons - Attribution Share-Alike - https://creativecommons.org/licenses/by-sa/4.0/

title: Lucid Dreaming/Appendices


text:
Persian/Persian Computing

Reading Persian on the Internet
If the following text appears as nonsense or boxes, you may need to enable Persian on your computer:

Sometimes it is necessary to make a page display properly by manually changing the encoding of the browser. In Firefox, follow View, Character Encoding, More Encodings, Middle Eastern and then Farsi.

Windows XP
To enable typing in Persian in Windows XP, follow these steps. You will need administrator rights on the computer on which you wish to enable Persian typing, therefore if you are on a network (such as at work, University or school) you may need to contact your network administrator. You may also be prompted to insert your Windows disk.

1. Go to Start, then go to the Control Panel and click on Date, Time, Language and Regional Options. 2. Click on "Add other Languages". 3. Click on Details. 4. Click on Add. 5. Select Input method as "Farsi" and for Keyboard layout/IME select "Farsi" from the menus.

The language bar will appear on your screen, enabling you to switch between Persian and your default or other languages. If you do not have the Persian alphabet on your keyboard, and only have a Latin alphabet, you can use the on screen keyboard to input Persian. The on-screen keyboard can be found by following Start then clicking on Accessories, Accessibility and On-Screen keyboard. It is also possible to buy Persian keyboard stickers, or you may find that you can memorize the positions of the varios letters.

title: Persian/Persian Computing


text:
Cookbook:Quinoa (Cooked)

Ingredients

 * 1 cup quinoa
 * 2 cups water
 * 1 pinch salt

Preparation

 * 1) Place quinoa in a bowl and cover completely with water. Soak for 3–4 hours, then discard the water. Replace with fresh water and soak for another hour or so. Drain again.
 * 2) Combine the drained quinoa with the 2 cups water and pinch of salt in a pot. Bring to a boil.
 * 3) Lower the heat, and simmer on the lowest heat setting for 16–18 minutes.
 * 4) Remove from the heat and let rest for 5 minutes.

title: Cookbook:Quinoa (Cooked)


text:
User talk:Erik212

Hello
I'm new at wikibooks, is it OK to translate the books from English Wikibooks into other languages, with mentioning in the translation text, that it is a translation with reference to the main source? Namely I'm going to read now about lucid dreaming and thought I could as well translate it into other language as I go along. Please answer on this page, I'll pop in later to collect your answer. Thank you:) 213.48.73.89 14:15, 7 July 2007 (UTC)

Sorry that I haven't responded promptly
I haven't logged in for a few months, but the answer is yes, as long as you get permission from the creator (r3m0t) I've seen him post here and there, but it may take a while. I recommend posting on the main Lucid Dreaming discussion page. If you want to reach me faster, use egendreau@smes.org. I check it very regularly. May I ask what language you will be translating to?

 – Mike.lifeguard  | talk 03:59, 12 September 2007 (UTC)

Re:Offering to help
I got your message, new help is always appreciated! The various engineering disciplines arent the most popular subjects here on wikibooks, in many cases i'm the only author working on them at all! To see all the computer engineering books (or at least all the books that have been properly categorized) check out Subject:Computer Engineering. All of those books need some degree of help, and are likely to be important topics of study for you in school. I dont know that there are any specific grunt work tasks that need to be done on them, but check them out and see what there is, what needs to be improved, etc. If you have any questions, let me know and I will try to help. --Whiteknight (Page) (Talk) 13:14, 12 September 2007 (UTC)

 * Also, if there are any other subjects that you think are important, but we don't have a book for it, let me know and we can work to plan and create a new book! --Whiteknight (Page) (Talk) 13:18, 12 September 2007 (UTC)

Just found your book on lucid dreaming.

I haven't gotten very far in it, but I thought I'd thow another reality check at you. It works...most of the time. Gravity. I've found that when sleeping, particularly close to morning, I have full use of my inner ear, so noting which way is "down" according to my inner ear usually tells me whether or not I'm awake. (I can remember one fail, out of...untold successes.) If you're standing, and "down" seems to be toward your side, or back, you're dreaming. 69.8.49.187 02:10, 1 October 2007 (UTC)

Msn
Do you use msn? --203.173.152.168

- No -

Nope, but you can use my e-mail. Erik212 22:27, 29 November 2007 (UTC)

title: User talk:Erik212


text:
User talk:Steven Cappa

Network topology --> Perhaps mesh topology | like this image can be included as well?

Thomas Van Dijck 20:57, 3 April 2007 (UTC)

Was the question you posted adequately answered by this edit ? --DavidCary (talk) 02:31, 24 April 2008 (UTC)

title: User talk:Steven Cappa


text:
Microprocessor Design/Hazards

A hazard is an error in the operation of the microcontroller, caused by the simultaneous execution of multiple stages in a pipelined processor.

There are three types of hazards: Data hazards, control hazards, and structural hazards.

Data Hazards
Data hazards are caused by attempting to access data or modify data simultaneously. In the MIPS design, the result is written back to the register file at the same time that another instruction decode stage is reading the register file. There are three basic types of data hazards:

 * Read After Write (RAW): In these hazards, the read process happens after the write process, although both processes happen in the same clock cycle. If the write process takes a long time, it may not complete by the time the read occurs, which will produce incorrect data.
 * Write After Read (WAR): In a WAR hazard, the write from a previous instruction will not complete before the successive read instruction. This means that the next value read will be a previous value, not the correct current value.
 * Write After Write (WAW): WAW hazards occur when two processes try to write to a data storage element at the same time. If this occurs in a single clock cycle, there will be no time in between to read the intermediate value. If the instructions execute out of order, the incorrect value may be left in the register.

Race Conditions
If data hazards are not explicitly accounted for, a race condition can arise where the proper execution of the processor is a matter of timing. If things occur in the proper times and the proper sequence, there might be no problems. However, In a race condition it is frequently likely that things will occur out of order, or at different time intervals, and this will cause a problem.

Control Hazards
Control hazards occur when a branch instruction is processed. While the branch instruction is traveling through the pipeline, the instruction fetch module will continue to read sequential instructions from the instruction memory. The problem is that because of the branch, the next instructions might execute out of order, which will cause problems.

Structural Hazards
A structural hazard occurs when two separate instructions attempt to access a particular hardware module at the same time.

Fixing Hazards
There are a number of ways to avoid or eliminate hazards.

Stall
A stall, or a "bubble" in the pipeline occurs when the control unit detects that a hazard will occur. When this happens, the control unit stops the instruction fetch mechanism and puts NOPs into the pipeline instead. In this way, the sensitive instructions will be forced to occur alone, without any other instructions being processed at the same time.

In this image we can see "bubbles" drawn where data hazards occur. A bubble signifies that the instruction has stalled in the pipeline until a previous instruction completes. Once the previous instruction has completed, the stalled instruction continues moving.

Notice in this image that the yellow instruction stops at the ID stage for 2 cycles, while the red instruction continues.

Forwarding
When a result from one instruction is to be used as the input to the ALU in the next instruction, we can use forwarding to move data directly from the ALU output into the ALU input of the next cycle, before that data has been written to the register. In this way, we can avoid the need for a stall in these situations, but at the expense of adding an additional forwarding unit to control this mechanism.

Register renaming
Instead of having fixed numbers for registers, registers can be renamed or renumbered. Consider the following ADD instruction:

add R1, R2, R1

We are adding the values in R1 and R2, and we are storing the result back in R1. What if the name "R1" pointed to two different physical storage areas, that is the value is read from one location, the "old R1", and is written to a new storage area, the "new R1".

Register renaming can be used to prevent hazards caused by out-of-order execution (OOOE).

Speculative execution
During a branch, it is frequently possible to "guess" about the outcome of the branch. By guessing about the destination, instructions can be executed speculatively. If the guess is wrong, the pipeline will need to be emptied, which takes the same amount of time as a stall. However, if the guess is right, no time is wasted and the processor continues operation as normal.

The process of guessing which way the branch will take is a complicated subject and is beyond the current scope of this book.

Branch delay
A branch delay is an instruction written in the assembly source code after the branch, that is designed to execute whether the branch is taken or not. If there are no instructions that can be executed without a dependency on the branch, then a NOP should be inserted instead. Some assemblers are capable of rearranging code in this fashion, although other assemblers that use this technique require the programmer to handle branch delays manually.

Branch Predication
In a branch predication scheme, all instructions, or most instructions in the ISA may be conditionally executed based on some condition. In other words, the instruction will be loaded from memory, decoded, and then the processor will determine whether or not to execute it. In the event of a branch, for instance, the instructions in the pipeline after the branch can be turned off if the branch went the other direction. Branch predication is very closely related to speculative execution.

Branch Prediction
Branch Prediction is the act of guessing about the direction a branch instruction will take. Typically, branch predictors base these decisions off register values, and past branch history. In a large loop, for instance, a particular program may branch back to the top of the loop many many times before the loop terminates. Consider this high-level pseudo code:

while(condition) do this end

Which roughly translates to this assembly pseudo code:

top of loop: compare condition and 0. branch to end of loop if equal do this branch to top of loop bottom of loop:

This loop will continue to repeat until the condition flag is 0. This code will likely loop many times before the one time that it exits. In a while structure like this, it takes the branch every time except for the last time, and it only doesn't take the branch once. It makes good sense to assume, therefore, that every branch that we come to will be taken, which can increase the accuracy of our speculative execution.

A branch predictor typically acts like a counter. Every time a branch is taken, the counter is incremented, and every time a branch is not taken, the counter is decremented. Consider a 2-bit predictor. If the predictor is 0 or 1, the branch is not taken, but if the predictor is 2 or 3, the branch is taken.

We can treat a branch predictor like a finite-state-machine (FSM) like in the diagram above. This FSM has 4 stages, corresponding to the following "guesses":

 * q0:Strong Take
 * q1:Weak Take
 * q2:Weak Not Take
 * q3:Strong Not Take

The zeros in this diagram refer to a branch not being taken, and a 1 corresponds to a branch being taken. If many branches are taken, the state moves towards the right. If branches are not taken, the stage moves towards the left.

title: Microprocessor Design/Hazards


text:
Microprocessor Design/Exceptions

Exceptions, are situations where the processor needs to stop executing the current code because of an error. In these cases, the processor typically begins running an exception handling routine to resolve the error, and then returns to the normal program flow. For instance, if the ALU attempts to divide by zero, or if an addition causes overflow, an exception might be triggered. The processor needs to stop operation and fix the error before the program can be resumed.

Some common examples of exceptions are arithmetic overflow or underflow, division by zero, or attempting to access a memory location that does not exist.

title: Microprocessor Design/Exceptions


text:
Microprocessor Design/Interrupts

An interrupt is a condition that causes the microprocessor to temporarily work on a different task, and then later return to its previous task. Interrupts can be internal or external. Internal interrupts, or "software interrupts," are triggered by a software instruction and operate similarly to a jump or branch instruction. An external interrupt, or a "hardware interrupt," is caused by an external hardware module. As an example, many computer systems use interrupt driven I/O, a process where pressing a key on the keyboard or clicking a button on the mouse triggers an interrupt. The processor stops what it is doing, it reads the input from the keyboard or mouse, and then it returns to the current program.

The image below shows conceptually how an interrupt happens:

The grey bars represent the control flow. The top line is the program that is currently running, and the bottom bar is the interrupt service routine (ISR). Notice that when the interrupt (Int) occurs, the program stops executing and the microcontroller begins to execute the ISR. Once the ISR is complete, the microcontroller returns to processing the program where it left off.

Interrupt performance depends on both hardware and software. The two most important properties of interrupt performance are the IRQ latency and throughput.

Modern hardware and software systems are often so complicated that it's practically impossible to deduce interrupt latency ahead of time by looking at source code and datasheets, so often it is directly measured by experiment.

Some processors have instructions that take many cycles to execute, making latency worse. Some people suggest avoiding such high-latency instructions.

Other processors are specifically designed to give predictable and lower latency response times.

Interrupting an interrupt
What happens when external hardware requests another interrupt while the processor is already in the middle of executing the ISR for a previous interrupt request?

When the first interrupt was requested, hardware in the processor causes it to finish the current instruction, disable further interrupts, and jump to the interrupt handler.

The processor ignores further interrupts until it gets to the part of the interrupt handler that has the "return from interrupt" instruction, which re-enables interrupts.

If an interrupt request occurs while interrupts were turned off, some processors will immediately jump to that interrupt handler as soon as interrupts are turned back on. With this sort of processor, an interrupt storm "starves" the main loop background task. Other processors execute at least one instruction of the main loop before handling the interrupt, so the main loop may execute extremely slowly, but at least it never "starves".

A few processors have an interrupt controller that supports "round robin scheduling", which can be used to prevent a different kind of "starvation" of low-priority interrupt handlers.

Instead of a "disable interrupt" instruction that defers interrupts indefinitely, some processors have a "lock" instruction that temporarily defers interrupts for exactly 16 machine instructions, after which deferred interrupts (if any) are automatically taken.

Often novice firmware programmers write interrupt service routines that leave interrupts completely turned off far too long, leading to difficult-to-debug problems when the processor misses interrupts from the same hardware peripheral or unrelated hardware. There are several approaches to writing "interrupt handlers that can be interrupted", including second-level interrupt handlers and nested interrupts.

second-level interrupt handlers
Many modern general-purpose OSes, including RTOSes, have "second-level interrupt handlers" that run like normal user-level processes -- with interrupts turned on, so not only can they be interrupted by any external hardware interrupt request, they can also be interrupted by the timer that the pre-emptive OS uses to know when to cycle through all the runnable processes.

The first-level interrupt handler is directly triggered by the hardware interrupt, and should be crafted to minimize the time it keeps interrupts turned off before it returns. The FLIH typically stores some data in a buffer and sets some flag that tells the OS to run the corresponding second-level interrupt handler on the data in that buffer.

More details in other Wikibooks: Operating System Design/Scheduling Processes/Preemption and Embedded_Systems/Interrupts.

nested interrupts
A few processors support "nested interrupts". The first part of the interrupt handler should be crafted to minimize the time it keeps interrupts turned off, and then it turns interrupts back on as quickly as possible. The rest of the routine, similar to second-level interrupt handlers, doesn't hurt latency because it runs with interrupts turned on. However, this introduces the potential for the same interrupt routine to be triggered again, which requires re-entrant interrupt handlers, which may make interrupt latency worse.

interrupt latency
From large-scale distributed systems to tiny embedded computers, predictably low latency interrupt handling is important.

Hard real-time systems require deterministic (low-jitter) interrupt handling.

title: Microprocessor Design/Interrupts


text:
Introduction to Chemical Engineering Processes/Problem considerations with molecular balances

Degree of Freedom Analysis on Reacting Systems
If we have N different molecules in a system, we can write N mass balances or N mole balances, whether a reaction occurs in the system or not. The only difference is that in a reacting system, we have one additional unknown, the molar extent of reaction, for each reaction taking place in the system. Therefore each reaction taking place in a process will add one degree of freedom to the process.

Complications
Unfortunately, life is not ideal, and even if we want a single reaction to occur to give us only the desired product, this is either impossible or uneconomical compared to dealing with byproducts, side reactions, equilibrium limitations, and other non-idealities.

Independent and Dependent Reactions
When you have more than one reaction in a system, you need to make sure that they are independent. The idea of independent reactions is similar to the idea of linear independence in mathematics.

Lets consider the following two general parallel competing reactions:

 * $$ aA + bB \rightarrow cC + dD $$
 * $$ a_2A + b_2B \rightarrow e_2E $$

We can represent each of the reactions by a vector of the coefficients:

 * $$ V = [\mbox{ A coeff, B coeff, C coeff, D coeff, E coeff}]$$
 * $$ v_1 = [-a, -b, c, d,0] $$
 * $$ v_2 = [-a_2,-b_2,0,0,e_2] $$

This site

By definition a set of vectors is only linearly independent if the equation:

$$ K_1*v_1 + K_2*v_2 = 0 $$

where K1 and K2 are constants only has one solution: $$ K_1 = K_2 = 0 $$.

Lets plug in our vectors:

$$ K_1 * [-a, -b, c, d,0] + K_2 * [-a_2,-b_2,0,0,e_2] = 0 $$

Since all components must add up to 0, the following system follows:

 * $$ -K_1*a - K_2*a_2 = 0 $$
 * $$ -K_1*b - K_2*b_2 = 0 $$
 * $$ K_1*c + 0 = 0 $$
 * $$ K_1*d + 0 = 0 $$
 * $$ 0 + K_2*e_2 = 0 $$

Obviously, the last three equations imply that unless c = d = 0 and e2 = 0, $$ K_1 = K_2 = 0 $$ and thus the reactions are independent.

Linearly Dependent Reactions
There is one rule to keep in mind whenever you are checking for reaction dependence or independence, which is summarized in the following box.

Therefore, if the following reaction could occur in the same system as the two above:

$$ (a+a_2)A + (b+b_2)B \rightarrow cC + dD + e_2E $$

then it would not be possible to analyze all three reactions at once, since this reaction is the sum of the first two. Only two can legitimately be analyzed at the same time.

All degree of freedom analyses in this book assume that the reactions are independent. You should check this by inspection or, for a large number of reactions, with numerical methods.

Extent of Reaction for Multiple Independent Reactions
When you are setting up extent of reaction in a molecular species balance, you must sure that you set up one for each reaction, and include both in your mole balance. So really, your mole balance will look like this:

$$ \Sigma n_{A,in} - \Sigma{n_A,out} + \Sigma a_k X_k = 0 $$

for all k reactions. In such cases it is generally easier, if possible, to use an atom balance instead due to the difficulty of solving such equations.

Equilibrium Reactions
In many cases (actually, the majority of them), a given reaction will be reversible, meaning that instead of reacting to completion, it will stop at a certain point and not go any farther. How far the reaction goes is dictated by the value of the equilibrium coefficient. Recall from general chemistry that the equilibrium coefficient for the reaction $$ aA + bB \rightarrow cC + dD $$ is defined as follows:

Here [A] is the equilibrium concentration of A, usually expressed in molarity for an aqueous solution or partial pressure for a gas. This equation can be remembered as "products over reactants" .

Usually solids and solvents are omitted by convention, since their concentrations stay approximately constant throughout a reaction. For example, in an aqueous solution, if water reacts, it is left out of the equilibrium expression.

Often, we are interested in obtaining the extent of reaction of an equilibrium reaction when it is in equilibrium. In order to do this, first recall that:

$$ X = \frac{-\Delta n_A}{a} $$

and similar for the other species.

Liquid-phase Analysis
Rewriting this in terms of molarity (moles per volume) by dividing by volume, we have:

$$ \frac{X}{V} = \frac{[A]_0 - [A]_f}{a} $$

Or, since the final state we're interested in is the equilibrium state,

$$ \frac{X}{V} = \frac{[A]_0 - [A]_{eq}}{a} $$

Solving for the desired equilibrium concentration, we obtain the equation for equilibrium concentration of A in terms of conversion:

Similar equations can be written for B, C, and D using the definition of extent of reaction. Plugging in all the equations into the expression for K, we obtain:

Using this equation, knowing the value of K, the reaction stoichiometry, the initial concentrations, and the volume of the system, the equilibrium extent of reaction can be determined.

Gas-phase Analysis
By convention, gas-phase equilibrium constants are given in terms of partial pressures which, for ideal gasses, are related to the mole fraction by the equation:

If A, B, C, and D were all gases, then, the equilibrium constant would look like this:

In order to write the gas equilibrium constant in terms of extent of reaction, let us assume for the moment that we are dealing with ideal gases. You may recall from general chemistry that for an ideal gas, we can write the ideal gas law for each species just as validly as we can on the whole gas (for a non-ideal gas, this is in general not true). Since this is true, we can say that:

$$ \frac{n_A}{V} = [A] = \frac{P_A}{RT} $$

Plugging this into the equation for $$ \frac{X}{V} $$ above, we obtain:

$$ \frac{aX}{V} = [A] - [A]_{eq} = \frac{P_{A0}}{RT} - \frac{P_{A,eq}}{RT} $$

Therefore,

Similar equations can be written for the other components. Plugging these into the equilibrium constant expression:

Again, if we know we are at equilibrium and we know the equilibrium coefficient (which can often be found in standard tables) we can calculate the extent of reaction.

Special Notes about Gas Reactions
You need to remember that In a constant-volume, isothermal gas reaction, the total pressure will change as the reaction goes on, unless the same number of moles are created as produced. In order to show that this is true, you only need to write the ideal gas law for the total amount of gas, and realize that the total number of moles in the system changes.

This is why we don't want to use total pressure in the above equations for K, we want to use partial pressures, which we can conveniently write in terms of extent of reaction.

Inert Species
Notice that all of the above equilibrium equations depend on concentration of the substance, in one form or another. Therefore, if there are species present that don't react, they may still have an effect on the equilibrium because they will decrease the concentrations of the reactants and products. Just make sure you take them into account when you're calculating the concentrations or partial pressures of each species in preparation for plugging into the equilibrium constant.

Example Reactor Solution using Extent of Reaction and the DOF
It always helps to draw a flowchart:

There are four independent unknowns: the total mass (mole) flowrate out of the reactor, the concentrations of two of the exiting species (once they are known, the forth can be calculated), and the extent of reaction.

Additionally, we can write four independent equations, one on each reacting substance. Hence, there are 0 DOF and this problem can be solved.

Let's illustrate how to do it for this relatively simple system, which illustrates some very important things to keep in mind.

First, recall that total mass is conserved even in a reacting system. Therefore, we can write that:

$$ \dot{m}_{out} = \dot{m}_{in} = 100 \mbox{ kg} $$

Now, since component masses aren't conserved, we need to convert as much as we can into moles so we can apply the extent of reaction.

$$ \dot{n}_{PH_3,in}= 0.5*(100\mbox{ kg})* \frac{1 \mbox{ mol}}{0.034 \mbox{ kg}} = 1470.6 \mbox{ moles PH}_3 \mbox{ in} $$ $$ \dot{n}_{O_2,in} = 0.5*(100\mbox{ kg})* \frac{1 \mbox{ mol}}{0.032 \mbox{ kg}} = 1562.5 \mbox{ moles O}_2 \mbox{ in} $$

$$ \dot{n}_{O_2,out} = 0.25*(100\mbox{ kg})* \frac{1 \mbox{ mol}}{0.032 \mbox{ kg}} = 781.25 \mbox{ moles O}_2 \mbox{ out} $$

Let's use the mole balance on oxygen to find the extent of reaction, since we know how much enters and how much leaves. Recall that:

$$ \Sigma \dot{n}_{A,in} - \Sigma \dot{n}_{A,out} - a*X = 0 $$

where a is the stoichiometric coefficient for A. Plugging in known values, including a = 8 (from the reaction written above), we have:

$$ 1562.5 - 781.25 - 8X = 0 $$

Solving gives:

Now let's apply the mole balances to the other species to find how much of them is present:

 * $$PH_3: 1470.6 - \dot{n}_{PH_3,out} - 4(97.66) = 0 \rightarrow \dot{n}_{PH_3,out} = 1080.0 \mbox{ moles PH}_3 $$
 * $$P_4H_10: 0 - \dot{n}_{P_4O_{10},out}+ 1(97.66) = 0 \rightarrow \dot{n}_{P_4H_10,out} = 97.66 \mbox{ moles P}_4O_{10} $$ (note it's + instead of - because it's being generated rather than consumed by the reaction)
 * $$H_2O: 0 - \dot{n}_{H_2O,out} + 6(97.66) = 0 \rightarrow \dot{n}_{H_2O,out} = 586.0 \mbox{ moles H}_2O $$

Finally, the last step we need to do is find the mass of all of these, and divide by the total mass to obtain the mass percents. As a sanity check, all of these plus 25 kg of oxygen should yield 100 kg total.

 * Mass $$ PH_3 $$ out = 1080 moles * 0.034 kg\mole = 36.72 kg
 * Mass $$ P_4O_{10} $$ out = 97.66 moles * .284 kg\mole = 27.74 kg
 * Mass $$ H_2O $$ out = 586 moles * 0.018 kg\mole = 10.55 kg

Sanity check: 36,72 + 27.74 + 10.55 + 25 (oxygen) = 100 kg (total), so we're still sane.

Hence, we get:

Example Reactor with Equilibrium
Solution: First, draw a flowchart of what we're given.

Since all of the species are dissolved in water, we should write the equilibrium constant in terms of molarity:

$$ K = 187 = \frac{[C]^3[D]}{[A][B]^2} $$

We use initial molarities of A and B, while we are given mass percents, so we need to convert.

Let's first find the number of moles of A and B we have initially:

$$ n_{A0} = 10 \mbox{ kg A} * \frac{1 \mbox{ mol A}}{0.025 \mbox{ kg A}} = 400 \mbox{ mol A} $$

$$ n_{B0} = 100\mbox{ kg solution} * \frac{0.16 \mbox{ kg B}}{\mbox{kg sln}} = 16 \mbox{ kg B} * \frac{1 \mbox{mol B}}{\mbox{ 0.047 kg B}} = 340.43 \mbox{ mol B} $$

Now, the volume contributed by the 100kg of 16% B solution is:

$$ V = \frac{m}{\rho} = \frac{100 \mbox{ kg}}{57 \frac{lb}{ft^3} * \frac{1 \mbox{ kg}}{2.2 \mbox{ lb}} * \frac{1 \mbox{ ft}^3}{28.317 \mbox{ L}} } = 109.3 \mbox{ L}$$

Since adding the A contributes 5L to the volume, the volume after the two are mixed is $$ 109.3\mbox{ L} + 5\mbox{ L} = 114.3\mbox{ L} $$.

By definition then, the molarities of A and B before the reaction occurs are:

 * $$ [A]_0 = \frac{400 \mbox{ moles A}}{114.3 \mbox{ L}} = 3.500 M $$
 * $$ [B]_0 = \frac{340.42 \mbox{ moles B}}{114.3 \mbox{ L}} = 2.978 M $$

In addition, there is no C or D in the solution initially:

 * $$ [C]_0 = [D]_0 = 0 $$

According to the stoichiometry of the reaction, $$ a = 1, b = 2, c = 3, d = 1 $$. Therefore we now have enough information to solve for the conversion. Plugging all the known values into the equilibrium equation for liquids, the following equation is obtained:

$$ 187 = \frac{ (\frac{3X}{114.3})^3 (\frac{X}{114.3}) } { (3.5 - \frac{X}{114.3} ) (2.978 - \frac{2X}{114.3} ) ^2 } $$

This equation can be solved using Goalseek or one of the numerical methods in appendix 1 to give:

Since we seek the amount of compound C that is produced, we have:

 * $$ X = \frac{\Delta n_C}{c} $$
 * Since $$ c = 3, n_{C0} = 0, \mbox{ and } X = 146.31 $$, this yields $$ n_C = 3*146.31 = 438.93\mbox{ moles C} $$


text:
Microprocessor Design/Control and Datapath

Most processors and other complicated hardware circuits are typically divided into two components: a datapath and a control unit. The datapath contains all the hardware necessary to perform all the necessary operations. In many cases, these hardware modules are parallel to one another, and the final result is determined by multiplexing all the partial results.

The control unit determines the operation of the datapath, by activating switches and passing control signals to the various multiplexers. In this way, the control unit can specify how the data flows through the datapath.

The width of the data path ...

"There is only one mistake that can be made in a computer design that is difficult to recover from: not providing enough address bits for memory addressing and memory management."

"Almost any shortcoming in a computer architecture can be overcome except too small an address space; this is the reason that DEC was finally forced to design the VAX ("virtual address extension") as a replacement for the PDP-11."

For good code density, you want the ALU datapath width to be at least as wide as the address bus width. Then every time you need to increment an address, you can do it in a single instruction, rather than requiring multiple instructions to manipulate an address one piece at a time.

After a person has designed the data path, that person finds all the control signal inputs to that datapath -- all the control signals that are needed to specify how data flows through that datapath.
 * Each general-purpose register needs at least one control signal to control whether it maintains the current value or loads a new value from elsewhere.
 * The ALU needs some control signals to tell it whether to add, subtract, etc.
 * The program counter section needs control signals to tell it whether the program counter gets reloaded with an incremented version of the previous value, or with some completely different branch value.
 * etc.

Once we know what control signals we need to generate, we need to design an ../Instruction Decoder to generate those signals.


text:
User talk:Jason.C.Daniels

I dont know if anybody has said it yet, but "welcome to wikibooks!" I see from your userpage that you tend to go through hobbies quickly. I am the exact same way, but I have found enough books and projects here on wikibooks to keep my interest. When i get tired of one book, i move on to the next book. So, in some respects i'm like a very helpful locust.

Anyway, If you need any help (or any ideas for new projects to work on) let me know. If you have any questions, you can feel free to ask me on my user talk page. I'm a pretty experienced member here, and I can usually find answers quickly. --Whiteknight (talk) (projects) 21:54, 3 April 2007 (UTC)
 * Hey yeah, thanks. I saw your name on numerous pages so I already read your talk page. It looks as if you've had a my personal opinion omitted person engaging you in some... umm .. discussions.  I was pretty pleased with how I saw you handle his personal attacks, and specious reasoning. -- Jason C Daniels 23:19, 3 April 2007 (UTC)

music theory
i'm not *that* interested in music theory. to be honest, rhythm is my weakest point in music. i just saw that i could improve the article, so that's what i did. it's not an obsession or anything.

as the wikibook says, it's unstable, so even if there was a specific audience, you could change it.

title: User talk:Jason.C.Daniels


text:
Automobile Repair/Volkswagen

Coolant change and flush.
 * /Jetta/

A coolant flow diagram for a 1997 Jetta diesel would show coolant leaving the water pump and traveling through a 3/4 inch inside diameter hose, up the front of the engine, to the top of the engine block. There it either takes an easy path through the wide, upper radiator hose (only if the thermostat is open) or it flows directly into the engine. Hot coolant exits the driver's side of the engine head and goes to the exhaust gas recirculation (EGR) device to cool recycled smoke. This adds even more heat to the coolant. Next the coolant travels to the heater core in the dashboard. Finally the rubber coolant hose exits the dashboard and joins a metal line which returns coolant to the suction side of the water pump. Two skinny hoses direct bubbles to the top of the coolant reservoir as the system purges itself of flow-restricting air bubbles. The bottom of the coolant reservoir is T connected into the suction line to the water pump. The thermostat is in the water pump inlet and blocks incoming flow from the bottom radiator hose until the engine has reached the temperature at which the thermostat is designed to open 195 degrees Fahrenheit. A corroded thermostat can get stuck open which would prevent proper warm-up. Or, A thermostat can become stuck closed, which can cause overheating and boil over.

 * 2001
 * /Golf/
 * /GTI/

title: Automobile Repair/Volkswagen


text: User:Poppy~enwikibooks

title: User:Poppy~enwikibooks


text:
Microprocessor Design/Multi-Core Systems

Taking the idea of superscalar operations to the next level, it is possible (and frequently desirable) to put multiple microprocessor cores onto a single chip, and have the cores operate in parallel with one another.

Symmetric Multi-core
A symmetric multi-core processor is one that has multiple cores on a single chip, and all of those cores are identical.

Asymmetric Multi-core
An asymmetric multi-core processor is one that has multiple cores on a single chip, but those cores might be different designs. For instance, there could be 2 general purpose cores and 2 vector cores on a single chip.

Symmetric Multicore
A symmetric multi-core processor is a processor which has multiple cores that are all exactly the same. Every single core has the same architecture and the same capabilities. An example of a symmetric multi-core system is the Intel Core 2 Duo processor.

Each core has the same capabilities, so it requires that there is an arbitration unit to give each core a specific task. Software that uses techniques like multithreading makes the best use of a multi-core processor like the Intel Core 2.

Asymmetric Multi-core
In an asymmetric multi-core processor, the chip has multiple cores on-board, but the cores might be different designs. Each core will have different capabilities.

Example: IBM Cell Processor
An example of an asymmetric multi-core processor is the IBM Cell processor.

The IBM Cell processor has 1 PPE that controls the chip, and 8 SPEs that are designed for high mathematical throughput. The IBM Cell processor is designed as follows:

Notice how the SPE cores only connect to the PPE, and not to each other. Notice also that the PPE core is much larger than the individual SPE cores.