text:
Intel 8086

The 8086 (also called iAPX 86) is a 16-bit microprocessor chip designed by Intel between early 1976 and June 8, 1978, when it was released. The Intel 8088, released July 1, 1979, is a slightly modified chip with an external 8-bit data bus (allowing the use of cheaper and fewer supporting ICs), and is notable as the processor used in the original IBM PC design.

The 8086 gave rise to the x86 architecture, which eventually became Intel's most successful line of processors. On June 5, 2018, Intel released a limited-edition CPU celebrating the 40th anniversary of the Intel 8086, called the Intel Core i7-8086K.

Background
In 1972, Intel launched the 8008, Intel's first 8-bit microprocessor. It implemented an instruction set designed by Datapoint Corporation with programmable CRT terminals in mind, which also proved to be fairly general-purpose. The device needed several additional ICs to produce a functional computer, in part due to it being packaged in a small 18-pin "memory package", which ruled out the use of a separate address bus (Intel was primarily a DRAM manufacturer at the time).

Two years later, Intel launched the 8080, employing the new 40-pin DIL packages originally developed for calculator ICs to enable a separate address bus. It has an extended instruction set that is source-compatible (not binary compatible) with the 8008 and also includes some 16-bit instructions to make programming easier. The 8080 device was eventually replaced by the depletion-load-based 8085 (1977), which sufficed with a single +5 V power supply instead of the three different operating voltages of earlier chips. Other well known 8-bit microprocessors that emerged during these years are Motorola 6800 (1974), General Instrument PIC16X (1975), MOS Technology 6502 (1975), Zilog Z80 (1976), and Motorola 6809 (1978).

The first x86 design
The 8086 project started in May 1976 and was originally intended as a temporary substitute for the ambitious and delayed iAPX 432 project. It was an attempt to draw attention from the less-delayed 16-bit and 32-bit processors of other manufacturers — Motorola, Zilog, and National Semiconductor.

Whereas the 8086 was a 16-bit microprocessor, it used the same microarchitecture as Intel's 8-bit microprocessors (8008, 8080, and 8085). This allowed assembly language programs written in 8-bit to seamlessly migrate. New instructions and features — such as signed integers, base+offset addressing, and self-repeating operations — were added. Instructions were added to assist source code compilation of nested functions in the ALGOL-family of languages, including Pascal and PL/M. According to principal architect Stephen P. Morse, this was a result of a more software-centric approach. Other enhancements included microcode instructions for the multiply and divide assembly language instructions. Designers also anticipated coprocessors, such as 8087 and 8089, so the bus structure was designed to be flexible.

The first revision of the instruction set and high level architecture was ready after about three months, and as almost no CAD tools were used, four engineers and 12 layout people were simultaneously working on the chip. The 8086 took a little more than two years from idea to working product, which was considered rather fast for a complex design in the 1970s

The 8086 was sequenced using a mixture of random logic and microcode and was implemented using depletion-load nMOS circuitry with approximately 20,000 active transistors (29,000 counting all ROM and PLA sites). It was soon moved to a new refined nMOS manufacturing process called HMOS (for High performance MOS) that Intel originally developed for manufacturing of fast static RAM products. This was followed by HMOS-II, HMOS-III versions, and, eventually, a fully static CMOS version for battery powered devices, manufactured using Intel's CHMOS processes. The original chip measured 33 mm² and minimum feature size was 3.2 μm. The MUL and DIV instructions were very slow due to being microcoded

The 8086 was die-shrunk to 2 μm in 1981; this version also corrected a stack register bug in the original 3.5 μm chips. Later 1.5 μm and CMOS variants were outsourced to other manufacturers and not developed in-house.

The architecture was defined by Stephen P. Morse with some help from Bruce Ravenel (the architect of the 8087) in refining the final revisions. Logic designer Jim McKevitt and John Bayliss were the lead engineers of the hardware-level development team and Bill Pohlman the manager for the project. The legacy of the 8086 is enduring in the basic instruction set of today's personal computers and servers; the 8086 also lent its last two digits to later extended versions of the design, such as the Intel 286 and the Intel 386, all of which eventually became known as the x86 family. (Another reference is that the PCI Vendor ID for Intel devices is 8086h.)

Buses and operation
All internal registers, as well as internal and external data buses, are 16 bits wide, which firmly established the "16-bit microprocessor" identity of the 8086. A 20-bit external address bus provides a 1 MiB physical address space (220 = 1,048,576 x 1 byte). This address space is addressed by means of internal memory "segmentation". The data bus is multiplexed with the address bus in order to fit all of the control lines into a standard 40-pin dual in-line package. It provides a 16-bit I/O address bus, supporting 64 KB of separate I/O space. The maximum linear address space is limited to 64 KB, simply because internal address/index registers are only 16 bits wide. Programming over 64 KB memory boundaries involves adjusting the segment registers (see below); this difficulty existed until the 80386 architecture introduced wider (32-bit) registers (the memory management hardware in the 80286 did not help in this regard, as its registers are still only 16 bits wide).

Hardware modes of 8086
Some of the control pins, which carry essential signals for all external operations, have more than one function depending upon whether the device is operated in min or max mode. The former mode is intended for small single-processor systems, while the latter is for medium or large systems using more than one processor (a kind of multiprocessor mode). Maximum mode is required when using an 8087 or 8089 coprocessor. The voltage on pin 33 (MN/$\overline{MX}$) determines the mode. Changing the state of pin 33 changes the function of certain other pins, most of which have to do with how the CPU handles the (local) bus. The mode is usually hardwired into the circuit and therefore cannot be changed by software. The workings of these modes are described in terms of timing diagrams in Intel datasheets and manuals. In minimum mode, all control signals are generated by the 8086 itself.

Registers and instruction
The 8086 has eight more-or-less general 16-bit registers (including the stack pointer but excluding the instruction pointer, flag register and segment registers). Four of them, AX, BX, CX, DX, can also be accessed as 8-bit register pairs (see figure) while the other four, SI, DI, BP, SP, are 16-bit only.

Due to a compact encoding inspired by 8-bit processors, most instructions are one-address or two-address operations, which means that the result is stored in one of the operands. At most one of the operands can be in memory, but this memory operand can also be the destination, while the other operand, the source, can be either register or immediate. A single memory location can also often be used as both source and destination which, among other factors, further contributes to a code density comparable to (and often better than) most eight-bit machines at the time.

The degree of generality of most registers is much greater than in the 8080 or 8085. However, 8086 registers were more specialized than in most contemporary minicomputers and are also used implicitly by some instructions. While perfectly sensible for the assembly programmer, this makes register allocation for compilers more complicated compared to more orthogonal 16-bit and 32-bit processors of the time such as the PDP-11, VAX, 68000, 32016, etc. On the other hand, being more regular than the rather minimalistic but ubiquitous 8-bit microprocessors such as the 6502, 6800, 6809, 8085, MCS-48, 8051, and other contemporary accumulator-based machines, it is significantly easier to construct an efficient code generator for the 8086 architecture.

Another factor for this is that the 8086 also introduced some new instructions (not present in the 8080 and 8085) to better support stack-based high-level programming languages such as Pascal and PL/M; some of the more useful instructions are, and ret size, supporting the "Pascal calling convention" directly. (Several others, such as  and , were added in the subsequent 80186, 80286, and 80386 processors.)

A 64 KB (one segment) stack growing towards lower addresses is supported in hardware; 16-bit words are pushed onto the stack, and the top of the stack is pointed to by SS:SP. There are 256 interrupts, which can be invoked by both hardware and software. The interrupts can cascade, using the stack to store the return addresses.

The 8086 has 64 K of 8-bit (or alternatively 32 K of 16-bit word) I/O port space.

Flags
The 8086 has a 16-bit flags register. Nine of these condition code flags are active, and indicate the current state of the processor: Carry flag (CF), Parity flag (PF), Auxiliary carry flag (AF), Zero flag (ZF), Sign flag (SF), Trap flag (TF), Interrupt flag (IF), Direction flag (DF), and Overflow flag (OF). Also referred to as the status word, the layout of the flags register is as follows:

Segmentation
There are also four 16-bit segment registers (see figure) that allow the 8086 CPU to access one megabyte of memory in an unusual way. Rather than concatenating the segment register with the address register, as in most processors whose address space exceeds their register size, the 8086 shifts the 16-bit segment only four bits left before adding it to the 16-bit offset (16×segment + offset), therefore producing a 20-bit external (or effective or physical) address from the 32-bit segment:offset pair. As a result, each external address can be referred to by 212 = 4096 different segment:offset pairs.

Although considered complicated and cumbersome by many programmers, this scheme also has advantages; a small program (less than 64 KB) can be loaded starting at a fixed offset (such as 0000) in its own segment, avoiding the need for relocation, with at most 15 bytes of alignment waste.

Compilers for the 8086 family commonly support two types of pointer, near and far. Near pointers are 16-bit offsets implicitly associated with the program's code or data segment and so can be used only within parts of a program small enough to fit in one segment. Far pointers are 32-bit segment:offset pairs resolving to 20-bit external addresses. Some compilers also support huge pointers, which are like far pointers except that pointer arithmetic on a huge pointer treats it as a linear 20-bit pointer, while pointer arithmetic on a far pointer wraps around within its 16-bit offset without touching the segment part of the address.

To avoid the need to specify near and far on numerous pointers, data structures, and functions, compilers also support "memory models" which specify default pointer sizes. The tiny (max 64K), small (max 128K), compact (data > 64K), medium (code > 64K), large (code,data > 64K), and huge (individual arrays > 64K) models cover practical combinations of near, far, and huge pointers for code and data. The tiny model means that code and data are shared in a single segment, just as in most 8-bit based processors, and can be used to build .com files for instance. Precompiled libraries often come in several versions compiled for different memory models.

According to Morse et al.,. the designers actually contemplated using an 8-bit shift (instead of 4-bit), in order to create a 16 MB physical address space. However, as this would have forced segments to begin on 256-byte boundaries, and 1 MB was considered very large for a microprocessor around 1976, the idea was dismissed. Also, there were not enough pins available on a low cost 40-pin package for the additional four address bus pins.

In principle, the address space of the x86 series could have been extended in later processors by increasing the shift value, as long as applications obtained their segments from the operating system and did not make assumptions about the equivalence of different segment:offset pairs. In practice the use of "huge" pointers and similar mechanisms was widespread and the flat 32-bit addressing made possible with the 32-bit offset registers in the 80386 eventually extended the limited addressing range in a more general way.

The instruction stream is fetched from memory as words and is addressed internally by the processor to the byte level as necessary. An instruction stream queuing mechanism allows up to 6 bytes of the instruction stream to be queued while waiting for decoding and execution. The queue acts as a First-In-First-Out (FIFO) buffer, from which the Execution Unit (EU) extracts instruction bytes as required. Whenever there is space for at least two bytes in the queue, the BIU will attempt a word fetch memory cycle. If the queue is empty (following a branch instruction, for example), the first byte into the queue immediately becomes available to the EU.

Porting older software
Small programs could ignore the segmentation and just use plain 16-bit addressing. This allows 8-bit software to be quite easily ported to the 8086. The authors of most DOS implementations took advantage of this by providing an Application Programming Interface very similar to CP/M as well as including the simple .com executable file format, identical to CP/M. This was important when the 8086 and MS-DOS were new, because it allowed many existing CP/M (and other) applications to be quickly made available, greatly easing acceptance of the new platform.

Example code
The following 8086 assembly source code is for a subroutine named  that copies a null-terminated ASCIIZ character string from one location to another, converting all alphabetic characters to lower case. The string is copied one byte (8-bit character) at a time.

The example code uses the BP (base pointer) register to establish a call frame, an area on the stack that contains all of the parameters and local variables for the execution of the subroutine. This kind of calling convention supports reentrant and recursive code and has been used by Algol-like languages since the late 1950s. A flat memory model is assumed, specifically, that the DS and ES segments address the same region of memory.

Performance

Although partly shadowed by other design choices in this particular chip, the multiplexed address and data buses limit performance slightly; transfers of 16-bit or 8-bit quantities are done in a four-clock memory access cycle, which is faster on 16-bit, although slower on 8-bit quantities, compared to many contemporary 8-bit based CPUs. As instructions vary from one to six bytes, fetch and execution are made concurrent and decoupled into separate units (as it remains in today's x86 processors): The bus interface unit feeds the instruction stream to the execution unit through a 6-byte prefetch queue (a form of loosely coupled pipelining), speeding up operations on registers and immediates, while memory operations became slower (four years later, this performance problem was fixed with the 80186 and 80286). However, the full (instead of partial) 16-bit architecture with a full width ALU meant that 16-bit arithmetic instructions could now be performed with a single ALU cycle (instead of two, via internal carry, as in the 8080 and 8085), speeding up such instructions considerably. Combined with orthogonalizations of operations versus operand types and addressing modes, as well as other enhancements, this made the performance gain over the 8080 or 8085 fairly significant, despite cases where the older chips may be faster (see below).

 * EA = time to compute effective address, ranging from 5 to 12 cycles.
 * Timings are best case, depending on prefetch status, instruction alignment, and other factors.

As can be seen from these tables, operations on registers and immediates were fast (between 2 and 4 cycles), while memory-operand instructions and jumps were quite slow; jumps took more cycles than on the simple 8080 and 8085, and the 8088 (used in the IBM PC) was additionally hampered by its narrower bus. The reasons why most memory related instructions were slow were threefold:
 * Loosely coupled fetch and execution units are efficient for instruction prefetch, but not for jumps and random data access (without special measures).
 * No dedicated address calculation adder was afforded; the microcode routines had to use the main ALU for this (although there was a dedicated segment + offset adder).
 * The address and data buses were multiplexed, forcing a slightly longer (33~50%) bus cycle than in typical contemporary 8-bit processors.

However, memory access performance was drastically enhanced with Intel's next generation of 8086 family CPUs. The 80186 and 80286 both had dedicated address calculation hardware, saving many cycles, and the 80286 also had separate (non-multiplexed) address and data buses.

Floating point
The 8086/8088 could be connected to a mathematical coprocessor to add hardware/microcode-based floating-point performance. The Intel 8087 was the standard math coprocessor for the 8086 and 8088, operating on 80-bit numbers. Manufacturers like Cyrix (8087-compatible) and Weitek (not 8087-compatible) eventually came up with high-performance floating-point coprocessors that competed with the 8087.

Chip versions
The clock frequency was originally limited to 5 MHz, but the last versions in HMOS were specified for 10 MHz. HMOS-III and CMOS versions were manufactured for a long time (at least a while into the 1990s) for embedded systems, although its successor, the 80186/80188 (which includes some on-chip peripherals), has been more popular for embedded use.

The 80C86, the CMOS version of the 8086, was used in the GRiDPad, Toshiba T1200, HP 110, and finally the 1998–1999 Lunar Prospector.

For the packaging, the Intel 8086 was available both in ceramic and plastic DIP packages.

Derivatives and clones
Compatible—and, in many cases, enhanced—versions were manufactured by Fujitsu, Harris/Intersil, OKI, Siemens, Texas Instruments, NEC, Mitsubishi, and AMD. For example, the NEC V20 and NEC V30 pair were hardware-compatible with the 8088 and 8086 even though NEC made original Intel clones μPD8088D and μPD8086D respectively, but incorporated the instruction set of the 80186 along with some (but not all) of the 80186 speed enhancements, providing a drop-in capability to upgrade both instruction set and processing speed without manufacturers having to modify their designs. Such relatively simple and low-power 8086-compatible processors in CMOS are still used in embedded systems.

The electronics industry of the Soviet Union was able to replicate the 8086 through. The resulting chip, K1810VM86, was binary and pin-compatible with the 8086.

i8086 and i8088 were respectively the cores of the Soviet-made PC-compatible EC1831 and EC1832 desktops. (EC1831 is the EC identification of IZOT 1036C and EC1832 is the EC identification of IZOT 1037C, developed and manufactured in Bulgaria. EC stands for Единая Система.) However, the EC1831 computer (IZOT 1036C) had significant hardware differences from the IBM PC prototype. The EC1831 was the first PC-compatible computer with dynamic bus sizing (US Pat. No 4,831,514). Later some of the EC1831 principles were adopted in PS/2 (US Pat. No 5,548,786) and some other machines (UK Patent Application, Publication No. GB-A-2211325, Published June 28, 1989).

Support chips

 * Intel 8237: direct memory access (DMA) controller
 * Intel 8251: universal synchronous/asynchronous receiver/transmitter at 19.2 kbit/s
 * Intel 8253: programmable interval timer, 3x 16-bit max 10 MHz
 * Intel 8255: programmable peripheral interface, 3x 8-bit I/O pins used for printer connection etc.
 * Intel 8259: programmable interrupt controller
 * Intel 8279: keyboard/display controller, scans a keyboard matrix and display matrix like 7-seg
 * Intel 8282/8283: 8-bit latch
 * Intel 8284: clock generator
 * Intel 8286/8287: bidirectional 8-bit driver. In 1980 both Intel I8286/I8287 (industrial grade) version were available for US$16.25 in quantities of 100.
 * Intel 8288: bus controller
 * Intel 8289: bus arbiter
 * NEC μPD765 or Intel 8272A: floppy controller

Microcomputers using the 8086

 * The Intel Multibus-compatible single-board computer ISBC 86/12 was announced in 1978.
 * The Xerox NoteTaker was one of the earliest portable computer designs in 1978 and used three 8086 chips (as CPU, graphics processor, and I/O processor), but never entered commercial production.
 * Seattle Computer Products shipped S-100 bus based 8086 systems (SCP200B) as early as November 1979.
 * The Norwegian Mycron 2000, introduced in 1980.
 * One of the most influential microcomputers of all, the IBM PC, used the Intel 8088, a version of the 8086 with an 8-bit data bus (as mentioned above).
 * The first Compaq Deskpro used an 8086 running at 7.16 MHz, but was compatible with add-in cards designed for the 4.77 MHz IBM PC XT and could switch the CPU down to the lower speed (which also switched in a memory bus buffer to simulate the 8088's slower access) to avoid software timing issues.
 * An 8 MHz 8086-2 was used in the AT&T 6300 PC (built by Olivetti, and known globally under several brands and model numbers), an IBM PC-compatible desktop microcomputer. The M24 / PC 6300 has IBM PC/XT compatible 8-bit expansion slots, but some of them have a proprietary extension providing the full 16-bit data bus of the 8086 CPU (similar in concept to the 16-bit slots of the IBM PC AT, but different in the design details, and physically incompatible), and all system peripherals including the onboard video system also enjoy 16-bit data transfers. The later Olivetti M24SP featured an 8086-2 running at the full maximum 10 MHz.
 * The IBM PS/2 models 25 and 30 were built with an 8 MHz 8086.
 * The Amstrad PC1512, PC1640, PC2086, PC3086 and PC5086 all used 8086 CPUs at 8 MHz.
 * The NEC PC-9801.
 * The Tandy 1000 SL-series and RL machines used 9.47 MHz 8086 CPUs.
 * The IBM Displaywriter word processing machine and the Wang Professional Computer, manufactured by Wang Laboratories, also used the 8086.
 * NASA used original 8086 CPUs on equipment for ground-based maintenance of the Space Shuttle Discovery until the end of the space shuttle program in 2011. This decision was made to prevent software regression that might result from upgrading or from switching to imperfect clones.
 * KAMAN Process and Area Radiation Monitors
 * The Tektronix 4170 ran CP/M-86 and used an 8086

title: Intel 8086


text:
Intel 8088

The Intel 8088 ("eighty-eighty-eight", also called iAPX 88)  microprocessor is a variant of the Intel 8086. Introduced on June 1, 1979,   the 8088 has an eight-bit external data bus instead of the 16-bit bus of the 8086. The 16-bit registers and the one megabyte address range are unchanged, however. In fact, according to the Intel documentation, the 8086 and 8088 have the same execution unit (EU)—only the bus interface unit (BIU) is different. The 8088 was used in the original IBM PC and in IBM PC compatible clones.

History and description
The 8088 was designed at Intel's laboratory in Haifa, Israel, as were a large number of Intel's processors. The 8088 was targeted at economical systems by allowing the use of an eight-bit data path and eight-bit support and peripheral chips; complex circuit boards were still fairly cumbersome and expensive when it was released. The prefetch queue of the 8088 was shortened to four bytes, from the 8086's six bytes, and the prefetch algorithm was slightly modified to adapt to the narrower bus. These modifications of the basic 8086 design were one of the first jobs assigned to Intel's new design office and laboratory in Haifa.

Variants of the 8088 with more than 5 MHz maximal clock frequency include the 8088–2, which was fabricated using Intel's new enhanced nMOS process called HMOS and specified for a maximal frequency of 8 MHz. Later followed the 80C88, a fully static CHMOS design, which could operate with clock speeds from 0 to 8 MHz. There were also several other, more or less similar, variants from other manufacturers. For instance, the NEC V20 was a pin-compatible and slightly faster (at the same clock frequency) variant of the 8088, designed and manufactured by NEC. Successive NEC 8088 compatible processors would run at up to 16 MHz. In 1984, Commodore International signed a deal to manufacture the 8088 for use in a licensed Dynalogic Hyperion clone, in a move that was regarded as signaling a major new direction for the company. The available CMOS version was outsourced to Oki Electronic Industry Co., Ltd. When announced, the list price of the 8088 was US$124.80. The plastic package version was introduced in July 1981 for USD $14.10 per 100 in quantities. Intel second sourced this microprocessor to Fujitsu Limited.

Differences from the 8086
The 8088 is architecturally very similar to the 8086. The main difference is that there are only eight data lines instead of the 8086's 16 lines. All of the other pins of the device perform the same function as they do with the 8086 with two exceptions. First, pin 34 is no longer $\overline{BHE}$ (this is the high-order byte select on the 8086—the 8088 does not have a high-order byte on its eight-bit data bus). Instead it outputs a maximum mode status, $\overline{SS0}$. Combined with the IO/$\overline{M}$ and DT/$\overline{R}$ signals, the bus cycles can be decoded (it generally indicates when a write operation or an interrupt is in progress). The second change is the pin that signals whether a memory access or input/output access is being made has had its sense reversed. The pin on the 8088 is IO/$\overline{M}$. On the 8086 part it is $\overline{IO}$/M. The reason for the reversal is that it makes the 8088 compatible with the 8085.

Performance
Depending on the clock frequency, the number of memory wait states, as well as on the characteristics of the particular application program, the average performance for the Intel 8088 ranged approximately from 0.33 to 1 million instructions per second. Meanwhile, the  and   instructions, taking two and three cycles respectively, yielded an absolute peak performance of between $1/3$ and $1/2$ MIPS per MHz, that is, somewhere in the range 3–5 MIPS at 10 MHz.

The speed of the execution unit (EU) and the bus of the 8086 CPU was well balanced; with a typical instruction mix, an 8086 could execute instructions out of the prefetch queue a good bit of the time. Cutting down the bus to eight bits made it a serious bottleneck in the 8088. With the speed of instruction fetch reduced by 50% in the 8088 as compared to the 8086, a sequence of fast instructions can quickly drain the four-byte prefetch queue. When the queue is empty, instructions take as long to complete as they take to fetch. Both the 8086 and 8088 take four clock cycles to complete a bus cycle; whereas for the 8086 this means four clocks to transfer two bytes, on the 8088 it is four clocks per byte. Therefore, for example, a two-byte shift or rotate instruction, which takes the EU only two clock cycles to execute, actually takes eight clock cycles to complete if it is not in the prefetch queue. A sequence of such fast instructions prevents the queue from being filled as fast as it is drained, and in general, because so many basic instructions execute in fewer than four clocks per instruction byte—including almost all the ALU and data-movement instructions on register operands and some of these on memory operands—it is practically impossible to avoid idling the EU in the 8088 at least $1/4$ of the time while executing useful real-world programs, and it is not hard to idle it half the time. In short, an 8088 typically runs about half as fast as 8086 clocked at the same rate, because of the bus bottleneck (the only major difference).

A side effect of the 8088 design, with the slow bus and the small prefetch queue, is that the speed of code execution can be very dependent on instruction order. When programming the 8088, for CPU efficiency, it is vital to interleave long-running instructions with short ones whenever possible. For example, a repeated string operation or a shift by three or more will take long enough to allow time for the 4-byte prefetch queue to completely fill. If short instructions (i.e. ones totaling few bytes) are placed between slower instructions like these, the short ones can execute at full speed out of the queue. If, on the other hand, the slow instructions are executed sequentially, back to back, then after the first of them the bus unit will be forced to idle because the queue will already be full, with the consequence that later more of the faster instructions will suffer fetch delays that might have been avoidable. As some instructions, such as single-bit-position shifts and rotates, take literally 4 times as long to fetch as to execute, the overall effect can be a slowdown by a factor of two or more. If those code segments are the bodies of loops, the difference in execution time may be very noticeable on the human timescale.

The 8088 is also (like the 8086) slow at accessing memory. The same ALU that is used to execute arithmetic and logic instructions is also used to calculate effective addresses. There is a separate adder for adding a shifted segment register to the offset address, but the offset EA itself is always calculated entirely in the main ALU. Furthermore, the loose coupling of the EU and BIU (bus unit) inserts communication overhead between the units, and the four-clock period bus transfer cycle is not particularly streamlined. Contrast this with the two-clock period bus cycle of the 6502 CPU and the 80286's three-clock period bus cycle with pipelining down to two cycles for most transfers. Most 8088 instructions that can operate on either registers or memory, including common ALU and data-movement operations, are at least four times slower for memory operands than for only register operands. Therefore, efficient 8088 (and 8086) programs avoid repeated access of memory operands when possible, loading operands from memory into registers to work with them there and storing back only the finished results. The relatively large general register set of the 8088 compared to its contemporaries assists this strategy. When there are not enough registers for all variables that are needed at once, saving registers by pushing them onto the stack and popping them back to restore them is the fastest way to use memory to augment the registers, as the stack PUSH and POP instructions are the fastest memory operations. The same is probably not true on the 80286 and later; they have dedicated address ALUs and perform memory accesses much faster than the 8088 and 8086.

Finally, because calls, jumps, and interrupts reset the prefetch queue, and because loading the IP register requires communication between the EU and the BIU (since the IP register is in the BIU, not in the EU, where the general registers are), these operations are costly. All jumps and calls take at least 15 clock cycles. Any conditional jump requires four clock cycles if not taken, but if taken, it requires 16 cycles in addition to resetting the prefetch queue; therefore, conditional jumps should be arranged to be not taken most of the time, especially inside loops. In some cases, a sequence of logic and movement operations is faster than a conditional jump that skips over one or two instructions to achieve the same result.

Intel datasheets for the 8086 and 8088 advertised the dedicated multiply and divide instructions (MUL, IMUL, DIV, and IDIV), but they are very slow, on the order of 100–200 clock cycles each. Many simple multiplications by small constants (besides powers of 2, for which shifts can be used) can be done much faster using dedicated short subroutines. The 80286 and 80386 each greatly increase the execution speed of these multiply and divide instructions.

Selection for use in the IBM PC
The original IBM PC is the most influential microcomputer to use the 8088. It has a clock frequency of 4.77 MHz (4/3 the NTSC colorburst frequency). Some of IBM's engineers and other employees wanted to use the IBM 801 processor, some preferred the new Motorola 68000, and others argued for a small and simple microprocessor, such as the MOS Technology 6502 or Zilog Z80, which are in earlier personal computers. However, IBM already had a history of using Intel chips in its products and had also acquired the rights to manufacture the 8086 family.

IBM chose the 8088 over the 8086 because Intel offered a better price for the former and could supply more units. Another factor was that the 8088 allowed the computer to be based on a modified 8085 design, as it could easily interface with most nMOS chips with 8-bit databuses. These were mature, and therefore economical, components. This included ICs originally intended for support and peripheral functions around the 8085 and similar processors (not exclusively Intel's), which were already well known by many engineers, further reducing cost.

The descendants of the 8088 include the 80188, 80186, 80286, 80386, 80486, and later software-compatible processors, including the Intel Core processors, which are popular today.

Peripherals

 * Intel 8282/8283: 8-bit latch
 * Intel 8284: clock generator
 * Intel 8286/8287: bidirectional 8-bit driver. Both Intel I8286/I8287 (industrial grade) version were available for US$16.25 in quantities of 100.
 * Intel 8288: bus controller
 * Intel 8289: bus arbiter
 * Intel 8087: Math Co-Processor

license: Creative Commons - Attribution Share-Alike - https://creativecommons.org/licenses/by-sa/4.0/

title: Intel 8088


text:
Talk:Intel 80286

Protected And Real
The article is somewhat confusing because it talks about Concurrent DOS running multiple real mode programs in protected mode, but elsewhere says the CPU doesn't allow it. E step 286 allows multiple real mode programs to run using LOADALL. Concurrent DOS was smart enough to do this Microsoft was not. There is no *technical* reason Microsoft couldn't have supported multiple real mode DOS programs at once in Windows 286 as the article implies.

It's also confused because it talks about the keyboard controller hack but DOS rarely used this because it used LOADALL on later 286 processors in order to implement the extended memory RAM disk so didn't have to leave real mode as the article implies.

Yes LOADALL is firmly in the 'dark arts' of x86 programming but it existed and was used successfully.

82.70.14.226 (talk) 17:50, 1 April 2018 (UTC)

Unknown subject
and could run up to 12.5MHz.

I removed this, because I think that it is wrong, but I'm not sure. I believe that a 16MHz 80286 was pretty common, and my father said that his first computer had a 20MHz 286 CPU. Can anyone confirm or deny? -- Stephen Gilbert

UPDATE: I am sure. Check this page: http://www.pcguide.com/ref/cpu/fam/g2I80286-c.html -- Stephen Gilbert

 * It seems there were 25MHz 286s too, though not from Intel. Crusadeonilliteracy

codenamed iAPX

I removed this because the 80286 was not codenamed iAPX. The iAPX was a completely different processor family developed by Intel in 1981. At first the family consisted of a two-chip general data processor, and a single-chip interface processor. Eventually Intel added a bus interface unit and a memory control unit. Please see a great iAPX website at http://www.brouhaha.com/~eric/retrocomputing/intel/iapx432/

Chris Thames mavroxur@hotmail.com

Exiting protected mode
However, the 286 couldn't revert to real mode, so protected mode wasn't widely used until the appearance of the 386, which could go back and forth between modes.

It should be noted that although this is technically true, IBM and others created workarounds for this limitation early on, so it's not as big a problem as the article makes it sound.

References: Protected mode overview Triple-fault technique

Tim Peterson 18:03, 22 Apr 2005 (UTC)

I've edited the description of real mode reentry, hopefully making clear that it had to depend on external circuitry (to cause a processor reset) plus specialised BIOS code (to help restore OS status). I removed details of /how/ the reset would be triggered (earlier method thru a KB controller output wire, later by converting a shutdown status to reset) as well as the story about "clever programmers", where in fact all this was devised by Intel and circulated under NDA.

Ninho (talk) 20:49, 4 November 2009 (UTC) Ninho

The 80286's performance is more than twice that of its predecessors (the Intel 8086 and Intel 80186)
You know that section is pretty confused: The 80286 was perhaps twice as fast as it's predecessor, the 80186, because it typically ran at a higher clock speed. But it was much faster than the computer most people had, because like in the 80186, calculation of the more complex addressing modes (such as [BX+SI]) were performed by dedicated hardware; the widely used 8088 had microcoded intstructions (like a RISC processor) that took many clock cycles to complete. In fact, the performance increase per clock cycle between the 80186 and the 8086/8088 may be the largest among the generations of x86 processors. In comparison, (and speaking as one who used these processors) the step between the 80186 and the 80286 was negligable. On the other hand, I hate to say that you are just wrong: most people went straight from an 8MHz 8088 to a 16MHz 80286, and they were looking at a massive difference.

 * I looked at the 8086 and 80386 instruction manuals, and it seems to me that there is a difference, but i dont see the doubling in many common instructions. It might be true that all the complicated memory addressing is much slower, but for example add went from 3/10 to 2/7. It's true that push/pop are much faster etc, but i guess there is not much more than a doubling of performance per cycle overall. The jump from 386 to 486 saw an approximate doubling in performance, too. so i dont understand this statement. anton
 * After review the manuals, I noticed that I was using an 80186 manual. The 80186 is probably closer to the 80286 in terms of performance than the 8086. anton

Possible err in para 1
0.21 million instructions per clock? (first paragraph). Surely not? prehaps 0.21 MIPS, but not 0.21 M IPC?!. (Sam Cadby) —Preceding unsigned comment added by 217.33.137.68 (talk) 16:47, 26 September 2007 (UTC)

 * Another thing that seems to make no sense is the fact that the 6 MHz version clocks in at 0.9 MIPS, while it says that the 12 MHz one comes in at 2.66. That is almost 3 times the performance of the 6 MHz version while only twice its clock speed.  The only thing I can think of is that the 6 MHz version could be bottlenecked by memory speed (the 12 MHz version accesses it faster because the memory also runs at 12 MHz?).  But that's only me making a guess, as I don't remember how the memory bus was designed on these old machines. 84.49.75.226 (talk) 11:02, 25 May 2016 (UTC)

4 MHz 286 chip?
I was wondering if someone should write something about the Intel C80286-4 in the article. The processor's maximum clock speed should be 4 MHz, and was for a short period manufactured and used in some personal computers, for example, the Ericsson 286 (which I personally owned once). The processor has LCC packaging. There seems to be conflicting information about this processor on the internet, and rarely have any information on the LCC packaged processor. Not sure about the speed though, maybe someone knows a bit better? See more information at. --62.142.251.79 (talk) 01:50, 21 February 2008 (UTC)

Post facto correction: I didn't own an account back in 2008. Now that I do, here's my signature for the above comment. Molivil (talk) 20:18, 1 November 2019 (UTC)

80286 in PLCC only?
I have a 80286 in a CPGA format. Ginbot86 (talk) 22:42, 16 August 2008 (UTC)

80286s were produced in several formats and packaging during the product's lifetime, also depending on the class of applications. DIP (dual in line) was what it looked like in IBM PC-ATs and clones back in the times, the fact that all illustrations of the article show later square packages is misleading and regrettable IMHO. Can someone upload a photo of a typical genuine i80286-10 DIP typical of a 286-based AT ? I have 2 pieces here, unfortunately I don't do photos :( Ninho (talk) 15:34, 5 November 2009 (UTC)Ninho

Performance jump vs 8086
This comparison is quite lengthy but conveniently ignores the 80186 which was somewhere inbetween the two series in terms of performance. It was not popular as a PC processor but this is an article about the chip, not specifically PC history, so surely it deserves mentioning here. CrispMuncher (talk) 20:45, 15 November 2009 (UTC)

Removed misleading paragraph about protected mode
I have taken the liberty, under the "be bold" rule, of simply deleting the slightly breathless and extremely incorrect claim that the 286 gave "the first glimpse of memory protection mechanisms that were previously exclusive to mainframes" mwa mwa mwa. Most 16-bit microprocessors offered this feature in some form - for example, the Motorola 68000 had protected mode at its introduction in 1979 and full virtual memory support with the 68010 shortly thereafter. In fact, the x86 family was unusual in not offering it from the get-go. 87.194.209.163 (talk) 17:08, 28 November 2010 (UTC)

File:The register set of 80286.jpg Nominated for speedy Deletion

 * This page has been deleted as it constituted a copyright violation. --Matthiaspaul (talk) 14:34, 30 October 2011 (UTC)

Look out for possible copyright violations in this article
This article has been found to be edited by students of the India Education Program project as part of their (still ongoing) course-work. Unfortunately, many of the edits in this program so far have been identified as plain copy-jobs from books and online resources and therefore had to be reverted. See the India Education Program talk page for details. In order to maintain the WP standards and policies, let's all have a careful eye on this and other related articles to ensure that no copyrighted material remains in here. --Matthiaspaul (talk) 14:05, 30 October 2011 (UTC)

Current-era uses and legacy?
Articles about other major chips feature current- or recent-era uses (where they have persisted in niche fields), and a section on what remains the legacy of the chip. I rather fancy something similar in here. I'd imagine by the time when Windows 3.1 came around, computers with this chip fell out of favour and then general usage, as many computer users until then were fine with DOS, Lotus 1-2-3, WordPerfect, and other by-and-large text mode applications.

Chances are that perhaps these paragraphs must have somehow already existed and then culled along with and after recent(ish) low-quality edits, which in turn were part of a school project in India. -Mardus (talk) 17:43, 4 August 2012 (UTC)

Is this correct? The math doesn't add up.
The 6 MHz, 10 MHz and 12 MHz models were reportedly measured to operate at 0.9 MIPS, 1.5 MIPS and 2.66 MIPS respectively. — Preceding unsigned comment added by Erickdingess (talk • contribs) 19:42, 4 May 2015 (UTC)

 * It could be that instruction fetch from the memory chip would be a contributing factor. Dannyniu (talk) 01:54, 11 September 2016 (UTC)

Could some1 add a layout?
There is a good photo of 286 die. But what region dedicades to what? What function handles each region on a photo? Could be nice schnematics, and my post is rather feature request; For those who is familiar with drawing colored rectangles in paint and adding textual caption briefly describing what exactly each region of chip is dedicaded for.. t.y. in advance ;) — Preceding unsigned comment added by 91.246.99.112 (talk) 20:15, 8 July 2017 (UTC)

OS Support for Protected Mode
"The protected mode of the 80286 was not utilized until many years after its release...     For example, in 1986 the only program that made use of it was VDISK..."

The above statement under "OS Support" is inaccurate. It is even contradicted by the last paragraph of the same section, mentioning Xenix in 1984. I know that AT&T showed protected-mode Unix running on the 6300 PLUS at Comdex in October 1985.

Proposed merge with Intel 82284
No apparent reason why the clock driver should not be part of the article for the chip. Ifnord (talk) 01:34, 27 June 2018 (UTC)
 * Support per nomination. Polyamorph (talk) 07:42, 27 June 2018 (UTC)
 * I don't find it that obvious when 8284 and other supporting chips for 8086 have separate cross-linked articles too. But I suspect 82284 is not sufficiently notable on its own and it's unlikely to grow out of stub, so I'm not opposing.—mwgamera (talk) 00:36, 30 June 2018 (UTC)

India Education Program course assignment
This article was the subject of an educational assignment at Department of Electronics and Telecommunication, College of Engineering, Pune, India supported by Wikipedia Ambassadors through the India Education Program during the 2011 Q3 term. Further details are available on the course page.

The above message was substituted from by PrimeBOT (talk) on 19:52, 1 February 2023 (UTC)

title: Talk:Intel 80286


text:
Insulator (electricity)

An electrical insulator is a material in which electric current does not flow freely. The atoms of the insulator have tightly bound electrons which cannot readily move. Other materials—semiconductors and conductors—conduct electric current more easily. The property that distinguishes an insulator is its resistivity; insulators have higher resistivity than semiconductors or conductors. The most common examples are non-metals.

A perfect insulator does not exist because even insulators contain small numbers of mobile charges (charge carriers) which can carry current. In addition, all insulators become electrically conductive when a sufficiently large voltage is applied that the electric field tears electrons away from the atoms. This is known as electrical breakdown, and the voltage at which it occurs is called the breakdown voltage of an insulator. Some materials such as glass, paper and PTFE, which have high resistivity, are very good electrical insulators. A much larger class of materials, even though they may have lower bulk resistivity, are still good enough to prevent significant current from flowing at normally used voltages, and thus are employed as insulation for electrical wiring and cables. Examples include rubber-like polymers and most plastics which can be thermoset or thermoplastic in nature.

Insulators are used in electrical equipment to support and separate electrical conductors without allowing current through themselves. An insulating material used in bulk to wrap electrical cables or other equipment is called insulation. The term insulator is also used more specifically to refer to insulating supports used to attach electric power distribution or transmission lines to utility poles and transmission towers. They support the weight of the suspended wires without allowing the current to flow through the tower to ground.

Physics of conduction in solids
Electrical insulation is the absence of electrical conduction. Electronic band theory (a branch of physics) explains that electric charge flows when quantum states of matter are available into which electrons can be excited. This allows electrons to gain energy and thereby move through a conductor, such as a metal, if an electric potential difference is applied to the material. If no such states are available, the material is an insulator.

Most insulators have a large band gap. This occurs because the "valence" band containing the highest energy electrons is full, and a large energy gap separates this band from the next band above it. There is always some voltage (called the breakdown voltage) that gives electrons enough energy to be excited into this band. Once this voltage is exceeded, electrical breakdown occurs, and the material ceases being an insulator, passing charge. This is usually accompanied by physical or chemical changes that permanently degrade the material and its insulating properties.

When the electric field applied across an insulating substance exceeds in any location the threshold breakdown field for that substance, the insulator suddenly becomes a conductor, causing a large increase in current, an electric arc through the substance. Electrical breakdown occurs when the electric field in the material is strong enough to accelerate free charge carriers (electrons and ions, which are always present at low concentrations) to a high enough velocity to knock electrons from atoms when they strike them, ionizing the atoms. These freed electrons and ions are in turn accelerated and strike other atoms, creating more charge carriers, in a chain reaction. Rapidly the insulator becomes filled with mobile charge carriers, and its resistance drops to a low level. In a solid, the breakdown voltage is proportional to the band gap energy. When corona discharge occurs, the air in a region around a high-voltage conductor can break down and ionise without a catastrophic increase in current. However, if the region of air breakdown extends to another conductor at a different voltage it creates a conductive path between them, and a large current flows through the air, creating an electric arc. Even a vacuum can suffer a sort of breakdown, but in this case the breakdown or vacuum arc involves charges ejected from the surface of metal electrodes rather than produced by the vacuum itself.

In addition, all insulators become conductors at very high temperatures as the thermal energy of the valence electrons is sufficient to put them in the conduction band.

In certain capacitors, shorts between electrodes formed due to dielectric breakdown can disappear when the applied electric field is reduced.

Uses
A flexible coating of an insulator is often applied to electric wire and cable; this assembly is called insulated wire. Wires sometimes don't use an insulating coating, just air, when a solid (e.g. plastic) coating may be impractical. Wires that touch each other produce cross connections, short circuits, and fire hazards. In coaxial cable the center conductor must be supported precisely in the middle of the hollow shield to prevent electro-magnetic wave reflections. Wires that expose high voltages can cause human shock and electrocution hazards.

Most insulated wire and cable products have maximum ratings for voltage and conductor temperature. The product may not have an ampacity (current-carrying capacity) rating, since this is dependent on the surrounding environment (e.g. ambient temperature).

In electronic systems, printed circuit boards are made from epoxy plastic and fibreglass. The nonconductive boards support layers of copper foil conductors. In electronic devices, the tiny and delicate active components are embedded within nonconductive epoxy or phenolic plastics, or within baked glass or ceramic coatings.

In microelectronic components such as transistors and ICs, the silicon material is normally a conductor because of doping, but it can easily be selectively transformed into a good insulator by the application of heat and oxygen. Oxidised silicon is quartz, i.e. silicon dioxide, the primary component of glass.

In high voltage systems containing transformers and capacitors, liquid insulator oil is the typical method used for preventing arcs. The oil replaces air in spaces that must support significant voltage without electrical breakdown. Other high voltage system insulation materials include ceramic or glass wire holders, gas, vacuum, and simply placing wires far enough apart to use air as insulation.

Insulation in electrical apparatus

The most important insulation material is air. A variety of solid, liquid, and gaseous insulators are also used in electrical apparatus. In smaller transformers, generators, and electric motors, insulation on the wire coils consists of up to four thin layers of polymer varnish film. Film-insulated magnet wire permits a manufacturer to obtain the maximum number of turns within the available space. Windings that use thicker conductors are often wrapped with supplemental fiberglass insulating tape. Windings may also be impregnated with insulating varnishes to prevent electrical corona and reduce magnetically induced wire vibration. Large power transformer windings are still mostly insulated with paper, wood, varnish, and mineral oil; although these materials have been used for more than 100 years, they still provide a good balance of economy and adequate performance. Busbars and circuit breakers in switchgear may be insulated with glass-reinforced plastic insulation, treated to have low flame spread and to prevent tracking of current across the material.

In older apparatus made up to the early 1970s, boards made of compressed asbestos may be found; while this is an adequate insulator at power frequencies, handling or repairs to asbestos material can release dangerous fibers into the air and must be carried out cautiously. Wire insulated with felted asbestos was used in high-temperature and rugged applications from the 1920s. Wire of this type was sold by General Electric under the trade name "Deltabeston."

Live-front switchboards up to the early part of the 20th century were made of slate or marble. Some high voltage equipment is designed to operate within a high pressure insulating gas such as sulfur hexafluoride. Insulation materials that perform well at power and low frequencies may be unsatisfactory at radio frequency, due to heating from excessive dielectric dissipation.

Electrical wires may be insulated with polyethylene, crosslinked polyethylene (either through electron beam processing or chemical crosslinking), PVC, Kapton, rubber-like polymers, oil impregnated paper, Teflon, silicone, or modified ethylene tetrafluoroethylene (ETFE). Larger power cables may use compressed inorganic powder, depending on the application.

Flexible insulating materials such as PVC (polyvinyl chloride) are used to insulate the circuit and prevent human contact with a 'live' wire – one having voltage of 600 volts or less. Alternative materials are likely to become increasingly used due to EU safety and environmental legislation making PVC less economic.

In electrical apparatus such as motors, generators, and transformers, various insulation systems are used, classified by their maximum recommended working temperature to achieve acceptable operating life. Materials range from upgraded types of paper to inorganic compounds.

Class I and Class II insulation
All portable or hand-held electrical devices are insulated to protect their user from harmful shock.

Class I insulation requires that the metal body and other exposed metal parts of the device be connected to earth via a grounding wire that is earthed at the main service panel—but only needs basic insulation on the conductors. This equipment needs an extra pin on the power plug for the grounding connection.

Class II insulation means that the device is double insulated. This is used on some appliances such as electric shavers, hair dryers and portable power tools. Double insulation requires that the devices have both basic and supplementary insulation, each of which is sufficient to prevent electric shock. All internal electrically energized components are totally enclosed within an insulated body that prevents any contact with "live" parts. In the EU, double insulated appliances all are marked with a symbol of two squares, one inside the other.

Telegraph and power transmission insulators
Conductors for overhead high-voltage electric power transmission are bare, and are insulated by the surrounding air. Conductors for lower voltages in distribution may have some insulation but are often bare as well. Insulating supports are required at the points where they are supported by utility poles or transmission towers. Insulators are also required where wire enters buildings or electrical devices, such as transformers or circuit breakers, for insulation from the case. Often these are bushings, which are hollow insulators with the conductor inside them.

Materials
Insulators used for high-voltage power transmission are made from glass, porcelain or composite polymer materials. Porcelain insulators are made from clay, quartz or alumina and feldspar, and are covered with a smooth glaze to shed water. Insulators made from porcelain rich in alumina are used where high mechanical strength is a criterion. Porcelain has a dielectric strength of about 4–10 kV/mm. Glass has a higher dielectric strength, but it attracts condensation and the thick irregular shapes needed for insulators are difficult to cast without internal strains. Some insulator manufacturers stopped making glass insulators in the late 1960s, switching to ceramic materials.

Some electric utilities use polymer composite materials for some types of insulators. These are typically composed of a central rod made of fibre reinforced plastic and an outer weathershed made of silicone rubber or ethylene propylene diene monomer rubber (EPDM). Composite insulators are less costly, lighter in weight, and have excellent hydrophobic properties. This combination makes them ideal for service in polluted areas. However, these materials do not yet have the long-term proven service life of glass and porcelain.

Design

The electrical breakdown of an insulator due to excessive voltage can occur in one of two ways: Most high voltage insulators are designed with a lower flashover voltage than puncture voltage, so they flash over before they puncture, to avoid damage.
 * A puncture arc is a breakdown and conduction of the material of the insulator, causing an electric arc through the interior of the insulator. The heat resulting from the arc usually damages the insulator irreparably. Puncture voltage is the voltage across the insulator (when installed in its normal manner) that causes a puncture arc.
 * A flashover arc is a breakdown and conduction of the air around or along the surface of the insulator, causing an arc along the outside of the insulator. Insulators are usually designed to withstand flashover without damage. Flashover voltage is the voltage that causes a flash-over arc.

Dirt, pollution, salt, and particularly water on the surface of a high voltage insulator can create a conductive path across it, causing leakage currents and flashovers. The flashover voltage can be reduced by more than 50% when the insulator is wet. High voltage insulators for outdoor use are shaped to maximise the length of the leakage path along the surface from one end to the other, called the creepage length, to minimise these leakage currents. To accomplish this the surface is moulded into a series of corrugations or concentric disc shapes. These usually include one or more sheds; downward facing cup-shaped surfaces that act as umbrellas to ensure that the part of the surface leakage path under the 'cup' stays dry in wet weather. Minimum creepage distances are 20–25 mm/kV, but must be increased in high pollution or airborne sea-salt areas.

Types
Insulators are characterized in several common classes:
 * Pin insulator - The pin-type insulator is mounted on a pin affixed on the cross-arm of the pole. The insulator has a groove near the top just below the crown. The conductor passes through this groove and is tied to the insulator with annealed wire of the same material as the conductor. Pin-type insulators are used for transmission and distribution of communication signals, and electric power at voltages up to 33 kV. Insulators made for operating voltages between 33 kV and 69 kV tend to be bulky and have become uneconomical.
 * Post insulator - A type of insulator in the 1930s that is more compact than traditional pin-type insulators and which has rapidly replaced many pin-type insulators on lines up to 69 kV and in some configurations, can be made for operation at up to 115 kV.
 * Suspension insulator - For voltages greater than 33 kV, it is a usual practice to use suspension type insulators, consisting of a number of glass or porcelain discs connected in series by metal links in the form of a string. The conductor is suspended at the bottom end of this string while the top end is secured to the cross-arm of the tower. The number of disc units used depends on the voltage.
 * Strain insulator - A dead end or anchor pole or tower is used where a straight section of line ends, or angles off in another direction. These poles must withstand the lateral (horizontal) tension of the long straight section of wire. To support this lateral load, strain insulators are used. For low voltage lines (less than 11 kV), shackle insulators are used as strain insulators. However, for high voltage transmission lines, strings of cap-and-pin (suspension) insulators are used, attached to the crossarm in a horizontal direction. When the tension load in lines is exceedingly high, such as at long river spans, two or more strings are used in parallel.
 * Shackle insulator - In early days, the shackle insulators were used as strain insulators. But nowaday, they are frequently used for low voltage distribution lines. Such insulators can be used either in a horizontal position or in a vertical position. They can be directly fixed to the pole with a bolt or to the cross arm.
 * Bushing - enables one or several conductors to pass through a partition such as a wall or a tank, and insulates the conductors from it.
 * Line post insulator
 * Station post insulator
 * Cut-out

Sheath insulator
An insulator that protects a full length of bottom-contact third rail.

Suspension insulators
Pin-type insulators are unsuitable for voltages greater than about 69 kV line-to-line. Higher voltage transmission lines usually use modular suspension insulator designs. The wires are suspended from a 'string' of identical disc-shaped insulators that attach to each other with metal clevis pin or ball-and-socket links. The advantage of this design is that insulator strings with different breakdown voltages, for use with different line voltages, can be constructed by using different numbers of the basic units. String insulators can be made for any practical transmission voltage by adding insulator elements to the string. Also, if one of the insulator units in the string breaks, it can be replaced without discarding the entire string.

Each unit is constructed of a ceramic or glass disc with a metal cap and pin cemented to opposite sides. To make defective units obvious, glass units are designed so that an overvoltage causes a puncture arc through the glass instead of a flashover. The glass is heat-treated so it shatters, making the damaged unit visible. However the mechanical strength of the unit is unchanged, so the insulator string stays together.

Standard suspension disc insulator units are 25 cm in diameter and 15 cm long, can support a load of 80-120 kN, have a dry flashover voltage of about 72 kV, and are rated at an operating voltage of 10–12 kV. However, the flashover voltage of a string is less than the sum of its component discs, because the electric field is not distributed evenly across the string but is strongest at the disc nearest to the conductor, which flashes over first. Metal grading rings are sometimes added around the disc at the high voltage end, to reduce the electric field across that disc and improve flashover voltage.

In very high voltage lines the insulator may be surrounded by corona rings. These typically consist of toruses of aluminium (most commonly) or copper tubing attached to the line. They are designed to reduce the electric field at the point where the insulator is attached to the line, to prevent corona discharge, which results in power losses.

History
The first electrical systems to make use of insulators were telegraph lines; direct attachment of wires to wooden poles was found to give very poor results, especially during damp weather.

The first glass insulators used in large quantities had an unthreaded pinhole. These pieces of glass were positioned on a tapered wooden pin, vertically extending upwards from the pole's crossarm (commonly only two insulators to a pole and maybe one on top of the pole itself). Natural contraction and expansion of the wires tied to these "threadless insulators" resulted in insulators unseating from their pins, requiring manual reseating.

Amongst the first to produce ceramic insulators were companies in the United Kingdom, with Stiff and Doulton using stoneware from the mid-1840s, Joseph Bourne (later renamed Denby) producing them from around 1860 and Bullers from 1868. Utility patent number 48,906 was granted to Louis A. Cauvet on 25 July 1865 for a process to produce insulators with a threaded pinhole: pin-type insulators still have threaded pinholes.

The invention of suspension-type insulators made high-voltage power transmission possible. As transmission line voltages reached and passed 60,000 volts, the insulators required become very large and heavy, with insulators made for a safety margin of 88,000 volts being about the practical limit for manufacturing and installation. Suspension insulators, on the other hand, can be connected into strings as long as required for the line's voltage.

A large variety of telephone, telegraph and power insulators have been made; some people collect them, both for their historic interest and for the aesthetic quality of many insulator designs and finishes. One collectors organisation is the US National Insulator Association, which has over 9,000 members.

Insulation of antennas
Often a broadcasting radio antenna is built as a mast radiator, which means that the entire mast structure is energised with high voltage and must be insulated from the ground. Steatite mountings are used. They have to withstand not only the voltage of the mast radiator to ground, which can reach values up to 400 kV at some antennas, but also the weight of the mast construction and dynamic forces. Arcing horns and lightning arresters are necessary because lightning strikes to the mast are common.

Guy wires supporting antenna masts usually have strain insulators inserted in the cable run, to keep the high voltages on the antenna from short circuiting to ground or creating a shock hazard. Often guy cables have several insulators, placed to break up the cable into lengths that prevent unwanted electrical resonances in the guy. These insulators are usually ceramic and cylindrical or egg-shaped (see picture). This construction has the advantage that the ceramic is under compression rather than tension, so it can withstand greater load, and that if the insulator breaks, the cable ends are still linked.

These insulators also have to be equipped with overvoltage protection equipment. For the dimensions of the guy insulation, static charges on guys have to be considered. For high masts, these can be much higher than the voltage caused by the transmitter, requiring guys divided by insulators in multiple sections on the highest masts. In this case, guys which are grounded at the anchor basements via a coil - or if possible, directly - are the better choice.

Feedlines attaching antennas to radio equipment, particularly twin-lead type, often must be kept at a distance from metal structures. The insulated supports used for this purpose are called standoff insulators.

title: Insulator (electricity)


text:
Internetworking

Internetworking is the practice of interconnecting multiple computer networks, such that any pair of hosts in the connected networks can exchange messages irrespective of their hardware-level networking technology. The resulting system of interconnected networks is called an internetwork, or simply an internet.

The most notable example of internetworking is the Internet, a network of networks based on many underlying hardware technologies. The Internet is defined by a unified global addressing system, packet format, and routing methods provided by the Internet Protocol.

The term internetworking is a combination of the components inter (between) and networking. An earlier term for an internetwork is catenet, a short-form of (con)catenating networks.

History
Internetworking, a combination of the components inter (between) and networking, started as a way to connect disparate types of networking technology, but it became widespread through the developing need to connect two or more local area networks via some sort of wide area network.

The first international heterogenous resource sharing network was the 1973 interconnection of the ARPANET with early British academic networks through the computer science department at University College London (UCL). In the ARPANET, the network elements used to connect individual networks were called gateways, but the term has been deprecated in this context, because of possible confusion with functionally different devices. By 1973-4, researchers in France, the United States, and the United Kingdom had worked out an approach to internetworking where the differences between network protocols were hidden by using a common internetwork protocol, and instead of the network being responsible for reliability, as in the ARPANET, the hosts became responsible, as demonstrated in the CYCLADES network. Researchers at Xerox PARC outlined the idea of Ethernet and the PARC Universal Packet (PUP) for internetworking. Research at the National Physical Laboratory in the United Kingdom confirmed establishing a common host protocol would be more reliable and efficient. The ARPANET connection to UCL later evolved into SATNET. In 1977, ARPA demonstrated a three-way internetworking experiment, which linked a mobile vehicle in PRNET with nodes in the ARPANET, and via SATNET, to nodes at UCL. The X.25 protocol, on which public data networks were based in the 1970s and 1980s, was supplemented by the X.75 protocol which enabled internetworking.

Today the interconnecting gateways are called routers. The definition of an internetwork today includes the connection of other types of computer networks such as personal area networks.

Catenet
Catenet, a short-form of (con)catenating networks, is obsolete terminolgy for a system of packet-switched communication networks interconnected via gateways.

The term was coined by Louis Pouzin in October 1973 in a note circulated to the International Network Working Group, later published in a 1974 paper "A Proposal for Interconnecting Packet Switching Networks". Pouzin was a pioneer in packet-switching technology and founder of the CYCLADES network, at a time when network meant what is now called a local area network. Catenet was the concept of linking these networks into a network of networks with specifications for compatibility of addressing and routing. The term catenet was gradually displaced by the short-form of the term internetwork, internet (lower-case i), when the Internet Protocol replaced earlier protocols on the ARPANET in the early 1980s.

Interconnection of networks
To build an internetwork, the following are needed: A standardized scheme to address packets to any host on any participating network; a standardized protocol defining format and handling of transmitted packets; components interconnecting the participating networks by routing packets to their destinations based on standardized addresses.

Another type of interconnection of networks often occurs within enterprises at the link layer of the networking model, i.e. at the hardware-centric layer below the level of the TCP/IP logical interfaces. Such interconnection is accomplished with network bridges and network switches. This is sometimes incorrectly termed internetworking, but the resulting system is simply a larger, single subnetwork, and no internetworking protocol, such as Internet Protocol, is required to traverse these devices. However, a single computer network may be converted into an internetwork by dividing the network into segments and logically dividing the segment traffic with routers and having an internetworking software layer that applications employ.

The Internet Protocol is designed to provide an unreliable (not guaranteed) packet service across the network. The architecture avoids intermediate network elements maintaining any state of the network. Instead, this function is assigned to the endpoints of each communication session. To transfer data reliably, applications must utilize an appropriate transport layer protocol, such as Transmission Control Protocol (TCP), which provides a reliable stream. Some applications use a simpler, connection-less transport protocol, User Datagram Protocol (UDP), for tasks which do not require reliable delivery of data or that require real-time service, such as video streaming or voice chat.

Networking models
Two architectural models are commonly used to describe the protocols and methods used in internetworking. The Open System Interconnection (OSI) reference model was developed under the auspices of the International Organization for Standardization (ISO) and provides a rigorous description for layering protocol functions from the underlying hardware to the software interface concepts in user applications. Internetworking is implemented in the Network Layer (Layer 3) of the model.

The Internet Protocol Suite, also known as the TCP/IP model, was not designed to conform to the OSI model and does not refer to it in any of the normative specifications in Request for Comments and Internet standards. Despite similar appearance as a layered model, it has a much less rigorous, loosely defined architecture that concerns itself only with the aspects of the style of networking in its own historical provenance. It assumes the availability of any suitable hardware infrastructure, without discussing hardware-specific low-level interfaces, and that a host has access to this local network to which it is connected via a link layer interface.

For a period in the late 1980s and early 1990s, the network engineering community was polarized over the implementation of competing protocol suites, commonly known as the Protocol Wars. It was unclear which of the OSI model and the Internet protocol suite would result in the best and most robust computer networks.

title: Internetworking


text:
Infantry

Infantry is a specialization of military personnel who engage in warfare combat. Infantry generally consists of light infantry, irregular infantry, heavy infantry, mountain infantry, motorized infantry, mechanized infantry, airborne infantry, air assault infantry, and naval infantry. Other types of infantry, such as line infantry and mounted infantry, were once commonplace but fell out of favor in the 1800s with the invention of more accurate and powerful weapons.

Etymology and terminology

In English, use of the term infantry began about the 1570s, describing soldiers who march and fight on foot. The word derives from Middle French infanterie, from older Italian (also Spanish) infanteria (foot soldiers too inexperienced for cavalry), from Latin īnfāns (without speech, newborn, foolish), from which English also gets infant. The individual-soldier term infantryman was not coined until 1837. In modern usage, foot soldiers of any era are now considered infantry and infantrymen.

From the mid-18th century until 1881, the British Army named its infantry as numbered regiments "of Foot" to distinguish them from cavalry and dragoon regiments (see List of Regiments of Foot).

Infantry equipped with special weapons were often named after that weapon, such as grenadiers for their grenades, or fusiliers for their fusils. These names can persist long after the weapon speciality; examples of infantry units that retained such names are the Royal Irish Fusiliers and the Grenadier Guards.

Dragoons were created as mounted infantry, with horses for travel between battles; they were still considered infantry since they dismounted before combat. However, if light cavalry was lacking in an army, any available dragoons might be assigned their duties; this practice increased over time, and dragoons eventually received all the weapons and training as both infantry and cavalry, and could be classified as both. Conversely, starting about the mid-19th century, regular cavalry have been forced to spend more of their time dismounted in combat due to the ever-increasing effectiveness of enemy infantry firearms. Thus most cavalry transitioned to mounted infantry. As with grenadiers, the dragoon and cavalry designations can be retained long after their horses, such as in the Royal Dragoon Guards, Royal Lancers, and King's Royal Hussars.

Similarly, motorised infantry have trucks and other unarmed vehicles for non-combat movement, but are still infantry since they leave their vehicles for any combat. Most modern infantry have vehicle transport, to the point where infantry being motorised is generally assumed, and the few exceptions might be identified as modern light infantry. Mechanised infantry go beyond motorised, having transport vehicles with combat abilities, armoured personnel carriers (APCs), providing at least some options for combat without leaving their vehicles. In modern infantry, some APCs have evolved to be infantry fighting vehicles (IFVs), which are transport vehicles with more substantial combat abilities, approaching those of light tanks. Some well-equipped mechanised infantry can be designated as armoured infantry. Given that infantry forces typically also have some tanks, and given that most armoured forces have more mechanised infantry units than tank units in their organisation, the distinction between mechanised infantry and armour forces has blurred.

History

The first military forces in history were infantry. In antiquity, infantry were armed with early melee weapons such as a spear, axe, or sword, or an early ranged weapon like a javelin, sling, or bow, with a few infantry men being expected to use both a melee and a ranged weapon. With the development of gunpowder, infantry began converting to primarily firearms. By the time of Napoleonic warfare, infantry, cavalry and artillery formed a basic triad of ground forces, though infantry usually remained the most numerous. With armoured warfare, armoured fighting vehicles have replaced the horses of cavalry, and airpower has added a new dimension to ground combat, but infantry remains pivotal to all modern combined arms operations.

The first warriors, adopting hunting weapons or improvised melee weapons, before the existence of any organised military, likely started essentially as loose groups without any organisation or formation. But this changed sometime before recorded history; the first ancient empires (2500–1500 BC) are shown to have some soldiers with standardised military equipment, and the training and discipline required for battlefield formations and manoeuvres: regular infantry. Though the main force of the army, these forces were usually kept small due to their cost of training and upkeep, and might be supplemented by local short-term mass-conscript forces using the older irregular infantry weapons and tactics; this remained a common practice almost up to modern times.

Before the adoption of the chariot to create the first mobile fighting forces c. 2000 BC, all armies were pure infantry. Even after, with a few exceptions like the Mongol Empire, infantry has been the largest component of most armies in history.

In the Western world, from Classical Antiquity through the Middle Ages (c. 8th century BC to 15th century AD), infantry are categorised as either heavy infantry or light infantry. Heavy infantry, such as Greek hoplites, Macedonian phalangites, and Roman legionaries, specialised in dense, solid formations driving into the main enemy lines, using weight of numbers to achieve a decisive victory, and were usually equipped with heavier weapons and armour to fit their role. Light infantry, such as Greek peltasts, Balearic slingers, and Roman velites, using open formations and greater manoeuvrability, took on most other combat roles: scouting, screening the army on the march, skirmishing to delay, disrupt, or weaken the enemy to prepare for the main forces' battlefield attack, protecting them from flanking manoeuvers, and then afterwards either pursuing the fleeing enemy or covering their army's retreat.

After the fall of Rome, the quality of heavy infantry declined, and warfare was dominated by heavy cavalry, such as knights, forming small elite units for decisive shock combat, supported by peasant infantry militias and assorted light infantry from the lower classes. Towards the end of Middle Ages, this began to change, where more professional and better trained light infantry could be effective against knights, such as the English longbowmen in the Hundred Years' War. By the start of the Renaissance, the infantry began to return to a larger role, with Swiss pikemen and German Landsknechts filling the role of heavy infantry again, using dense formations of pikes to drive off any cavalry.

Dense formations are vulnerable to ranged weapons. Technological developments allowed the raising of large numbers of light infantry units armed with ranged weapons, without the years of training expected for traditional high-skilled archers and slingers. This started slowly, first with crossbowmen, then hand cannoneers and arquebusiers, each with increasing effectiveness, marking the beginning of early modern warfare, when firearms rendered the use of heavy infantry obsolete. The introduction of musketeers using bayonets in the mid 17th century began replacement of the pike with the infantry square replacing the pike square.

To maximise their firepower, musketeer infantry were trained to fight in wide lines facing the enemy, creating line infantry. These fulfilled the central battlefield role of earlier heavy infantry, using ranged weapons instead of melee weapons. To support these lines, smaller infantry formations using dispersed skirmish lines were created, called light infantry, fulfilling the same multiple roles as earlier light infantry. Their arms were no lighter than line infantry; they were distinguished by their skirmish formation and flexible tactics.

The modern rifleman infantry became the primary force for taking and holding ground on battlefields as an element of combined arms. As firepower continued to increase, use of infantry lines diminished, until all infantry became light infantry in practice. Modern classifications of infantry have since expanded to reflect modern equipment and tactics, such as motorised infantry, mechanised or armoured infantry, mountain infantry, marine infantry, and airborne infantry.

Equipment

Beyond main arms and armour, an infantryman's "military kit" generally includes combat boots, battledress or combat uniform, camping gear, heavy weather gear, survival gear, secondary weapons and ammunition, weapon service and repair kits, health and hygiene items, mess kit, rations, filled water canteen, and all other consumables each infantryman needs for the expected duration of time operating away from their unit's base, plus any special mission-specific equipment. One of the most valuable pieces of gear is the entrenching tool—basically a folding spade—which can be employed not only to dig important defences, but also in a variety of other daily tasks, and even sometimes as a weapon. Infantry typically have shared equipment on top of this, like tents or heavy weapons, where the carrying burden is spread across several infantrymen. In all, this can reach 25-45 kg for each soldier on the march. Such heavy infantry burdens have changed little over centuries of warfare; in the late Roman Republic, legionaries were nicknamed "Marius' mules" as their main activity seemed to be carrying the weight of their legion around on their backs, a practice that predates the eponymous Gaius Marius.

When combat is expected, infantry typically switch to "packing light", meaning reducing their equipment to weapons, ammunition, and other basic essentials, and leaving other items deemed unnecessary with their transport or baggage train, at camp or rally point, in temporary hidden caches, or even (in emergencies) simply discarding the items if the present situation. Additional specialised equipment may be required, depending on the mission or to the particular terrain or environment, including satchel charges, demolition tools, mines, or barbed wire, carried by the infantry or attached specialists.

Historically, infantry have suffered high casualty rates from disease, exposure, exhaustion and privation — often in excess of the casualties suffered from enemy attacks. Better infantry equipment to support their health, energy, and protect from environmental factors greatly reduces these rates of loss, and increase their level of effective action. Health, energy, and morale are greatly influenced by how the soldier is fed, so militaries issue standardised field rations that provide palatable meals and enough calories to keep a soldier well-fed and combat-ready.

Communications gear has become a necessity, as it allows effective command of infantry units over greater distances, and communication with artillery and other support units. Modern infantry can have GPS, encrypted individual communications equipment, surveillance and night vision equipment, advanced intelligence and other high-tech mission-unique aids.

Armies have sought to improve and standardise infantry gear to reduce fatigue for extended carrying, increase freedom of movement, accessibility, and compatibility with other carried gear, such as the American All-purpose Lightweight Individual Carrying Equipment (ALICE).

Weapons

Infantrymen are defined by their primary arms – the personal weapons and body armour for their own individual use. The available technology, resources, history, and society can produce quite different weapons for each military and era, but common infantry weapons can be distinguished in a few basic categories.

 * Ranged combat weapons : javelins, slings, blowguns, bows, crossbows, hand cannons, arquebuses, muskets, grenades, flamethrowers.
 * Melee combat weapons : bludgeoning weapons like clubs, flails and maces; bladed weapons like swords, daggers, and axes; pole weapons like spears, halberds, naginata, and pikes.
 * Both ranged and close weapons : the bayonet fixed to a firearm allows infantrymen to use the same weapon for both ranged combat and close combat. This started with muskets and its use still continues with modern assault rifles. Use of the bayonet has declined with the introduction of automatic firearms, but are still generally kept as a weapon of last resort.

Infantrymen often carry secondary or back-up weapons, sometimes called a sidearm or ancillary weapons. Infantry with ranged or pole weapons often carried a sword or dagger for possible hand-to-hand combat. The pilum was a javelin the Roman legionaries threw just before drawing their primary weapon, the gladius (short sword), and closing with the enemy line.

Modern infantrymen now treat the bayonet as a backup weapon, but may also have handguns as sidearms. They may also deploy anti-personnel mines, booby traps, incendiary, or explosive devices defensively before combat.

Protection

Infantry have employed many different methods of protection from enemy attacks, including various kinds of armour and other gear, and tactical procedures.

The most basic is personal armour. This includes shields, helmets and many types of armour – padded linen, leather, lamellar, mail, plate, and kevlar. Initially, armour was used to defend both from ranged and close combat; even a fairly light shield could help defend against most slings and javelins, though high-strength bows and crossbows might penetrate common armour at very close range. Infantry armour had to compromise between protection and coverage, as a full suit of attack-proof armour would be too heavy to wear in combat. As firearms improved, armour for ranged defence had to be made thicker and heavier, which hindered mobility. With the introduction of the heavy arquebus designed to pierce standard steel armour, it was proven easier to make heavier firearms than heavier armour; armour transitioned to be only for close combat purposes. Pikemen armour tended to be just steel helmets and breastplates, and gunners had very little or no armour at all. By the time of the musket, the dominance of firepower shifted militaries away from any close combat, and use of armour decreased, until infantry typically went without wearing any armour.

Helmets were added back during World War I as artillery began to dominate the battlefield, to protect against their fragmentation and other blast effects beyond a direct hit. Modern developments in bullet-proof composite materials like kevlar have started a return to body armour for infantry, though the extra weight is a notable burden.

In modern times, infantrymen must also often carry protective measures against chemical and biological attack, including military gas masks, counter-agents, and protective suits. All of these protective measures add to the weight an infantryman must carry, and may decrease combat efficiency.

Infantry-served weapons
Early crew-served weapons were siege weapons, like the ballista, trebuchet, and battering ram. Modern versions include machine guns, anti-tank missiles, and infantry mortars.

Formations

Beginning with the development the first regular military forces, close-combat regular infantry fought less as unorganised groups of individuals and more in coordinated units, maintaining a defined tactical formation during combat, for increased battlefield effectiveness; such infantry formations and the arms they used developed together, starting with the spear and the shield.

A spear has decent attack abilities with the additional advantage keeping opponents at distance; this advantage can be increased by using longer spears, but this could allow the opponent to side-step the point of the spear and close for hand-to-hand combat where the longer spear is near useless. This can be avoided when each spearman stays side by side with the others in close formation, each covering the ones next to him, presenting a solid wall of spears to the enemy that they cannot get around.

Similarly, a shield has decent defence abilities, but is literally hit-or-miss; an attack from an unexpected angle can bypass it completely. Larger shields can cover more, but are also heavier and less manoeuvrable, making unexpected attacks even more of a problem. This can be avoided by having shield-armed soldiers stand close together, side-by-side, each protecting both themselves and their immediate comrades, presenting a solid shield wall to the enemy.

The opponents for these first formations, the close-combat infantry of more tribal societies, or any military without regular infantry (so called "barbarians") used arms that focused on the individual – weapons using personal strength and force, such as larger swinging swords, axes, and clubs. These take more room and individual freedom to swing and wield, necessitating a more loose organisation. While this may allow for a fierce running attack (an initial shock advantage) the tighter formation of the heavy spear and shield infantry gave them a local manpower advantage where several might be able to fight each opponent.

Thus tight formations heightened advantages of heavy arms, and gave greater local numbers in melee. To also increase their staying power, multiple rows of heavy infantrymen were added. This also increased their shock combat effect; individual opponents saw themselves literally lined-up against several heavy infantryman each, with seemingly no chance of defeating all of them. Heavy infantry developed into huge solid block formations, up to a hundred meters wide and a dozen rows deep.

Maintaining the advantages of heavy infantry meant maintaining formation; this became even more important when two forces with heavy infantry met in battle; the solidity of the formation became the deciding factor. Intense discipline and training became paramount. Empires formed around their military.

Organization

The organization of military forces into regular military units is first noted in Egyptian records of the Battle of Kadesh (c. 1274 BC). Soldiers were grouped into units of 50, which were in turn grouped into larger units of 250, then 1,000, and finally into units of up to 5,000 – the largest independent command. Several of these Egyptian "divisions" made up an army, but operated independently, both on the march and tactically, demonstrating sufficient military command and control organisation for basic battlefield manoeuvres. Similar hierarchical organizations have been noted in other ancient armies, typically with approximately 10 to 100 to 1,000 ratios (even where base 10 was not common), similar to modern sections (squads), companies, and regiments.

Training

The training of the infantry has differed drastically over time and from place to place. The cost of maintaining an army in fighting order and the seasonal nature of warfare precluded large permanent armies.

The antiquity saw everything from the well-trained and motivated citizen armies of Greece and Rome, the tribal host assembled from farmers and hunters with only passing acquaintance with warfare and masses of lightly armed and ill-trained militia put up as a last ditch effort. Kushite king Taharqa enjoyed military success in the Near East as a result of his efforts to strengthen the army through daily training in long-distance running.

In medieval times the foot soldiers varied from peasant levies to semi-permanent companies of mercenaries, foremost among them the Swiss, English, Aragonese and German, to men-at-arms who went into battle as well-armoured as knights, the latter of which at times also fought on foot.

The creation of standing armies—permanently assembled for war or defence—saw increase in training and experience. The increased use of firearms and the need for drill to handle them efficiently.

The introduction of national and mass armies saw an establishment of minimum requirements and the introduction of special troops (first of them the engineers going back to medieval times, but also different kinds of infantry adopted to specific terrain, bicycle, motorcycle, motorised and mechanised troops) culminating with the introduction of highly trained special forces during the first and second World War.

Air force and naval infantry
Naval infantry, commonly known as marines, are primarily a category of infantry that form part of the naval forces of states and perform roles on land and at sea, including amphibious operations, as well as other, naval roles. They also perform other tasks, including land warfare, separate from naval operations.

Air force infantry and base defense forces, such as the United States Air Force Security Forces, Royal Air Force Regiment, Royal Australian Air Force Airfield Defence Guards, and Indonesian Air Force Paskhas Corps are used primarily for ground-based defense of air bases and other air force facilities. They also have a number of other, specialist roles. These include, among others, Chemical, Biological, Radiological and Nuclear (CBRN) defence and training other airmen in basic ground defense tactics.

title: Infantry


text:
Identity function

In mathematics, an identity function, also called an identity relation, identity map or identity transformation, is a function that always returns the value that was used as its argument, unchanged. That is, when $f$ is the identity function, the equality $f(x) = x$ is true for all values of $x$ to which $f$ can be applied.

Definition
Formally, if $X$ is a set, the identity function $f$ on $X$ is defined to be a function with $X$ as its domain and codomain, satisfying

In other words, the function value $f(x) = x$ in the codomain $x$ is always the same as the input element $X$ in the domain $f(x)$. The identity function on $X$ is clearly an injective function as well as a surjective function (its codomain is also its range), so it is bijective.

The identity function $X$ on $x$ is often denoted by $X$.

In set theory, where a function is defined as a particular kind of binary relation, the identity function is given by the identity relation, or diagonal of $f$.

Algebraic properties
If $X$ is any function, then $id_{X}$, where "∘" denotes function composition. In particular, $X$ is the identity element of the monoid of all functions from $f : X → Y$ to $f ∘ id_{X} = f = id_{Y} ∘ f$ (under function composition).

Since the identity element of a monoid is unique, one can alternately define the identity function on $id_{X}$ to be this identity element. Such a definition generalizes to the concept of an identity morphism in category theory, where the endomorphisms of $X$ need not be functions.

Properties

 * The identity function is a linear operator when applied to vector spaces.
 * In an $n$-dimensional vector space the identity function is represented by the identity matrix $X$, regardless of the basis chosen for the space.
 * The identity function on the positive integers is a completely multiplicative function (essentially multiplication by 1), considered in number theory.
 * In a metric space the identity function is trivially an isometry. An object without any symmetry has as its symmetry group the trivial group containing only this isometry (symmetry type $M$).
 * In a topological space, the identity function is always continuous.
 * The identity function is idempotent.

title: Identity function