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Diplomatic mission

A diplomatic mission or foreign mission is a group of people from a state or organization present in another state to represent the sending state or organization officially in the receiving or host state. In practice, the phrase usually denotes an embassy or high commission, which is the main office of a country's diplomatic representatives to another country; it is usually, but not necessarily, based in the receiving state's capital city. Consulates, on the other hand, are smaller diplomatic missions that are normally located in major cities of the receiving state (but can be located in the capital, typically when the sending country has no embassy in the receiving state). As well as being a diplomatic mission to the country in which it is situated, an embassy may also be a nonresident permanent mission to one or more other countries.

The term embassy is sometimes used interchangeably with chancery, the physical office or site of a diplomatic mission. Consequently, the terms "embassy residence" and "embassy office" are used to distinguish between the ambassador's residence and the chancery.

Terminology
A country may have several different types of diplomatic missions in another country.

 * Embassy: Diplomatic mission generally located in the capital city of another country which offers a full range of services, including consular services.
 * High commission: Embassy of a Commonwealth country located in another Commonwealth country.
 * Permanent mission: Diplomatic mission to a major international organization.
 * Consulate-general: Diplomatic mission located in a major city, usually other than the capital city, which provides a full range of consular services.
 * Consulate: Diplomatic mission that is similar to a consulate general but may not provide a full range of services.
 * Legation: Diplomatic representative office of lower rank than an embassy. Where an embassy was headed by an ambassador, a legation was headed by a minister. Ambassadors outranked ministers and had precedence at official events. Legations were originally the most common form of diplomatic mission, but they fell out of favor after World War II and were upgraded to embassies.
 * Honorary Consul: The head of a consular mission which provides only a limited range of services.

The head of an embassy is known as an ambassador or high commissioner. The term embassy is commonly used also as a section of a building in which the work of the diplomatic mission is carried out, but strictly speaking, it is the diplomatic delegation itself that is the embassy, while the office space and the diplomatic work done is called the chancery. Therefore, the embassy operates in the chancery.

The members of a diplomatic mission can reside within or outside the building that holds the mission's chancery, and their private residences enjoy the same rights as the premises of the mission as regards inviolability and protection.

All missions to the United Nations are known simply as permanent missions, while EU member states' missions to the European Union are known as permanent representations, and the head of such a mission is typically both a permanent representative and an ambassador. European Union missions abroad are known as EU delegations. Some countries have more particular nomenclature for their missions and staff: a Vatican mission is headed by a nuncio (Latin for "envoy") and consequently known as an apostolic nunciature. Under the rule of Muammar Gaddafi, Libya's missions used the name people's bureau, headed by a secretary.

Missions between Commonwealth countries are known as high commissions, and their heads are high commissioners. Generally speaking, ambassadors and high commissioners are regarded as equivalent in status and function, and embassies and high commissions are both deemed to be diplomatic missions.

In the past, a diplomatic mission headed by a lower-ranking official (an envoy or minister resident) was known as a legation. Since the ranks of envoy and minister resident are effectively obsolete, the designation of legation is no longer among the diplomatic ranks used in diplomacy and international relations.

A consulate is similar to, but not the same as a diplomatic office, but with focus on dealing with individual persons and businesses, as defined by the Vienna Convention on Consular Relations. A consulate or consulate general is generally a representative of the embassy in locales outside of the capital city. For instance, the Philippines has its embassy to the United States in the latter's capital, Washington, D.C., but also maintains seven consulates-general in major US cities. The person in charge of a consulate or consulate-general is known as a consul or consul-general, respectively. Similar services may also be provided at the embassy (to serve the region of the capital) in what is normally called a consular section.

In cases of dispute, it is common for a country to recall its head of mission as a sign of its displeasure. This is less drastic than cutting diplomatic relations completely, and the mission will still continue operating more or less normally, but it will now be headed by a chargé d'affaires (usually the deputy chief of mission) who may have limited powers. A chargé d'affaires ad interim also heads the mission during the interim between the end of one chief of mission's term and the beginning of another.

Extraterritoriality
Contrary to popular belief, diplomatic missions sometimes do not enjoy full extraterritorial status and are generally not sovereign territory of the represented state. The sending state can give embassies sovereign status but this only happens with a minority of countries. Rather, the premises of an embassy remain under the jurisdiction of the host state while being afforded special privileges (such as immunity from most local laws) by the Vienna Convention on Diplomatic Relations. Diplomats themselves still retain full diplomatic immunity, and (as an adherent to the Vienna Convention) the authorities of the host country may not enter the premises of the mission (which means the head of mission's residence) without permission of the represented country, even to put out a fire. International rules designate an attack on an embassy as an attack on the country it represents. The term 'extraterritoriality' is often applied to diplomatic missions, but normally only in this broader sense.

As the host country's authorities may not enter the representing country's embassy without permission, embassies are sometimes used by refugees escaping from either the host country or a third country. For example, North Korean nationals, who would be arrested and deported from China upon discovery, have sought sanctuary at various third-country embassies in China. Once inside the embassy, diplomatic channels can be used to solve the issue and send the refugees to another country. See the list of people who took refuge in a diplomatic mission for a list of some notable cases.

Notable violations of embassy extraterritoriality include repeated invasions of the British Embassy in Beijing (1967), the hostage crisis at the American embassy in Tehran, Iran (1979–1981), and the hostage crisis at the Japanese ambassador's residence in Lima, Peru (1996–1997).

Role
The basic role of a diplomatic mission is to represent and safeguard the interests of the home country and its citizens in the host country. According to the 1961 Vienna Convention on Diplomatic Relations, which establishes the framework of diplomacy among sovereign states:"The functions of a diplomatic mission consist, inter alia, in representing the sending State in the receiving State; protecting in the receiving State the interests of the sending State and of its nationals, within the limits permitted by international law; negotiating with the Government of the receiving State; ascertaining by all lawful means conditions and developments in the receiving State, and reporting thereon to the Government of the sending State; promoting friendly relations between the sending State and the receiving State, and developing their economic, cultural and scientific relations."

Diplomatic missions between members of the Commonwealth of Nations are not called embassies, but high commissions, for Commonwealth nations share a special diplomatic relationship. It is generally expected that an embassy of a Commonwealth country in a non-Commonwealth country will do its best to provide diplomatic services to citizens from other Commonwealth countries if the citizen's country does not have an embassy in that country. Canadian and Australian nationals enjoy even greater cooperation between their respective consular services, as outlined in the Canada-Australia Consular Services Sharing Agreement. The same kind of procedure is also followed multilaterally by the member states of the European Union (EU). European citizens in need of consular help in a country without diplomatic or consular representation of their own country may turn to any consular or diplomatic mission of another EU member state (art. 23 TFEU).

Multiple missions in a city
Some cities may host more than one mission from the same country.

In Rome, many states maintain separate missions to both Italy and the Holy See. It is not customary for these missions to share premises nor personnel. At present, only the Iraqi and United States embassies to Italy and the Holy See share premises; however, separate ambassadors are appointed, one to each country. In the case of the UN's Food Agencies, the sending country's ambassador to the Italian Republic is usually accredited as permanent representative. The United States maintains a separate mission to the UN agencies, led by its own ambassador, but is located in the compound that houses its embassies to Italy and the Holy See.

Several cities host both embassies/consulates and permanent representatives to international organizations, such as New York City (United Nations), Washington, D.C. (Organization of American States), Jakarta (ASEAN) and Brussels (European Union and North Atlantic Treaty Organization).

In some cases, an embassy or consulate is divided between multiple locations in the same city. For example, the Bangladeshi Deputy High Commission in Kolkata, has two locations: one at Park Circus and another, opened later, at Mirza Ghalib Street, to reduce overcrowding.

Non-diplomatic offices
Governments of states not recognized by the receiving state and of territories that make no claim to be sovereign states may set up offices abroad that do not have official diplomatic status as defined by the Vienna Convention. Examples are the Taipei Economic and Cultural Representative Offices that represent the government of the Republic of China; Somaliland's Representative Offices in London, Addis Ababa, Rome, Taipei, and Washington, D.C.; the Hong Kong and Macau economic and trade offices that represent the governments of those two territories. Such offices assume some of the non-diplomatic functions of diplomatic posts, such as promoting trade interests and providing assistance to its citizens and residents. They are nevertheless not diplomatic missions, their personnel are not diplomats and do not have diplomatic visas, although there may be legislation providing for personal immunities and tax privileges, as in the case of the Hong Kong offices in London and Toronto or the Macau office in Lisbon, for example.

title: Diplomatic mission


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DEC Alpha

Alpha (original name Alpha AXP) is a 64-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC). Alpha was designed to replace 32-bit VAX complex instruction set computers (CISC) and to be a highly competitive RISC processor for Unix workstations and similar markets.

Alpha is implemented in a series of microprocessors originally developed and fabricated by DEC. These microprocessors are most prominently used in a variety of DEC workstations and servers, which eventually formed the basis for almost all of their mid-to-upper-scale lineup. Several third-party vendors also produced Alpha systems, including PC form factor motherboards.

Operating systems that support Alpha included OpenVMS (formerly named OpenVMS AXP), Tru64 UNIX (formerly named DEC OSF/1 AXP and Digital UNIX), Windows NT (discontinued after NT 4.0; and prerelease Windows 2000 RC2), Linux (Debian, SUSE, Gentoo and Red Hat), BSD UNIX (NetBSD, OpenBSD and FreeBSD up to 6.x), Plan 9 from Bell Labs, and the L4Ka::Pistachio kernel. A port of Ultrix to Alpha was carried out during the initial development of the Alpha architecture, but was never released as a product.

The Alpha architecture was sold, along with most parts of DEC, to Compaq in 1998. Compaq, already an Intel x86 customer, announced that they would phase out Alpha in favor of the forthcoming Hewlett-Packard/Intel Itanium architecture, and sold all Alpha intellectual property to Intel, in 2001, effectively killing the product. Hewlett-Packard purchased Compaq in 2002, continuing development of the existing product line until 2004, and selling Alpha-based systems, largely to the existing customer base, until April 2007.

PRISM
Alpha emerged from an earlier RISC project named Parallel Reduced Instruction Set Machine (PRISM), itself the product of several earlier projects. PRISM was intended to be a flexible design, supporting Unix-like applications, and Digital's existing VAX/VMS software, after minor conversion. A new operating system named MICA would support both ULTRIX and VAX/VMS interfaces on a common kernel, allowing software for both platforms to be easily ported to the PRISM architecture.

Started in 1985, the PRISM design was continually changed during its development in response to changes in the computer market, leading to lengthy delays in its introduction. It was not until the summer of 1987 that it was decided that it would be a 64-bit design, among the earliest such designs in a microprocessor format. In October 1987, Sun Microsystems introduced the Sun-4, their first workstation using their new SPARC processor. The Sun-4 runs about three to four times as fast as their latest Sun-3 designs using the Motorola 68020, and any Unix offering from DEC. The plans changed again; PRISM was realigned once again as a 32-bit part and aimed directly at the Unix market. This further delayed the design.

Having watched the PRISM delivery date continue to slip, and facing the possibility of more delays, a team in the Palo Alto office decided to design their own workstation using another RISC processor. After due diligence, they selected the MIPS R2000 and built a working workstation running Ultrix in a period of 90 days. This sparked off an acrimonious debate within the company, which came to a head in a July 1988 management meeting. PRISM appeared to be faster than the R2000, but the R2000 machines could be in the market by January 1989, a year earlier than PRISM. When this proposal was accepted, one of the two original roles for PRISM disappeared. The decision to make a VMS PRISM had already ended by this point, so there was no remaining role. PRISM was cancelled at the meeting.

RISCy VAX
As the meeting broke up, Bob Supnik was approached by Ken Olsen, who stated that the RISC chips appeared to be a future threat to their VAX line. He asked Supnik to consider what might be done with VAX to keep it competitive with future RISC systems.

This led to the formation of the "RISCy VAX" team. They initially considered three concepts. One was a cut-down version of the VAX instruction set architecture (ISA) that would run on a RISC-like system and leave more complex VAX instructions to system subroutines. Another concept was a pure RISC system that would translate existing VAX code into its own ISA on-the-fly and store it in a CPU cache. Finally, there was still the possibility of a much faster CISC processor running the complete VAX ISA. Unfortunately, all of these approaches introduced overhead and would not be competitive with a pure-RISC machine running native RISC code.

The group then considered hybrid systems that combined one of their existing VAX one-chip solution and a RISC chip as a coprocessor used for high-performance needs. These studies suggested that the system would inevitably be hamstrung by the lower-performance part and would offer no compelling advantage. It was at this point that Nancy Kronenberg pointed out that people ran VMS, not VAX, and that VMS only had a few hardware dependencies based on its modelling of interrupts and memory paging. There appeared to be no compelling reason why VMS could not be ported to a RISC chip as long as these small bits of the model were preserved. Further work on this concept suggested this was a workable approach.

Supnik took the resulting report to the Strategy Task Force in February 1989. Two questions were raised: could the resulting RISC design also be a performance leader in the Unix market, and should the machine be an open standard? And with that, the decision was made to adopt the PRISM architecture with the appropriate modifications. This became the "EVAX" concept, a follow-on to the successful CMOS CVAX implementation. When management accepted the findings, they decided to give the project a more neutral name, removing "VAX", eventually settling on Alpha. The name was inspired by the use of "Omega" as the codename of an NVAX-based VAX 4000 model; "Alpha" was intended to signify the beginning of a new line (with reference to Alpha and Omega). Soon after, work began on a port of VMS to the new architecture.

Alpha
The new design uses most of the basic PRISM concepts, but was re-tuned to allow VMS and VMS programs to run at reasonable speed with no conversion at all. The primary Alpha instruction set architects were Richard L. Sites and Richard T. Witek. The PRISM's Epicode was developed into the Alpha's PALcode, providing an abstracted interface to platform- and processor implementation-specific features.

The main contribution of Alpha to the microprocessor industry, and the main reason for its performance, is not so much the architecture but rather its implementation. At that time (as it is now), the microchip industry was dominated by automated design and layout tools. The chip designers at Digital continued pursuing sophisticated manual circuit design in order to deal with the complex VAX architecture. The Alpha chips show that manual circuit design applied to a simpler, cleaner architecture allows for much higher operating frequencies than those that are possible with the more automated design systems. These chips caused a renaissance of custom circuit design within the microprocessor design community.

Originally, the Alpha processors were designated the DECchip 21x64 series, with "DECchip" replaced in the mid-1990s with "Alpha". The first two digits, "21" signifies the 21st century, and the last two digits, "64" signifies 64 bits. The Alpha was designed as 64-bit from the start and there is no 32-bit version. The middle digit corresponds to the generation of the Alpha architecture. Internally, Alpha processors were also identified by EV numbers, EV officially standing for "Extended VAX" but having an alternative humorous meaning of "Electric Vlasic", giving homage to the Electric Pickle experiment at Western Research Lab.

In May 1997, DEC sued Intel for allegedly infringing on its Alpha patents in designing the original Pentium, Pentium Pro, and Pentium II chips. As part of a settlement, much of DEC's chip design and fabrication business was sold to Intel. This included DEC's StrongARM implementation of the ARM computer architecture, which Intel marketed as the XScale processors commonly used in Pocket PCs. The core of Digital Semiconductor, the Alpha microprocessor group, remained with DEC, while the associated office buildings went to Intel as part of the Hudson fab.

Improved models
The first few generations of the Alpha chips were some of the most innovative of their time.
 * A pre-production model, designated EV3, was used in a prototype system named the Alpha Demonstration Unit (ADU). ADUs were used to port operating systems to the Alpha architecture. One key difference between the EV3 and later models was the absence of a floating-point unit.
 * The first version, the Alpha 21064 or EV4, is the first CMOS microprocessor whose operating frequency rivalled higher-powered ECL minicomputers and mainframes.
 * The second, 21164 or EV5, is the first microprocessor to place a large secondary cache on-chip.
 * The third, 21264 or EV6, is the first microprocessor to combine both high operating frequency and the more complicated out-of-order execution microarchitecture.
 * The 21364 or EV7 is the first high performance processor to have an on-chip memory controller.
 * The unproduced 21464 or EV8 would have been the first to include simultaneous multithreading, but this version was canceled after the sale of DEC to Compaq. The Tarantula research project, which most likely would have been called EV9, would have been the first Alpha processor to feature a vector processor unit.

A persistent report attributed to DEC insiders suggests the choice of the AXP tag for the processor was made by DEC's legal department, which was still smarting from the VAX trademark fiasco. After a lengthy search the tag "AXP" was found to be entirely unencumbered. Within the computer industry, a joke got started that the acronym AXP meant "Almost eXactly PRISM".

Design principles
The Alpha architecture was intended to be a high-performance design. Digital intended the architecture to support a one-thousandfold increase in performance over twenty-five years. To ensure this, any architectural feature that impeded multiple instruction issue, clock rate or multiprocessing was removed. As a result, the Alpha does not have:

 * Branch delay slots
 * Suppressed instructions
 * Byte load or store instructions (later added with the Byte Word Extensions (BWX))

Condition codes
The Alpha does not have condition codes for integer instructions to remove a potential bottleneck at the condition status register. Instructions resulting in an overflow, such as adding two numbers whose result does not fit in 64 bits, write the 32 or 64 least significant bits to the destination register. The carry is generated by performing an unsigned compare on the result with either operand to see if the result is smaller than either operand. If the test was true, the value one is written to the least significant bit of the destination register to indicate the condition.

Registers
The architecture defines a set of 32 integer registers and a set of 32 floating-point registers in addition to a program counter, two lock registers and a floating-point control register (FPCR). It also defines registers that were optional, implemented only if the implementation required them. Lastly, registers for PALcode are defined.

The integer registers are denoted by R0 to R31 and floating-point registers are denoted by F0 to F31. The R31 and F31 registers are hardwired to zero and writes to those registers by instructions are ignored. Digital considered using a combined register file, but a split register file was determined to be better, as it enables two-chip implementations to have a register file located on each chip and integer-only implementations to omit the floating-point register file containing the floating-point registers. A split register file was also determined to be more suitable for multiple instruction issue due to the reduced number of read and write ports. The number of registers per register file was also considered, with 32 and 64 being contenders. Digital concluded that 32 registers was more suitable as it required less die space, which improves clock frequencies. This number of registers was deemed not to be a major issue in respect to performance and future growth, as thirty-two registers could support at least eight-way instruction issue.

The program counter is a 64-bit register which contains a longword-aligned virtual byte address, that is, the low two bits of the program counter are always zero. The PC is incremented by four to the address of the next instruction when an instruction is decoded. A lock flag and locked physical address register are used by the load-locked and store-conditional instructions for multiprocessor support. The floating-point control register (FPCR) is a 64-bit register defined by the architecture intended for use by Alpha implementations with IEEE 754-compliant floating-point hardware.

Data types
In the Alpha architecture, a byte is defined as an 8-bit datum (octet), a word as a 16-bit datum, a longword as a 32-bit datum, a quadword as a 64-bit datum, and an octaword as a 128-bit datum.

The Alpha architecture originally defined six data types:

 * Quadword (64-bit) integer
 * Longword (32-bit) integer
 * IEEE T-floating-point (double precision, 64-bit)
 * IEEE S-floating-point (single precision, 32-bit)

To maintain a level of compatibility with the VAX, the 32-bit architecture that preceded the Alpha, two other floating-point data types are included:

 * VAX G-floating point (double precision, 64-bit)
 * VAX F-floating point (single precision, 32-bit)

VAX H-floating point (quad precision, 128-bit) was not supported, but another 128-bit floating-point option, X-floating point, is available on Alpha, but not VAX. H and X have been described as similar, but not identical. Software emulation for H-floating is available from DEC, as is a source-code level converter named DECmigrate.

Memory
The Alpha has a 64-bit linear virtual address space with no memory segmentation. Implementations can implement a smaller virtual address space with a minimum size of 43 bits. Although the unused bits were not implemented in hardware such as TLBs, the architecture required implementations to check whether they are zero to ensure software compatibility with implementations with a larger (or full) virtual address space.

Instruction formats
The Alpha ISA has a fixed instruction length of 32 bits. It has six instruction formats.

The integer operate format is used by integer instructions. It contains a 6-bit opcode field, followed by the Ra field, which specifies the register containing the first operand and the Rb field, specifies the register containing the second operand. Next is a 3-bit field which is unused and reserved. A 1-bit field contains a "0", which distinguished this format from the integer literal format. A 7-bit function field follows, which is used in conjunction with the opcode to specify an operation. The last field is the Rc field, which specifies the register which the result of a computation should be written to. The register fields are all 5 bits long, required to address 32 unique locations, the 32 integer registers.

The integer literal format is used by integer instructions which use a literal as one of the operands. The format is the same as the integer operate format except for the replacement of the 5-bit Rb field and the 3 bits of unused space with an 8-bit literal field which is zero-extended to a 64-bit operand.

The floating-point operate format is used by floating-point instructions. It is similar to the integer operate format, but has an 11-bit function field made possible by using the literal and unused bits which are reserved in integer operate format.

The memory format is used mostly by load and store instructions. It has a 6-bit opcode field, a 5-bit Ra field, a 5-bit Rb field and a 16-bit displacement field.

Branch instructions have a 6-bit opcode field, a 5-bit Ra field and a 21-bit displacement field. The Ra field specifies a register to be tested by a conditional branch instruction, and if the condition is met, the program counter is updated by adding the contents of the displacement field with the program counter. The displacement field contains a signed integer and if the value of the integer is positive, if the branch is taken then the program counter is incremented. If the value of the integer is negative, then program counter is decremented if the branch is taken. The range of a branch thus is ±1 Mi instructions, or ±4 MiB. The Alpha Architecture was designed with a large range as part of the architecture's forward-looking goal.

The CALL_PAL format is used by the  instruction, which is used to call PALcode subroutines. The format retains the opcode field but replaces the others with a 26-bit function field, which contains an integer specifying a PAL subroutine.

Control instructions
The control instructions consist of conditional and unconditional branches, and jumps. The conditional and unconditional branch instructions use the branch instruction format, while the jump instructions use the memory instruction format.

Conditional branches test whether the least significant bit of a register is set or clear, or compare a register as a signed quadword to zero, and branch if the specified condition is true. The conditions available for comparing a register to zero are equality, inequality, less than, less than or equal to, greater than or equal to, and greater than. The new address is computed by longword aligning and sign extending the 21-bit displacement and adding it to the address of the instruction following the conditional branch.

Unconditional branches update the program counter with a new address computed in the same way as conditional branches. They also save the address of the instruction following the unconditional branch to a register. There are two such instructions, and they differ only in the hints provided for the branch prediction hardware.

There are four jump instructions. These all perform the same operation, saving the address of the instruction following the jump, and providing the program counter with a new address from a register. They differ in the hints provided to the branch prediction hardware. The unused displacement field is used for this purpose.

Integer arithmetic
The integer arithmetic instructions perform addition, multiplication, and subtraction on longwords and quadwords; and comparison on quadwords. There is no instruction(s) for division as the architects considered the implementation of division in hardware to be adverse to simplicity. In addition to the standard add and subtract instructions, there are scaled versions. These versions shift the second operand to the left by two or three bits before adding or subtracting. The Multiply Longword and Multiply Quadword instructions write the least significant 32 or 64 bits of a 64- or 128-bit result to the destination register, respectively. Since it is useful to obtain the most significant half, the Unsigned Multiply Quadword High (UMULH) instruction is provided. UMULH is used for implementing multi-precision arithmetic and division algorithms. The concept of a separate instruction for multiplication that returns the most significant half of a result was taken from PRISM.

The instructions that operate on longwords ignore the most significant half of the register and the 32-bit result is sign-extended before it is written to the destination register. By default, the add, multiply, and subtract instructions, with the exception of UMULH and scaled versions of add and subtract, do not trap on overflow. When such functionality is required, versions of these instructions that perform overflow detection and trap on overflow are provided.

The compare instructions compare two registers or a register and a literal and write '1' to the destination register if the specified condition is true or '0' if not. The conditions are equality, inequality, less than or equal to, and less than. With the exception of the instructions that specify the former two conditions, there are versions that perform signed and unsigned compares.

The integer arithmetic instructions use the integer operate instruction formats.

Logical and shift
The logical instructions consist of those for performing bitwise logical operations and conditional moves on the integer registers. The bitwise logical instructions perform AND, NAND, NOR, OR, XNOR, and XOR between two registers or a register and literal. The conditional move instructions test a register as a signed quadword to zero and move if the specified condition is true. The specified conditions are equality, inequality, less than or equal to, less than, greater than or equal to, and greater than. The shift instructions perform arithmetic right shift, and logical left and right shifts. The shift amount is given by a register or literal. Logical and shift instructions use the integer operate instruction formats.

Byte-Word Extensions (BWX)
Later Alphas include byte-word extensions, a set of instructions to manipulate 8-bit and 16-bit data types. These instructions were first introduced in the 21164A (EV56) microprocessor and are present in all subsequent implementations. These instructions perform operations that formerly required multiple instructions to implement, which improves code density and the performance of certain applications. BWX also makes the emulation of x86 machine code and the writing of device drivers easier.

Motion Video Instructions (MVI)
Motion Video Instructions (MVI) was an instruction set extension to the Alpha ISA that added instructions for single instruction, multiple data (SIMD) operations. Alpha implementations that implement MVI, in chronological order, are the Alpha 21164PC (PCA56 and PCA57), Alpha 21264 (EV6) and Alpha 21364 (EV7). Unlike most other SIMD instruction sets of the same period, such as MIPS' MDMX or SPARC's Visual Instruction Set, but like PA-RISC's Multimedia Acceleration eXtensions (MAX-1, MAX-2), MVI was a simple instruction set composed of a few instructions that operate on integer data types stored in existing integer registers.

MVI's simplicity is due to two reasons. Firstly, Digital had determined that the Alpha 21164 was already capable of performing DVD decoding through software, therefore not requiring hardware provisions for the purpose, but was inefficient in MPEG-2 encoding. The second reason is the requirement to retain the fast cycle times of implementations. Adding many instructions would have complicated and enlarged the instruction decode logic, reducing an implementation's clock frequency.

MVI consists of 13 instructions:

Floating-point Extensions (FIX)
Floating-point extensions (FIX) are an extension to the Alpha Architecture. It introduces nine instructions for floating-point square-root and for transferring data to and from the integer registers and floating-point registers. The Alpha 21264 (EV6) is the first microprocessor to implement these instructions.

Count Extensions (CIX)
Count Extensions (CIX) is an extension to the architecture which introduces three instructions for counting bits. These instructions are categorized as integer arithmetic instructions. They were first implemented on the Alpha 21264A (EV67).

Implementations
At the time of its announcement, Alpha was heralded as an architecture for the next 25 years. While this was not to be, Alpha has nevertheless had a reasonably long life. The first version, the Alpha 21064 (otherwise named the EV4) was introduced in November 1992 running at up to 192 MHz; a slight shrink of the die (the EV4S, shrunk from 0.75 μm to 0.675 μm) ran at 200 MHz a few months later. The 64-bit processor was a superpipelined and superscalar design, like other RISC designs, but nevertheless outperformed them all and DEC touted it as the world's fastest processor. Careful attention to circuit design, a hallmark of the Hudson design team, like a huge centralized clock circuitry, allowed them to run the CPU at higher speeds, even though the microarchitecture was fairly similar to other RISC chips. In comparison, the less expensive Intel Pentium ran at 66 MHz when it was launched the following spring.

The Alpha 21164 or EV5 became available in 1995 at processor frequencies of up to 333 MHz. In July 1996 the line was speed bumped to 500 MHz, in March 1998 to 666 MHz. Also in 1998 the Alpha 21264 (EV6) was released at 450 MHz, eventually reaching (in 2001 with the 21264C/EV68CB) 1.25 GHz. In 2003, the Alpha 21364 or EV7 Marvel was launched, essentially an EV68 core with four 1.6 GB/s inter-processor communication links for improved multiprocessor system performance, running at 1 or 1.15 GHz.

In 1996, the production of Alpha chips was licensed to Samsung Electronics Company. Following the purchase of Digital by Compaq the majority of the Alpha products were placed with API NetWorks, Inc. (formerly Alpha Processor Inc.), a private company funded by Samsung and Compaq. In October 2001, Microway became the exclusive sales and service provider of API NetWorks' Alpha-based product line.

On June 25, 2001, Compaq announced that Alpha would be phased out by 2004 in favor of Intel's Itanium, canceled the planned EV8 chip, and sold all Alpha intellectual property to Intel. Hewlett-Packard merged with Compaq in 2002; HP announced that development of the Alpha series would continue for a few more years, including the release of a 1.3 GHz EV7 variant named the EV7z. This would be the final iteration of Alpha, the 0.13 μm EV79 also being canceled.

Alpha is also implemented in the Piranha, a research prototype developed by Compaq's Corporate Research and Nonstop Hardware Development groups at the Western Research Laboratory and Systems Research Center. Piranha is a multicore design for transaction processing workloads that contains eight simple cores. It was described at the 27th Annual International Symposium on Computer Architecture in June 2000.

Early revisions of the Sunway architecture are claimed to be based on Alpha, however since the SW26010, Sunway uses a new instruction set architecture unrelated to Alpha.

Model history

 * ISA extensions:

 * R – Hardware support for rounding to infinity and negative infinity.
 * B – BWX, the "Byte/Word Extension", adding instructions to allow 8- and 16-bit operations from memory and I/O
 * M – MVI, "multimedia" instructions
 * F – FIX, instructions to move data between integer and floating-point registers and for square root
 * C – CIX, instructions for counting and finding bits
 * T – support for prefetch with modify intent to improve the performance of the first attempt to acquire a lock

Performance
To illustrate the comparative performance of Alpha-based systems, some Standard Performance Evaluation Corporation (SPEC) performance numbers (SPECint95, SPECfp95) are listed below. Note that the SPEC results claim to report the measured performance of a whole computer system (CPU, bus, memory, compiler optimizer), not just the CPU. Also note that the benchmark and scale changed from 1992 to 1995. However, the figures give a rough impression of the performance of the Alpha architecture (64-bit), compared with the contemporary HP (64-bit) and Intel-based offerings (32-bit). Perhaps the most obvious trend is that while Intel could always get reasonably close to Alpha in integer performance, in floating-point performance the difference was considerable. On the other side, HP (PA-RISC) is also reasonably close to Alpha, but these CPUs are running at significantly lower clock rates (MHz). The tables lack two important values: the power consumption and the price of a CPU.

Alpha-based systems
The first generation of DEC Alpha-based systems comprise the DEC 3000 AXP series workstations and low-end servers, DEC 4000 AXP series mid-range servers, and DEC 7000 AXP and 10000 AXP series high-end servers. The DEC 3000 AXP systems use the same TURBOchannel bus as the prior MIPS-based DECstation models, whereas the 4000 is based on Futurebus+ and the 7000/10000 share an architecture with corresponding VAX models.

DEC also produced a personal computer (PC) configuration Alpha workstation with an Extended Industry Standard Architecture (EISA) bus, the DECpc AXP 150 (codename Jensen, also named the DEC 2000 AXP). This is the first Alpha system to support Windows NT. DEC later produced Alpha versions of their Celebris XL and Digital Personal Workstation PC lines, with 21164 processors.

Digital also produced single-board computers based on the VMEbus for embedded and industrial use. The first generation includes the 21068-based AXPvme 64 and AXPvme 64LC, and the 21066-based AXPvme 160. These were introduced on March 1, 1994. Later models such as the AXPvme 100, AXPvme 166 and AXPvme 230 are based on the 21066A processor, while the Alpha VME 4/224 and Alpha VME 4/288 are based on the 21064A processor. The last models, the Alpha VME 5/352 and Alpha VME 5/480, are based on the 21164 processor.

The 21066 chip is used in the DEC Multia VX40/41/42 compact workstation and the ALPHAbook 1 laptop from Tadpole Technology.

In 1994, DEC launched a new range of AlphaStation and AlphaServer systems. These use 21064 or 21164 processors and introduced the PCI bus, VGA-compatible frame buffers and PS/2-style keyboards and mice. The AlphaServer 8000 series supersedes the DEC 7000/10000 AXP and also employs XMI and FutureBus+ buses.

The AlphaStation XP1000 is the first workstation based on the 21264 processor. Later AlphaServer/Station models based on the 21264 are categorised into DS (departmental server), ES (enterprise server) or GS (global server) families.

The final 21364 chip is used in the AlphaServer ES47, ES80 and GS1280 models and the AlphaStation ES47.

A number of OEM motherboards were produced by DEC, such as the 21066 and 21068-based AXPpci 33 "NoName", which was part of a major push into the OEM market by the company, the 21164-based AlphaPC 164 and AlphaPC 164LX, the 21164PC-based AlphaPC 164SX and AlphaPC 164RX and the 21264-based AlphaPC 264DP. Several third parties such as Samsung and API also produced OEM motherboards such as the API UP1000 and UP2000.

To assist third parties in developing hardware and software for the platform, DEC produced Evaluation Boards, such as the EB64+ and EB164 for the Alpha 21064A and 21164 microprocessors respectively.

The 21164 and 21264 processors were used by NetApp in various network-attached storage systems, while the 21064 and 21164 processors were used by Cray in their T3D and T3E massively parallel supercomputers.

Supercomputers
The fastest supercomputer based on Alpha processors was the ASCI Q at Los Alamos National Laboratory. The machine was built as an HP AlphaServer SC45/GS Cluster. It had 4096 Alpha (21264 EV-68, 1.25 GHz) CPUs, and reached an Rmax of 7.727 TFLOPS.

license: Creative Commons - Attribution Share-Alike - https://creativecommons.org/licenses/by-sa/4.0/

title: DEC Alpha


text:
Dagger

A dagger is a fighting knife with a very sharp point and usually one or two sharp edges, typically designed or capable of being used as a cutting or thrusting weapon. Daggers have been used throughout human history for close combat confrontations, and many cultures have used adorned daggers in ritual and ceremonial contexts. The distinctive shape and historic usage of the dagger have made it iconic and symbolic. A dagger in the modern sense is a weapon designed for close-proximity combat or self-defense; due to its use in historic weapon assemblages, it has associations with assassination and murders. Double-edged knives, however, play different sorts of roles in different social contexts.

A wide variety of thrusting knives have been described as daggers, including knives that feature only a single cutting edge, such as the European rondel dagger or the Afghan pesh-kabz, or, in some instances, no cutting edge at all, such as the stiletto of the Renaissance. However, in the last hundred years or so, in most contexts, a dagger has certain definable characteristics, including a short blade with a sharply tapered point, a central spine or fuller, and usually two cutting edges sharpened the full length of the blade, or nearly so. Most daggers also feature a full crossguard to keep the hand from riding forwards onto the sharpened blade edges.

Daggers are primarily weapons, so knife legislation in many places restricts their manufacture, sale, possession, transport, or use.

Antiquity

The earliest daggers were made of materials such as flint, ivory or bone in Neolithic times.

Copper daggers appeared first in the early Bronze Age, in the 3rd millennium BC, and copper daggers of Early Minoan III (2400–2000 BC) were recovered at Knossos.

In ancient Egypt, daggers were usually made of copper or bronze, while royalty had gold weapons. At least since pre-dynastic Egypt, (c. 3100 BC) daggers were adorned as ceremonial objects with golden hilts and later even more ornate and varied construction. One early silver dagger was recovered with midrib design. The 1924 opening of the tomb of Tutankhamun revealed two daggers, one with a gold blade, and one of smelted iron. It is held that mummies of the Eleventh Dynasty were buried with bronze sabres; and there is a bronze dagger of Thut-mes III. (Eighteenth Dynasty), c. B.C. 1600, and bronze armour, swords and daggers of Mene-ptah II. of the (Nineteenth Dynasty) c. B.C 1300.

Iron production did not begin until 1200 BC, and iron ore was not found in Egypt, making the iron dagger rare, and the context suggests that the iron dagger was valued on a level equal to that of its ceremonial gold counterpart. These facts, and the composition of the dagger had long suggested a meteoritic origin, however, evidence for its meteoritic origin was not entirely conclusive until June 2016 when researchers using x-ray fluorescence spectrometry confirmed similar proportions of metals (Iron, 10% nickel, and 0.6% cobalt) in a meteorite discovered in the area, deposited by an ancient meteor shower.

One of the earliest objects made of smelted iron is a dagger dating to before 2000 BC, found in a context that suggests it was treated as an ornamental object of great value. Found in a Hattic royal tomb dated about 2500 BC, at Alaca Höyük in northern Anatolia, the dagger has a smelted iron blade and a gold handle.

The artisans and blacksmiths of Iberia in what is now southern Spain and southwestern France produced various iron daggers and swords of high quality from the 5th to the 3rd century BC, in ornamentation and patterns influenced by Greek, Punic (Carthaginian), and Phoenician culture. The exceptional purity of Iberian iron and the sophisticated method of forging, which included cold hammering, produced double-edged weapons of excellent quality. One can find technologically advanced designs such as folding knives rusted among the artifacts of many Second Iberian Iron Age cremation burials or in Roman Empire excavations all around Spain and the Mediterranean. Iberian infantrymen carried several types of iron daggers, most of them based on shortened versions of double-edged swords, but the true Iberian dagger had a triangular-shaped blade. Iberian daggers and swords were later adopted by Hannibal and his Carthaginian armies. The Lusitanii, a pre-Celtic people dominating the lands west of Iberia (most of modern Portugal and Extremadura) successfully held off the Roman Empire for many years with a variety of innovative tactics and light weapons, including iron-bladed short spears and daggers modeled after Iberian patterns.

During the Roman Empire, legionaries were issued a pugio (from the Latin pugnō, or "fight"), a double-edged iron thrusting dagger with a blade of 7-12 in. The design and fabrication of the pugio was taken directly from Iberian daggers and short swords; the Romans even adopted the triangular-bladed Iberian dagger, which they called the parazonium. Like the gladius, the pugio was most often used as a thrusting (stabbing weapon). As an extreme close-quarter combat weapon, the pugio was the Roman soldier's last line of defense. When not in battle, the pugio served as a convenient utility knife.

Middle Ages
The term dagger appears only in the Late Middle Ages, reflecting the fact that while the dagger had been known in antiquity, it had disappeared during the Early Middle Ages, replaced by the hewing knife or seax.

The dagger reappeared in the 12th century as the "knightly dagger", or more properly cross-hilt or quillon dagger, and was developed into a common arm and tool for civilian use by the late medieval period.

The earliest known depiction of a cross-hilt dagger is the so-called "Guido relief" inside the Grossmünster of Zürich (c. 1120). A number of depictions of the fully developed cross-hilt dagger are found in the Morgan Bible (c. 1240). Many of these cross-hilt daggers resemble miniature swords, with cross guards and pommels very similar in form to swords of the period. Others, however, are not an exact match to known sword designs, having for example pommel caps, large hollow star shaped pommels on so-called "Burgundian Heraldic daggers" or antenna style cross and pommel, reminiscent of Hallstatt era daggers. The cross-hilt type persisted well into the Renaissance

The Old French term dague appears to have referred to these weapons in the 13th century, alongside other terms such as poignal and basilard. The Middle English dagger is used from the 1380s.

During this time, the dagger was often employed in the role of a secondary defense weapon in close combat. The knightly dagger evolved into the larger baselard knife in the 14th century. During the 14th century, it became fairly common for knights to fight on foot to strengthen the infantry defensive line. This necessitated more use of daggers. At Agincourt (1415) archers used them to dispatch dismounted knights by thrusting the narrow blades through helmet vents and other apertures. The baselard was considered an intermediate between a short sword and a long dagger, and became popular also as a civilian weapon. Sloane MS. 2593 (c. 1400) records a song satirizing the use of oversized baselard knives as fashion accessories. Weapons of this sort called anelace, somewhere between a large dagger and a short sword, were much in use in 14th century England as civilians' accoutrements, worn "suspended by a ring from the girdle".

In the Late Middle Ages, knives with blade designs that emphasized thrusting attacks, such as the stiletto, became increasingly popular, and some thrusting knives commonly referred to as 'daggers' ceased to have a cutting edge. This was a response to the deployment of heavy armor, such as maille and plate armour, where cutting attacks were ineffective and focus was on thrusts with narrow blades to punch through mail or aim at armour plate intersections (or the eye slits of the helmet visor). These late medieval thrusting weapons are sometimes classed by the shape of their hilt as either roundel, bollock or ear daggers. The term dagger is coined in this time, as are the Early Modern German equivalents dolch (tolch) and degen (tegen). In the German school of fencing, Johannes Liechtenauer (Ms. 3227a) and his successors (specifically Andres Lignizer in Cod. 44 A 8) taught fighting with the dagger.

These techniques in some respects resemble modern knife fighting, but emphasized thrusting strokes almost exclusively, instead of slashes and cuts. When used offensively, a standard attack frequently employed the reverse or icepick grip, stabbing downward with the blade to increase thrust and penetrative force. This was done primarily because the blade point frequently had to penetrate or push apart an opponent's steel chain mail or plate armor in order to inflict an injury. The disadvantage of employing the medieval dagger in this manner was that it could easily be blocked by a variety of techniques, most notably by a block with the weaponless arm while simultaneously attacking with a weapon held in the right hand. Another disadvantage was the reduction in effective blade reach to the opponent when using a reverse grip. As the wearing of armor fell out of favor, dagger fighting techniques began to evolve which emphasized the use of the dagger with a conventional or forward grip, while the reverse or icepick grip was retained when attacking an unsuspecting opponent from behind, such as in an assassination.

Renaissance and early modern period

The dagger was very popular as a fencing and personal defense weapon in 17th and 18th century Spain, where it was referred to as the daga or puñal. During the Renaissance Age the dagger was used as part of everyday dress, and daggers were the only weapon commoners were allowed to carry on their person. In English, the terms poniard and dirk are loaned during the late 16th to early 17th century, the latter in the spelling dork, durk (presumably via Low German, Dutch or Scandinavian dolk, dolch, ultimately from a West Slavic tulich), the modern spelling dirk dating to 18th-century Scots.

Beginning in the 17th century, another form of dagger—the plug bayonet and later the socket bayonet—was used to convert muskets and other longarms into spears by mounting them on the barrel. They were periodically used for eating; the arm was also used for a variety of other tasks such as mending boots, house repairs and farm jobs. The final function of the dagger was as an obvious and ostentatious means of enhancing a man's personal apparel, conforming to fashion which dictated that all men carried them.

Modern period (19th–21st century)

WW1 trench warfare caused daggers and fighting knives to come back in play. They also replaced the sabres worn by officers, which were too long and clumsy for trench warfare. They were worn with pride as a sign of having served front line duty.

Daggers achieved public notoriety in the 20th century as ornamental uniform regalia during the Fascist dictatorships of Mussolini's Italy and Hitler's Germany. Dress daggers were used by several other countries as well, including Japan, but never to the same extent. As combat equipment they were carried by many infantry and commando forces during the Second World War. British Commando and other elite units were issued an especially slender dagger, the Fairbairn–Sykes fighting knife, developed by William E. Fairbairn and Eric A. Sykes from real-life close-combat experiences gained while serving on the Shanghai Municipal Police Force. The F-S dagger proved very popular with the commandos, who used it primarily for sentry elimination. Some units of the U.S. Marine Corps Raiders in the Pacific were issued a similar fighting dagger, the Marine Raider stiletto, though this modified design proved less than successful when used in the type of knife combat encountered in the Pacific theater due to this version using inferior materials and manufacturing techniques.

During the Vietnam War, the Gerber Mark II, designed by US Army Captain Bud Holzman and Al Mar, was a popular fighting knife pattern that was privately purchased by many U.S. soldiers and marines who served in that war.

Aside from military forces, most daggers are no longer carried openly, but concealed in clothing. One of the more popular forms of the concealable dagger is the boot knife. The boot knife is nothing more than a shortened dagger that is compact enough to be worn on the lower leg, usually by means of a sheath clipped or strapped to a boot or other footwear.

Cultural symbolism
The dagger is symbolically ambiguous. For some cultures and military organizations the dagger symbolizes courage and daring in combat.

However, daggers may be associated with deception or treachery due to the ease of concealment and surprise that the user could inflict upon an unsuspecting victim. Indeed, many assassinations have been carried out with the use of a dagger, including that of Julius Caesar. A cloak and dagger attack is one in which a deceitful, traitorous, or concealed enemy attacks a person. Some have noted a phallic association between daggers and the succession of royal dynasties in British literature.

In European artwork, daggers were sometimes associated with Hecate, the Ancient Greek goddess of witchcraft.

The social stigma of the dagger originates in its periodic use in the commission of disreputable and murderous attacks, from the 44 BC assassination of Julius Caesar to the use of the stiletto dagger by the Black Hand of early 20th century America. Consequently, it developed a public association with surprise assaults by criminals and murderers intent on stabbing unsuspecting victims. To this day, criminal codes of many nations and some US states specifically ban the carrying of the dagger as a prohibited weapon.

Modern use
The dagger is in military use as a close combat and ceremonial arm. Many nations use the dagger pattern in the form of the bayonet. Daggers are commonly used as part of the insignias of elite military units or special forces, such as the US Army Special Operations Command, the US Army Special Forces, or the Commando Dagger patch for those who have completed the British All Arms Commando Course.

Art knives
Daggers are a popular form of what is known as the "art knife", due in part to the symmetry of the blade. One of the knives required of an American Bladesmith Society Mastersmith is the construction of an "art knife" or a "European style" dagger.

title: Dagger