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Phase-locked loop

A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is fixed relative to the phase of an input signal. Keeping the input and output phase in lockstep also implies keeping the input and output frequencies the same, thus a phase-locked loop can also track an input frequency. And by incorporating a frequency divider, a PLL can generate a stable frequency that is a multiple of the input frequency.

These properties are used for clock synchronization, demodulation, frequency synthesis, clock multipliers, and signal recovery from a noisy communication channel. Since 1969, a single integrated circuit can provide a complete PLL building block, and nowadays have output frequencies from a fraction of a hertz up to many gigahertz. Thus, PLLs are widely employed in radio, telecommunications, computers (e.g. to distribute precisely timed clock signals in microprocessors), grid-tie inverters (electronic power converters used to integrate DC renewable resources and storage elements such as photovoltaics and batteries with the power grid), and other electronic applications.

Simple example

A simple analog PLL is an electronic circuit consisting of a variable frequency oscillator and a phase detector in a feedback loop (Figure 1). The oscillator generates a periodic signal with frequency proportional to an applied voltage, hence the term voltage-controlled oscillator (VCO). The phase detector compares the phase of the VCO's output signal with the phase of periodic input reference signal and outputs a voltage (stabilized by the filter) to adjust the oscillator's frequency to match the phase of  to the phase of.

Clock analogy
Phase can be proportional to time, so a phase difference can correspond to a time difference.

Left alone, different clocks will mark time at slightly different rates. A mechanical clock, for example, might be fast or slow by a few seconds per hour compared to a reference atomic clock (such as the NIST-F2). That time difference becomes substantial over time. Instead, the owner can synchronize their mechanical clock (with varying degrees of accuracy) by phase-locking it to a reference clock.

An inefficient synchronization method involves the owner resetting their clock to that more accurate clock's time every week. But, left alone, their clock will still continue to diverge from the reference clock at the same few seconds per hour rate.

A more efficient synchronization method (analogous to the simple PLL in Figure 1) utilizes the fast-slow timing adjust control (analogous to how the VCO's frequency can be adjusted) available on some clocks. Analogously to the phase comparator, the owner could notice their clock's misalignment and turn its timing adjust a small proportional amount to make their clock's frequency a little slower (if their clock was fast) or faster (if their clock was slow). If they don't overcompensate, then their clock will be more accurate than before. Over a series of such weekly adjustments, their clock's notion of a second would agree close enough with the reference clock, so they could be said to be locked both in frequency and phase.

An early electromechanical version of a phase-locked loop was used in 1921 in the Shortt-Synchronome clock.

History
Spontaneous synchronization of weakly coupled pendulum clocks was noted by the Dutch physicist Christiaan Huygens as early as 1673. Around the turn of the 19th century, Lord Rayleigh observed synchronization of weakly coupled organ pipes and tuning forks. In 1919, W. H. Eccles and J. H. Vincent found that two electronic oscillators that had been tuned to oscillate at slightly different frequencies but that were coupled to a resonant circuit would soon oscillate at the same frequency. Automatic synchronization of electronic oscillators was described in 1923 by Edward Victor Appleton.

In 1925, David Robertson, first professor of electrical engineering at the University of Bristol, introduced phase locking in his clock design to control the striking of the bell Great George in the new Wills Memorial Building. Robertson’s clock incorporated an electromechanical device that could vary the rate of oscillation of the pendulum, and derived correction signals from a circuit that compared the pendulum phase with that of an incoming telegraph pulse from Greenwich Observatory every morning at 10:00 GMT. Including equivalents of every element of a modern electronic PLL, Robertson’s system was notably ahead of its time in that its phase detector was a relay logic implementation of the transistor circuits for phase/frequency detectors not seen until the 1970s.

Robertson’s work predated research towards what was later named the phase-lock loop in 1932, when British researchers developed an alternative to Edwin Armstrong's superheterodyne receiver, the Homodyne or direct-conversion receiver. In the homodyne or synchrodyne system, a local oscillator was tuned to the desired input frequency and multiplied with the input signal. The resulting output signal included the original modulation information. The intent was to develop an alternative receiver circuit that required fewer tuned circuits than the superheterodyne receiver. Since the local oscillator would rapidly drift in frequency, an automatic correction signal was applied to the oscillator, maintaining it in the same phase and frequency of the desired signal. The technique was described in 1932, in a paper by Henri de Bellescize, in the French journal L'Onde Électrique.

In analog television receivers since at least the late 1930s, phase-locked-loop horizontal and vertical sweep circuits are locked to synchronization pulses in the broadcast signal.

In 1969, Signetics introduced a line of low-cost monolithic integrated circuits like the NE565 using bipolar transistors, that were complete phase-locked loop systems on a chip, and applications for the technique multiplied. A few years later, RCA introduced the CD4046 Micropower Phase-Locked Loop using CMOS, which also became a popular integrated circuit building block.

Structure and function
Phase-locked loop mechanisms may be implemented as either analog or digital circuits. Both implementations use the same basic structure.

Analog PLL circuits include four basic elements:
 * Phase detector
 * Low-pass filter
 * Voltage controlled oscillator
 * Feedback path, which may include a frequency divider

Variations
There are several variations of PLLs. Some terms that are used are "analog phase-locked loop" (APLL), also referred to as a linear phase-locked loop" (LPLL), "digital phase-locked loop" (DPLL), "all digital phase-locked loop" (ADPLL), and "software phase-locked loop" (SPLL).

 * Analog or linear PLL (APLL):Phase detector is an analog multiplier. Loop filter is active or passive. Uses a voltage-controlled oscillator (VCO). APLL is said to be a type II if its loop filter has transfer function with exactly one pole at the origin (see also Egan's conjecture on the pull-in range of type II APLL).
 * Digital PLL (DPLL): An analog PLL with a digital phase detector (such as XOR, edge-triggered JK flip flop, phase frequency detector). May have digital divider in the loop.
 * All digital PLL (ADPLL): Phase detector, filter and oscillator are digital. Uses a numerically controlled oscillator (NCO).
 * Neuronal PLL (NPLL): Phase detector is implemented by neuronal non-linearity, oscillator by rate-controlled oscillating neurons.
 * Software PLL (SPLL): Functional blocks are implemented by software rather than specialized hardware.
 * Charge-pump PLL (CP-PLL):CP-PLL is a modification of phase-locked loops with phase-frequency detector and square waveform signals. See also Gardner's conjecture on CP-PLL.

Performance parameters

 * Type and order.
 * Frequency ranges: hold-in range (tracking range), pull-in range (capture range, acquisition range), lock-in range. See also Gardner's problem on the lock-in range, Egan's conjecture on the pull-in range of type II APLL, Viterbi's problem on the PLL ranges coincidence.
 * Loop bandwidth: Defining the speed of the control loop.
 * Transient response: Like overshoot and settling time to a certain accuracy (like 50 ppm).
 * Steady-state errors: Like remaining phase or timing error.
 * Output spectrum purity: Like sidebands generated from a certain VCO tuning voltage ripple.
 * Phase-noise: Defined by noise energy in a certain frequency band (like 10 kHz offset from carrier). Highly dependent on VCO phase-noise, PLL bandwidth, etc.
 * General parameters: Such as power consumption, supply voltage range, output amplitude, etc.

Applications
Phase-locked loops are widely used for synchronization purposes; in space communications for coherent demodulation and threshold extension, bit synchronization, and symbol synchronization. Phase-locked loops can also be used to demodulate frequency-modulated signals. In radio transmitters, a PLL is used to synthesize new frequencies which are a multiple of a reference frequency, with the same stability as the reference frequency.

Other applications include:
 * Demodulation of frequency modulation (FM): If PLL is locked to an FM signal, the VCO tracks the instantaneous frequency of the input signal. The filtered error voltage which controls the VCO and maintains lock with the input signal is demodulated FM output. The VCO transfer characteristics determine the linearity of the demodulated out. Since the VCO used in an integrated-circuit PLL is highly linear, it is possible to realize highly linear FM demodulators.
 * Demodulation of frequency-shift keying (FSK): In digital data communication and computer peripherals, binary data is transmitted by means of a carrier frequency which is shifted between two preset frequencies.
 * Recovery of small signals that otherwise would be lost in noise (lock-in amplifier to track the reference frequency)
 * Recovery of clock timing information from a data stream such as from a disk drive
 * Clock multipliers in microprocessors that allow internal processor elements to run faster than external connections, while maintaining precise timing relationships
 * Demodulation of modems and other tone signals for telecommunications and remote control.
 * DSP of video signals; Phase-locked loops are also used to synchronize phase and frequency to the input analog video signal so it can be sampled and digitally processed
 * Atomic force microscopy in frequency modulation mode, to detect changes of the cantilever resonance frequency due to tip–surface interactions
 * DC motor drive

Clock recovery
Some data streams, especially high-speed serial data streams (such as the raw stream of data from the magnetic head of a disk drive), are sent without an accompanying clock. The receiver generates a clock from an approximate frequency reference, and then uses a PLL to phase-align it to the data stream's signal edges. This process is referred to as clock recovery. For this scheme to work, the data stream must have edges frequently-enough to correct any drift in the PLL's oscillator. Thus a line code with a hard upper bound on the maximum time between edges (e.g. 8b/10b encoding) is typically used to encode the data.

Deskewing
If a clock is sent in parallel with data, that clock can be used to sample the data. Because the clock must be received and amplified before it can drive the flip-flops which sample the data, there will be a finite, and process-, temperature-, and voltage-dependent delay between the detected clock edge and the received data window. This delay limits the frequency at which data can be sent. One way of eliminating this delay is to include a deskew PLL on the receive side, so that the clock at each data flip-flop is phase-matched to the received clock. In that type of application, a special form of a PLL called a delay-locked loop (DLL) is frequently used.

Clock generation
Many electronic systems include processors of various sorts that operate at hundreds of megahertz to gigahertz, well above the practical frequencies of crystal oscillators. Typically, the clocks supplied to these processors come from clock generator PLLs, which multiply a lower-frequency reference clock (usually 50 or 100 MHz) up to the operating frequency of the processor. The multiplication factor can be quite large in cases where the operating frequency is multiple gigahertz and the reference crystal is just tens or hundreds of megahertz.

Spread spectrum
All electronic systems emit some unwanted radio frequency energy. Various regulatory agencies (such as the FCC in the United States) put limits on the emitted energy and any interference caused by it. The emitted noise generally appears at sharp spectral peaks (usually at the operating frequency of the device, and a few harmonics). A system designer can use a spread-spectrum PLL to reduce interference with high-Q receivers by spreading the energy over a larger portion of the spectrum. For example, by changing the operating frequency up and down by a small amount (about 1%), a device running at hundreds of megahertz can spread its interference evenly over a few megahertz of spectrum, which drastically reduces the amount of noise seen on broadcast FM radio channels, which have a bandwidth of several tens of kilohertz.

Clock distribution
Typically, the reference clock enters the chip and drives a phase locked loop (PLL), which then drives the system's clock distribution. The clock distribution is usually balanced so that the clock arrives at every endpoint simultaneously. One of those endpoints is the PLL's feedback input. The function of the PLL is to compare the distributed clock to the incoming reference clock, and vary the phase and frequency of its output until the reference and feedback clocks are phase and frequency matched.

PLLs are ubiquitous—they tune clocks in systems several feet across, as well as clocks in small portions of individual chips. Sometimes the reference clock may not actually be a pure clock at all, but rather a data stream with enough transitions that the PLL is able to recover a regular clock from that stream. Sometimes the reference clock is the same frequency as the clock driven through the clock distribution, other times the distributed clock may be some rational multiple of the reference.

AM detection
A PLL may be used to synchronously demodulate amplitude modulated (AM) signals. The PLL recovers the phase and frequency of the incoming AM signal's carrier. The recovered phase at the VCO differs from the carrier's by 90°, so it is shifted in phase to match, and then fed to a multiplier. The output of the multiplier contains both the sum and the difference frequency signals, and the demodulated output is obtained by low-pass filtering. Since the PLL responds only to the carrier frequencies which are very close to the VCO output, a PLL AM detector exhibits a high degree of selectivity and noise immunity which is not possible with conventional peak type AM demodulators. However, the loop may lose lock where AM signals have 100% modulation depth.

Jitter and noise reduction
One desirable property of all PLLs is that the reference and feedback clock edges be brought into very close alignment. The average difference in time between the phases of the two signals when the PLL has achieved lock is called the static phase offset (also called the steady-state phase error). The variance between these phases is called tracking jitter. Ideally, the static phase offset should be zero, and the tracking jitter should be as low as possible.

Phase noise is another type of jitter observed in PLLs, and is caused by the oscillator itself and by elements used in the oscillator's frequency control circuit. Some technologies are known to perform better than others in this regard. The best digital PLLs are constructed with emitter-coupled logic (ECL) elements, at the expense of high power consumption. To keep phase noise low in PLL circuits, it is best to avoid saturating logic families such as transistor-transistor logic (TTL) or CMOS.

Another desirable property of all PLLs is that the phase and frequency of the generated clock be unaffected by rapid changes in the voltages of the power and ground supply lines, as well as the voltage of the substrate on which the PLL circuits are fabricated. This is called substrate and supply noise rejection. The higher the noise rejection, the better.

To further improve the phase noise of the output, an injection locked oscillator can be employed following the VCO in the PLL.

Frequency synthesis
In digital wireless communication systems (GSM, CDMA etc.), PLLs are used to provide the local oscillator up-conversion during transmission and down-conversion during reception. In most cellular handsets this function has been largely integrated into a single integrated circuit to reduce the cost and size of the handset. However, due to the high performance required of base station terminals, the transmission and reception circuits are built with discrete components to achieve the levels of performance required. GSM local oscillator modules are typically built with a frequency synthesizer integrated circuit and discrete resonator VCOs.

Phase angle reference
Grid-tie inverters based on voltage source inverters source or sink real power into the AC electric grid as a function of the phase angle of the voltage they generate relative to the grid's voltage phase angle, which is measured using a PLL. In photovoltaic applications, the more the sine wave produced leads the grid voltage wave, the more power is injected into the grid. For battery applications, the more the sine wave produced lags the grid voltage wave, the more the battery charges from the grid, and the more the sine wave produced leads the grid voltage wave, the more the battery discharges into the grid.

Block diagram
The block diagram shown in the figure shows an input signal, FI, which is used to generate an output, FO. The input signal is often called the reference signal (also abbreviated FREF).

At the input, a phase detector (shown as the Phase frequency detector and Charge pump blocks in the figure) compares two input signals, producing an error signal which is proportional to their phase difference. The error signal is then low-pass filtered and used to drive a VCO which creates an output phase. The output is fed through an optional divider back to the input of the system, producing a negative feedback loop. If the output phase drifts, the error signal will increase, driving the VCO phase in the opposite direction so as to reduce the error. Thus the output phase is locked to the phase of the input.

Analog phase locked loops are generally built with an analog phase detector, low-pass filter and VCO placed in a negative feedback configuration. A digital phase locked loop uses a digital phase detector; it may also have a divider in the feedback path or in the reference path, or both, in order to make the PLL's output signal frequency a rational multiple of the reference frequency. A non-integer multiple of the reference frequency can also be created by replacing the simple divide-by-N counter in the feedback path with a programmable pulse swallowing counter. This technique is usually referred to as a fractional-N synthesizer or fractional-N PLL.

The oscillator generates a periodic output signal. Assume that initially the oscillator is at nearly the same frequency as the reference signal. If the phase from the oscillator falls behind that of the reference, the phase detector changes the control voltage of the oscillator so that it speeds up. Likewise, if the phase creeps ahead of the reference, the phase detector changes the control voltage to slow down the oscillator. Since initially the oscillator may be far from the reference frequency, practical phase detectors may also respond to frequency differences, so as to increase the lock-in range of allowable inputs. Depending on the application, either the output of the controlled oscillator, or the control signal to the oscillator, provides the useful output of the PLL system.

Phase detector
A phase detector (PD) generates a voltage, which represents the phase difference between two signals. In a PLL, the two inputs of the phase detector are the reference input and the feedback from the VCO. The PD output voltage is used to control the VCO such that the phase difference between the two inputs is held constant, making it a negative feedback system.

Different types of phase detectors have different performance characteristics.

For instance, the frequency mixer produces harmonics that adds complexity in applications where spectral purity of the VCO signal is important. The resulting unwanted (spurious) sidebands, also called "reference spurs" can dominate the filter requirements and reduce the capture range well below or increase the lock time beyond the requirements. In these applications the more complex digital phase detectors are used which do not have as severe a reference spur component on their output. Also, when in lock, the steady-state phase difference at the inputs using this type of phase detector is near 90 degrees.

In PLL applications it is frequently required to know when the loop is out of lock. The more complex digital phase-frequency detectors usually have an output that allows a reliable indication of an out of lock condition.

An XOR gate is often used for digital PLLs as an effective yet simple phase detector. It can also be used in an analog sense with only slight modification to the circuitry.

Filter
The block commonly called the PLL loop filter (usually a low-pass filter) generally has two distinct functions.

The primary function is to determine loop dynamics, also called stability. This is how the loop responds to disturbances, such as changes in the reference frequency, changes of the feedback divider, or at startup. Common considerations are the range over which the loop can achieve lock (pull-in range, lock range or capture range), how fast the loop achieves lock (lock time, lock-up time or settling time) and damping behavior. Depending on the application, this may require one or more of the following: a simple proportion (gain or attenuation), an integral (low-pass filter) and/or derivative (high-pass filter). Loop parameters commonly examined for this are the loop's gain margin and phase margin. Common concepts in control theory including the PID controller are used to design this function.

The second common consideration is limiting the amount of reference frequency energy (ripple) appearing at the phase detector output that is then applied to the VCO control input. This frequency modulates the VCO and produces FM sidebands commonly called "reference spurs".

The design of this block can be dominated by either of these considerations, or can be a complex process juggling the interactions of the two. The typical trade-off of increasing the bandwidth is degraded stability. Conversely, the tradeoff of extra damping for better stability is reduced speed and increased settling time. Often the phase-noise is also affected.

Oscillator
All phase-locked loops employ an oscillator element with variable frequency capability. This can be an analog VCO either driven by analog circuitry in the case of an APLL or driven digitally through the use of a digital-to-analog converter as is the case for some DPLL designs. Pure digital oscillators such as a numerically controlled oscillator are used in ADPLLs.

Feedback path and optional divider
PLLs may include a divider between the oscillator and the feedback input to the phase detector to produce a frequency synthesizer. A programmable divider is particularly useful in radio transmitter applications and for computer clocking, since a large number of frequencies can be produced from a single stable, accurate, quartz crystal–controlled reference oscillator (which were expensive before commercial-scale hydrothermal synthesis provided cheap synthetic quartz).

Some PLLs also include a divider between the reference clock and the reference input to the phase detector. If the divider in the feedback path divides by $$N$$ and the reference input divider divides by $$M$$, it allows the PLL to multiply the reference frequency by $$N/M$$. It might seem simpler to just feed the PLL a lower frequency, but in some cases the reference frequency may be constrained by other issues, and then the reference divider is useful.

Frequency multiplication can also be attained by locking the VCO output to the Nth harmonic of the reference signal. Instead of a simple phase detector, the design uses a harmonic mixer (sampling mixer). The harmonic mixer turns the reference signal into an impulse train that is rich in harmonics. The VCO output is coarse tuned to be close to one of those harmonics. Consequently, the desired harmonic mixer output (representing the difference between the N harmonic and the VCO output) falls within the loop filter passband.

It should also be noted that the feedback is not limited to a frequency divider. This element can be other elements such as a frequency multiplier, or a mixer. The multiplier will make the VCO output a sub-multiple (rather than a multiple) of the reference frequency. A mixer can translate the VCO frequency by a fixed offset. It may also be a combination of these. For example, a divider following a mixer allows the divider to operate at a much lower frequency than the VCO without a loss in loop gain.

Time domain model of APLL
The equations governing a phase-locked loop with an analog multiplier as the phase detector and linear filter may be derived as follows. Let the input to the phase detector be $$f_1(\theta_1(t))$$ and the output of the VCO is $$f_2(\theta_2(t))$$ with phases $$\theta_1(t)$$ and $$\theta_2(t)$$. The functions $$f_1(\theta) $$ and $$f_2(\theta)$$ describe waveforms of signals. Then the output of the phase detector $$\varphi(t)$$ is given by

 * $$\varphi(t) = f_1(\theta_1(t)) f_2(\theta_2(t))$$

The VCO frequency is usually taken as a function of the VCO input $$g(t)$$ as
 * $$\dot\theta_2(t) = \omega_2(t) =

\omega_\text{free} + g_v g(t)\,$$ where $$g_v$$ is the sensitivity of the VCO and is expressed in Hz / V; $$\omega_\text{free}$$ is a free-running frequency of VCO.

The loop filter can be described by a system of linear differential equations

\begin{array}{rcl} \dot x & = & Ax + b \varphi(t), \\ g(t) & = & c^{*}x, \end{array} \quad x(0) = x_0, $$

where $$\varphi(t)$$ is an input of the filter, $$g(t)$$ is an output of the filter, $$A$$ is $$n$$-by-$$n$$ matrix, $$x \in \mathbb{C}^n,\quad b \in \mathbb{R}^n, \quad c \in \mathbb{C}^n, \quad$$. $$x_0 \in \mathbb{C}^n$$ represents an initial state of the filter. The star symbol is a conjugate transpose.

Hence the following system describes PLL
 * $$\begin{array}{rcl}

\dot x &= &Ax + b f_1(\theta_1(t)) f_2(\theta_2(t)),\\ \dot \theta_2 &= & \omega_\text{free} + g_v (c^{*}x) \\ \end{array} \quad x(0) = x_0, \quad \theta_2(0) = \theta_0. $$ where $$\theta_0$$ is an initial phase shift.

Phase domain model of APLL
Consider the input of PLL $$f_1(\theta_1(t))$$ and VCO output $$f_2(\theta_2(t))$$ are high frequency signals. Then for any piecewise differentiable $$2\pi$$-periodic functions $$f_1(\theta)$$ and $$f_2(\theta)$$ there is a function $$\varphi(\theta)$$ such that the output $$G(t)$$ of Filter
 * $$\begin{array}{rcl}

\dot x &= &Ax + b \varphi(\theta_1(t) - \theta_2(t)), \\ G(t) &= &c^{*}x, \end{array} \quad x(0) = x_0, $$ in phase domain is asymptotically equal (the difference $$G(t)- g(t)$$ is small with respect to the frequencies) to the output of the Filter in time domain model. Here function $$\varphi(\theta)$$ is a phase detector characteristic.

Denote by $$\theta_{\Delta}(t)$$ the phase difference
 * $$\theta_{\Delta} = \theta_1(t) - \theta_2(t).$$

Then the following dynamical system describes PLL behavior

 * $$\begin{array}{rcl}

\dot x &= &Ax + b \varphi(\theta_{\Delta}),\\ \dot \theta_{\Delta} &= & \omega_{\Delta} - g_v (c^{*}x). \\ \end{array} \quad x(0) = x_0, \quad \theta_{\Delta}(0) = \theta_{1}(0) - \theta_2(0). $$

Here $$\omega_{\Delta} = \omega_1 - \omega_\text{free}$$; $$\omega_1$$ is the frequency of a reference oscillator (we assume that $$\omega_\text{free}$$ is constant).

Example
Consider sinusoidal signals

 * $$f_1(\theta_1(t)) = A_1 \sin(\theta_1(t)), \quad f_2(\theta_2(t))

= A_2\cos(\theta_2(t))$$

and a simple one-pole RC circuit as a filter. The time-domain model takes the form

 * $$\begin{align}

\dot x &= -\frac{1}{RC}x + \frac{1}{RC} A_1A_2\sin(\theta_1(t)) \cos(\theta_2(t)),\\[6pt] \dot \theta_2 &= \omega_\text{free} + g_v (c^{*}x) \end{align} $$

PD characteristics for this signals is equal to

\varphi(\theta_1 - \theta_2) = \frac{A_1 A_2}{2}\sin(\theta_1 - \theta_2) $$

Hence the phase domain model takes the form

 * $$\begin{align}

\dot x &= -\frac{1}{RC}x + \frac{1}{RC}\frac{A_1 A_2}{2}\sin(\theta_{\Delta}),\\[6pt] \dot \theta_{\Delta} &= \omega_{\Delta} - g_v (c^{*}x). \end{align} $$

This system of equations is equivalent to the equation of mathematical pendulum

\begin{align} x & = \frac{\dot\theta_2 - \omega_2}{g_v c^*} = \frac{\omega_1 - \dot\theta_{\Delta} - \omega_2}{g_v c^*},\\[6pt] \dot x & = \frac{\ddot\theta_2}{g_v c^*},\\[6pt] \theta_1 & = \omega_1 t + \Psi,\\[6pt] \theta_{\Delta} & = \theta_1 -\theta_2,\\[6pt] \dot\theta_{\Delta} & = \dot\theta_1 - \dot\theta_2 = \omega_1 - \dot\theta_2,\\[6pt] & \frac{1}{g_v c^*}\ddot\theta_{\Delta} - \frac{1}{g_v c^* RC}\dot\theta_{\Delta} - \frac{A_1A_2}{2RC}\sin\theta_{\Delta} = \frac{\omega_2 - \omega_1}{g_v c^* RC}. \end{align} $$

Linearized phase domain model
Phase locked loops can also be analyzed as control systems by applying the Laplace transform. The loop response can be written as

 * $$\frac{\theta_o}{\theta_i} = \frac{K_p K_v F(s)} {s + K_p K_v F(s)}$$

Where
 * $$\theta_o$$ is the output phase in radians
 * $$\theta_i$$ is the input phase in radians
 * $$K_p$$ is the phase detector gain in volts per radian
 * $$K_v$$ is the VCO gain in radians per volt-second
 * $$F(s)$$ is the loop filter transfer function (dimensionless)

The loop characteristics can be controlled by inserting different types of loop filters. The simplest filter is a one-pole RC circuit. The loop transfer function in this case is

 * $$F(s) = \frac{1}{1 + s R C}$$

The loop response becomes:

 * $$\frac{\theta_o}{\theta_i} = \frac{\frac{K_p K_v}{R C}}{s^2 + \frac{s}{R C} + \frac{K_p K_v}{R C}}$$

This is the form of a classic harmonic oscillator. The denominator can be related to that of a second order system:

 * $$s^2 + 2 s \zeta \omega_n + \omega_n^2$$

where $$\zeta$$ is the damping factor and $$\omega_n$$ is the natural frequency of the loop.

For the one-pole RC filter,

 * $$\omega_n = \sqrt{\frac{K_p K_v}{R C}}$$
 * $$\zeta = \frac{1}{2 \sqrt{K_p K_v R C}}$$

The loop natural frequency is a measure of the response time of the loop, and the damping factor is a measure of the overshoot and ringing. Ideally, the natural frequency should be high and the damping factor should be near 0.707 (critical damping). With a single pole filter, it is not possible to control the loop frequency and damping factor independently. For the case of critical damping,

 * $$R C = \frac{1}{2 K_p K_v}$$
 * $$\omega_c = K_p K_v \sqrt{2}$$

A slightly more effective filter, the lag-lead filter includes one pole and one zero. This can be realized with two resistors and one capacitor. The transfer function for this filter is

 * $$F(s) = \frac{1+s C R_2}{1+s C (R_1+R_2)}$$

This filter has two time constants

 * $$\tau_1 = C (R_1 + R_2)$$
 * $$\tau_2 = C R_2$$

Substituting above yields the following natural frequency and damping factor

 * $$\omega_n = \sqrt{\frac{K_p K_v}{\tau_1}}$$
 * $$\zeta = \frac{1}{2 \omega_n \tau_1} + \frac{\omega_n \tau_2}{2}$$

The loop filter components can be calculated independently for a given natural frequency and damping factor

 * $$\tau_1 = \frac{K_p K_v}{\omega_n^2}$$
 * $$\tau_2 = \frac{2 \zeta}{\omega_n} - \frac{1}{K_p K_v}$$

Real world loop filter design can be much more complex e.g. using higher order filters to reduce various types or source of phase noise. (See the D Banerjee ref below)

Implementing a digital phase-locked loop in software
Digital phase locked loops can be implemented in hardware, using integrated circuits such as a CMOS 4046. However, with microcontrollers becoming faster, it may make sense to implement a phase locked loop in software for applications that do not require locking onto signals in the MHz range or faster, such as precisely controlling motor speeds. Software implementation has several advantages including easy customization of the feedback loop including changing the multiplication or division ratio between the signal being tracked and the output oscillator. Furthermore, a software implementation is useful to understand and experiment with. As an example of a phase-locked loop implemented using a phase frequency detector is presented in MATLAB, as this type of phase detector is robust and easy to implement.

In this example, an array  is assumed to contain a reference signal to be tracked. The oscillator is implemented by a counter, with the most significant bit of the counter indicating the on/off status of the oscillator. This code simulates the two D-type flip-flops that comprise a phase-frequency comparator. When either the reference or signal has a positive edge, the corresponding flip-flop switches high. Once both reference and signal is high, both flip-flops are reset. Which flip-flop is high determines at that instant whether the reference or signal leads the other. The error signal is the difference between these two flip-flop values. The pole-zero filter is implemented by adding the error signal and its derivative to the filtered error signal. This in turn is integrated to find the oscillator frequency.

In practice, one would likely insert other operations into the feedback of this phase-locked loop. For example, if the phase locked loop were to implement a frequency multiplier, the oscillator signal could be divided in frequency before it is compared to the reference signal.

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title: Phase-locked loop


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Phase noise

In signal processing, phase noise is the frequency-domain representation of random fluctuations in the phase of a waveform, corresponding to time-domain deviations from perfect periodicity (jitter). Generally speaking, radio-frequency engineers speak of the phase noise of an oscillator, whereas digital-system engineers work with the jitter of a clock.

Definitions
Historically there have been two conflicting yet widely used definitions for phase noise. Some authors define phase noise to be the spectral density of a signal's phase only, while the other definition refers to the phase spectrum (which pairs up with the amplitude spectrum) resulting from the spectral estimation of the signal itself. Both definitions yield the same result at offset frequencies well removed from the carrier. At close-in offsets however, the two definitions differ.

The IEEE defines phase noise as $ℒ(f) = S_{φ}(f)/2$ where the "phase instability" $S_{φ}(f)$ is the one-sided spectral density of a signal's phase deviation. Although $S_{φ}(f)$ is a one-sided function, it represents "the double-sideband spectral density of phase fluctuation". The symbol $ℒ(f)$ is called a (capital or uppercase) script L.

Background
An ideal oscillator would generate a pure sine wave. In the frequency domain, this would be represented as a single pair of Dirac delta functions (positive and negative conjugates) at the oscillator's frequency; i.e., all the signal's power is at a single frequency. All real oscillators have phase modulated noise components. The phase noise components spread the power of a signal to adjacent frequencies, resulting in noise sidebands. Oscillator phase noise often includes low frequency flicker noise and may include white noise.

Consider the following noise-free signal:

Phase noise is added to this signal by adding a stochastic process represented by φ to the signal as follows:

Phase noise is a type of cyclostationary noise and is closely related to jitter, a particularly important type of phase noise that is produced by oscillators.

Phase noise ($ℒ$) is typically expressed in units of dBc/Hz, and it represents the noise power relative to the carrier contained in a 1 Hz bandwidth centered at a certain offsets from the carrier. For example, a certain signal may have a phase noise of −80 dBc/Hz at an offset of 10 kHz and −95 dBc/Hz at an offset of 100 kHz. Phase noise can be measured and expressed as single-sideband or double-sideband values, but as noted earlier, the IEEE has adopted the definition as one-half of the double-sideband PSD.

Jitter conversions
Phase noise is sometimes also measured and expressed as a power obtained by integrating $v(t) = Acos(2πf_{0}t)$ over a certain range of offset frequencies. For example, the phase noise may be −40 dBc integrated over the range of 1 kHz to 100 kHz. This integrated phase noise (expressed in degrees) can be converted to jitter (expressed in seconds) using the following formula:
 * $$\text{jitter (seconds}) = \frac{\text{phase error (} {}^\circ \text{)}}{360^\circ \times \text{frequency (hertz)}}$$

In the absence of 1/f noise in a region where the phase noise displays a –20dBc/decade slope (Leeson's equation), the RMS cycle jitter can be related to the phase noise by:
 * $$\sigma^2_c = \frac{f^2 \mathcal{L}\left(f\right)}{f_\text{osc}^3}$$

Likewise:
 * $$\mathcal{L}\left(f\right) = \frac{f_\text{osc}^3 \sigma_c^2}{f^2}$$

Measurement
Phase noise can be measured using a spectrum analyzer if the phase noise of the device under test (DUT) is large with respect to the spectrum analyzer's local oscillator. Care should be taken that observed values are due to the measured signal and not the shape factor of the spectrum analyzer's filters. Spectrum analyzer based measurement can show the phase-noise power over many decades of frequency; e.g., 1 Hz to 10 MHz. The slope with offset frequency in various offset frequency regions can provide clues as to the source of the noise; e.g., low frequency flicker noise decreasing at 30 dB per decade (= 9 dB per octave).

Phase noise measurement systems are alternatives to spectrum analyzers. These systems may use internal and external references and allow measurement of both residual (additive) and absolute noise. Additionally, these systems can make low-noise, close-to-the-carrier, measurements.

Spectral purity
The sinewave output of an ideal oscillator is a single line in the frequency spectrum. Such perfect spectral purity is not achievable in a practical oscillator. Spreading of the spectrum line caused by phase noise must be minimised in the local oscillator for a superheterodyne receiver because it defeats the aim of restricting the receiver frequency range by filters in the IF (intermediate frequency) amplifier.

title: Phase noise


text:
Phase perturbation

Phase perturbation is the shifting, from whatever cause, in the phase of an electronic signal. The shifting is often quite rapid, and may appear to be random or cyclic. The phase departure in phase perturbation usually is larger, but less rapid, than in phase jitter.

Phase perturbation may be expressed in degrees, with any cyclic component expressed in hertz.

title: Phase perturbation


text:
Phase-shift keying

Phase-shift keying (PSK) is a digital modulation process which conveys data by changing (modulating) the phase of a constant frequency carrier wave. The modulation is accomplished by varying the sine and cosine inputs at a precise time. It is widely used for wireless LANs, RFID and Bluetooth communication.

Any digital modulation scheme uses a finite number of distinct signals to represent digital data. PSK uses a finite number of phases, each assigned a unique pattern of binary digits. Usually, each phase encodes an equal number of bits. Each pattern of bits forms the symbol that is represented by the particular phase. The demodulator, which is designed specifically for the symbol-set used by the modulator, determines the phase of the received signal and maps it back to the symbol it represents, thus recovering the original data. This requires the receiver to be able to compare the phase of the received signal to a reference signal – such a system is termed coherent (and referred to as CPSK).

CPSK requires a complicated demodulator, because it must extract the reference wave from the received signal and keep track of it, to compare each sample to. Alternatively, the phase shift of each symbol sent can be measured with respect to the phase of the previous symbol sent. Because the symbols are encoded in the difference in phase between successive samples, this is called differential phase-shift keying (DPSK). DPSK can be significantly simpler to implement than ordinary PSK, as it is a 'non-coherent' scheme, i.e. there is no need for the demodulator to keep track of a reference wave. A trade-off is that it has more demodulation errors.

Introduction
There are three major classes of digital modulation techniques used for transmission of digitally represented data:

 * Amplitude-shift keying (ASK)
 * Frequency-shift keying (FSK)
 * Phase-shift keying (PSK)

All convey data by changing some aspect of a base signal, the carrier wave (usually a sinusoid), in response to a data signal. In the case of PSK, the phase is changed to represent the data signal. There are two fundamental ways of utilizing the phase of a signal in this way:

 * By viewing the phase itself as conveying the information, in which case the demodulator must have a reference signal to compare the received signal's phase against; or
 * By viewing the change in the phase as conveying information – differential schemes, some of which do not need a reference carrier (to a certain extent).

A convenient method to represent PSK schemes is on a constellation diagram. This shows the points in the complex plane where, in this context, the real and imaginary axes are termed the in-phase and quadrature axes respectively due to their 90° separation. Such a representation on perpendicular axes lends itself to straightforward implementation. The amplitude of each point along the in-phase axis is used to modulate a cosine (or sine) wave and the amplitude along the quadrature axis to modulate a sine (or cosine) wave. By convention, in-phase modulates cosine and quadrature modulates sine.

In PSK, the constellation points chosen are usually positioned with uniform angular spacing around a circle. This gives maximum phase-separation between adjacent points and thus the best immunity to corruption. They are positioned on a circle so that they can all be transmitted with the same energy. In this way, the moduli of the complex numbers they represent will be the same and thus so will the amplitudes needed for the cosine and sine waves. Two common examples are "binary phase-shift keying" (BPSK) which uses two phases, and "quadrature phase-shift keying" (QPSK) which uses four phases, although any number of phases may be used. Since the data to be conveyed are usually binary, the PSK scheme is usually designed with the number of constellation points being a power of two.

Binary phase-shift keying (BPSK)

BPSK (also sometimes called PRK, phase reversal keying, or 2PSK) is the simplest form of phase shift keying (PSK). It uses two phases which are separated by 180° and so can also be termed 2-PSK. It does not particularly matter exactly where the constellation points are positioned, and in this figure they are shown on the real axis, at 0° and 180°. Therefore, it handles the highest noise level or distortion before the demodulator reaches an incorrect decision. That makes it the most robust of all the PSKs. It is, however, only able to modulate at 1bit/symbol (as seen in the figure) and so is unsuitable for high data-rate applications.

In the presence of an arbitrary phase-shift introduced by the communications channel, the demodulator (see, e.g. Costas loop) is unable to tell which constellation point is which. As a result, the data is often differentially encoded prior to modulation.

BPSK is functionally equivalent to 2-QAM modulation.

Implementation
The general form for BPSK follows the equation:

 * $$s_n(t) =  \sqrt{\frac{2E_b}{T_b}} \cos(2 \pi f t + \pi(1-n )),\quad n = 0,1. $$

This yields two phases, 0 and π. In the specific form, binary data is often conveyed with the following signals:

 * $$s_0(t) =  \sqrt{\frac{2E_b}{T_b}} \cos(2 \pi f t + \pi )

= - \sqrt{\frac{2E_b}{T_b}} \cos(2 \pi f t)$$ for binary "0"
 * $$s_1(t) = \sqrt{\frac{2E_b}{T_b}} \cos(2 \pi f t) $$ for binary "1"

where f is the frequency of the base band.

Hence, the signal space can be represented by the single basis function

 * $$\phi(t) = \sqrt{\frac{2}{T_b}} \cos(2 \pi f t) $$

where 1 is represented by $$\sqrt{E_b} \phi(t)$$ and 0 is represented by $$-\sqrt{E_b} \phi(t)$$. This assignment is arbitrary.

This use of this basis function is shown at the end of the next section in a signal timing diagram. The topmost signal is a BPSK-modulated cosine wave that the BPSK modulator would produce. The bit-stream that causes this output is shown above the signal (the other parts of this figure are relevant only to QPSK). After modulation, the base band signal will be moved to the high frequency band by multiplying $$ \cos(2 \pi f_c t)$$.

Bit error rate
The bit error rate (BER) of BPSK under additive white Gaussian noise (AWGN) can be calculated as:

 * $$P_b = Q\left(\sqrt{\frac{2 E_b}{N_0}}\right)$$ or $$P_e = \frac{1}{2} \operatorname{erfc} \left( \sqrt{\frac{E_b}{N_0}}\right)$$

Since there is only one bit per symbol, this is also the symbol error rate.

Quadrature phase-shift keying (QPSK)

Sometimes this is known as quadriphase PSK, 4-PSK, or 4-QAM. (Although the root concepts of QPSK and 4-QAM are different, the resulting modulated radio waves are exactly the same.) QPSK uses four points on the constellation diagram, equispaced around a circle. With four phases, QPSK can encode two bits per symbol, shown in the diagram with Gray coding to minimize the bit error rate (BER) – sometimes misperceived as twice the BER of BPSK.

The mathematical analysis shows that QPSK can be used either to double the data rate compared with a BPSK system while maintaining the same bandwidth of the signal, or to maintain the data-rate of BPSK but halving the bandwidth needed. In this latter case, the BER of QPSK is exactly the same as the BER of BPSK – and believing differently is a common confusion when considering or describing QPSK. The transmitted carrier can undergo numbers of phase changes.

Given that radio communication channels are allocated by agencies such as the Federal Communications Commission giving a prescribed (maximum) bandwidth, the advantage of QPSK over BPSK becomes evident: QPSK transmits twice the data rate in a given bandwidth compared to BPSK - at the same BER. The engineering penalty that is paid is that QPSK transmitters and receivers are more complicated than the ones for BPSK. However, with modern electronics technology, the penalty in cost is very moderate.

As with BPSK, there are phase ambiguity problems at the receiving end, and differentially encoded QPSK is often used in practice.

Implementation
The implementation of QPSK is more general than that of BPSK and also indicates the implementation of higher-order PSK. Writing the symbols in the constellation diagram in terms of the sine and cosine waves used to transmit them:

 * $$s_n(t) = \sqrt{\frac{2E_s}{T_s}} \cos \left(2 \pi f_c t + (2n - 1)\frac{\pi}{4}\right),\quad n = 1, 2, 3, 4.$$

This yields the four phases π/4, 3π/4, 5π/4 and 7π/4 as needed.

This results in a two-dimensional signal space with unit basis functions

 * $$\begin{align}

\phi_1(t) &= \sqrt{\frac{2}{T_s}} \cos\left(2\pi f_c t\right) \\ \phi_2(t) &= \sqrt{\frac{2}{T_s}} \sin\left(2\pi f_c t\right) \end{align}$$

The first basis function is used as the in-phase component of the signal and the second as the quadrature component of the signal.

Hence, the signal constellation consists of the signal-space 4 points

 * $$\begin{pmatrix} \pm\sqrt{\frac{E_s}{2}} & \pm\sqrt{\frac{E_s}{2}} \end{pmatrix}.$$

The factors of 1/2 indicate that the total power is split equally between the two carriers.

Comparing these basis functions with that for BPSK shows clearly how QPSK can be viewed as two independent BPSK signals. Note that the signal-space points for BPSK do not need to split the symbol (bit) energy over the two carriers in the scheme shown in the BPSK constellation diagram.

QPSK systems can be implemented in a number of ways. An illustration of the major components of the transmitter and receiver structure are shown below.

Probability of error
Although QPSK can be viewed as a quaternary modulation, it is easier to see it as two independently modulated quadrature carriers. With this interpretation, the even (or odd) bits are used to modulate the in-phase component of the carrier, while the odd (or even) bits are used to modulate the quadrature-phase component of the carrier. BPSK is used on both carriers and they can be independently demodulated.

As a result, the probability of bit-error for QPSK is the same as for BPSK:
 * $$P_b = Q\left(\sqrt{\frac{2E_b}{N_0}}\right)$$

However, in order to achieve the same bit-error probability as BPSK, QPSK uses twice the power (since two bits are transmitted simultaneously).

The symbol error rate is given by:

\begin{align} P_s &= 1 - \left( 1 - P_b \right)^2 \\ &= 2Q\left( \sqrt{\frac{E_s}{N_0}} \right) - \left[ Q \left( \sqrt{\frac{E_s}{N_0}} \right) \right]^2. \end{align} $$

If the signal-to-noise ratio is high (as is necessary for practical QPSK systems) the probability of symbol error may be approximated:

 * $$P_s \approx 2 Q \left( \sqrt{\frac{E_s}{N_0}} \right ) = \operatorname{erfc} \left( \sqrt{\frac{E_s}{2N_0}} \right) = \operatorname{erfc} \left( \sqrt{\frac{E_b}{N_0}} \right)$$

The modulated signal is shown below for a short segment of a random binary data-stream. The two carrier waves are a cosine wave and a sine wave, as indicated by the signal-space analysis above. Here, the odd-numbered bits have been assigned to the in-phase component and the even-numbered bits to the quadrature component (taking the first bit as number 1). The total signal – the sum of the two components –  is shown at the bottom. Jumps in phase can be seen as the PSK changes the phase on each component at the start of each bit-period. The topmost waveform alone matches the description given for BPSK above.

The binary data that is conveyed by this waveform is: 11000110.
 * The odd bits, highlighted here, contribute to the in-phase component: 1010
 * The even bits, highlighted here, contribute to the quadrature-phase component: 1001

Offset QPSK (OQPSK)

Offset quadrature phase-shift keying (OQPSK) is a variant of phase-shift keying modulation using four different values of the phase to transmit. It is sometimes called staggered quadrature phase-shift keying (SQPSK).

Taking four values of the phase (two bits) at a time to construct a QPSK symbol can allow the phase of the signal to jump by as much as 180° at a time. When the signal is low-pass filtered (as is typical in a transmitter), these phase-shifts result in large amplitude fluctuations, an undesirable quality in communication systems. By offsetting the timing of the odd and even bits by one bit-period, or half a symbol-period, the in-phase and quadrature components will never change at the same time. In the constellation diagram shown on the right, it can be seen that this will limit the phase-shift to no more than 90° at a time. This yields much lower amplitude fluctuations than non-offset QPSK and is sometimes preferred in practice.

The picture on the right shows the difference in the behavior of the phase between ordinary QPSK and OQPSK. It can be seen that in the first plot the phase can change by 180° at once, while in OQPSK the changes are never greater than 90°.

The modulated signal is shown below for a short segment of a random binary data-stream. Note the half symbol-period offset between the two component waves. The sudden phase-shifts occur about twice as often as for OQPSK (since the signals no longer change together), but they are less severe. In other words, the magnitude of jumps is smaller in OQPSK when compared to QPSK.

SOQPSK
The license-free shaped-offset QPSK (SOQPSK) is interoperable with Feher-patented QPSK (FQPSK), in the sense that an integrate-and-dump offset QPSK detector produces the same output no matter which kind of transmitter is used.

These modulations carefully shape the I and Q waveforms such that they change very smoothly, and the signal stays constant-amplitude even during signal transitions. (Rather than traveling instantly from one symbol to another, or even linearly, it travels smoothly around the constant-amplitude circle from one symbol to the next.) SOQPSK modulation can be represented as the hybrid of QPSK and MSK: SOQPSK has the same signal constellation as QPSK, however the phase of SOQPSK is always stationary.

The standard description of SOQPSK-TG involves ternary symbols. SOQPSK is one of the most spread modulation schemes in application to LEO satellite communications.

π/4-QPSK

This variant of QPSK uses two identical constellations which are rotated by 45° ($$\pi/4$$ radians, hence the name) with respect to one another. Usually, either the even or odd symbols are used to select points from one of the constellations and the other symbols select points from the other constellation. This also reduces the phase-shifts from a maximum of 180°, but only to a maximum of 135° and so the amplitude fluctuations of $$\pi/4$$-QPSK are between OQPSK and non-offset QPSK.

One property this modulation scheme possesses is that if the modulated signal is represented in the complex domain, transitions between symbols never pass through 0. In other words, the signal does not pass through the origin. This lowers the dynamical range of fluctuations in the signal which is desirable when engineering communications signals.

On the other hand, $$\pi/4$$-QPSK lends itself to easy demodulation and has been adopted for use in, for example, TDMA cellular telephone systems.

The modulated signal is shown below for a short segment of a random binary data-stream. The construction is the same as above for ordinary QPSK. Successive symbols are taken from the two constellations shown in the diagram. Thus, the first symbol (1 1) is taken from the "blue" constellation and the second symbol (0 0) is taken from the "green" constellation. Note that magnitudes of the two component waves change as they switch between constellations, but the total signal's magnitude remains constant (constant envelope). The phase-shifts are between those of the two previous timing-diagrams.

DPQPSK
Dual-polarization quadrature phase shift keying (DPQPSK) or dual-polarization QPSK - involves the polarization multiplexing of two different QPSK signals, thus improving the spectral efficiency by a factor of 2. This is a cost-effective alternative to utilizing 16-PSK, instead of QPSK to double the spectral efficiency.

Higher-order PSK

Any number of phases may be used to construct a PSK constellation but 8-PSK is usually the highest order PSK constellation deployed. With more than 8 phases, the error-rate becomes too high and there are better, though more complex, modulations available such as quadrature amplitude modulation (QAM). Although any number of phases may be used, the fact that the constellation must usually deal with binary data means that the number of symbols is usually a power of 2 to allow an integer number of bits per symbol.

Bit error rate
For the general M-PSK there is no simple expression for the symbol-error probability if $$M > 4$$. Unfortunately, it can only be obtained from

 * $$P_s = 1 - \int_{-\pi/M}^{\pi/M} p_{\theta_r}\left(\theta_r\right)d\theta_r,$$

where

 * $$\begin{align}

p_{\theta_r} \left(\theta_r\right) &= \frac{1}{2\pi} e^{-2\gamma_s\sin^2\theta_r} \int_0^\infty V e^{-\frac{1}{2}\left(V - 2\sqrt{\gamma_s}\cos\theta_r\right)^2}\,dV,\\ V &= \sqrt{r_1^2 + r_2^2},\\ \theta_r &= \tan^{-1}\left(\frac{r_2}{r_1}\right),\\ \gamma_s &= \frac{E_s}{N_0} \end{align}$$ and $$r_1 \sim N\left(\sqrt{E_s}, \frac{1}{2}N_0\right)$$ and $$r_2 \sim N\left(0, \frac{1}{2} N_0\right)$$ are each Gaussian random variables.

This may be approximated for high $$M$$ and high $$E_b/N_0$$ by:

 * $$P_s \approx 2Q\left(\sqrt{2\gamma_s}\sin\frac{\pi}{M}\right). $$

The bit-error probability for $$M$$-PSK can only be determined exactly once the bit-mapping is known. However, when Gray coding is used, the most probable error from one symbol to the next produces only a single bit-error and

 * $$P_b \approx \frac{1}{k} P_s. $$

(Using Gray coding allows us to approximate the Lee distance of the errors as the Hamming distance of the errors in the decoded bitstream, which is easier to implement in hardware.)

The graph on the right compares the bit-error rates of BPSK, QPSK (which are the same, as noted above), 8-PSK and 16-PSK. It is seen that higher-order modulations exhibit higher error-rates; in exchange however they deliver a higher raw data-rate.

Bounds on the error rates of various digital modulation schemes can be computed with application of the union bound to the signal constellation.

Spectral efficiency
Bandwidth (or spectral) efficiency of M-PSK modulation schemes increases with increasing of modulation order M (unlike, for example, M-FSK):

 * $$\rho = \frac{\log_2M}{2} \quad [(\text{bits}/\text{s}) / \text{Hz}]$$

The same relationship holds true for M-QAM.

Differential encoding
Differential phase shift keying (DPSK) is a common form of phase modulation that conveys data by changing the phase of the carrier wave. As mentioned for BPSK and QPSK there is an ambiguity of phase if the constellation is rotated by some effect in the communications channel through which the signal passes. This problem can be overcome by using the data to change rather than set the phase.

For example, in differentially encoded BPSK a binary "1" may be transmitted by adding 180° to the current phase and a binary "0" by adding 0° to the current phase. Another variant of DPSK is Symmetric Differential Phase Shift keying, SDPSK, where encoding would be +90° for a "1" and −90° for a "0".

In differentially encoded QPSK (DQPSK), the phase-shifts are 0°, 90°, 180°, −90° corresponding to data "00", "01", "11", "10". This kind of encoding may be demodulated in the same way as for non-differential PSK but the phase ambiguities can be ignored. Thus, each received symbol is demodulated to one of the $$M$$ points in the constellation and a comparator then computes the difference in phase between this received signal and the preceding one. The difference encodes the data as described above. Symmetric differential quadrature phase shift keying (SDQPSK) is like DQPSK, but encoding is symmetric, using phase shift values of −135°, −45°, +45° and +135°.

The modulated signal is shown below for both DBPSK and DQPSK as described above. In the figure, it is assumed that the signal starts with zero phase, and so there is a phase shift in both signals at $$t = 0$$.

Analysis shows that differential encoding approximately doubles the error rate compared to ordinary $$M$$-PSK but this may be overcome by only a small increase in $$E_b/N_0$$. Furthermore, this analysis (and the graphical results below) are based on a system in which the only corruption is additive white Gaussian noise (AWGN). However, there will also be a physical channel between the transmitter and receiver in the communication system. This channel will, in general, introduce an unknown phase-shift to the PSK signal; in these cases the differential schemes can yield a better error-rate than the ordinary schemes which rely on precise phase information.

One of the most popular applications of DPSK is the Bluetooth standard where $$\pi/4$$-DQPSK and 8-DPSK were implemented.

Demodulation

For a signal that has been differentially encoded, there is an obvious alternative method of demodulation. Instead of demodulating as usual and ignoring carrier-phase ambiguity, the phase between two successive received symbols is compared and used to determine what the data must have been. When differential encoding is used in this manner, the scheme is known as differential phase-shift keying (DPSK). Note that this is subtly different from just differentially encoded PSK since, upon reception, the received symbols are not decoded one-by-one to constellation points but are instead compared directly to one another.

Call the received symbol in the $$k$$th timeslot $$r_k$$ and let it have phase $$\phi_k$$. Assume without loss of generality that the phase of the carrier wave is zero. Denote the additive white Gaussian noise (AWGN) term as $$n_k$$. Then

 * $$r_k = \sqrt{E_s}e^{j\phi_k} + n_k.$$

The decision variable for the $$k-1$$th symbol and the $$k$$th symbol is the phase difference between $$r_k$$ and $$r_{k-1}$$. That is, if $$r_k$$ is projected onto $$r_{k-1}$$, the decision is taken on the phase of the resultant complex number:

 * $$r_kr_{k-1}^* = E_se^{j\left(\varphi_k - \varphi_{k-1}\right)} + \sqrt{E_s}e^{j\varphi_k}n_{k-1}^* + \sqrt{E_s}e^{-j\varphi_{k-1}}n_k + n_kn_{k-1}^*$$

where superscript * denotes complex conjugation. In the absence of noise, the phase of this is $$\phi_{k}-\phi_{k-1}$$, the phase-shift between the two received signals which can be used to determine the data transmitted.

The probability of error for DPSK is difficult to calculate in general, but, in the case of DBPSK it is:

 * $$P_b = \frac{1}{2}e^{-\frac{E_b}{N_0}},$$

which, when numerically evaluated, is only slightly worse than ordinary BPSK, particularly at higher $$E_b/N_0$$ values.

Using DPSK avoids the need for possibly complex carrier-recovery schemes to provide an accurate phase estimate and can be an attractive alternative to ordinary PSK.

In optical communications, the data can be modulated onto the phase of a laser in a differential way. The modulation is a laser which emits a continuous wave, and a Mach–Zehnder modulator which receives electrical binary data. For the case of BPSK, the laser transmits the field unchanged for binary '1', and with reverse polarity for '0'. The demodulator consists of a delay line interferometer which delays one bit, so two bits can be compared at one time. In further processing, a photodiode is used to transform the optical field into an electric current, so the information is changed back into its original state.

The bit-error rates of DBPSK and DQPSK are compared to their non-differential counterparts in the graph to the right. The loss for using DBPSK is small enough compared to the complexity reduction that it is often used in communications systems that would otherwise use BPSK. For DQPSK though, the loss in performance compared to ordinary QPSK is larger and the system designer must balance this against the reduction in complexity.

Example: Differentially encoded BPSK

At the $$k^{\textrm{th}}$$ time-slot call the bit to be modulated $$b_k$$, the differentially encoded bit $$e_k$$ and the resulting modulated signal $$m_k(t)$$. Assume that the constellation diagram positions the symbols at ±1 (which is BPSK). The differential encoder produces:

 * $$\,e_k = e_{k-1} \oplus b_k$$

where $$\oplus{}$$ indicates binary or modulo-2 addition.

So $$e_k$$ only changes state (from binary "0" to binary "1" or from binary "1" to binary "0") if $$b_k$$ is a binary "1". Otherwise it remains in its previous state. This is the description of differentially encoded BPSK given above.

The received signal is demodulated to yield $$e_k = \pm 1$$ and then the differential decoder reverses the encoding procedure and produces

 * $$b_k = e_k \oplus e_{k-1},$$

since binary subtraction is the same as binary addition.

Therefore, $$b_k=1$$ if $$e_k$$ and $$e_{k-1}$$ differ and $$b_k=0$$ if they are the same. Hence, if both $$e_k$$ and $$e_{k-1}$$ are inverted, $$b_k$$ will still be decoded correctly. Thus, the 180° phase ambiguity does not matter.

Differential schemes for other PSK modulations may be devised along similar lines. The waveforms for DPSK are the same as for differentially encoded PSK given above since the only change between the two schemes is at the receiver.

The BER curve for this example is compared to ordinary BPSK on the right. As mentioned above, whilst the error rate is approximately doubled, the increase needed in $$E_b/N_0$$ to overcome this is small. The increase in $$E_b/N_0$$ required to overcome differential modulation in coded systems, however, is larger – typically about 3 dB. The performance degradation is a result of noncoherent transmission – in this case it refers to the fact that tracking of the phase is completely ignored.

Definitions
For determining error-rates mathematically, some definitions will be needed:

 * $$E_b$$,           energy per bit
 * $$E_s = nE_b$$,    energy per symbol with n bits
 * $$T_b$$,           bit duration
 * $$T_s$$,           symbol duration
 * $$\frac{1}{2}N_0$$, noise power spectral density (W/Hz)
 * $$P_b$$,           probability of bit-error
 * $$P_s$$,           probability of symbol-error

$$Q(x)$$ will give the probability that a single sample taken from a random process with zero-mean and unit-variance Gaussian probability density function will be greater or equal to $$x$$. It is a scaled form of the complementary Gaussian error function:

 * $$Q(x) = \frac{1}{\sqrt{2\pi}}\int_x^\infty e^{-\frac{1}{2}t^2} \,dt = \frac{1}{2} \operatorname{erfc}\left(\frac{x}{\sqrt{2}}\right),\ x \geq 0$$.

The error rates quoted here are those in additive white Gaussian noise (AWGN). These error rates are lower than those computed in fading channels, hence, are a good theoretical benchmark to compare with.

Applications
Owing to PSK's simplicity, particularly when compared with its competitor quadrature amplitude modulation, it is widely used in existing technologies.

The wireless LAN standard, IEEE 802.11b-1999, uses a variety of different PSKs depending on the data rate required. At the basic rate of 1Mbit/s, it uses DBPSK (differential BPSK). To provide the extended rate of 2Mbit/s, DQPSK is used. In reaching 5.5Mbit/s and the full rate of 11Mbit/s, QPSK is employed, but has to be coupled with complementary code keying. The higher-speed wireless LAN standard, IEEE 802.11g-2003, has eight data rates: 6, 9, 12, 18, 24, 36, 48 and 54Mbit/s. The 6 and 9Mbit/s modes use OFDM modulation where each sub-carrier is BPSK modulated. The 12 and 18Mbit/s modes use OFDM with QPSK. The fastest four modes use OFDM with forms of quadrature amplitude modulation.

Because of its simplicity, BPSK is appropriate for low-cost passive transmitters, and is used in RFID standards such as ISO/IEC 14443 which has been adopted for biometric passports, credit cards such as American Express's ExpressPay, and many other applications.

Bluetooth 2 uses $$\pi/4$$-DQPSK at its lower rate (2Mbit/s) and 8-DPSK at its higher rate (3Mbit/s) when the link between the two devices is sufficiently robust. Bluetooth 1 modulates with Gaussian minimum-shift keying, a binary scheme, so either modulation choice in version 2 will yield a higher data rate. A similar technology, IEEE 802.15.4 (the wireless standard used by Zigbee) also relies on PSK using two frequency bands: 868–915MHz with BPSK and at 2.4GHz with OQPSK.

Both QPSK and 8PSK are widely used in satellite broadcasting. QPSK is still widely used in the streaming of SD satellite channels and some HD channels. High definition programming is delivered almost exclusively in 8PSK due to the higher bitrates of HD video and the high cost of satellite bandwidth. The DVB-S2 standard requires support for both QPSK and 8PSK. The chipsets used in new satellite set top boxes, such as Broadcom's 7000 series support 8PSK and are backward compatible with the older standard.

Historically, voice-band synchronous modems such as the Bell 201, 208, and 209 and the CCITT V.26, V.27, V.29, V.32, and V.34 used PSK.

Mutual information with additive white Gaussian noise

The mutual information of PSK can be evaluated in additive Gaussian noise by numerical integration of its definition. The curves of mutual information saturate to the number of bits carried by each symbol in the limit of infinite signal to noise ratio $$E_s/N_0$$. On the contrary, in the limit of small signal to noise ratios the mutual information approaches the AWGN channel capacity, which is the supremum among all possible choices of symbol statistical distributions.

At intermediate values of signal to noise ratios the mutual information (MI) is well approximated by:

 * $$\textrm{MI} \simeq \log_2\left(\sqrt{\frac{4\pi}{e}\frac{E_s}{N_0}}\right).$$

The mutual information of PSK over the AWGN channel is generally lower than that of QAM modulation formats.

title: Phase-shift keying


text:
Phonetic alphabet

Phonetic alphabet can mean:

 * Phonetic transcription system: a system for transcribing the precise sounds of human speech into writing
 * International Phonetic Alphabet (IPA): the most widespread such system
 * (See Category:Phonetic alphabets for other phonetic transcription systems)
 * Phonemic orthography: an orthography that represents the sounds of a particular language in such a way that one symbol corresponds to each speech sound and vice versa
 * Spelling alphabet a.k.a. radio alphabet: a set of code words for the names of the letters of an alphabet, used in noisy conditions such as radio communication; each word typically stands for its own initial letter
 * NATO phonetic alphabet: the international standard (e.g., Alfa, Bravo, Charlie, Delta etc.)
 * (See Category:Spelling alphabets for other radio-telephony spelling alphabets)

title: Phonetic alphabet


text:
Photocurrent

Photocurrent is the electric current through a photosensitive device, such as a photodiode, as the result of exposure to radiant power. The photocurrent may occur as a result of the photoelectric, photoemissive, or photovoltaic effect. The photocurrent may be enhanced by internal gain caused by interaction among ions and photons under the influence of applied fields, such as occurs in an avalanche photodiode (APD).

When a suitable radiation is used, the photoelectric current is directly proportional to intensity of radiation and increases with the increase in accelerating potential till the stage is reached when photo-current becomes maximum and does not increase with further increase in accelerating potential. The highest (maximum) value of the photo-current is called saturation current. The value of retarding potential at which photo-current becomes zero is called cut-off voltage or stopping potential for the given frequency of the incident ray.

Photovoltaics
The generation of a photocurrent forms the basis of the photovoltaic cell.

Photocurrent spectroscopy
A characterization technique called photocurrent spectroscopy (PCS), also known as photoconductivity spectroscopy, is widely used for studying optoelectronic properties of semiconductors and other light absorbing materials. The setup of the technique involves having a semiconductor contacted with electrodes allowing for application of an electric bias, while at the same time a tunable light source incident with a given specific wavelength (energy) and power, usually pulsed by a mechanical chopper.

The quantity measured is the electrical response of the circuit, coupled with the spectrograph obtained by varying the incident light energy by a monochromator. The circuit and optics are coupled by use of a lock-in amplifier. The measurements give information related to the band gap of the semiconductor, allowing for identification of various charge transitions like exciton and trion energies. This is highly relevant for studying semiconductor nanostructures like quantum wells, and other nanomaterials like transition metal dichalcogenide monolayers.

Furthermore, by using a piezo stage to vary the lateral position of the semiconductor with micron precision, one can generate a micrograph false color image of the spectra for different positions. This is called scanning photocurrent microscopy (SPCM).

title: Photocurrent


text:
Pilot (disambiguation)

A pilot is a person who flies or navigates an aircraft.

Pilot or The Pilot may also refer to:

 * Maritime pilot, a person who guides ships through hazardous waters
 * Television pilot, a television episode used to sell a series to a television network
 * Pilot experiment, a small-scale preliminary study conducted prior to a full-scale research project

Fictional characters

 * Pilot (Farscape), a member of a race known as Pilots
 * Jennifer "Pilot" Chase, a character in the Canadian-American science fiction-action television series Captain Power and the Soldiers of the Future

Film and television

 * Pilots (film), a 2000 Malayalam film
 * The Pilot (film), a 1980 film
 * "The Pilot" (Doctor Who), the first episode of the 10th series
 * "The Pilot" (Seinfeld), the finale of the 4th season
 * The Pilot. A Battle for Survival, a 2021 Russian film
 * Television pilot, a trial episode of a show

Literature

 * "Pilot" (short story), a 1993 short story by Stephen Baxter
 * Pilot (British magazine), a general aviation magazine
 * The Pilot (Massachusetts newspaper), the official newspaper of the Roman Catholic Archdiocese of Boston, U.S.
 * The Pilot (North Carolina newspaper), a semiweekly newspaper
 * The Pilot News, a newspaper serving Plymouth, Indiana, U.S.
 * The Virginian-Pilot, the daily newspaper of Norfolk, Virginia, U.S.
 * The Pilot (Dublin newspaper), published 1830s–1840s by Eaton Stannard Barrett's brother Richard
 * The Pilot, a 1976 novel by Robert P. Davis
 * The Pilot: A Tale of the Sea, an 1824 novel by James Fenimore Cooper

Bands

 * Pilot (Scottish band), a Scottish rock group
 * Pilot (Russian band), a Russian rock band

EPs

 * Pilot (Mallory Knox EP), 2011
 * Pilot (Reuben EP), 2001
 * Pilot, a 2014 EP by Amber Run

Songs

 * "Pilot" (song), by 50 Cent, 2014
 * "Pilots" (song), a 2001 song by Goldfrapp
 * "The Pilot" (song), by Double Experience, 2017
 * "Pilot", a song by Blue Cheer from the 1970 album The Original Human Being
 * "Pilot", a song by the Notwist from the 2002 album Neon Golden
 * "The Pilot", a 1976 song by England Dan & John Ford Coley from I Hear Music

Businesses and organizations

 * Pilot (educational organization), teaching practical skills in computer science and entrepreneurship
 * Pilot (pen company), a Japanese pen manufacturer
 * Pilot (studio), a Russian animation studio
 * Pilot Flying J, a North American chain of truck stops
 * Pilot Software, an American business intelligence vendor

People

 * Pilot (surname), including a list of people with the name
 * Pilot Baba (born 1938), an Indian spiritual guru and former fighter pilot

Places

 * Pilot, Davidson County, North Carolina, U.S.
 * Pilot, Franklin County, North Carolina, U.S.
 * Pilot, Virginia, U.S.
 * Pilot (župa), a county of Serbia in the Middle Ages
 * Pilot Glacier, Victoria Land, Antarctica
 * Pilot Island, in Lake Michigan, Wisconsin, U.S.
 * Pilot Mountain (disambiguation)
 * Pilot Township (disambiguation)

Science and technology

 * PILOT, a high-level programming language developed in the 1960s
 * Pilot (operating system), designed by Xerox PARC in the 1970s
 * PalmPilot, a personal digital assistant produced by Palm, Inc.

Sports

 * Portland Pilots, the nickname for athletics at the University of Portland, U.S.
 * Seattle Pilots, a 1969 American baseball team that became the Milwaukee Brewers

Transportation

 * Piloting or pilotage, the act of navigating by visual landmarks over water or in the air

Automobiles

 * Ford Pilot, a 1947–1951 American-British mid-size car
 * Honda Pilot, a 2003–present Japanese-American mid-size SUV
 * LDV Pilot, a 1997–2006 British panel van
 * MG Pilot, a 2020–present British-Chinese compact SUV
 * Rover Pilot, British car produced 1932–33

Automotive marques

 * Pilot Motor Car Company, early 1900s American automobiles with the Pilot marque
 * Pilot Cars Limited, early 1900s British automobiles with the Pilot marque
 * Pilotmotorenwerke Bannewitz, early 1920s German automobiles with the Pilot marque

Ships and boats

 * Pilot (1813 ship), a convict transport to Australia
 * Pilot (1914 boat), a pilot boat and museum ship in San Diego, California, U.S.
 * Pilot (1924 boat), a pilot boat in Boston
 * Pilot (icebreaker), the Russian icebreaker ship, converted in 1864
 * HMS Pilot, the name of several Royal Navy ships

Trains

 * Pilot (locomotive attachment), or cowcatcher, a device mounted at the front of a locomotive to deflect obstacles
 * Pilot locomotive for double heading, an additional engine for additional traction, motive power, etc
 * Station pilot, a shunting engine based at a major passenger station

Other uses

 * PILOT (finance), in public finance, a payment in lieu of taxes

title: Pilot (disambiguation)


text:
PIN diode

A PIN diode is a diode with a wide, undoped intrinsic semiconductor region between a p-type semiconductor and an n-type semiconductor region. The p-type and n-type regions are typically heavily doped because they are used for ohmic contacts.

The wide intrinsic region is in contrast to an ordinary p–n diode. The wide intrinsic region makes the PIN diode an inferior rectifier (one typical function of a diode), but it makes it suitable for attenuators, fast switches, photodetectors, and high-voltage power electronics applications.

The PIN photodiode was invented by Jun-Ichi Nishizawa and his colleagues in 1950. It is a semiconductor device.

Operation
A PIN diode operates under what is known as high-level injection. In other words, the intrinsic "i" region is flooded with charge carriers from the "p" and "n" regions. Its function can be likened to filling up a water bucket with a hole on the side. Once the water reaches the hole's level it will begin to pour out. Similarly, the diode will conduct current once the flooded electrons and holes reach an equilibrium point, where the number of electrons is equal to the number of holes in the intrinsic region.

When the diode is forward biased, the injected carrier concentration is typically several orders of magnitude higher than the intrinsic carrier concentration. Due to this high level injection, which in turn is due to the depletion process, the electric field extends deeply (almost the entire length) into the region. This electric field helps in speeding up of the transport of charge carriers from the P to the N region, which results in faster operation of the diode, making it a suitable device for high-frequency operation.

Characteristics
The PIN diode obeys the standard diode equation for low-frequency signals. At higher frequencies, the diode looks like an almost perfect (very linear, even for large signals) resistor. The P-I-N diode has a relatively large stored charge adrift in a thick intrinsic region. At a low-enough frequency, the stored charge can be fully swept and the diode turns off. At higher frequencies, there is not enough time to sweep the charge from the drift region, so the diode never turns off. The time required to sweep the stored charge from a diode junction is its reverse recovery time, and it is relatively long in a PIN diode. For a given semiconductor material, on-state impedance, and minimum usable RF frequency, the reverse recovery time is fixed. This property can be exploited; one variety of P-I-N diode, the step recovery diode, exploits the abrupt impedance change at the end of the reverse recovery to create a narrow impulse waveform useful for frequency multiplication with high multiples.

The high-frequency resistance is inversely proportional to the DC bias current through the diode. A PIN diode, suitably biased, therefore acts as a variable resistor. This high-frequency resistance may vary over a wide range (from 0.1 Ω to 10 kΩ in some cases; the useful range is smaller, though).

The wide intrinsic region also means the diode will have a low capacitance when reverse-biased.

In a PIN diode the depletion region exists almost completely within the intrinsic region. This depletion region is much larger than in a PN diode and almost constant-size, independent of the reverse bias applied to the diode. This increases the volume where electron-hole pairs can be generated by an incident photon. Some photodetector devices, such as PIN photodiodes and phototransistors (in which the base-collector junction is a PIN diode), use a PIN junction in their construction.

The diode design has some design trade-offs. Increasing the cross-section area of the intrinsic region increases its stored charge reducing its RF on-state resistance while also increasing reverse bias capacitance and increasing the drive current required to remove the charge during a fixed switching time, with no effect on the minimum time required to sweep the charge from the I region. Increasing the thickness of the intrinsic region increases the total stored charge, decreases the minimum RF frequency, and decreases the reverse-bias capacitance, but doesn't decrease the forward-bias RF resistance and increases the minimum time required to sweep the drift charge and transition from low to high RF resistance. Diodes are sold commercially in a variety of geometries for specific RF bands and uses.

Applications
PIN diodes are useful as RF switches, attenuators, photodetectors, and phase shifters.

RF and microwave switches

Under zero- or reverse-bias (the "off" state), a PIN diode has a low capacitance. The low capacitance will not pass much of an RF signal. Under a forward bias of 1 mA (the "on" state), a typical PIN diode will have an RF resistance of about 1 ohm, making it a good conductor of RF. Consequently, the PIN diode makes a good RF switch.

Although RF relays can be used as switches, they switch relatively slowly (on the order of tens of milliseconds). A PIN diode switch can switch much more quickly (e.g., 1 microsecond), although at lower RF frequencies it isn't reasonable to expect switching times in the same order of magnitude as the RF period.

For example, the capacitance of an "off"-state discrete PIN diode might be 1 pF. At 320 MHz, the capacitive reactance of 1 pF is 497 ohms:

 * $$\begin{align}

Z_\mathrm{diode} &= \frac{1}{2\pi fC}\\ &= \frac{1}{2\pi(320\times10^6\,\mathrm{Hz})(1\times10^{-12}\,\mathrm{F})}\\ &= 497\,\Omega \end{align} $$

As a series element in a 50 ohm system, the off-state attenuation is:
 * $$\begin{align}

A &= 20\log_{10}\left(\frac{Z_\mathrm{load} + Z_\mathrm{source}} {Z_\mathrm{source} + Z_\mathrm{diode} + Z_\mathrm{load}}\right)\\ &= 20\log_{10}\left(\frac{50\,\Omega + 50\,\Omega} {50\,\Omega + 497\,\Omega + 50\,\Omega}\right)\\ &= {15.52}\,\mathrm{dB} \end{align}$$

This attenuation may not be adequate. In applications where higher isolation is needed, both shunt and series elements may be used, with the shunt diodes biased in complementary fashion to the series elements. Adding shunt elements effectively reduces the source and load impedances, reducing the impedance ratio and increasing the off-state attenuation. However, in addition to the added complexity, the on-state attenuation is increased due to the series resistance of the on-state blocking element and the capacitance of the off-state shunt elements.

PIN diode switches are used not only for signal selection, but also component selection. For example, some low-phase-noise oscillators use them to range-switch inductors.

RF and microwave variable attenuators

By changing the bias current through a PIN diode, it is possible to quickly change its RF resistance.

At high frequencies, the PIN diode appears as a resistor whose resistance is an inverse function of its forward current. Consequently, PIN diode can be used in some variable attenuator designs as amplitude modulators or output leveling circuits.

PIN diodes might be used, for example, as the bridge and shunt resistors in a bridged-T attenuator. Another common approach is to use PIN diodes as terminations connected to the 0 degree and -90 degree ports of a quadrature hybrid. The signal to be attenuated is applied to the input port, and the attenuated result is taken from the isolation port. The advantages of this approach over the bridged-T and pi approaches are (1) complementary PIN diode bias drives are not needed—the same bias is applied to both diodes—and (2) the loss in the attenuator equals the return loss of the terminations, which can be varied over a very wide range.

Limiters
PIN diodes are sometimes designed for use as input protection devices for high-frequency test probes and other circuits. If the input signal is small, the PIN diode has negligible impact, presenting only a small parasitic capacitance. Unlike a rectifier diode, it does not present a nonlinear resistance at RF frequencies, which would give rise to harmonics and intermodulation products. If the signal is large, then when the PIN diode starts to rectify the signal, the forward current charges the drift region and the device RF impedance is inversely proportional to the signal amplitude. That signal amplitude varying resistance can be used to terminate some predetermined portion of the signal in a resistive network dissipating the energy or to create an impedance mismatch that reflects the incident signal back toward the source. The latter may be combined with an isolator, a device containing a circulator which uses a permanent magnetic field to break reciprocity and a resistive load to separate and terminate the backward traveling wave. When used as a shunt limiter the PIN diode impedance is low over the entire RF cycle, unlike paired rectifier diodes that would swing from a high resistance to a low resistance during each RF cycle clamping the waveform and not reflecting it as completely. The ionization recovery time of gas molecules that permits the creation of the higher power spark gap input protection device ultimately relies on similar physics in a gas.

Photodetector and photovoltaic cell
The PIN photodiode was invented by Jun-ichi Nishizawa and his colleagues in 1950.

PIN photodiodes are used in fibre optic network cards and switches. As a photodetector, the PIN diode is reverse-biased. Under reverse bias, the diode ordinarily does not conduct (save a small dark current or Is leakage). When a photon of sufficient energy enters the depletion region of the diode, it creates an electron-hole pair. The reverse-bias field sweeps the carriers out of the region, creating current. Some detectors can use avalanche multiplication.

The same mechanism applies to the PIN structure, or p-i-n junction, of a solar cell. In this case, the advantage of using a PIN structure over conventional semiconductor p–n junction is better long-wavelength response of the former. In case of long wavelength irradiation, photons penetrate deep into the cell. But only those electron-hole pairs generated in and near the depletion region contribute to current generation. The depletion region of a PIN structure extends across the intrinsic region, deep into the device. This wider depletion width enables electron-hole pair generation deep within the device, which increases the quantum efficiency of the cell.

Commercially available PIN photodiodes have quantum efficiencies above 80-90% in the telecom wavelength range (~1500 nm), and are typically made of germanium or InGaAs. They feature fast response times (higher than their p-n counterparts), running into several tens of gigahertz, making them ideal for high speed optical telecommunication applications. Similarly, silicon p-i-n photodiodes have even higher quantum efficiencies, but can only detect wavelengths below the bandgap of silicon, i.e. ~1100 nm.

Typically, amorphous silicon thin-film cells use PIN structures. On the other hand, CdTe cells use NIP structure, a variation of the PIN structure. In a NIP structure, an intrinsic CdTe layer is sandwiched by n-doped CdS and p-doped ZnTe; the photons are incident on the n-doped layer, unlike in a PIN diode.

A PIN photodiode can also detect ionizing radiation in case it is used as a semiconductor detector.

In modern fiber-optical communications, the speed of optical transmitters and receivers is one of the most important parameters. Due to the small surface of the photodiode, its parasitic (unwanted) capacitance is reduced. The bandwidth of modern pin photodiodes is reaching the microwave and millimeter waves range.

Example PIN photodiodes
SFH203 and BPW34 are cheap general purpose PIN diodes in 5 mm clear plastic cases with bandwidths over 100 MHz.

title: PIN diode


text:
Plane wave

In physics, a plane wave is a special case of a wave or field: a physical quantity whose value, at any moment, is constant through any plane that is perpendicular to a fixed direction in space.

For any position $$\vec x$$ in space and any time $$t$$, the value of such a field can be written as $$F(\vec x,t) = G(\vec x \cdot \vec n, t),$$ where $$\vec n$$ is a unit-length vector, and $$G(d,t)$$ is a function that gives the field's value as dependent on only two real parameters: the time $$t$$, and the scalar-valued displacement $$d = \vec x \cdot \vec n$$ of the point $$\vec x$$ along the direction $$\vec n$$. The displacement is constant over each plane perpendicular to $$\vec n$$.

The values of the field $$F$$ may be scalars, vectors, or any other physical or mathematical quantity. They can be complex numbers, as in a complex exponential plane wave.

When the values of $$F$$ are vectors, the wave is said to be a longitudinal wave if the vectors are always collinear with the vector $$\vec n$$, and a transverse wave if they are always orthogonal (perpendicular) to it.

Traveling plane wave

Often the term "plane wave" refers specifically to a traveling plane wave, whose evolution in time can be described as simple translation of the field at a constant wave speed $$c$$ along the direction perpendicular to the wavefronts. Such a field can be written as $$F(\vec x, t) = G\left(\vec x \cdot \vec n - c t\right)\,$$ where $$G(u)$$ is now a function of a single real parameter $$u = d - c t$$, that describes the "profile" of the wave, namely the value of the field at time $$t = 0$$, for each displacement $$d = \vec x \cdot \vec n$$. In that case, $$\vec n$$ is called the direction of propagation. For each displacement $$d$$, the moving plane perpendicular to $$\vec n$$ at distance $$d + c t$$ from the origin is called a "wavefront". This plane travels along the direction of propagation $$\vec n$$ with velocity $$c$$; and the value of the field is then the same, and constant in time, at every one of its points.

Sinusoidal plane wave
The term is also used, even more specifically, to mean a "monochromatic" or sinusoidal plane wave: a travelling plane wave whose profile $$G(u)$$is a sinusoidal function. That is, $$F(\vec x, t) = A \sin\left(2\pi f (\vec x \cdot \vec n - c t) + \varphi\right)$$ The parameter $$A$$, which may be a scalar or a vector, is called the amplitude of the wave; the scalar coefficient $$f$$ is its "spatial frequency"; and the scalar $$\varphi$$ is its "phase shift".

A true plane wave cannot physically exist, because it would have to fill all space. Nevertheless, the plane wave model is important and widely used in physics. The waves emitted by any source with finite extent into a large homogeneous region of space can be well approximated by plane waves when viewed over any part of that region that is sufficiently small compared to its distance from the source. That is the case, for example, of the light waves from a distant star that arrive at a telescope.

Plane standing wave
A standing wave is a field whose value can be expressed as the product of two functions, one depending only on position, the other only on time. A plane standing wave, in particular, can be expressed as $$F(\vec x, t) = G(\vec x \cdot \vec n) \, S(t)$$ where $$G$$ is a function of one scalar parameter (the displacement $$d = \vec x \cdot \vec n$$) with scalar or vector values, and $$S$$ is a scalar function of time.

This representation is not unique, since the same field values are obtained if $$S$$ and $$G$$ are scaled by reciprocal factors. If $$\left|S(t)\right|$$ is bounded in the time interval of interest (which is usually the case in physical contexts), $$S$$ and $$G$$ can be scaled so that the maximum value of $$\left|S(t)\right|$$ is 1. Then $$\left|G(\vec x \cdot \vec n)\right|$$ will be the maximum field magnitude seen at the point $$\vec x$$.

Properties
A plane wave can be studied by ignoring the directions perpendicular to the direction vector $$\vec n$$; that is, by considering the function $$G(z,t) = F(z \vec n, t)$$ as a wave in a one-dimensional medium.

Any local operator, linear or not, applied to a plane wave yields a plane wave. Any linear combination of plane waves with the same normal vector $$\vec n$$ is also a plane wave.

For a scalar plane wave in two or three dimensions, the gradient of the field is always collinear with the direction $$\vec n$$; specifically, $$\nabla F(\vec x,t) = \vec n\partial_1 G(\vec x \cdot \vec n, t)$$, where $$\partial_1 G$$ is the partial derivative of $$G$$ with respect to the first argument.

The divergence of a vector-valued plane wave depends only on the projection of the vector $$G(d,t)$$ in the direction $$\vec n$$. Specifically, $$ \nabla \cdot \vec F(\vec x, t) \;=\; \vec n \cdot \partial_1 G(\vec x \cdot \vec n, t)$$ In particular, a transverse planar wave satisfies $$\nabla \cdot \vec F = 0$$ for all $$\vec x$$ and $$t$$.

title: Plane wave


text:
Plastic-clad silica fiber

In telecommunications and fiber optics, a plastic-clad silica fiber or polymer-clad silica fiber (PCS) is an optical fiber that has a silica-based core and a plastic cladding. The cladding of a PCS fiber should not be confused with the polymer overcoat of a conventional all-silica fiber.

Usage
The main applications of plastic-clad silica fiber are industrial, medical or sensing applications where cores that are larger than those used in standard data communications fibers are advantageous.

PCS fibers in general have significantly lower performance characteristics, particularly higher transmission losses and lower bandwidths, than all-glass fibers.

title: Plastic-clad silica fiber