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Dragon (magazine)

Dragon is one of the two official magazines for source material for the Dungeons & Dragons role-playing game and associated products, along with Dungeon.

TSR, Inc. originally launched the monthly printed magazine in 1976 to succeed the company's earlier publication, The Strategic Review. The final printed issue was #359 in September 2007. Shortly after the last print issue shipped in mid-August 2007, Wizards of the Coast (part of Hasbro, Inc.), the publication's current copyright holder, relaunched Dragon as an online magazine, continuing on the numbering of the print edition. The last published issue was No. 430 in December 2013. A digital publication called Dragon+, which replaced Dragon magazine, was launched in 2015. It was created by the advertising agency Dialect in collaboration with Wizards of the Coast, and its numbering system for issues started at No. 1.

TSR
In 1975, TSR, Inc. began publishing The Strategic Review. At the time, roleplaying games were still seen as a subgenre of the wargaming industry, and the magazine was designed not only to support Dungeons & Dragons and TSR's other games, but also to cover wargaming in general. In short order, however, the popularity and growth of Dungeons & Dragons made it clear that the game had not only separated itself from its wargaming origins, but had launched an entirely new industry unto itself.

TSR canceled The Strategic Review the following year after only seven issues, and replaced it with two magazines, Little Wars, which covered miniature wargaming, and The Dragon, which covered role playing games. After twelve issues, Little Wars ceased independent publication and issue 13 was published as part of Dragon issue 22.

The magazine debuted as The Dragon in June 1976. TSR co-founder Gary Gygax commented years later: "When I decided that The Strategic Review was not the right vehicle, hired Tim Kask as a magazine editor for Tactical Studies Rules, and named the new publication he was to produce The Dragon, I thought we would eventually have a great periodical to serve gaming enthusiasts worldwide... At no time did I ever contemplate so great a success or so long a lifespan."

Dragon is the launching point for a number of rules, spells, monsters, magic items, and other ideas that were incorporated into later official products of the Dungeons & Dragons game. A prime example is the Forgotten Realms campaign setting, which first became known through a series of Dragon articles in the 1980s by its creator Ed Greenwood. It subsequently went on to become one of the primary campaign "worlds" for official Dungeons and Dragons products, starting in 1987. The magazine appeared on the cover as simply Dragon from July 1980, later changing its name to Dragon Magazine starting November 1987.

Wizards of the Coast
Wizards of the Coast purchased TSR and its intellectual properties, including Dragon Magazine, in 1997. Production was then transferred from Wisconsin to Washington state. In 1999, Wizards of the Coast was itself purchased by Hasbro, Inc. Dragon Magazine suffered a five-month gap between #236 and #237 but remained published by TSR as a subsidiary of WotC starting September 1997, and until January 2000 when WotC became the listed de facto publisher. They removed the word "magazine" from the cover title starting with the June 2000 issue, changing the publication's name back to simply Dragon.

In 1999 a CD-ROM compilation of the first 250 issues, called Dragon Magazine Archive, was released in PDF format with a special viewer. It includes the seven issues of The Strategic Review. The Dragon Magazine Archive is out of print because of issues raised with the 2001 ruling in Greenberg v. National Geographic regarding the reprint rights of various comic strips that had been printed in Dragon over the years and Paizo Publishing's policy that creators of comics retain their copyright. These comic strips include Wormy, What's New with Phil & Dixie, Snarf Quest, and Knights of the Dinner Table which is covered in TSR's own statement in the first issue that "All material published herein becomes the exclusive property of the publisher unless special arrangements to the contrary are made."

Paizo
In 2002, Paizo Publishing acquired the rights to publish both Dragon and Dungeon under license from Wizards of the Coast. Dragon was published by Paizo starting September 2002. It ties Dragon more closely to Dungeon by including articles supporting and promoting its major multi-issue adventures such as the Age of Worms and Savage Tide. Class Acts, a monthly publication with one- or two-page articles offering ideas for developing specific character classes, were also introduced by Paizo.

Return to Wizards of the Coast
On April 18, 2007, Wizards of the Coast announced that it would not be renewing Paizo's licenses for Dragon and Dungeon, instead opting for online publishing. Paizo published the last print editions of Dragon and Dungeon magazines for September 2007.

In August 2007, Wizards of the Coast announced the fourth edition of the Dungeons & Dragons game and that D&D Insider subscriber content would include the new, online versions of both Dungeon and Dragon magazines along with tools for building campaigns, managing character sheets, and other features. In its online form, Dragon continues to publish articles aimed at Dungeons & Dragons players, with rules data from these articles feeding the D&D Character Builder and other online tools.

Cessation
In the September 2013 issue of Dragon (#427) an article by Wizards of the Coast game designer and editor Chris Perkins announced that both Dragon and its sibling publication Dungeon would be going on hiatus starting January 2014 pending the release of Dungeons & Dragons 5th edition. The final online version released is Issue #430 in December 2013.

Dragon+
A new and fully digital bi-monthly publication called Dragon+, was launched on April 30, 2015, succeeding the existing versions of Dragon and Dungeon magazines. Created by Dialect in collaboration with Wizards of the Coast, the online edition ceased continuity with the printed and digital versions of both magazines, and restarted its numbering system for issues at No. 1.

The magazine branded itself as an app with content "showcasing what’s new in Dungeons & Dragons – from backstory and world information to discussions about what's coming next from the creators and developers of your favorite D&D products". Articles included cover content such as: game strategies and insights; details of the current D&D storyline; interviews; ongoing comic series; lore; Forgotten Realms world information; community updates and fan submissions; and videos. Additional content in the magazine is also accessible through links to the magazine's content in Facebook and Twitter feeds.

Dragon+ ran for 41 issues in total with the last issue published in April 2022; Wizards of the Coast published an update in July 2022 announcing the cancellation of the publication. On November 15, 2022, Wizards of the Coast announced that "Dragon+ will be removed from app stores on or around November 15th, and dragonmag.com will be redirected and its content will no longer be available".

Content
Many of the gaming world's most famous writers, game designers and artists have published work in the magazine. Through most of its run the magazine frequently published fantasy fiction, either short stories or novel excerpts. After the 1990s, the appearance of fiction stories became relatively rare. One late example was issue #305's featured excerpt from George R.R. Martin's later Hugo-nominated novel A Feast for Crows. It also featured book reviews of fantasy and science fiction novels, and occasionally of films of particular interest (such as the TV movie of Mazes and Monsters).

From the magazine's beginning until issue 274, from August 2000, Dragon published articles for various versions of Dungeons & Dragons and, at various times, other gaming systems. With issue 274, Dragon published exclusively 3rd Edition D&D content, or content for other games published by Wizards Of The Coast's d20 System games. With the release of the 3.5 Edition update in July 2003, issue 309 onward published only Edition 3.5 content and carried a "100% Official Dungeons & Dragons" masthead. The magazine switched to exclusively 4th Edition D&D content from issue 364 on the release of 4th Edition in June 2008.

Articles
Most of the magazine's articles provide supplementary material for D&D including new prestige classes, races, and monsters. A long-running column Sage Advice offers official answers to Dungeons & Dragons questions submitted by players. Other articles provide tips and suggestions for players and Dungeon Masters (DMs). It sometimes discusses meta-gaming issues, such as getting along with fellow players. At the end of its print run, the magazine also features four comics; Nodwick, Dork Tower, Zogonia, and a specialized version of the webcomic The Order of the Stick. Previous gamer-oriented comic strips include Knights of the Dinner Table, Finieous Fingers, What's New with Phil & Dixie, Wormy, Yamara, and SnarfQuest.

Dragon's "Ecology of ..." articles were initially written in the voice of the fictional sage Elminster, who reviewed a D&D monster in-depth. Under Paizo's tenure such ecology articles became heavier in game mechanics than narrative and description. The Dragon submissions guidelines explicitly state that Ecology articles "should have a hunter’s guidebook approach, although it should not be written 'in voice'" and further specify the exact format of Ecology articles, leaving less room for artistic license by the author.

In the early 1980s, almost every issue contains a role playing adventure, a simple board game, or some kind of special game supplement (such as a cardboard cut-out castle). For instance, Tom Wham's Snit's Revenge, The Awful Green Things from Outer Space and File 13 all started as supplements within The Dragon. These bonus features are infrequent after the 1986 launch of Dungeon magazine, which published several new Dungeons & Dragons adventures in each issue.

During the 1980s, after TSR had purchased Simulations Publications Inc., the magazine had a subsection called Ares Magazine, based on SPI's magazine of that name, specializing in science fiction and superhero role playing games, with pages marked by a gray border. The content included write-ups for various characters of the Marvel Universe for TSR's Marvel Super-Heroes.

Special issues
As noted above The Dragon was preceded by seven issues of The Strategic Review. In the magazine's early years it also published five "Best of" issues, reprinting highly regarded articles from The Strategic Review and The Dragon. From 1996 to 2001, Dragon Magazine published the "Dragon Annual", a thirteenth issue of all new content.

Editors
Print versions:
 * #1 – 34: Timothy J. Kask, Editor
 * #35 – 48: Jake Jaquet, Editor
 * #49 – 114 & 199 – 217: Kim Mohan, Editor-in-Chief
 * #115 – 198: Roger E. Moore, Editor
 * #218 – 221: Wolfgang Baur, Editor
 * #222 – 238: Pierce B. Watters, Editor-in-Chief
 * #222 – 229: Anthony J. Bryant, Editor
 * #230 – 273 & 274 – 287: Dave Gross, Editor & Editor-in-Chief
 * #288 – 311: Jesse Decker, Editor-in-Chief
 * #312 – 315: Chris Thomasson, Editor-in-Chief
 * #316 – 326: Matthew Sernett, Editor-in-Chief
 * #327 – 359: Erik Mona, Editor-in-Chief

Digital (online/PDF) versions:
 * #360 – 387: Chris Youngs, Editor-in-Chief
 * #388 – 430: Steve Winter, Editor-in-Chief
 * (Dragon+) #1-7 Matt Chapman, Editor-in-Chief; #8-13 John Houlihan, Editor-in-Chief; #14-present Matt Chapman, Editor-in-Chief

Awards

 * 1984: Origins Award for Best Professional Roleplaying Magazine of 1984
 * 1986: Origins Award for Best Professional Roleplaying Magazine of 1985
 * 1987: Origins Award for "Special Award for Outstanding Achievement of 1987".
 * 1990: Origins Award for Best Professional Adventure Gaming Magazine of 1989
 * 1994: Origins Award for Best Professional Gaming Magazine of 1993
 * 1995: Origins Awards for Best Professional Gaming Magazine of 1994, Origins Adventure Gaming Hall of Fame
 * 2004: Origins Award for Best Game Related Periodical 2003
 * 2007: Origins Award for Best Non-Fiction Publication of the Year 2006

Other releases
A collection of Dragon was released as the Dragon Magazine Archive in 1999. It was released as a CD-ROM with a Windows application and PDF files. The Dragon Magazine Archive was directed by Rob Voce, and published by TSR/Wizards of the Coast. Pyramid reviewed it, saying that the archive was "worth the price", but that its application's Windows-only format limits other platforms from being able to read the PDFs manually. It was reviewed in Backstab #19.

title: Dragon (magazine)


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Talk:Elevator music

Early Comments
Whoever rewrote this -- Nice work! Thanks! --200.165.239.250 13:47, 7 June 2002 (UTC)

It is nice, but BGM should not point here. --216.49.220.19 16:06, 9 May 2005 (UTC)

The Muzak Corporation went out of business in the early 1980s. --70.146.20.34 23:17, 1 November 2005 (UTC)

What about the marketing aspect of muzak?
There should be some information about the psychological reasons why retailers use muzak to distract shoppers so they make impulse purchases:

 * "The type of music you play can have dramatic and direct effects on your business. For example, researchers found that a slow temp can increase sales as much as 38 percent in retail stores because it encourages leisurely shopping. Alternatively, a fast tempo is more desirable in restaurants because customers will eat faster, thus allowing greater table turnover and higher sales."

- marketingprofs.com

—Preceding unsigned comment added by 216.165.132.250 (talk) 21:06, 11 September 2007 (UTC)
 * You're right. for instance, I looked at this article to learn about the effects of muzak in supermarkets. --88.241.176.75 15:50, 19 April 2008 (UTC)

Sorry to be negative but
I really do not think that elevator music is a genre of music.

In my local supermarket they often play punk rock classics from the eighties, because what was "rebellious" then is no longer so. So elevator music is not a genre of music defined by an aesthetic, it is simply a particular use of music.

It is also unnecessarily negative. Why shouldn't people listen to music in elevators? --82.125.117.142 18:22, 26 September 2006 (UTC)

Removed Text
I removed the following text from the article because it seemed a bit POV and used a lot of weasel words; it also didn't really contribute to the article.

 * There is, however a distinct difference between instrumental music that is deliberately created to calm listeners down and to mask noise and instrumental music that truly entertains. Some people are unable to be entertained by songs without lyrics.  Others are amazed at the inventiveness and complexity gifted arrangers can put into their instrumental charts.

--Crucible Guardian 16:07, 18 June 2006 (UTC)

 * The description specifies it as (bland) instrumental music. It was not exclusively so; in the late sixties and early seventies you could tune into 'elevator music' stations that included such mixed orchestral and choral arrangements as performed by The Cascading Voices of Hugo and Luigi's Chorus or Ray Conniff Singers. --Gluefish 21:19, 13 April 2007 (UTC)

 * The negative view of instrumental music has it's origins in the youth subculture of the 1960's.

Rock became the dominant pop music over the succeeding decades. The excesses of rock, and the general assault on the senses, became the acceptable norm for the majority of music listeners. Hence, instrumental music became "bland". However, instrumental musicians are largely better trained and educated in music than the average rock performer. To say that instrumental music is simple, shows a lack of understanding of music, and is a conditioned response from decades of cultural brainwashing. --Eelb53 (talk) 00:50, 22 March 2010 (UTC)

Functional category of music
According to this article and the above comments, elevator music refers to a method and a context, for listening to music, a kind of music whose features can be suitable for the purpose, that can be moderately relaxing or moderately entertaining depending on the social function of the place in which that music is played. If needed, I could write a sort of diagram. --Doktor Who 21:33, 13 April 2007 (UTC)

Outside the US
Here in the UK, I've never heard any elevator music (or lift music I guess we'd call it). Obviously this is original research, but perhaps this should be referred to in the article if it is true that it is a US-centric concept... Of course, we do have the telephone music etc, but that doesn't really seem like it should belong here... --EAi (talk) 01:45, 12 February 2008 (UTC)

 * I'm in the US, and I never hear music in the lift (lately, I've been seeing small monitors with newsfeeds on them). Plenty of this sort of music in stores, restaurants, and shopping centers, though. --Logotu (talk) 22:16, 12 June 2008 (UTC)

Redirection
Logically, the keyword "Muzak" should not automatically redirect here. It should redirect to the Muzak Holdings page (that's what common sense dictates, anyways.) Any way to fix this? —Preceding unsigned comment added by 67.42.211.208 (talk) 03:30, 29 October 2010 (UTC)

 * I absolutely agree—it should be the other way around. "Muzak" was a prominent brand during its time long before it became a genericized trademark.  "Muzak" should resolve to the Muzak Holdings page, and provide a link to this article up top. For comparison, look where "Xerox" resolves to. --o0drogue0o 11:52, 17 July 2011 (UTC)

 * I just noticed this conversation. Please note that a related discussion is now happening at Talk:Muzak Holdings (in which most people are expressing an opinion that differs from those above). —BarrelProof (talk) 00:55, 14 June 2013 (UTC)

Elevator Music/smooth jazz/easy listening/middle of the road
Are these types of music all the same genre? It says used as a generic term for them, but are they really the same thing? I remember I was thinking the same thing once when I listened to a smooth jazz station. Though, I never thought an instrumental version of a song is elevator music, only original songs played as such. --The snare (talk) 07:20, 7 January 2012 (UTC)

External Link
Why is there a link to http://www.nomuzak.co.uk/ in the external link section? It's listed as a "comprehensive site about elevator music," but it is actually a site selling shoes. Margalob (talk) 21:21, 12 March 2016 (UTC)
 * At some point it was about Muzak, but definitely not a "comprehensive" resource but rather some place to complain. I've removed the link. In the future please don't hesitate to be bold and make the necessary changes. Opencooper (talk) 22:10, 12 March 2016 (UTC)

Merged to Muzak
Elevator music has been merged to Muzak per WP:OVERLAP - overlap, context, and duplicate - the two articles work better together, otherwise Elevator music fails  WP:DICDEF. The section is at Muzak, and will need editing to reduce duplication.  SilkTork  ✔Tea time  11:54, 15 November 2016 (UTC)
 * Reinstated as a separate article as there are many queries for specifically "Elevator music"

My feedback (2022)
I think this article is stub-like small and says nothing about elevator-used jungles. And I enjoyed Muzak Orchestra's oldies from the 50's/60's, so I know how non-elevator-ish OG Muzak sounded like. 81.89.66.133 (talk) 08:47, 20 July 2022 (UTC)

History
I cannot recall the source, but I understand that elevator music was created based on a problem-solving exercise. A high-rise office building had continuous complaints about the elevators taking too long. The high-rise owner requested several proposals from external vendors to make the elevators faster. One of the vendors consulted with the employees of the high-rise and determined that the actual problem was not that the elevators were not fast enough; it was that the employees were bored, and the silence made them feel uncomfortable on the elevators. While other vendors submitted proposals for state-of-the-art elevator systems to solve the assumed problem, the winning vendor changed the world with elevator music. 198.7.238.130 (talk) 10:29, 27 September 2023 (UTC)

Small addition
I was wondering if I should add studying into the "Other Uses" sector or if I shouldn't, thank you! AtlanticSalmonLover (talk) 00:29, 14 October 2023 (UTC)

Other uses section is weirdly specific
"This style of music is sometimes used to comedic effect in mass media such as film, where intense or dramatic scenes may be interrupted or interspersed with such anodyne music while characters use an elevator. Some video games have used music similarly: Metal Gear Solid 4 where a few elevator music-themed tracks are accessible on the in-game iPod, as well as System Shock, Rise of the Triad: Dark War, GoldenEye 007, Mass Effect, and Earthworm Jim."

Is this really... Wikipedia-worthy information? This belongs more on TVTropes, not in an encyclopedia. This is such a specific use that I don't think it should be on this page. I am open for debate, if anyone has a contradicting opinion. Gøøse060 (talk) 15:32, 30 October 2023 (UTC)

Citation doesn't seem to support text
"More recent types of elevator music may be computer-generated, with the actual score being composed entirely algorithmically.[2][3]" cites https://qz.com/488701/humans-are-confusing-music-composed-by-a-computer-for-j-s-bach/ and http://www.slate.com/articles/arts/music_box/2010/05/ill_be_bach.html, but as far as I can tell the articles don't support that claim. They do say that computer-generated music exists, but neither article even mentions elevator music in particular, so I think the sentence as written is speculative at best. 2600:8806:6501:4D00:251A:A2ED:4CDD:728 (talk) 19:11, 21 February 2024 (UTC)

license: Creative Commons - Attribution Share-Alike - https://creativecommons.org/licenses/by-sa/4.0/

title: Talk:Elevator music


text:
Single instruction, multiple data

Single instruction, multiple data (SIMD) is a type of parallel processing in Flynn's taxonomy. SIMD can be internal (part of the hardware design) and it can be directly accessible through an instruction set architecture (ISA), but it should not be confused with an ISA. SIMD describes computers with multiple processing elements that perform the same operation on multiple data points simultaneously.

Such machines exploit data level parallelism, but not concurrency: there are simultaneous (parallel) computations, but each unit performs the exact same instruction at any given moment (just with different data). SIMD is particularly applicable to common tasks such as adjusting the contrast in a digital image or adjusting the volume of digital audio. Most modern CPU designs include SIMD instructions to improve the performance of multimedia use. SIMD has three different subcategories in Flynn's 1972 Taxonomy, one of which is SIMT. SIMT should not be confused with software threads or hardware threads, both of which are task time-sharing (time-slicing). SIMT is true simultaneous parallel hardware-level execution.

Modern graphics processing units (GPUs) are often wide SIMD implementations.

History
The first use of SIMD instructions was in the ILLIAC IV, which was completed in 1966.

SIMD was the basis for vector supercomputers of the early 1970s such as the CDC Star-100 and the Texas Instruments ASC, which could operate on a "vector" of data with a single instruction. Vector processing was especially popularized by Cray in the 1970s and 1980s. Vector processing architectures are now considered separate from SIMD computers: Duncan's Taxonomy includes them whereas Flynn's Taxonomy does not, due to Flynn's work (1966, 1972) pre-dating the Cray-1 (1977).

The first era of modern SIMD computers was characterized by massively parallel processing-style supercomputers such as the Thinking Machines CM-1 and CM-2. These computers had many limited-functionality processors that would work in parallel. For example, each of 65,536 single-bit processors in a Thinking Machines CM-2 would execute the same instruction at the same time, allowing, for instance, to logically combine 65,536 pairs of bits at a time, using a hypercube-connected network or processor-dedicated RAM to find its operands. Supercomputing moved away from the SIMD approach when inexpensive scalar MIMD approaches based on commodity processors such as the Intel i860 XP became more powerful, and interest in SIMD waned.

The current era of SIMD processors grew out of the desktop-computer market rather than the supercomputer market. As desktop processors became powerful enough to support real-time gaming and audio/video processing during the 1990s, demand grew for this particular type of computing power, and microprocessor vendors turned to SIMD to meet the demand. Hewlett-Packard introduced MAX instructions into PA-RISC 1.1 desktops in 1994 to accelerate MPEG decoding. Sun Microsystems introduced SIMD integer instructions in its "VIS" instruction set extensions in 1995, in its UltraSPARC I microprocessor. MIPS followed suit with their similar MDMX system.

The first widely deployed desktop SIMD was with Intel's MMX extensions to the x86 architecture in 1996. This sparked the introduction of the much more powerful AltiVec system in the Motorola PowerPC and IBM's POWER systems. Intel responded in 1999 by introducing the all-new SSE system. Since then, there have been several extensions to the SIMD instruction sets for both architectures. Advanced vector extensions AVX, AVX2 and AVX-512 are developed by Intel. AMD supports AVX, AVX2, and AVX-512 in their current products.

All of these developments have been oriented toward support for real-time graphics, and are therefore oriented toward processing in two, three, or four dimensions, usually with vector lengths of between two and sixteen words, depending on data type and architecture. When new SIMD architectures need to be distinguished from older ones, the newer architectures are then considered "short-vector" architectures, as earlier SIMD and vector supercomputers had vector lengths from 64 to 64,000. A modern supercomputer is almost always a cluster of MIMD computers, each of which implements (short-vector) SIMD instructions.

Advantages
An application that may take advantage of SIMD is one where the same value is being added to (or subtracted from) a large number of data points, a common operation in many multimedia applications. One example would be changing the brightness of an image. Each pixel of an image consists of three values for the brightness of the red (R), green (G) and blue (B) portions of the color. To change the brightness, the R, G and B values are read from memory, a value is added to (or subtracted from) them, and the resulting values are written back out to memory. Audio DSPs would likewise, for volume control, multiply both Left and Right channels simultaneously.

With a SIMD processor there are two improvements to this process. For one the data is understood to be in blocks, and a number of values can be loaded all at once. Instead of a series of instructions saying "retrieve this pixel, now retrieve the next pixel", a SIMD processor will have a single instruction that effectively says "retrieve n pixels" (where n is a number that varies from design to design). For a variety of reasons, this can take much less time than retrieving each pixel individually, as with a traditional CPU design.

Another advantage is that the instruction operates on all loaded data in a single operation. In other words, if the SIMD system works by loading up eight data points at once, the  operation being applied to the data will happen to all eight values at the same time. This parallelism is separate from the parallelism provided by a superscalar processor; the eight values are processed in parallel even on a non-superscalar processor, and a superscalar processor may be able to perform multiple SIMD operations in parallel.

Disadvantages

 * Not all algorithms can be vectorized easily. For example, a flow-control-heavy task like code parsing may not easily benefit from SIMD; however, it is theoretically possible to vectorize comparisons and "batch flow" to target maximal cache optimality, though this technique will require more intermediate state. Note: Batch-pipeline systems (example: GPUs or software rasterization pipelines) are most advantageous for cache control when implemented with SIMD intrinsics, but they are not exclusive to SIMD features. Further complexity may be apparent to avoid dependence within series such as code strings; while independence is required for vectorization.
 * Large register files which increases power consumption and required chip area.
 * Currently, implementing an algorithm with SIMD instructions usually requires human labor; most compilers do not generate SIMD instructions from a typical C program, for instance. Automatic vectorization in compilers is an active area of computer science research. (Compare vector processing.)
 * Programming with particular SIMD instruction sets can involve numerous low-level challenges.
 * SIMD may have restrictions on data alignment; programmers familiar with one particular architecture may not expect this. Worse: the alignment may change from one revision or "compatible" processor to another.
 * Gathering data into SIMD registers and scattering it to the correct destination locations is tricky (sometimes requiring permute operations) and can be inefficient.
 * Specific instructions like rotations or three-operand addition are not available in some SIMD instruction sets.
 * Instruction sets are architecture-specific: some processors lack SIMD instructions entirely, so programmers must provide non-vectorized implementations (or different vectorized implementations) for them.
 * Different architectures provide different register sizes (e.g. 64, 128, 256 and 512 bits) and instruction sets, meaning that programmers must provide multiple implementations of vectorized code to operate optimally on any given CPU. In addition, the possible set of SIMD instructions grows with each new register size. Unfortunately, for legacy support reasons, the older versions cannot be retired.
 * The early MMX instruction set shared a register file with the floating-point stack, which caused inefficiencies when mixing floating-point and MMX code. However, SSE2 corrects this.

To remedy problems 1 and 5, RISC-V's vector extension uses an alternative approach: instead of exposing the sub-register-level details to the programmer, the instruction set abstracts them out as a few "vector registers" that use the same interfaces across all CPUs with this instruction set. The hardware handles all alignment issues and "strip-mining" of loops. Machines with different vector sizes would be able to run the same code. LLVM calls this vector type "vscale".

An order of magnitude increase in code size is not uncommon, when compared to equivalent scalar or equivalent vector code, and an order of magnitude or greater effectiveness (work done per instruction) is achievable with Vector ISAs.

ARM's Scalable Vector Extension takes another approach, known in Flynn's Taxonomy as "Associative Processing", more commonly known today as "Predicated" (masked) SIMD. This approach is not as compact as Vector processing but is still far better than non-predicated SIMD. Detailed comparative examples are given in the Vector processing page.

Hardware
Small-scale (64 or 128 bits) SIMD became popular on general-purpose CPUs in the early 1990s and continued through 1997 and later with Motion Video Instructions (MVI) for Alpha. SIMD instructions can be found, to one degree or another, on most CPUs, including IBM's AltiVec and SPE for PowerPC, HP's PA-RISC Multimedia Acceleration eXtensions (MAX), Intel's MMX and iwMMXt, SSE, SSE2, SSE3 SSSE3 and SSE4.x, AMD's 3DNow!, ARC's ARC Video subsystem, SPARC's VIS and VIS2, Sun's MAJC, ARM's Neon technology, MIPS' MDMX (MaDMaX) and MIPS-3D. The IBM, Sony, Toshiba co-developed Cell Processor's SPU's instruction set is heavily SIMD based. Philips, now NXP, developed several SIMD processors named Xetal. The Xetal has 320 16-bit processor elements especially designed for vision tasks.

Intel's AVX-512 SIMD instructions process 512 bits of data at once.

Software

SIMD instructions are widely used to process 3D graphics, although modern graphics cards with embedded SIMD have largely taken over this task from the CPU. Some systems also include permute functions that re-pack elements inside vectors, making them particularly useful for data processing and compression. They are also used in cryptography. The trend of general-purpose computing on GPUs (GPGPU) may lead to wider use of SIMD in the future.

Adoption of SIMD systems in personal computer software was at first slow, due to a number of problems. One was that many of the early SIMD instruction sets tended to slow overall performance of the system due to the re-use of existing floating point registers. Other systems, like MMX and 3DNow!, offered support for data types that were not interesting to a wide audience and had expensive context switching instructions to switch between using the FPU and MMX registers. Compilers also often lacked support, requiring programmers to resort to assembly language coding.

SIMD on x86 had a slow start. The introduction of 3DNow! by AMD and SSE by Intel confused matters somewhat, but today the system seems to have settled down (after AMD adopted SSE) and newer compilers should result in more SIMD-enabled software. Intel and AMD now both provide optimized math libraries that use SIMD instructions, and open source alternatives like libSIMD, SIMDx86 and SLEEF have started to appear (see also libm).

Apple Computer had somewhat more success, even though they entered the SIMD market later than the rest. AltiVec offered a rich system and can be programmed using increasingly sophisticated compilers from Motorola, IBM and GNU, therefore assembly language programming is rarely needed. Additionally, many of the systems that would benefit from SIMD were supplied by Apple itself, for example iTunes and QuickTime. However, in 2006, Apple computers moved to Intel x86 processors. Apple's APIs and development tools (XCode) were modified to support SSE2 and SSE3 as well as AltiVec. Apple was the dominant purchaser of PowerPC chips from IBM and Freescale Semiconductor. Even though Apple has stopped using PowerPC processors in their products, further development of AltiVec is continued in several PowerPC and Power ISA designs from Freescale and IBM.

SIMD within a register, or SWAR, is a range of techniques and tricks used for performing SIMD in general-purpose registers on hardware that does not provide any direct support for SIMD instructions. This can be used to exploit parallelism in certain algorithms even on hardware that does not support SIMD directly.

Programmer interface
It is common for publishers of the SIMD instruction sets to make their own C/C++ language extensions with intrinsic functions or special datatypes (with operator overloading) guaranteeing the generation of vector code. Intel, AltiVec, and ARM NEON provide extensions widely adopted by the compilers targeting their CPUs. (More complex operations are the task of vector math libraries.)

The GNU C Compiler takes the extensions a step further by abstracting them into a universal interface that can be used on any platform by providing a way of defining SIMD datatypes. The LLVM Clang compiler also implements the feature, with an analogous interface defined in the IR. Rust's packed_simd crate (and the experimental std::sims) uses this interface, and so does Swift 2.0+.

C++ has an experimental interface std::experimental::simd that works similarly to the GCC extension. LLVM's libcxx seems to implement it. For GCC and libstdc++, a wrapper library that builds on top of the GCC extension is available.

Microsoft added SIMD to .NET in RyuJIT. The System.Numerics.Vector package, available on NuGet, implements SIMD datatypes. Java also has a new proposed API for SIMD instructions available in OpenJDK 17 in an incubator module. It also has a safe fallback mechanism on unsupported CPUs to simple loops.

Instead of providing an SIMD datatype, compilers can also be hinted to auto-vectorize some loops, potentially taking some assertions about the lack of data dependency. This is not as flexible as manipulating SIMD variables directly, but is easier to use. OpenMP 4.0+ has a #pragma omp simd hint. This OpenMP interface has replaced a wide set of nonstandard extensions, including Cilk's #pragma simd, GCC's #pragma GCC ivdep, and many more.

SIMD multi-versioning
Consumer software is typically expected to work on a range of CPUs covering multiple generations, which could limit the programmer's ability to use new SIMD instructions to improve the computational performance of a program. The solution is to include multiple versions of the same code that uses either older or newer SIMD technologies, and pick one that best fits the user's CPU at run-time (dynamic dispatch). There are two main camps of solutions:
 * Function multi-versioning (FMV): a subroutine in the program or a library is duplicated and compiled for many instruction set extensions, and the program decides which one to use at run-time.
 * Library multi-versioning (LMV): the entire programming library is duplicated for many instruction set extensions, and the operating system or the program decides which one to load at run-time.

FMV, manually coded in assembly language, is quite commonly used in a number of performance-critical libraries such as glibc and libjpeg-turbo. Intel C++ Compiler, GNU Compiler Collection since GCC 6, and Clang since clang 7 allow for a simplified approach, with the compiler taking care of function duplication and selection. GCC and clang requires explicit target_clones labels in the code to "clone" functions, while ICC does so automatically (under the command-line option /Qax). The Rust programming language also supports FMV. The setup is similar to GCC and Clang in that the code defines what instruction sets to compile for, but cloning is manually done via inlining.

As using FMV requires code modification on GCC and Clang, vendors more commonly use library multi-versioning: this is easier to achieve as only compiler switches need to be changed. Glibc supports LMV and this functionality is adopted by the Intel-backed Clear Linux project.

SIMD on the web
In 2013 John McCutchan announced that he had created a high-performance interface to SIMD instruction sets for the Dart programming language, bringing the benefits of SIMD to web programs for the first time. The interface consists of two types:
 * Float32x4, 4 single precision floating point values.
 * Int32x4, 4 32-bit integer values.

Instances of these types are immutable and in optimized code are mapped directly to SIMD registers. Operations expressed in Dart typically are compiled into a single instruction without any overhead. This is similar to C and C++ intrinsics. Benchmarks for 4×4 matrix multiplication, 3D vertex transformation, and Mandelbrot set visualization show near 400% speedup compared to scalar code written in Dart.

McCutchan's work on Dart, now called SIMD.js, has been adopted by ECMAScript and Intel announced at IDF 2013 that they are implementing McCutchan's specification for both V8 and SpiderMonkey. However, by 2017, SIMD.js has been taken out of the ECMAScript standard queue in favor of pursuing a similar interface in WebAssembly. As of August 2020, the WebAssembly interface remains unfinished, but its portable 128-bit SIMD feature has already seen some use in many engines.

Emscripten, Mozilla's C/C++-to-JavaScript compiler, with extensions can enable compilation of C++ programs that make use of SIMD intrinsics or GCC-style vector code to the SIMD API of JavaScript, resulting in equivalent speedups compared to scalar code. It also supports (and now prefers) the WebAssembly 128-bit SIMD proposal.

Commercial applications
It has generally proven difficult to find sustainable commercial applications for SIMD-only processors.

One that has had some measure of success is the GAPP, which was developed by Lockheed Martin and taken to the commercial sector by their spin-off Teranex. The GAPP's recent incarnations have become a powerful tool in real-time video processing applications like conversion between various video standards and frame rates (NTSC to/from PAL, NTSC to/from HDTV formats, etc.), deinterlacing, image noise reduction, adaptive video compression, and image enhancement.

A more ubiquitous application for SIMD is found in video games: nearly every modern video game console since 1998 has incorporated a SIMD processor somewhere in its architecture. The PlayStation 2 was unusual in that one of its vector-float units could function as an autonomous DSP executing its own instruction stream, or as a coprocessor driven by ordinary CPU instructions. 3D graphics applications tend to lend themselves well to SIMD processing as they rely heavily on operations with 4-dimensional vectors. Microsoft's Direct3D 9.0 now chooses at runtime processor-specific implementations of its own math operations, including the use of SIMD-capable instructions.

A later processor that used vector processing is the Cell Processor used in the Playstation 3, which was developed by IBM in cooperation with Toshiba and Sony. It uses a number of SIMD processors (a NUMA architecture, each with independent local store and controlled by a general purpose CPU) and is geared towards the huge datasets required by 3D and video processing applications. It differs from traditional ISAs by being SIMD from the ground up with no separate scalar registers.

Ziilabs produced an SIMD type processor for use on mobile devices, such as media players and mobile phones.

Larger scale commercial SIMD processors are available from ClearSpeed Technology, Ltd. and Stream Processors, Inc. ClearSpeed's CSX600 (2004) has 96 cores each with two double-precision floating point units while the CSX700 (2008) has 192. Stream Processors is headed by computer architect Bill Dally. Their Storm-1 processor (2007) contains 80 SIMD cores controlled by a MIPS CPU.

title: Single instruction, multiple data


text:
AltiVec

AltiVec is a single-precision floating point and integer SIMD instruction set designed and owned by Apple, IBM, and Freescale Semiconductor (formerly Motorola's Semiconductor Products Sector) — the AIM alliance. It is implemented on versions of the PowerPC processor architecture, including Motorola's G4, IBM's G5 and POWER6 processors, and P.A. Semi's PWRficient PA6T. AltiVec is a trademark owned solely by Freescale, so the system is also referred to as Velocity Engine by Apple and VMX (Vector Multimedia Extension) by IBM and P.A. Semi.

While AltiVec refers to an instruction set, the implementations in CPUs produced by IBM and Motorola are separate in terms of logic design. To date, no IBM core has included an AltiVec logic design licensed from Motorola or vice versa.

AltiVec is a standard part of the Power ISA v.2.03 specification. It was never formally a part of the PowerPC architecture until this specification although it used PowerPC instruction formats and syntax and occupied the opcode space expressly allocated for such purposes.

Comparison to x86-64 SSE
Both VMX/AltiVec and SSE feature 128-bit vector registers that can represent sixteen 8-bit signed or unsigned chars, eight 16-bit signed or unsigned shorts, four 32-bit ints or four 32-bit floating-point variables. Both provide cache-control instructions intended to minimize cache pollution when working on streams of data.

They also exhibit important differences. Unlike SSE2, VMX/AltiVec supports a special RGB "pixel" data type, but it does not operate on 64-bit double-precision floats, and there is no way to move data directly between scalar and vector registers. In keeping with the "load/store" model of the PowerPC's RISC design, the vector registers, like the scalar registers, can only be loaded from and stored to memory. However, VMX/AltiVec provides a much more complete set of "horizontal" operations that work across all the elements of a vector; the allowable combinations of data type and operations are much more complete. Thirty-two 128-bit vector registers are provided, compared to eight for SSE and SSE2 (extended to 16 in x86-64), and most VMX/AltiVec instructions take three register operands compared to only two register/register or register/memory operands on IA-32.

VMX/AltiVec is also unique in its support for a flexible vector permute instruction, in which each byte of a resulting vector value can be taken from any byte of either of two other vectors, parametrized by yet another vector. This allows for sophisticated manipulations in a single instruction.

Recent versions of the GNU Compiler Collection (GCC), IBM VisualAge compiler and other compilers provide intrinsics to access VMX/AltiVec instructions directly from C and C++ programs. As of version 4, the GCC also includes auto-vectorization capabilities that attempt to intelligently create VMX/Altivec accelerated binaries without the need for the programmer to use intrinsics directly. The "vector" type keyword is introduced to permit the declaration of native vector types, e.g., " " declares a 128-bit vector variable named "foo" containing sixteen 8-bit unsigned chars. The full complement of arithmetic and binary operators is defined on vector types so that the normal C expression language can be used to manipulate vector variables. There are also overloaded intrinsic functions such as " " that emit the appropriate opcode based on the type of the elements within the vector, and very strong type checking is enforced. In contrast, the Intel-defined data types for IA-32 SIMD registers declare only the size of the vector register (128 or 64 bits) and in the case of a 128-bit register, whether it contains integers or floating-point values. The programmer must select the appropriate intrinsic for the data types in use, e.g., " " for adding two vectors containing eight 16-bit integers.

Development history
The Power Vector Media Extension (VMX) was developed between 1996 and 1998 by a collaborative project between Apple, IBM, and Motorola. Apple was the primary customer for Power Vector Media Extension (VMX) until Apple switched to Intel-made, x86-based CPUs on June 6, 2005. They used it to accelerate multimedia applications such as QuickTime, iTunes and key parts of Apple's Mac OS X including in the Quartz graphics compositor. Other companies such as Adobe used AltiVec to optimize their image-processing programs such as Adobe Photoshop. Motorola was the first to supply AltiVec enabled processors starting with their G4 line. AltiVec was also used in some embedded systems for high-performance digital signal processing.

IBM consistently left VMX out of their earlier POWER microprocessors, which were intended for server applications where it was not very useful. The POWER6 microprocessor, introduced in 2007, implements AltiVec. The last desktop microprocessor from IBM, the PowerPC 970 (dubbed the "G5" by Apple) also implemented AltiVec with hardware similar to that of the PowerPC 7400.

AltiVec is a brandname trademarked by Freescale (previously Motorola) for the standard Category:Vector part of the Power ISA v.2.03 specification. This category is also known as VMX (used by IBM), and "Velocity Engine" (a brand name previously used by Apple).

The Cell Broadband Engine, used in (amongst other things) the PlayStation 3, also supports Power Vector Media Extension (VMX) in its PPU, with the SPU ISA being enhanced but architecturally similar.

Freescale is bringing an enhanced version of AltiVec to e6500 based QorIQ processors.

VMX128
IBM enhanced VMX for use in Xenon (Xbox 360) and called this enhancement VMX128. The enhancements comprise new routines targeted at gaming (accelerating 3D graphics and game physics) and a total of 128 registers. VMX128 is not entirely compatible with VMX/Altivec, as a number of integer operations were removed to make space for the larger register file and additional application-specific operations.

VSX (Vector Scalar Extension)
Power ISA v2.06 introduced VSX vector-scalar instructions which extend SIMD processing for the Power ISA to support up to 64 registers, with support for regular floating point, decimal floating point and vector execution. POWER7 is the first Power ISA processor to implement Power ISA v2.06.

New instructions are introduced by IBM under the Vector Media Extension category for integer operations as part of the VSX extension in Power ISA 2.07.

New integer vector instructions were introduced by IBM following the VMX encodings as part of the VSX extension in Power ISA v3.0. Shall be introduced with POWER9 processors.

Issues
In C++, the standard way of accessing AltiVec support is mutually exclusive with the use of the Standard Template Library  class template due to the treatment of "vector" as a reserved word when the compiler does not implement the context-sensitive keyword version of vector. However, it may be possible to combine them using compiler-specific workarounds; for instance, in GCC one may do  to remove the   keyword, and then use the GCC-specific   keyword in its place.

AltiVec prior to Power ISA 2.06 with VSX lacks loading from memory using a type's natural alignment. For example, the code below requires special handling for Power6 and below when the effective address is not 16-byte aligned. The special handling adds 3 additional instructions to a load operation when VSX is not available.

AltiVec prior to Power ISA 2.06 with VMX lacks 64-bit integer support. Developers who wish to operate on 64-bit data will develop routines from 32-bit components. For example, below are examples of 64-bit  and   in C using a vector with four 32-bit words on a big-endian machine. The permutes move the carry and borrow bits from columns 1 and 3 to columns 0 and 2 like in school-book math. A little-endian machine would need a different mask.

Power ISA 2.07 used in Power8 finally provided the 64-bit double words. A developer working with Power8 needs only to perform the following.

Implementations
The following processors have AltiVec, VMX or VMX128 included

Motorola/Freescale

 * MPC7400
 * MPC7410
 * MPC7450
 * MPC7445/7455
 * MPC7447/7447A/7457
 * MPC7448
 * MPC8641/8641D
 * MPC8640/8640D
 * MPC8610
 * T2081/T2080
 * T4080/T4160/T4240
 * B4420/B4860

IBM

 * PowerPC 970
 * PowerPC 970FX
 * PowerPC 970MP
 * Xenon
 * Cell B.E.
 * PowerXCell 8i
 * POWER6/POWER6+
 * POWER7/POWER7+
 * POWER8
 * POWER9
 * Power10

P.A. Semi

 * PA6T

Software Applications
The following software applications are known to leverage AltiVec or VMX hardware acceleration.

 * Helios has a native POWER9 / POWER10 port with support for VMX.

title: AltiVec


text:
78 BC

Year 78 BC was a year of the pre-Julian Roman calendar. At the time it was known as the Year of the Consulship of Lepidus and Catulus. Later and less frequently, it was known as the year 676 AUC). The denomination 78 BC for this year has been used since the early medieval period, when the Anno Domini calendar era became the prevalent method in Europe for naming years.

Roman Republic

 * In Rome, Marcus Aemilius Lepidus becomes consul. He attempts to undermine the Sullan reforms, quarrels with his consular colleague, is sent to govern Transalpine Gaul, and initiates a rebellion against the Senate with his army there.
 * The Senate sends Publius Servilius Vatia to Cilicia as governor, where he fights a successful campaign against the Piracy in southern Anatolia (Lycia, Pamphylia and Isauria), he is thereafter known by the agnomen Isauricus.
 * The Tabularium is built in the Forum.
 * The Third Dalmatian war begins.
 * Julius Caesar returns to Rome after about two years of service in the army

Births

 * Jing Fang, Chinese mathematician and music theorist (d. 37 BC)

Deaths

 * Lucius Cornelius Sulla, Roman general and statesman (b. 138 BC)

title: 78 BC


text:
79 BC

Year 79 BC was a year of the pre-Julian Roman calendar. At the time it was known as the Year of the Consulship of Vatia Isauricus and Claudius Pulcher (or, less frequently, year 675 Ab urbe condita). The denomination 79 BC for this year has been used since the early medieval period, when the Anno Domini calendar era became the prevalent method in Europe for naming years.

Roman republic

 * Sulla renounces his dictatorship.
 * Cicero travels to Athens and then to Rhodes to continue his studies of philosophy and oratory.

Deaths

 * Sulla dies in Campania

title: 79 BC


text:
MMX (instruction set)

MMX is a single instruction, multiple data (SIMD) instruction set architecture designed by Intel, introduced on January 8, 1997 with its Pentium P5 (microarchitecture) based line of microprocessors, named "Pentium with MMX Technology". It developed out of a similar unit introduced on the Intel i860, and earlier the Intel i750 video pixel processor. MMX is a processor supplementary capability that is supported on IA-32 processors by Intel and other vendors. AMD also added MMX instruction set in its K6 processor.

The New York Times described the initial push, including Super Bowl advertisements, as focused on "a new generation of glitzy multimedia products, including videophones and 3-D video games."

MMX has subsequently been extended by several programs by Intel and others: 3DNow!, Streaming SIMD Extensions (SSE), and ongoing revisions of Advanced Vector Extensions (AVX).

Naming
MMX is officially a meaningless initialism trademarked by Intel; unofficially, the initials have been variously explained as standing for
 * MultiMedia eXtension, or
 * Matrix Math eXtension.

Advanced Micro Devices (AMD), during one of its many court battles with Intel, produced marketing material from Intel indicating that MMX stood for "Matrix Math Extensions". Since an initialism cannot be trademarked, this was an attempt to invalidate Intel's trademark. In 1995, Intel filed suit against AMD and Cyrix Corp. for misuse of its trademark MMX. AMD and Intel settled, with AMD acknowledging MMX as a trademark owned by Intel, and with Intel granting AMD rights to use the MMX trademark as a technology name, but not a processor name.

Technical details
MMX defines eight processor registers, named MM0 through MM7, and operations that operate on them. Each register is 64 bits wide and can be used to hold either 64-bit integers, or multiple smaller integers in a "packed" format: one instruction can then be applied to two 32-bit integers, four 16-bit integers, or eight 8-bit integers at once.

MMX provides only integer operations. When originally developed, for the Intel i860, the use of integer math made sense (both 2D and 3D calculations required it), but as graphics cards that did much of this became common, integer SIMD in the CPU became somewhat redundant for graphical applications. Alternatively, the saturation arithmetic operations in MMX could significantly speed up some digital signal processing applications.

To avoid compatibility problems with the context switch mechanisms in existing operating systems, the MMX registers are aliases for the existing x87 floating-point unit (FPU) registers, which context switches would already save and restore. Unlike the x87 registers, which behave like a stack, the MMX registers are each directly addressable (random access).

Any operation involving the floating-point stack might also affect the MMX registers and vice versa, so this aliasing makes it difficult to work with floating-point and SIMD operations in the same program. To maximize performance, software often used the processor exclusively in one mode or the other, deferring the relatively slow switch between them as long as possible.

Each 64-bit MMX register corresponds to the mantissa part of an 80-bit x87 register. The upper 16 bits of the x87 registers thus go unused in MMX, and these bits are all set to ones, making them Not a Number (NaN) data types, or infinities in the floating-point representation. This can be used by software to decide whether a given register's content is intended as floating-point or SIMD data.

Software support
Software support for MMX developed slowly. Intel's C Compiler and related development tools obtained intrinsics for invoking MMX instructions and Intel released libraries of common vectorized algorithms using MMX. Both Intel and Metrowerks attempted automatic vectorization in their compilers, but the operations in the C programming language mapped poorly onto the MMX instruction set and custom algorithms as of 2000 typically still had to be written in assembly language.

Successors
AMD, a competing x86 microprocessor vendor, enhanced Intel's MMX with their own 3DNow! instruction set. 3DNow is best known for adding single-precision (32-bit) floating-point support to the SIMD instruction-set, among other integer and more general enhancements.

Following MMX, Intel's next major x86 extension was the Streaming SIMD Extensions (SSE), introduced with the Pentium III family in 1999, roughly a year after AMD's 3DNow! was introduced.

SSE addressed the core shortcomings of MMX (inability to mix integer-SIMD ops with any floating-point ops) by creating a new 128-bit wide register file (XMM0–XMM7) and new SIMD instructions for it. Like 3DNow!, SSE focused exclusively on single-precision floating-point operations (32-bit); integer SIMD operations were still performed using the MMX register and instruction set. However, the new XMM register-file allowed SSE SIMD-operations to be freely mixed with either MMX or x87 FPU ops.

Streaming SIMD Extensions 2 (SSE2), introduced with the Pentium 4, further extended the x86 SIMD instruction set with integer (8/16/32 bit) and double-precision floating-point data support for the XMM register file. SSE2 also allowed the MMX operation codes (opcodes) to use XMM register operands, extended to even wider YMM and ZMM registers by later SSE revisions.

MMX in embedded applications
Intel's and Marvell Technology Group's XScale microprocessor core starting with PXA270 include an SIMD instruction set architecture extension to the ARM architecture core named Intel Wireless MMX Technology (iwMMXt) which functions are similar to those of the IA-32 MMX extension. It provides arithmetic and logic operations on 64-bit integer numbers, in which the software may choose to instead perform two 32-bit, four 16-bit or eight 8-bit operations in one instruction. The extension contains 16 data registers of 64-bits and eight control registers of 32-bits. All registers are accessed through standard ARM architecture coprocessor mapping mechanism. iwMMXt occupies coprocessors 0 and 1 space, and some of its opcodes clash with the opcodes of the earlier floating-point extension, FPA.

Later versions of Marvell's ARM processors support both Wireless MMX (WMMX) and Wireless MMX2 (WMMX2) opcodes.

title: MMX (instruction set)


text:
Streaming SIMD Extensions

In computing, Streaming SIMD Extensions (SSE) is a single instruction, multiple data (SIMD) instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series of central processing units (CPUs) shortly after the appearance of Advanced Micro Devices (AMD's) 3DNow!. SSE contains 70 new instructions (65 unique mnemonics using 70 encodings), most of which work on single precision floating-point data. SIMD instructions can greatly increase performance when exactly the same operations are to be performed on multiple data objects. Typical applications are digital signal processing and graphics processing.

Intel's first IA-32 SIMD effort was the MMX instruction set. MMX had two main problems: it re-used existing x87 floating-point registers making the CPUs unable to work on both floating-point and SIMD data at the same time, and it only worked on integers. SSE floating-point instructions operate on a new independent register set, the XMM registers, and adds a few integer instructions that work on MMX registers.

SSE was subsequently expanded by Intel to SSE2, SSE3, SSSE3 and SSE4. Because it supports floating-point math, it had wider applications than MMX and became more popular. The addition of integer support in SSE2 made MMX largely redundant, though further performance increases can be attained in some situations by using MMX in parallel with SSE operations.

SSE was originally called Katmai New Instructions (KNI), Katmai being the code name for the first Pentium III core revision. During the Katmai project Intel sought to distinguish it from their earlier product line, particularly their flagship Pentium II. It was later renamed Internet Streaming SIMD Extensions (ISSE ), then SSE.

AMD added a subset of SSE, 19 of them, called new MMX instructions, and known as several variants and combinations of SSE and MMX, shortly after with the release of the original Athlon in August 1999, see 3DNow! extensions. AMD eventually added full support for SSE instructions, starting with its Athlon XP and Duron (Morgan core) processors.

Registers
SSE originally added eight new 128-bit registers known as  through. The AMD64 extensions from AMD (originally called x86-64) added a further eight registers  through , and this extension is duplicated in the Intel 64 architecture. There is also a new 32-bit control/status register,. The registers  through   are accessible only in 64-bit operating mode.

SSE used only a single data type for XMM registers:
 * four 32-bit single-precision floating-point numbers

SSE2 would later expand the usage of the XMM registers to include:
 * two 64-bit double-precision floating-point numbers or
 * two 64-bit integers or
 * four 32-bit integers or
 * eight 16-bit short integers or
 * sixteen 8-bit bytes or characters.

Because these 128-bit registers are additional machine states that the operating system must preserve across task switches, they are disabled by default until the operating system explicitly enables them. This means that the OS must know how to use the  and   instructions, which is the extended pair of instructions that can save all x86 and SSE register states at once. This support was quickly added to all major IA-32 operating systems.

The first CPU to support SSE, the Pentium III, shared execution resources between SSE and the floating-point unit (FPU). While a compiled application can interleave FPU and SSE instructions side-by-side, the Pentium III will not issue an FPU and an SSE instruction in the same clock cycle. This limitation reduces the effectiveness of pipelining, but the separate XMM registers do allow SIMD and scalar floating-point operations to be mixed without the performance hit from explicit MMX/floating-point mode switching.

SSE instructions
SSE introduced both scalar and packed floating-point instructions.

Floating-point instructions

 * Memory-to-register/register-to-memory/register-to-register data movement
 * Scalar –
 * Packed –
 * Arithmetic
 * Scalar –
 * Packed –
 * Compare
 * Scalar –
 * Packed –
 * Data shuffle and unpacking
 * Packed –
 * Data-type conversion
 * Scalar –
 * Packed –
 * Bitwise logical operations
 * Packed –

Integer instructions

 * Arithmetic
 * Data movement
 * Other
 * Other
 * Other

Other instructions

 * management
 * Cache and Memory management
 * Cache and Memory management

Example
The following simple example demonstrates the advantage of using SSE. Consider an operation like vector addition, which is used very often in computer graphics applications. To add two single precision, four-component vectors together using x86 requires four floating-point addition instructions.

This corresponds to four x86 FADD instructions in the object code. On the other hand, as the following pseudo-code shows, a single 128-bit 'packed-add' instruction can replace the four scalar addition instructions.

Later versions

 * SSE2, Willamette New Instructions (WNI), introduced with the Pentium 4, is a major enhancement to SSE. SSE2 adds two major features: double-precision (64-bit) floating-point for all SSE operations, and MMX integer operations on 128-bit XMM registers. In the original SSE instruction set, conversion to and from integers placed the integer data in the 64-bit MMX registers. SSE2 enables the programmer to perform SIMD math on any data type (from 8-bit integer to 64-bit float) entirely with the XMM vector-register file, without the need to use the legacy MMX or FPU registers. It offers an orthogonal set of instructions for dealing with common data types.
 * SSE3, also called Prescott New Instructions (PNI), is an incremental upgrade to SSE2, adding a handful of DSP-oriented mathematics instructions and some process (thread) management instructions. It also allowed addition or multiplication of two numbers that are stored in the same register, which wasn't possible in SSE2 and earlier. This capability, known as horizontal in Intel terminology, was the major addition to the SSE3 instruction set. AMD's 3DNow! extension could do the latter too.
 * SSSE3, Merom New Instructions (MNI), is an upgrade to SSE3, adding 16 new instructions which include permuting the bytes in a word, multiplying 16-bit fixed-point numbers with correct rounding, and within-word accumulate instructions. SSSE3 is often mistaken for SSE4 as this term was used during the development of the Core microarchitecture.
 * SSE4, Penryn New Instructions (PNI), is another major enhancement, adding a dot product instruction, additional integer instructions, a  instruction (Population count: count number of bits set to 1, used extensively e.g. in cryptography), and more.
 * XOP, FMA4 and CVT16 are new iterations announced by AMD in August 2007 and revised in May 2009.
 * Advanced Vector Extensions (AVX), Gesher New Instructions (GNI), is an advanced version of SSE announced by Intel featuring a widened data path from 128 bits to 256 bits and 3-operand instructions (up from 2). Intel released processors in early 2011 with AVX support.
 * AVX2 is an expansion of the AVX instruction set.
 * AVX-512 (3.1 and 3.2) are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture.

Identifying
The following programs can be used to determine which, if any, versions of SSE are supported on a system
 * Intel Processor Identification Utility
 * CPU-Z – CPU, motherboard, and memory identification utility.
 * lscpu - provided by the util-linux package in most Linux distributions.

title: Streaming SIMD Extensions


text:
Port Arthur

Port Arthur may refer to:

Australia

 * Port Arthur, Tasmania, the site of a historic convict settlement
 * Port Arthur massacre (Australia), which occurred in Port Arthur, Tasmania in 1996
 * Port Arthur, South Australia, a locality

Canada

 * Port Arthur, Ontario, a former city, now a part of Thunder Bay
 * Port Arthur (federal electoral district)

China

 * Port Arthur, China, now called Lüshunkou District, in the city of Dalian
 * Port Arthur massacre (China) in the Sino-Japanese War in 1894
 * Battle of Port Arthur, a sea battle in the Russo-Japanese War in 1904
 * Siege of Port Arthur, a land battle in 1904

Finland

 * VIII District, Turku, a district in Turku

United States

 * Port Arthur, Texas, a city in the United States
 * Port Arthur, Wisconsin, an unincorporated community

Popular culture

 * Port Arthur (film), a 1936 drama film directed by Nicolas Farkas

Port Arthur

title: Port Arthur


text:
Talk:War in Afghanistan (2001–2021)/Archive 2

Naming
I'm sympathetic to changing the name to U.S. invasion of Afghanistan. The initial title was 2001 Coalition Attack on Afghanistan, then 2001 U.S. Attack on Afghanistan (to reflect the U.S. lead), primarily referring to the initial attacks. Now that there has been an extended campaign, "invasion" seems more appropriate. --The Cunctator

 * I am amazed and humbled by your gentle attitude, and once again I apologize for my ad hominem remark. I am probably getting too close to this issue and need to get a grip... --Ed Poor 11:47 Aug 12, 2002 (PDT)

Opinion on the article
U.S. Military Response to the September 11 Terrorist Attack

Note: the Wikipedia neither opposes nor supports the US campaign against the Taliban. The title of this article is the result of compromise and negotiation among many contributors, not an endorsement of any point of view.

Although the phrase attack on Afghanistan carries a connotation suggestive of unilateral aggression to some readers, be advised that this is not the offical view of this encyclopedia and is not meant to demean the U.S. campaign in any way.

On the issue of terrorism and how civilized nations should respond to it, as on all controversial issues, the Wikipedia remains entirely neutral (see NPOV).

--- --- some of the wording is in present tense - should it be changed to past tense?

Though I am certainly sympathetic to the motive behind it, I think that the vague and non-NPOV term of "rogue" to refer to the Taliban government should be explained in a better way. --Daniel C. Boyer

"Al-Qaeda, furthermore, are suspected of conducting previous attacks against United States interests in East Africa and Arabia that killed over 400 people" -- It is more than suspected; it should be mentioned indictments have been issued.Daniel C. Boyer

There's really no place for the meta-commentary on the article title. See the earlier Talk for discussion. --The Cunctator

 * The only thing I see wrong with it is that "Attack" is capitalized; the only comment on that note that I see in the previous talk appears to agree with me. That, and the periods in "U.S.". --Brion

No doubt this will be contentious, so I should ask first: The article says that the Taliban refused to hand over bin Laden - this is false. The Taliban actually offered to hand over bin Laden if presented with evidence of his guilt, but the U.S. declined. (found a reference here after a quickie search: http://wwa.rte.ie/news/2001/0921/usreax.html) Granted, this doesn't mean they WOULD have complied if the U.S. had accepted their offer; I am more inclined to believe they would have found the evidence lacking. However, as it stands the article is misleading - the U.S. did not take all avenues offered to head off the attack. Graft 11:14 Aug 12, 2002 (PDT)
 * I read the article and come to a completely different conclusion: "The Taliban ambassador to Pakistan is reported to have said that his government could not force Osama bin Laden to leave Afghanistan. According to a news agency report, the ambassador said a council of the county's senior clerics had ruled that bin Laden should be persuaded to leave Afghanistan, not forcibly removed." The only offer I remember the Taliban making was that the would turn over bin Laden to a trial of Muslim clerics in a Muslim country. Rmhermen 11:25 Aug 12, 2002 (PDT)


text:
Hercules (emulator)

Hercules is a computer emulator allowing software written for IBM mainframe computers (System/370, System/390, and zSeries/System z) and for plug compatible mainframes (such as Amdahl machines) to run on other types of computer hardware, notably on low-cost personal computers. Development started in 1999 by Roger Bowler, a mainframe systems programmer.

Hercules runs under multiple parent operating systems including Linux, Microsoft Windows, FreeBSD, NetBSD, Solaris, and macOS and is released under the open source software license QPL. It is analogous to Bochs and QEMU in that it emulates CPU instructions and select peripheral devices only. A vendor (or distributor) must still provide an operating system, and the user must install it. Hercules was the first mainframe emulator to incorporate 64-bit z/Architecture support.

Design
The emulator is written almost entirely in C. Its developers ruled out using machine-specific assembly code to avoid problems with portability even though such code could significantly improve performance. There are two exceptions: Hercules uses hardware assists to provide inter-processor consistency when emulating multiple CPUs on SMP host systems, and Hercules uses assembler assists to convert between little-endian and big-endian data on platforms where the operating system provides such services and on x86/x86-64 processors.

Operating systems status
Hercules is technically compatible with all IBM mainframe operating systems, even older versions which no longer run on newer mainframes. However, many mainframe operating systems require vendor licenses to run legally. Newer licensed operating systems, such as OS/390, z/OS, VSE/ESA, z/VSE, VM/ESA, z/VM, TPF/ESA, and z/TPF are technically compatible but cannot legally run on the Hercules emulator except in very limited circumstances, and they must always be licensed from IBM. IBM's Coupling Facility control code, which enables Parallel Sysplex, and UTS also require licenses to run.

Operating systems which may legally be run, without license costs, on Hercules include:
 * Older IBM operating systems including OS/360, DOS/360, DOS/VS, MVS, VM/370, and TSS/370 which are either public domain or "copyrighted software provided without charge."
 * The MUSIC/SP operating system may be available for educational and demonstration purposes upon request to its copyright holder, McGill University. Some of MUSIC/SP's features, notably networking, require z/VM (and thus an IBM license). However, a complete demonstration version of MUSIC/SP, packaged with the alternative Sim390 mainframe emulator, is available.
 * The Michigan Terminal System (MTS) version 6.0A has been tailored to run under Hercules.
 * There is no known legal restriction to running open-source operating systems Linux on IBM Z and OpenSolaris for System z on the Hercules emulator. They run well on Hercules, and many Linux on IBM Z developers do their work using Hercules. Several distributors provide 64-bit z/Architecture versions of Linux, and some also provide ESA/390-compatible versions. Mainframe Linux distributions include SUSE Linux Enterprise Server, Red Hat Enterprise Linux, Debian, CentOS, and Slackware. Sine Nomine Associates brought OpenSolaris to System z, relying on features provided by z/VM. Emulation of those specific z/VM features for OpenSolaris is included starting with Hercules Version 3.07.
 * Certain unencumbered editors and utilities which can run on a mainframe without a parent operating system may be available to run on Hercules as well.
 * PDOS/3X0 (Public Domain Operating System, mainframe version)

Usage
Hercules can be used as a development environment to verify that code is portable (across Linux processor architectures, for example), supports symmetric multiprocessing (SMP), and is 64-bit "clean."

There is also a large community of current and former mainframe operators and programmers, as well as those with no prior experience, who use Hercules and the public domain IBM operating systems as a hobby and for learning purposes. Most of the skills acquired when exploring classic IBM mainframe operating system versions are still relevant when transitioning to licensed IBM machines running the latest versions.

The open source nature of Hercules means that anyone can produce their own customized version of the emulator. For example, a group of developers independent of the Hercules project implemented a hybrid mainframe architecture which they dubbed "S/380" using modifications to both Hercules and to freely available classic versions of MVS (and later VM and DOS/VS), enhancing the operating systems with some degree of 31-bit (and as of 2016, 64-bit) binary compatibility with later operating system versions (and as of 2018, 32-bit is also supported).

Performance
It is difficult to determine exactly how Hercules emulation performance corresponds to real mainframe hardware, but the performance characteristics are understandably quite different. This is partially due to the difficulty of comparing real mainframe hardware to other PCs and servers as well as the lack of concrete, controlled performance comparisons. Performance comparisons are likely legally impossible for licensed IBM operating systems, and those operating systems are quite different from other operating systems, such as Linux.

Hercules expresses its processing performance in MIPS. Due to the age of the earlier System/360 and System/370 hardware, it is a relatively safe assumption that Hercules will outperform them when running on moderately powerful hardware, despite the considerable overhead of emulating a computer architecture in software. However, newer, partially or fully configured System z machines outperform Hercules by a wide margin. A relatively fast dual processor X86 machine running Hercules is capable of sustaining about 50 to 60 MIPS for code that utilizes both processors in a realistic environment, with sustained rates rising to a reported 300 MIPS on leading-edge (early 2009) PC-class systems. Hercules can produce peaks of over 1200 MIPS when running in a tight loop, such as in a synthetic instruction benchmark or with other small, compute-intensive programs.

Tom Lehmann, co-founder of TurboHercules, wrote: "...We can run a reasonably sized load (800 MIPS with our standard package). If the machine in question is larger than that, we can scale to 1600 MIPS with our quad Nehalem based package, and we have been promised an 8 way Nehalem EX based machine early next year that should take us to the 3200 MIPS mark. Anything bigger than that is replicated by a collection of systems."

Hercules generally outperforms IBM's PC based mainframes from the mid-1990s, which have an advertised peak performance of around 29 MIPS. Compared to the more powerful but still entry-level IBM Multiprise 2000 and 3000 mainframes (also from the 1990s), Hercules on typical x86 hardware would be considered a mid-range server in performance terms. For every mainframe after the 9672 Generation 1, Hercules would generally be the lowest end system. For comparison, 2010-era high-end IBM zEnterprise 196 systems can deliver over 52,000 MIPS per machine, and they have considerable I/O performance advantages. With the same number of emulated Sys Z processors, z/PDT is about 3 times faster than Hercules.

Note that there are other non-functional system attributes beyond performance which are typically relevant to mainframe operators.

TurboHercules
In 2009, Roger Bowler founded TurboHercules SAS, based in France, to commercialize the Hercules technology. In July 2009, TurboHercules SAS asked IBM to license z/OS to its customers for use on systems sold by TurboHercules. IBM declined the company's request. In March 2010, TurboHercules SAS filed a complaint with European Commission regulators, alleging that IBM infringed EU antitrust rules through its alleged tying of mainframe hardware to its mainframe operating system, and the EC opened a preliminary investigation. In November 2010, TurboHercules announced that it had received an investment from Microsoft Corporation. In September 2011, EC regulators closed their investigation without action.

title: Hercules (emulator)


text:
Coordination of Information on the Environment

Coordination of Information on the Environment (CORINE) is a European programme initiated in 1985 by the European Commission, aimed at gathering information relating to the environment on certain priority topics for the European Union (air, water, soil, land cover, coastal erosion, biotopes, etc.). Since 1994, the European Environment Agency (EEA) integrated CORINE in its work programme. EEA is responsible for providing objective, timely and targeted information on Europe's environment.


text:
Talk:Basques

Argentina ommited on purpose
Interesting how the country with the largest number of Basques -Argentina, has been ommited in the diaspora section. There are more Basques in Argentina than are there in Europe. The number of "Basque centers" in Argentina (87) is by far the largest in the whole world. Chile, being cited here as the main example of the Basque diaspora, only has four such "centers". https://www.euskaletxeak.eus/index.php?option=com_content&task=view&id=140&Itemid=191  — Preceding unsigned comment added by 2800:810:446:6D3:31A4:575E:BCD1:A214 (talk) 15:52, 8 July 2024 (UTC)

I added a map image of the Basque diaspora.
File:Map of the Basque Diaspora in the World.svg 201.71.0.220 (talk) 20:14, 8 April 2023 (UTC)
 * Yes, and very obstinately so. But Basque ancestry or having a Basque surname is not the same as Basque ethnicity. Also, estimates for Basque ancestry are more then vague and need solid sources. –Austronesier (talk) 21:24, 8 April 2023 (UTC)

The Catalans article uses the map. — Preceding unsigned comment added by 201.71.0.220 (talk) 21:27, 8 April 2023 (UTC)

The image is good. It shows what regions Basque people are concentrated in. — Preceding unsigned comment added by 201.71.0.220 (talk) 21:30, 8 April 2023 (UTC)

Semi-protected edit request on 8 April 2023
Add the Basque diaspora map image to the infobox.

https://commons.m.wikimedia.org/wiki/File:Map_of_the_Basque_Diaspora_in_the_World.svg 201.71.0.220 (talk) 22:23, 8 April 2023 (UTC)

 * Anyone know if there is there a mechanism for having maps such as this one removed from Commons for being based on poor data? Akerbeltz (talk) 11:35, 9 April 2023 (UTC)
 * Unfortunately not. OR is not sufficient reason to have a file deleted. Commons works more like a file repository for use in other Wikimedia Projects, each of which might have different policies about things like verifiabily. Only copyvios are systematically deleted. –Austronesier (talk) 12:20, 9 April 2023 (UTC)
 * Urgh ok, that explains a lot. Thanks for explaining. Akerbeltz (talk) 21:37, 9 April 2023 (UTC)
 * I don't believe the map is based on poor data; the article it's based off of cites several reliable sources. EpicPupper (talk) 23:03, 9 April 2023 (UTC)
 * ✅ EpicPupper (talk) 23:04, 9 April 2023 (UTC)
 * It isn't. Apart from the data we have in the infoboxes which is census data basically all the other 'sources' rely on variants of 'let's count Basque sounding surnames in the phone book of x and extrapolate that to the country y', which is just not reliable and we have discussed ad nauseum why that is not reliable. Akerbeltz (talk) 09:41, 10 April 2023 (UTC)
 * The uploader Allice Hunter stated “Information available on page Basques and Basque diaspora on the English Wikipedia with UploadWizard”. — Preceding unsigned comment added by 103.171.44.94 (talk) 09:14, 10 September 2023 (UTC)
 * Yes, it's poorly source information that some people insist on adding to the page every now and then, that doesn't make it reliable. Akerbeltz (talk) 22:07, 10 September 2023 (UTC)

Semi-protected edit request on 15 September 2023
Previews for this page display an Israeli flag as the article image, change this to the Basque flag Stripedorchid (talk) 17:39, 15 September 2023 (UTC)
 * Red question icon with gradient background.svg Not done: it's not clear what changes you want to be made. Please mention the specific changes in a "change X to Y" format and provide a reliable source if appropriate. Don't see an Israeli flag anywhere in this article Cannolis (talk) 18:13, 15 September 2023 (UTC)
 * It is a result of vandalism. It will be fixed when the cache expires. Nardog (talk) 18:49, 15 September 2023 (UTC)

title: Talk:Basques


text:
ELDIS

Eldis is a database and email service of information sources on international development. It aims to share the best knowledge on development, policy, practice and research.

Background
"Eldis" was originally an acronym for "Electronic Development and Environment Information System". It is one of a family of knowledge services produced at the Institute of Development Studies, Sussex, England.

Funding
Eldis is funded by the UK Department for International Development (DFID), Swedish International Development Cooperation Agency (Sida), the Norwegian Agency for Development Cooperation (Norad) and the Swiss Agency for Development and Cooperation (SDC).

Database
The information in Eldis is organised into subject-focused "resource guides" and regional and country "profiles."

title: ELDIS


text:
User:SolKarma

Why are you so fixated on hard disk drives? And why are you repeating the same information on multiple pages?

SolKarma replies Simply this: an encyclopedia is a like a thesaurus, a collection of entries and their descriptions. This is how humans categorize knowledge. To better categorize knowledge, one must contain elements of knowledge into their most discrete form.

--

You are severely mistaken about the nature of encyclopedias, the nature of this wikipedia and the best way to archive knowledge for users' retrieval and access.

''As Uriyan says, encyclopedias have full articles, not nodes. The wikipedia has a search facility so that if a user searches for something in an article entry, they will be able to find it. You do not need to put all the keywords you can think of into separate entries.''

''Also, splitting everything up by nodes like that is extremely detrimental to the user. Having to navigate through the wikipedia costs user time and mental resources. If a user has to go back and forth across two dozen different entries to understand a single, simple idea, then those entries are completely useless.''

''The best way to present information to the user is one screenful at a time. That way they have as much information as possible at one glance and can see how all of that information interrelates. When entries are much longer than a screenful, the user wastes time scrolling through the entry. When entries are smaller, they waste time clicking on links.''

''Also, putting related links in the same article (like object oriented programing, and object oriented programing language) just to shorten the path between nodes is another bad idea. The cost of the shortened path is that each article ends up having more links, which end up confusing the user.''

''A special case of avoiding such out-linking redundancy is to avoid linking the same term multiple times closely together. So if operating system is already linked in a paragraph, avoid linking it a second time. Unless the occurences of a term are separated by at least a half-screenful, creating additional links just clutters the page.''

These customs are all developed in order to aid the reader's ability to reflect on what they're reading, instead of mindlessly travelling along a chain of nodes.

If you understand what wikipedia is about, it will earn you karma if you gather all the entries you made and put them together into one or two large articles.

 * Wikipedia is not a thesaurus (look at Most common Wikipedia faux pas!), and in no way must it split knowledge into a discrete form. On the contrary, it should be as complete as possible, and in order to be that, it should integrate significant chunks of related facts into a single article. Of course, an article should not generally include unrelated topics - but "primary partition" and "logical partition" are hardly unrelated. Also, articles like "Drive letter assignment" (and many others) are excessively DOS-centric. For instance, Linux does not give a damn whether a partition is primary or secondary, and so do the newer NTs (to a lesser extent).

--Uriyan

I agree with most of this -- there's no point in separating out a "file system types" article from "file system", just list them there. A separate article for "network file system" is probably OK, there would be enough material eventually and it's handy for linking, but isn't essential at the moment given a redirect from "network file system". I don't think the "screen full" is a very useful guide, since firstly screen sizes and fonts differ widely, and 2ndly it's more important to consider whether the split material is actually a useful article before splitting it out. e.g., would any other page need to link to it directly? -- anon.

I know that screen size is a very fuzzy concept but it's inescapable. I think that in most, maybe even all, cases, the only reason why "any other page [would] need to link to it directly" is if the virtual article (eg, 'buddhist shrines') isn't given its own section (in 'shrines') or if that section is at least a screenful away from the top. So if 'buddhist shrines' is at the top of the 'shrines' page, or close enough to it, then you can just redirect 'buddhist shrines' links to 'shrines'.

I've spun off pages from other pages and it's always because I think their content buries everythig else on the original page. For example, nobody will link to 'History of operating systems' directly but even incomplete, the content of that page made up 60% of 'operating system'! If someone had tried to even mention research OSes on 'operating system' (and why not?) it would have been completely buried under two screens' worth of history.

Another example. If I add a mention of the impact of cars on urban design and social life at the end of the automobile article, do you think anyone will ever read it? --Ark

 * SolKarma welcome aboard! Sorry your user experience here has been a bit of a culture shock but we are trying to write comprehensive encyclopedia articles here and not a thesaurus or dictionary. When you are new, it is usually best to add-to and edit pre-existing articles so that you can get your feet wet. Please don't take the above comments as "us being harsh on you" -- because it isn't. We all really care about the project and want the best for it. Nobody should expect any newcomer to know exactly what the project is about on the first day -- but sometimes enthusiastic newcomers like you get a little ahead of themselves. I know I did when I was new. Now let's all get back to work creating the best encyclopedia on the internet! --maveric149

 * Ditto, welcome, it's always charming to see new faces (ok, nicks) 'round this place. Hope you'll enjoy Wikipedia! --Uriyan

SolKarma, apparently you still don't understand what the wikipedia is about. There's no such thing as a "how to" entry here.

Um, no, we had some how-tos awhile back. I don't know if they're still here, and I don't know how to go about finding them since the words "how to" are too short for the search engine (?). Koyaanis Qatsi, Saturday, June 8, 2002

Are you referring to the meta-articles like "how to edit"? --Ark, Saturday, June 8, 2002

No. I don't remember what they were on, though. There are also still some recipes around, which are probably more "how-to" than the traditional encyclopedia allows. Koyaanis Qatsi

Are you referring to How-tos? -- CYD

Some of those on there (the non-meta ones) and there were others too--more mechanically based IIRC, but oh well. Koyaanis Qatsi

title: User:SolKarma