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Intermediate-mass black hole

An intermediate-mass black hole (IMBH) is a class of black hole with mass in the range 102–105 solar masses: significantly higher than stellar black holes but lower than the 105–109 solar mass supermassive black holes. Several IMBH candidate objects have been discovered in the Milky Way galaxy and others nearby, based on indirect gas cloud velocity and accretion disk spectra observations of various evidentiary strength.

Observational evidence
The gravitational wave signal GW190521, which occurred on 21 May 2019 at 03:02:29 UTC, and was published on 2 September 2020,  resulted from the merger of two black holes. They had masses of 85 and 65 solar masses and merged to form a black hole of 142 solar masses, with 8 solar masses radiated away as gravitational waves.

Before that, the strongest evidence for IMBHs came from a few low-luminosity active galactic nuclei. Due to their activity, these galaxies almost certainly contain accreting black holes, and in some cases the black hole masses can be estimated using the technique of reverberation mapping. For instance, the spiral galaxy NGC 4395 at a distance of about 4 Mpc appears to contain a black hole with mass of about 3.6 ×  105 solar masses.

The largest up-to-date sample of intermediate-mass black holes includes 305 candidates selected by sophisticated analysis of one million optical spectra of galaxies collected by the Sloan Digital Sky Survey. X-ray emission was detected from 10 of these candidates confirming their classification as IMBH.

Some ultraluminous X-ray sources (ULXs) in nearby galaxies are suspected to be IMBHs, with masses of a hundred to a thousand solar masses. The ULXs are observed in star-forming regions (e.g., in starburst galaxy M82 ), and are seemingly associated with young star clusters which are also observed in these regions. However, only a dynamical mass measurement from the analysis of the optical spectrum of the companion star can unveil the presence of an IMBH as the compact accretor of the ULX.

A few globular clusters have been claimed to contain IMBHs, based on measurements of the velocities of stars near their centers; the figure shows one candidate object. However, none of the claimed detections has stood up to scrutiny. For instance, the data for M31 G1, the object shown in the figure, can be fit equally well without a massive central object.

Additional evidence for the existence of IMBHs can be obtained from observation of gravitational radiation, emitted from a binary containing an IMBH and a compact remnant or another IMBH.

Finally, the M–sigma relation predicts the existence of black holes with masses of 104 to 106 solar masses in low-luminosity galaxies. The smallest black hole from the M–sigma relation prediction is the nucleus of RGG 118 galaxy with only about 50,000 solar masses.

Potential discoveries

In November 2004 a team of astronomers reported the discovery of GCIRS 13E, the first intermediate-mass black hole in the Milky Way galaxy, orbiting three light-years from Sagittarius A*. This medium black hole of 1,300 solar masses is within a cluster of seven stars, possibly the remnant of a massive star cluster that has been stripped down by the Galactic Center. This observation may add support to the idea that supermassive black holes grow by absorbing nearby smaller black holes and stars. However, in 2005, a German research group claimed that the presence of an IMBH near the galactic center is doubtful, based on a dynamical study of the star cluster in which the IMBH was said to reside. An IMBH near the galactic center could also be detected via its perturbations on stars orbiting around the supermassive black hole.

In January 2006 a team led by Philip Kaaret of the University of Iowa announced the discovery of a quasiperiodic oscillation from an intermediate-mass black hole candidate located using NASA's Rossi X-ray Timing Explorer. The candidate, M82 X-1, is orbited by a red giant star that is shedding its atmosphere into the black hole. Neither the existence of the oscillation nor its interpretation as the orbital period of the system are fully accepted by the rest of the scientific community, as the periodicity claimed is based on only about four cycles, meaning that it is possible for this to be random variation. If the period is real, it could be either the orbital period, as suggested, or a super-orbital period in the accretion disk, as is seen in many other systems.

In 2009, a team of astronomers led by Sean Farrell discovered HLX-1, an intermediate-mass black hole with a smaller cluster of stars around it, in the galaxy ESO 243-49. This evidence suggested that ESO 243-49 had a galactic collision with HLX-1's galaxy and absorbed the majority of the smaller galaxy's matter.

A team at the CSIRO radio telescope in Australia announced on 9 July 2012 that it had discovered the first intermediate-mass black hole.

In 2015 a team at Keio University in Japan found a gas cloud (CO-0.40-0.22) with very wide velocity dispersion. They performed simulations and concluded that a model with a black hole of around 100,000 solar masses would be the best fit for the velocity distribution. However, a later work pointed out some difficulties with the association of high-velocity dispersion clouds with intermediate mass black holes and proposed that such clouds might be generated by supernovae. Further theoretical studies of the gas cloud and nearby IMBH candidates have been inconclusive but have reopened the possibility. In 2017, it was announced that a black hole of a few thousand solar masses may be located in the globular cluster 47 Tucanae. This was based on the accelerations and distributions of pulsars in the cluster; however, a later analysis of an updated and more complete data set on these pulsars found no positive evidence for this.

In 2018, the Keio University team found several molecular gas streams orbiting around an invisible object near the galactic center, designated HCN-0.009-0.044, suggested that it is a black hole of 32,000 solar masses and, if so, is the third IMBH discovered in the region.

Observations in 2019 found evidence for a gravitational wave event (GW190521) arising from the merger of two intermediate-mass black holes, with masses of 66 and 85 times that of the Sun. In September 2020 it was announced that the resulting merged black hole weighed 142 solar masses, with 9 solar masses being radiated away as gravitational waves.

In 2020, astronomers reported the possible finding of an intermediate-mass black hole, named 3XMM J215022.4-055108, in the direction of the Aquarius constellation, about 740 million light years from Earth.

In 2021 the discovery of a 100,000 solar-mass intermediate-mass black hole in the globular cluster B023-G78 in the Andromeda Galaxy was posted to arXiv in a preprint.

In 2023, an analysis of proper motions of the closest known globular cluster, Messier 4, revealed an excess mass of roughly 800 solar masses in the center, which appears to not be extended, and could thus be the best kinematic evidence for an IMBH (even if an unusually compact cluster of compact objects, white dwarfs, neutron stars or stellar-mass black holes cannot be completely discounted).

A study from July 10, 2024 has examined seven fast-moving stars from the center of the globular cluster Omega Centauri and found out that their speeds were consistent with an intermediate-mass black hole of at least 8,200 solar masses.

Origin
Intermediate-mass black holes are too massive to be formed by the collapse of a single star, which is how stellar black holes are thought to form. Their environments lack the extreme conditions—i.e., high density and velocities observed at the centers of galaxies—which seemingly lead to the formation of supermassive black holes. There are three postulated formation scenarios for IMBHs. The first is the merging of stellar mass black holes and other compact objects by means of accretion. The second one is the runaway collision of massive stars in dense stellar clusters and the collapse of the collision product into an IMBH. The third is that they are primordial black holes formed in the Big Bang.

Scientists have also considered the possibility of the creation of intermediate-mass black holes through mechanisms involving the collapse of a single star, such as the possibility of direct collapse into black holes of stars with pre-supernova helium core mass > (to avoid a pair instability supernova which would completely disrupt the star), requiring an initial total stellar mass of >, but there may be little chance of observing such a high-mass supernova remnant. Recent theories suggest that such massive stars which could lead to the formation of intermediate mass black holes may form in young star clusters via multiple stellar collisions.

title: Intermediate-mass black hole


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Ben Wallace (basketball)

Ben Camey Wallace (born September 10, 1974) is an American basketball executive and former professional player who played most of his career in the National Basketball Association (NBA) with the Detroit Pistons. He is regarded as the greatest undrafted player in NBA history,  and was known for his shot-blocking, rebounding, and overall defensive play. A native of Alabama, Wallace attended Cuyahoga Community College and Virginia Union University. In his NBA career, he also played with the Washington Bullets/Wizards, Orlando Magic, Chicago Bulls, and Cleveland Cavaliers.

Wallace won the NBA Defensive Player of the Year Award four times, a record he shares with Dikembe Mutombo and Rudy Gobert. In nine seasons with the Pistons (2000–2006; 2009–2012), Wallace made two NBA Finals appearances (2004 and 2005) and won a championship with the team in 2004. The Pistons retired his jersey No. 3 in 2016; Wallace was also inducted into the Naismith Memorial Basketball Hall of Fame in the class of 2021.

Wallace currently is the basketball operations and team engagement advisor for the Pistons.

Early life
Ben Camey Wallace was born on September 10, 1974, in White Hall, Alabama, a small town in Lowndes County. He is the tenth of eleven children. He attended Central High School in Hayneville where he received all-state honors in basketball, baseball, and football (as a linebacker). Former NBA player Charles Oakley was Wallace's mentor, having discovered Wallace at a 1991 basketball camp, and later recommended Wallace to his previous college, Virginia Union.

College career
Wallace first played college basketball on the junior college level at Cuyahoga Community College in Cleveland for two years. There, staples of Wallace's defensive prowess were shown as he averaged 17.0 rebounds and 6.9 blocks per game. He then transferred to Virginia Union, an NCAA Division II school, where he studied criminal justice. Wallace averaged 13.4 points per game and 10.0 rebounds per game as a member of the Virginia Union Panthers, whom he led to the Division II Final Four and a 28–3 record. As a senior, Wallace was named by the head coaches of Virginia Union's conference, the Central Intercollegiate Athletic Association, to the All-CIAA first team, and was also selected as a first-team Division II All-American by the National Association of Basketball Coaches.

Viola Reggio Calabria (1996)
After leaving Virginia Union and going undrafted, he travelled to Italy for a tryout with the Italian team Viola Reggio Calabria, where he played only a game in the 1996–97 Italian Basketball Cup against Faber Fabriano on 29 August 1996.

Washington Bullets / Wizards (1996–1999)
Wallace appeared in only 34 games for Washington in the 1996–97 season and did not play many minutes. The following year, he appeared in 67 games and started in 16, but did not average many points (3.1) or rebounds (4.8). He did manage to average 1.1 blocks throughout the season, however, and his defensive play solidified his identity and his minutes increased significantly in the lockout-shortened 1998–99 season, as he started in 16 of 46 games and averaged 6 points, 8.3 rebounds and 2 blocks per game. Washington was unable to make the playoffs for three straight years.

Orlando Magic (1999–2000)
On August 11, 1999, Wallace was traded to the Orlando Magic in a multiplayer deal for Isaac Austin. In the 1999–2000 season, he solidified his role as a starter, starting in all 81 games that he appeared in. He averaged 4.8 points, 8.2 rebounds and 1.6 blocks for the Magic as they won 41 games. However, the Magic failed to make the playoffs and following the season, the Magic traded Wallace along with Chucky Atkins to the Detroit Pistons as compensation in a sign-and-trade deal for superstar forward and free agent Grant Hill.

Rise to defensive dominance (2000–2003)
The trade for Hill was considered one-sided, but in the 2000–01 season, Wallace had his most productive season yet, averaging 6.4 points per game while placing second in rebounds with 13.2 per game and tenth in blocks per game with 2.3, but the Pistons could not make the playoffs. The 2001–02 season would be even better for Wallace, as he averaged his most points per game for a season yet at 7.6 points, while leading the league in rebounding with 13 per game and shot blocking with 3.5. His strong defensive play earned him the NBA Defensive Player of the Year Award, while also being named to the All-Defensive First Team and the All-NBA Third Team. The Pistons won 50 games and the Central Division, and would defeat the Toronto Raptors in the first round of the playoffs before falling to the Paul Pierce-led Boston Celtics in the conference semifinals. Wallace opened the playoffs with a 19-point, 20-rebound effort against Toronto, and he managed to grab 20 or more rebounds two more times in 10 total playoff games, his first experience in the playoffs.

The 2002–03 season would result in another Defensive Player of the Year Award for Wallace, as well as another selection to the All-Defensive team along with being named to the All-NBA Second Team, as he increased his rebounding to 15.4 per game. The Pistons won 50 games and the Central Division again, and defeated Orlando in a grueling seven-game first-round series that included coming back from a 3–1 deficit. Detroit would go on to defeat the Philadelphia 76ers in six games, but the Pistons were swept by the defending Eastern Conference champion New Jersey Nets in the Conference Finals. Wallace increased his rebounding to 16.3 per game in the playoffs, and reached 20 or more rebounds four times.

NBA champion and return to the NBA Finals (2003–2005)
The 2003–04 season saw Wallace continue to rank among the league leaders in rebounding (12.4 per game) and blocks (3.2 per game). Despite losing out on a third straight Defensive Player of the Year Award to Ron Artest, Wallace increased his scoring average to 9.5 points per game, and was named again to the All-Defensive First Team and the All-NBA Second Team. The season also featured new head coach Larry Brown, and he would lead the Pistons to 54 wins for the season, which included a late season acquisition of star power forward Rasheed Wallace to further improve the team's defense and scoring. In the playoffs, the Pistons handily defeated the Milwaukee Bucks in five games in the first round, before facing New Jersey for the second straight year. Despite taking a two-game lead to open the series, the Nets would put up a fight against the Pistons to win 3 straight games, and the Pistons responded with an 81–75 road win in New Jersey (in which Wallace grabbed 20 rebounds) before wrapping up the series with a 90–69 game 7 win. The Pistons would then face the Jermaine O'Neal and Ron Artest-led, league-leading Indiana Pacers, and the two teams traded wins in the first four games. The Pistons won the next two games of the series, allowing them to advance to the Finals with Wallace scoring 12 points and grabbing 16 rebounds in the closing game of the series.

Detroit had not reached the Finals since 1990. The Pistons dominated in game 1 with an 87–75 win in Los Angeles against the Los Angeles Lakers. The Lakers would respond in game 2 with late-game heroics by team leaders Kobe Bryant and Shaquille O'Neal before the series moved to Detroit, but the combined defensive effort and near-perfect offensive execution at home brought the Pistons an 88–68 win in game 3. The Lakers were unable to respond in game 4, as the Pistons held their own and continued to dominate on defense and rebounding to beat the Lakers 88–80. Los Angeles needed one win to return the series to their home court, but the Pistons proved to be far too dominating again in game 5, as Detroit won the game 100–87 to win the NBA championship led by Wallace who posted his best game of the series with 18 points and 22 rebounds. It would be the third NBA title for the franchise and its first since 1990. Wallace held his own against the likes of Indiana's Jermaine O'Neal and then Shaquille O'Neal in the Finals, posting averages of 10.3 points per game with 14.3 rebounds and 2.4 blocks. In the 2003–04 season and 2004 playoffs, Wallace posted individual Defensive Ratings of 87 and 84, respectively. Among players with a comparable number of games and minutes played, both of these marks are the lowest individual defensive ratings posted in a regular season or playoffs. The Pistons also began a tradition of sounding a deep chime whenever "Big Ben" scored or recorded a block on Detroit's home court, The Palace of Auburn Hills—an allusion to the original Big Ben in London. The defending champions looked forward to defending their title in the 2004–05 season, but the season would take an unexpected turn near the end of a November 19 game against the Indiana Pacers, in which Wallace and Ron Artest sparred with each other before the infamous brawl named "The Malice at the Palace" involving both players and spectators took place. Wallace was suspended for six games, and his brother David Wallace received a year of probation and community service for punching Indiana's Fred Jones in the stands. Wallace continued to dominate on defense (2.4 blocks per game) and rebounding (12.2 per game), and increased his scoring production on his way to winning another Defensive Player of the Year Award along with yet another selection to the All-Defensive First Team and the All-NBA Third Team. In the playoffs, the Pistons dominated the Philadelphia 76ers before defeating their rival Pacers in the semifinals in 6 games. The Conference Finals would feature a matchup with the resurgent Miami Heat, who had acquired Shaquille O'Neal from the Lakers, and were led in scoring by Dwyane Wade. The teams traded victories before Miami won game 5 to take a 3–2 series lead, but the Pistons responded and took advantage of an injury to Wade in game 6 before grinding out a difficult 88–82 game 7 win on the road in Miami to advance to their second straight Finals. Wallace once again held his own against O'Neal throughout the series.

This time in the Finals, Detroit would face the San Antonio Spurs, led by superstar Tim Duncan, and international players such as Tony Parker and Manu Ginóbili. The Spurs won the first two games at home before the Pistons matched them with two wins in Detroit, setting up a crucial game 5 in which San Antonio managed a one-point victory. Detroit would respond with a win on the road in game 6, but had no answer for Duncan and the Spurs' attack and lost the series in game 7. Wallace averaged 10 points and 11.3 rebounds throughout the 2005 playoffs.

Final season in Detroit (2005–2006)
Despite the disappointing Finals' loss, the Pistons returned with a vengeance in the 2005–06 season, with Wallace winning another consecutive Defensive Player of the Year Award, a fifth straight selection to the All-Defensive First Team and another selection to the All-NBA Third Team. He was named an All-Star for the fourth straight season, and led the league in total offensive rebounds with 301. Detroit was dominant throughout the season, winning 64 games and earning the top seed in the conference. The playoffs featured a dominating win over Milwaukee in the first round followed by a grueling 7-game series win against the young Cleveland Cavaliers led by All-Star forward LeBron James. This set up a conference finals rematch with Miami, who had retooled their roster in the off-season. The Pistons struggled throughout the series with the impressive play of Dwyane Wade, who dominated offensively on the way to a 4–2 victory. Miami would go on to win that year's NBA title. Wallace's production fell significantly as compared to previous seasons in the playoffs, as he only averaged 4.7 points per game, 10.5 rebounds and just 1.2 blocks. In the off-season, he would test free agency and eventually signed with the younger Chicago Bulls, thereby ending an era of Detroit Pistons basketball which had relied on him as a defensive and rebounding anchor. In each of the five years that the Pistons made the playoffs with Wallace, Detroit allowed the fewest points per game out of all 16 playoff teams. The same year, Wallace had an altercation with Flip Saunders during Game 6 of the Eastern Conference Finals that drew him even further away from re-signing with the team, as Saunders made the controversial decision to bench him in the entire fourth quarter in that game. Without Wallace, the Pistons fell to third in points per game allowed in the 2007 and 2008 playoffs.

Chicago Bulls (2006–2008)
Wallace agreed to a four-year, $60 million deal with the Chicago Bulls. Chicago Bulls coach Scott Skiles had a strict "no-headband" policy, but decided to make an exception for Wallace when his teammates voted in favor of allowing him to keep the signature headband. Wallace continued to be relied upon as a defensive stopper and rebounder, as the Bulls already featured scoring from Kirk Hinrich, Ben Gordon, and Luol Deng. While his overall averages decreased from previous years, he still managed to average double figure rebounds (10.7 per game) and posted 2 blocks per game for the season. The Bulls won 49 games, and entered the playoffs with a first round matchup against the defending champion Miami Heat. The series would mark the fourth straight year that Wallace faced off with Shaquille O'Neal in the playoffs, and while the Heat were more experienced they also had played an inconsistent regular season with Dwyane Wade missing games due to injury. The Bulls on the other hand were ready to take on the older Heat, and shocked Miami with a four-game sweep with an average win margin of 11 points. Wallace posted 13 points with 11 rebounds in the close out game in Miami, and the Bulls advanced to face his former Pistons team. Despite no longer featuring Wallace and being older, the Pistons dominated the first three games to take a 3–0 lead before Chicago responded at home in game 4 with Wallace scoring 11 points with 17 rebounds. Chicago also went on to win Game 5 in Detroit, but could not extend the series to a seventh game as the Pistons proved too experienced for the younger team. Wallace averaged 8.7 points with 9.5 rebounds in 10 playoff games.

The Bulls looked to improve in the 2007–08 season, but started out with a disappointing 9–16 start before Skiles was removed as head coach. After 50 games, Wallace was dealt to the Cleveland Cavaliers. in a three team trade involving the Seattle SuperSonics, in which the Cavaliers received Wallace, as well as Bulls teammate Joe Smith and Seattle's Wally Szczerbiak and Delonte West, the Bulls received Cavaliers Shannon Brown, Larry Hughes, Cedric Simmons, and Drew Gooden, and the Sonics received Cleveland's Ira Newble and Donyell Marshall and Chicago's Adrian Griffin. During his nearly two-year run in Chicago, Wallace battled with various knee injuries and averaged 5.7 points, 9.7 rebounds, 1.9 assists and 2.0 blocks per game.

Cleveland Cavaliers (2008–2009)
The Cavaliers already featured Zydrunas Ilgauskas as the team's starting center, so coach Mike Brown moved Wallace to the power forward position. Wallace played in 22 regular season games (all starts) and averaged 4.2 points, 7.4 rebounds and 1.7 blocks per game. Wallace had a Cavalier regular season high of 12 points on February 24, 2008, against the Memphis Grizzlies, and had regular season Cavaliers' highs of 15 rebounds against the Charlotte Bobcats and four blocks against the Orlando Magic. In the playoffs, Wallace played in 13 games (all starts) and averaged 3.2 points, 6.5 rebounds and 1.1 blocks per game. He had his playoff high of 12 rebounds in Game 4 win against the Washington Wizards in the first round of the playoffs as the Cavaliers swept the Wizards. The following series would be against the resurgent Boston Celtics. The series would go to seven games, with the Celtics winning the final game at home and Wallace failing to register double figure rebounds in the series.

Even in limited minutes, Wallace had a significant impact on the Cavaliers' defense. Prior to Wallace's first game with the Cavaliers against the Memphis Grizzlies, Cleveland had allowed 98.2 points per game through 55 games. After acquiring Wallace, Cleveland's defense finished the season allowing 96.7 points per game, the ninth best mark in the league. In the 2008 playoffs, the Cavaliers' defense greatly improved, holding opponents to 87.8 points per game and posting a Defensive Rating of 102.1. The Cavaliers ranked first among all 16 teams in both defensive categories for the playoffs, ahead of even the Celtics led by Kevin Garnett, the Defensive Player of the Year.

On June 25, 2009, Wallace was traded to the Phoenix Suns with Sasha Pavlović, a second-round draft pick and $500,000 for Shaquille O'Neal. On July 13, 2009, the Suns bought out Wallace's $14 million contract, saving $8 million in the process. Wallace actually received $10 million but Phoenix was in luxury tax so the savings were effectively doubled.

Return to Detroit (2009–2012)
On August 7, 2009, Wallace agreed to re-sign with the Pistons as a free agent to a one-year deal. He formerly wore jersey number 3 with the Pistons, but changed his jersey to No. 6 upon his return, allowing Rodney Stuckey to keep that number. On July 11, 2010, Wallace agreed to a two-year deal with the Pistons.

On August 4, 2010, Wallace was re-signed by the Pistons. On November 30, 2010, in a 90–79 road loss to the Orlando Magic, Wallace surpassed the 10,000-rebound mark for his career, becoming the 34th player in NBA history to achieve that mark.

On December 22, 2010, in a 115–93 road win over the Toronto Raptors, Wallace played his 1,000th game and became the 95th player in NBA history to achieve this record. On February 14, 2012, Wallace played his 1,055th game, surpassing the record held by Avery Johnson for most games by an undrafted player.

On January 16, 2016, the Pistons retired Wallace's No. 3 jersey.

Player profile
Wallace was listed at 6ft 9in, though he stated that he is closer to 6ft 7in. Even though his height was more suited for the power forward position, he primarily played as center due to his size, strength and athleticism. He became known for his prolific rebounding and shot blocking, and was voted the NBA Defensive Player of the Year four times in five years, finishing as a close runner-up in the other season. He is one of only five players to collect more blocks than personal fouls (minimum 150 games) and the only player among those to also have more steals than turnovers.

However, Wallace was never a potent scorer, averaging 5.7 points per game in his career. The majority of his points came from offensive put-backs, baskets in transition, or other high-percentage field goals. Wallace also holds the record for worst free-throw shooting percentage in NBA history, at under 42 percent (minimum 1,000 free-throw attempts).

Awards and honors

 * NBA champion: 2004
 * 4× NBA All-Star: 2003, 2004, 2005, 2006
 * 4× NBA Defensive Player of the Year: 2002, 2003, 2005, 2006
 * 6× All-NBA Defensive Team:
 * First Team: 2002, 2003, 2004, 2005, 2006
 * Second Team: 2007
 * 5× All-NBA Team:
 * Second Team : 2003, 2004, 2006
 * Third Team : 2002, 2005
 * 2× NBA rebounding leader (rebounds per game): 2002 (13.0), 2003 (15.4)
 * 2× NBA rebounding leader (total rebounds): 2001 (1,052), 2003 (1,026)
 * NBA rebounding leader (total defensive rebounds): 2001 (749)
 * 2× NBA rebounding leader (total offensive rebounds): 2003 (293), 2006 (301)
 * NBA blocks leader: 2002 (3.5)
 * NBA blocks leader (total blocks): 2002 (278)
 * Cover player for NBA 2K5
 * Number 3 retired by the Detroit Pistons
 * Michigan Sports Hall of Fame: 2016

NBA records, achievements and milestones

 * Only player in NBA history to record 1,000 rebounds, 100 blocks, and 100 steals in 4 consecutive seasons (2001–2004).
 * One of three players in NBA history to record 150 blocks and 100 steals in 7 consecutive seasons (2001–2007) (along with Hakeem Olajuwon and David Robinson).
 * One of five players in NBA history to lead the NBA in rebounding and blocking averages in the same season (along with Kareem Abdul-Jabbar, Bill Walton, Hakeem Olajuwon, and Dwight Howard).
 * One of three players in NBA history to average 15 rebounds and 3 blocks per game over a season (along with Kareem Abdul-Jabbar and Bob McAdoo).
 * Only undrafted player in NBA history to be voted a starter for the NBA All-Star Game.
 * One of three players in NBA history to receive NBA Defensive Player of the Year Award four times (along with Dikembe Mutombo, and Rudy Gobert.)
 * First undrafted player in modern NBA history to be elected into the Naismith Memorial Basketball Hall of Fame.
 * Lowest Free Throw Percentage of any player with at least 125 made Free Throws.

Detroit Pistons franchise records

 * Most blocks (all-time): 1,486 (2000–2006, 2009–2012)
 * Most blocks in
 * one game: 10 (November 10, 2002 vs. Miami Heat)
 * one half: 7 (February 1, 2003 vs. New Jersey Nets)
 * one quarter: 5 (March 10, 2002 vs. Indiana Pacers)
 * one season: 278 (2001–02)
 * Highest blocks per game average (all-time): 2.3 (2000–2006, 2009–2012)
 * Highest blocks per game average (season): 3.48 (2001–02)
 * Most efficient defensive box plus/minus career averaging with team: 5.9
 * Best franchise defensive win share: 49
 * Most steals (one game, playoffs): 7 (Game 4, 2003 Eastern Conference First Round)

Executive career
In 2018, Wallace joined the Pistons' NBA G League affiliate, the Grand Rapids Drive, as an ownership partner,  serving in that role until they became an affiliate of the Denver Nuggets and renamed the Gold. In 2021, he was named the Pistons' basketball operations and team engagement advisor.

Personal life
Wallace is married to Chanda and is the father of two sons, Ben Jr. and Bryce, and one daughter, Bailey.

Wallace appeared on the cover of ESPN NBA 2K5. An inflatable basketball training aid of Wallace's likeness, called the Inflatable Defender, was manufactured by PlayAir Systems. His sneaker, the Big Ben, was released November 5, 2007 under Stephon Marbury's Starbury label and sold for US$14.98 at Steve & Barry's stores.

In 2011, Wallace was arrested and charged with DWI and carrying a concealed weapon. He was sentenced to a year of probation.

Wallace noted to Arda Ocal of The Score Television Network that he is a fan of professional wrestling, citing some of his favourite wrestlers as André the Giant, Big John Studd, Hulk Hogan, and John Cena.

In March 2014, Wallace was sentenced to a year of jail, with all but two days suspended, after he pleaded guilty to leaving the scene of an accident in Richmond, Virginia on February 8, 2014.

In 2022, Wallace launched his line of cannabis products named "Undrafted" developed in partnership with the cannabis company Rair. Wallace stated: "Cannabis has helped me safely relieve the aches and pains and different stressors that have built up from the many years as an athlete. There's no denying that marijuana has a healing upside for athletes or anyone struggling with pain – so alongside launching the Undrafted brand, the Rair team and I will continue to push to end this stigma associated with cannabis use." That year he also purchased a minority stake in Green Door Distilling.

title: Ben Wallace (basketball)


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Rhaponticum repens

Rhaponticum repens, synonyms including Acroptilon repens and Leuzea repens, with the common name Russian knapweed, is a species of bushy rhizomatous perennial, up to 80 cm tall. Stems and leaves are finely arachnoid-tomentose becoming glabrous and green with age. The rosette leaves are oblanceolate, pinnately lobed to entire, 2–3 cm wide by 3–8 cm long. The lower cauline leaves are smaller, pinnately lobed; the upper leaves become much reduced, sessile, serrate to entire. The heads are numerous terminating the branches. Flowers are pink to purplish, the marginal ones not enlarged. The outer and middle involucral bracts are broad, striate, smooth with broadly rounded tips; the inner bracts are narrower with hairy tips. Pappus present with bristles 6–11 mm long. Fruit is a whitish, slightly ridged achene.

Russian knapweed is a deep-rooted long-lived perennial. Some stands have been in existence for 75 years. It forms dense colonies in cultivated fields, orchards, pastures, and roadsides.

A native to Eurasia, Russian knapweed was introduced into North America in the late 19th century. Absent only from southeastern U.S., it has become widespread in other regions, especially in the western United States.

Nigropallidal encephalomalacia, also called chewing disease, a movement disorder similar to Parkinson's disease, is caused in horses ingesting Russian knapweed for prolonged periods. A sesquiterpene lactone, repin, in the plant is likely responsible for this toxicity.

Taxonomy
The species was first described by Carl Linnaeus in 1763 as Centaurea repens. Augustin Pyramus de Candolle separated it from the genus Centaurea in 1838, placing it in the genus Acroptilon. The genus name derives from acro- (high, here meaning tip) and ptilo- (feather). A 1995 molecular phylogenetic study, the structure of the flower, and the chromosome number support separating it from the genus Centaurea. Some sources then continue to place it as the sole member of the monotypic genus Acroptilon. A phylogenetic study published in 2006 concluded that Acroptilon belongs in the genus Rhaponticum.

title: Rhaponticum repens


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Stack machine

In computer science, computer engineering and programming language implementations, a stack machine is a computer processor or a virtual machine in which the primary interaction is moving short-lived temporary values to and from a push down stack. In the case of a hardware processor, a hardware stack is used. The use of a stack significantly reduces the required number of processor registers. Stack machines extend push-down automata with additional load/store operations or multiple stacks and hence are Turing-complete.

Design
Most or all stack machine instructions assume that operands will be from the stack, and results placed in the stack. The stack easily holds more than two inputs or more than one result, so a rich set of operations can be computed. In stack machine code (sometimes called p-code), instructions will frequently have only an opcode commanding an operation, with no additional fields identifying a constant, register or memory cell, known as a zero address format. A computer that operates in such a way that the majority of its instructions do not include explicit addresses is said to utilize zero-address instructions. This greatly simplifies instruction decoding. Branches, load immediates, and load/store instructions require an argument field, but stack machines often arrange that the frequent cases of these still fit together with the opcode into a compact group of bits. The selection of operands from prior results is done implicitly by ordering the instructions. Some stack machine instruction sets are intended for interpretive execution of a virtual machine, rather than driving hardware directly.

Integer constant operands are pushed by Push or Load Immediate instructions. Memory is often accessed by separate Load or Store instructions containing a memory address or calculating the address from values in the stack. All practical stack machines have variants of the load–store opcodes for accessing local variables and formal parameters without explicit address calculations. This can be by offsets from the current top-of-stack address, or by offsets from a stable frame-base register.

The instruction set carries out most ALU actions with postfix (reverse Polish notation) operations that work only on the expression stack, not on data registers or main memory cells. This can be very convenient for executing high-level languages because most arithmetic expressions can be easily translated into postfix notation.

For example, consider the expression A*(B-C)+(D+E), written in reverse Polish notation as A B C - * D E + +. Compiling and running this on a simple imaginary stack machine would take the form:

# stack contents (leftmost = top = most recent): push A         #           A  push B          #     B     A  push C          # C   B     A  subtract        #     B-C   A  multiply        #           A*(B-C) push D         #     D     A*(B-C) push E         # E   D     A*(B-C) add            #     D+E   A*(B-C) add            #           A*(B-C)+(D+E)

The arithmetic operations 'subtract', 'multiply', and 'add' act on the two topmost operands of the stack. The computer takes both operands from the topmost (most recent) values of the stack. The computer replaces those two values with the calculated difference, sum, or product. In other words the instruction's operands are "popped" off the stack, and its result(s) are then "pushed" back onto the stack, ready for the next instruction.

Stack machines may have their expression stack and their call-return stack separated or as one integrated structure. If they are separated, the instructions of the stack machine can be pipelined with fewer interactions and less design complexity, so it will usually run faster.

Optimisation of compiled stack code is quite possible. Back-end optimisation of compiler output has been demonstrated to significantly improve code, and potentially performance, whilst global optimisation within the compiler itself achieves further gains.

Stack storage
Some stack machines have a stack of limited size, implemented as a register file. The ALU will access this with an index. A large register file uses a lot of transistors and hence this method is only suitable for small systems. A few machines have both an expression stack in memory and a separate register stack. In this case, software, or an interrupt may move data between them. Some machines have a stack of unlimited size, implemented as an array in RAM, which is cached by some number of "top of stack" address registers to reduce memory access. Except for explicit "load from memory" instructions, the order of operand usage is identical with the order of the operands in the data stack, so excellent prefetching can be accomplished easily.

Consider X+1. It compiles to Load X; Load 1; Add. With a stack stored completely in RAM, this does implicit writes and reads of the in-memory stack: for a total of 5 data cache references.
 * Load X, push to memory
 * Load 1, push to memory
 * Pop 2 values from memory, add, and push result to memory

The next step up from this is a stack machine or interpreter with a single top-of-stack register. The above code then does: for a total of 3 data cache references, worst-case. Generally, interpreters don't track emptiness, because they don't have to—anything below the stack pointer is a non-empty value, and the TOS cache register is always kept hot. Typical Java interpreters do not buffer the top-of-stack this way, however, because the program and stack have a mix of short and wide data values.
 * Load X into empty TOS register (if hardware machine) or Push TOS register to memory, Load X into TOS register (if interpreter)
 * Push TOS register to memory, Load 1 into TOS register
 * Pop left operand from memory, add to TOS register and leave it there

If the hardwired stack machine has 2 or more top-stack registers, or a register file, then all memory access is avoided in this example and there is only 1 data cache cycle.

History and implementations
Description of such a method requiring only two values at a time to be held in registers, with a limited set of pre-defined operands that were able to be extended by definition of further operands, functions and subroutines, was first provided at conference by Robert S. Barton in 1961.

Commercial stack machines
Examples of stack instruction sets directly executed in hardware include
 * the Z4 (1945) computer by Konrad Zuse had a 2-level stack.
 * the Burroughs large systems architecture (since 1961)
 * the English Electric KDF9 machine. First delivered in 1964, the KDF9 had a 19-level deep pushdown stack of arithmetic registers, and a 17-level deep stack for subroutine return addresses
 * the Collins Radio Collins Adaptive Processing System minicomputer (CAPS, since 1969) and Rockwell Collins Advanced Architecture Microprocessor (AAMP, since 1981).
 * the Xerox Dandelion, introduced 27 April 1981, and the Xerox Daybreak utilized a stack machine architecture to save memory.
 * the UCSD Pascal p-machine (as the Pascal MicroEngine and many others) supported a complete student programming environment on early 8-bit microprocessors with poor instruction sets and little RAM, by compiling to a virtual stack machine.
 * MU5 and ICL 2900 Series. Hybrid stack and accumulator machines. The accumulator register buffered the memory stack's top data value. Variants of load and store opcodes controlled when that register was spilled to the memory stack or reloaded from there.
 * HP 3000 (Classic, not PA-RISC)
 * HP 9000 systems based on the HP FOCUS microprocessor.
 * Tandem Computers T/16. Like HP 3000, except that compilers, not microcode, controlled when the register stack spilled to the memory stack or was refilled from the memory stack.
 * the Atmel MARC4 microcontroller
 * Several "Forth chips" such as the RTX2000, the RTX2010, the F21 and the PSC1000
 * The Setun Ternary computer performed balanced ternary using a stack.
 * The 4stack processor by Bernd Paysan has four stacks.
 * Patriot Scientific's Ignite stack machine designed by Charles H. Moore holds a leading functional density benchmark.
 * Saab Ericsson Space Thor radiation hardened microprocessor
 * Inmos transputers.
 * ZPU A physically-small CPU designed to supervise FPGA systems.
 * The F18A architecture of the 144-processor GA144 chip from GreenArrays, Inc.
 * Some technical handheld calculators use reverse Polish notation in their keyboard interface, instead of having parenthesis keys. This is a form of stack machine. The Plus key relies on its two operands already being at the correct topmost positions of the user-visible stack.

Virtual stack machines
Examples of virtual stack machines interpreted in software:
 * the Whetstone ALGOL 60 interpretive code, on which some features of the Burroughs B6500 were based
 * the UCSD Pascal p-machine; which closely resembled Burroughs
 * the Niklaus Wirth p-code machine
 * Smalltalk
 * the Java virtual machine instruction set (note that only the abstract instruction set is stack based, HotSpot, the Sun Java Virtual Machine for instance, does not implement the actual interpreter in software, but as handwritten assembly stubs)
 * the WebAssembly bytecode
 * the Virtual Execution System (VES) for the Common Intermediate Language (CIL) instruction set of the .NET Framework (ECMA 335)
 * the Forth programming language, especially the integral virtual machine
 * Adobe's PostScript
 * Parakeet programming language
 * Sun Microsystems' SwapDrop programming language for Sun Ray smartcard identification
 * Adobe's ActionScript Virtual Machine 2 (AVM2)
 * Ethereum's EVM
 * the CPython bytecode interpreter
 * the Ruby YARV bytecode interpreter
 * the Rubinius virtual machine
 * the bs (programming language) in Unix uses a virtual stack machine to process commands, after first transposing provided input language form, into reverse-polish notation
 * the Lua (programming language) C API
 * the Uxn virtual machine
 * the TON Virtual Machine (TVM) for The Open Network smart contratcs

Hybrid machines
Pure stack machines are quite inefficient for procedures which access multiple fields from the same object. The stack machine code must reload the object pointer for each pointer+offset calculation. A common fix for this is to add some register-machine features to the stack machine: a visible register file dedicated to holding addresses, and register-style instructions for doing loads and simple address calculations. It is uncommon to have the registers be fully general purpose, because then there is no strong reason to have an expression stack and postfix instructions.

Another common hybrid is to start with a register machine architecture, and add another memory address mode which emulates the push or pop operations of stack machines: 'memaddress = reg; reg += instr.displ'. This was first used in DEC's PDP-11 minicomputer. This feature was carried forward in VAX computers and in Motorola 6800 and M68000 microprocessors. This allowed the use of simpler stack methods in early compilers. It also efficiently supported virtual machines using stack interpreters or threaded code. However, this feature did not help the register machine's own code to become as compact as pure stack machine code. Also, the execution speed was less than when compiling well to the register architecture. It is faster to change the top-of-stack pointer only occasionally (once per call or return) rather than constantly stepping it up and down throughout each program statement, and it is even faster to avoid memory references entirely.

More recently, so-called second-generation stack machines have adopted a dedicated collection of registers to serve as address registers, off-loading the task of memory addressing from the data stack. For example, MuP21 relies on a register called "A", while the more recent GreenArrays processors relies on two registers: A and B.

The Intel x86 family of microprocessors have a register-style (accumulator) instruction set for most operations, but use stack instructions for its x87, Intel 8087 floating point arithmetic, dating back to the iAPX87 (8087) coprocessor for the 8086 and 8088. That is, there are no programmer-accessible floating point registers, but only an 80-bit wide, 8-level deep stack. The x87 relies heavily on the x86 CPU for assistance in performing its operations.

Computers using call stacks and stack frames
Most current computers (of any instruction set style) and most compilers use a large call-return stack in memory to organize the short-lived local variables and return links for all currently active procedures or functions. Each nested call creates a new stack frame in memory, which persists until that call completes. This call-return stack may be entirely managed by the hardware via specialized address registers and special address modes in the instructions. Or it may be merely a set of conventions followed by the compilers, using generic registers and register+offset address modes. Or it may be something in between.

Since this technique is now nearly universal, even on register machines, it is not helpful to refer to all these machines as stack machines. That term is commonly reserved for machines which also use an expression stack and stack-only arithmetic instructions to evaluate the pieces of a single statement.

Computers commonly provide direct, efficient access to the program's global variables and to the local variables of only the current innermost procedure or function, the topmost stack frame. 'Up level' addressing of the contents of callers' stack frames is usually not needed and not supported as directly by the hardware. If needed, compilers support this by passing in frame pointers as additional, hidden parameters.

Some Burroughs stack machines do support up-level refs directly in the hardware, with specialized address modes and a special 'display' register file holding the frame addresses of all outer scopes. Currently, only MCST Elbrus has done this in hardware. When Niklaus Wirth developed the first Pascal compiler for the CDC 6000, he found that it was faster overall to pass in the frame pointers as a chain, rather than constantly updating complete arrays of frame pointers. This software method also adds no overhead for common languages like C which lack up-level refs.

The same Burroughs machines also supported nesting of tasks or threads. The task and its creator share the stack frames that existed at the time of task creation, but not the creator's subsequent frames nor the task's own frames. This was supported by a cactus stack, whose layout diagram resembled the trunk and arms of a Saguaro cactus. Each task had its own memory segment holding its stack and the frames that it owns. The base of this stack is linked to the middle of its creator's stack. In machines with a conventional flat address space, the creator stack and task stacks would be separate heap objects in one heap.

In some programming languages, the outer-scope data environments are not always nested in time. These languages organize their procedure 'activation records' as separate heap objects rather than as stack frames appended to a linear stack.

In simple languages like Forth that lack local variables and naming of parameters, stack frames would contain nothing more than return branch addresses and frame management overhead. So their return stack holds bare return addresses rather than frames. The return stack is separate from the data value stack, to improve the flow of call setup and returns.

Comparison with register machines
Stack machines are often compared to register machines, which hold values in an array of registers. Register machines may store stack-like structures in this array, but a register machine has instructions which circumvent the stack interface. Register machines routinely outperform stack machines, and stack machines have remained a niche player in hardware systems. But stack machines are often used in implementing virtual machines because of their simplicity and ease of implementation.

Instructions
Stack machines have higher code density. In contrast to common stack machine instructions which can easily fit in 6 bits or less, register machines require two or three register-number fields per ALU instruction to select operands; the densest register machines average about 16 bits per instruction plus the operands. Register machines also use a wider offset field for load-store opcodes. A stack machine's compact code naturally fits more instructions in cache, and therefore could achieve better cache efficiency, reducing memory costs or permitting faster memory systems for a given cost. In addition, most stack-machine instructions are very simple, made from only one opcode field or one operand field. Thus, stack-machines require very little electronic resources to decode each instruction.

A program has to execute more instructions when compiled to a stack machine than when compiled to a register machine or memory-to-memory machine. Every variable load or constant requires its own separate Load instruction, instead of being bundled within the instruction which uses that value. The separated instructions may be simple and faster running, but the total instruction count is still higher.

Most register interpreters specify their registers by number. But a host machine's registers can't be accessed in an indexed array, so a memory array is allotted for virtual registers. Therefore, the instructions of a register interpreter must use memory for passing generated data to the next instruction. This forces register interpreters to be much slower on microprocessors made with a fine process rule (i.e. faster transistors without improving circuit speeds, such as the Haswell x86). These require several clocks for memory access, but only one clock for register access. In the case of a stack machine with a data forwarding circuit instead of a register file, stack interpreters can allot the host machine's registers for the top several operands of the stack instead of the host machine's memory

In a stack machine, the operands used in the instructions are always at a known offset (set in the stack pointer), from a fixed location (the bottom of the stack, which in a hardware design might always be at memory location zero), saving precious in-cache or in-CPU storage from being used to store quite so many memory addresses or index numbers. This may preserve such registers and cache for use in non-flow computation.

Temporary / local values
Some in the industry believe that stack machines execute more data cache cycles for temporary values and local variables than do register machines.

On stack machines, temporary values often get spilled into memory, whereas on machines with many registers these temps usually remain in registers. (However, these values often need to be spilled into "activation frames" at the end of a procedure's definition, basic block, or at the very least, into a memory buffer during interrupt processing). Values spilled to memory add more cache cycles. This spilling effect depends on the number of hidden registers used to buffer top-of-stack values, upon the frequency of nested procedure calls, and upon host computer interrupt processing rates.

On register machines using optimizing compilers, it is very common for the most-used local variables to remain in registers rather than in stack frame memory cells. This eliminates most data cache cycles for reading and writing those values. The development of "stack scheduling" for performing live-variable analysis, and thus retaining key variables on the stack for extended periods, helps this concern.

On the other hand, register machines must spill many of their registers to memory across nested procedure calls. The decision of which registers to spill, and when, is made statically at compile time rather than on the dynamic depth of the calls. This can lead to more data cache traffic than in an advanced stack machine implementation.

Common subexpressions
In register machines, a common subexpression (a subexpression which is used multiple times with the same result value) can be evaluated just once and its result saved in a fast register. The subsequent reuses have no time or code cost, just a register reference. This optimization speeds simple expressions (for example, loading variable X or pointer P) as well as less-common complex expressions.

With stack machines, in contrast, results can be stored in one of two ways. Firstly, results can be stored using a temporary variable in memory. Storing and subsequent retrievals cost additional instructions and additional data cache cycles. Doing this is only a win if the subexpression computation costs more in time than fetching from memory, which in most stack CPUs, almost always is the case. It is never worthwhile for simple variables and pointer fetches, because those already have the same cost of one data cache cycle per access. It is only marginally worthwhile for expressions such as X+1. These simpler expressions make up the majority of redundant, optimizable expressions in programs written in languages other than concatenative languages. An optimizing compiler can only win on redundancies that the programmer could have avoided in the source code.

The second way leaves a computed value on the data stack, duplicating it as needed. This uses operations to copy stack entries. The stack must be depth shallow enough for the CPU's available copy instructions. Hand-written stack code often uses this approach, and achieves speeds like general-purpose register machines. Unfortunately, algorithms for optimal "stack scheduling" are not in wide use by programming languages.

Pipelining
In modern machines, the time to fetch a variable from the data cache is often several times longer than the time needed for basic ALU operations. A program runs faster without stalls if its memory loads can be started several cycles before the instruction that needs that variable. Complex machines can do this with a deep pipeline and "out-of-order execution" that examines and runs many instructions at once. Register machines can even do this with much simpler "in-order" hardware, a shallow pipeline, and slightly smarter compilers. The load step becomes a separate instruction, and that instruction is statically scheduled much earlier in the code sequence. The compiler puts independent steps in between.

Scheduling memory accesses requires explicit, spare registers. It is not possible on stack machines without exposing some aspect of the micro-architecture to the programmer. For the expression A B -, B must be evaluated and pushed immediately prior to the Minus step. Without stack permutation or hardware multithreading, relatively little useful code can be put in between while waiting for the Load B to finish. Stack machines can work around the memory delay by either having a deep out-of-order execution pipeline covering many instructions at once, or more likely, they can permute the stack such that they can work on other workloads while the load completes, or they can interlace the execution of different program threads, as in the Unisys A9 system. Today's increasingly parallel computational loads suggests, however, this might not be the disadvantage it's been made out to be in the past.

Stack machines can omit the operand fetching stage of a register machine. For example, in the Java Optimized Processor (JOP) microprocessor the top 2 operands of stack directly enter a data forwarding circuit that is faster than the register file.

Out-of-order execution
The Tomasulo algorithm finds instruction-level parallelism by issuing instructions as their data becomes available. Conceptually, the addresses of positions in a stack are no different than the register indexes of a register file. This view permits the out-of-order execution of the Tomasulo algorithm to be used with stack machines.

Out-of-order execution in stack machines seems to reduce or avoid many theoretical and practical difficulties. The cited research shows that such a stack machine can exploit instruction-level parallelism, and the resulting hardware must cache data for the instructions. Such machines effectively bypass most memory accesses to the stack. The result achieves throughput (instructions per clock) comparable to load–store architecture machines, with much higher code densities (because operand addresses are implicit).

One issue brought up in the research was that it takes about 1.88 stack-machine instructions to do the work of one instruction on a load-store architecture machine. Competitive out-of-order stack machines therefore require about twice as many electronic resources to track instructions ("issue stations"). This might be compensated by savings in instruction cache and memory and instruction decoding circuits.

Hides a faster register machine inside
Some simple stack machines have a chip design which is fully customized all the way down to the level of individual registers. The top of stack address register and the N top of stack data buffers are built from separate individual register circuits, with separate adders and ad hoc connections.

However, most stack machines are built from larger circuit components where the N data buffers are stored together within a register file and share read/write buses. The decoded stack instructions are mapped into one or more sequential actions on that hidden register file. Loads and ALU ops act on a few topmost registers, and implicit spills and fills act on the bottommost registers. The decoder allows the instruction stream to be compact. But if the code stream instead had explicit register-select fields which directly manipulated the underlying register file, the compiler could make better use of all registers and the program would run faster.

Microprogrammed stack machines are an example of this. The inner microcode engine is some kind of RISC-like register machine or a VLIW-like machine using multiple register files. When controlled directly by task-specific microcode, that engine gets much more work completed per cycle than when controlled indirectly by equivalent stack code for that same task.

The object code translators for the HP 3000 and Tandem T/16 are another example. They translated stack code sequences into equivalent sequences of RISC code. Minor 'local' optimizations removed much of the overhead of a stack architecture. Spare registers were used to factor out repeated address calculations. The translated code still retained plenty of emulation overhead from the mismatch between original and target machines. Despite that burden, the cycle efficiency of the translated code matched the cycle efficiency of the original stack code. And when the source code was recompiled directly to the register machine via optimizing compilers, the efficiency doubled. This shows that the stack architecture and its non-optimizing compilers were wasting over half of the power of the underlying hardware.

Register files are good tools for computing because they have high bandwidth and very low latency, compared to memory references via data caches. In a simple machine, the register file allows reading two independent registers and writing of a third, all in one ALU cycle with one-cycle or less latency. Whereas the corresponding data cache can start only one read or one write (not both) per cycle, and the read typically has a latency of two ALU cycles. That's one third of the throughput at twice the pipeline delay. In a complex machine like Athlon that completes two or more instructions per cycle, the register file allows reading of four or more independent registers and writing of two others, all in one ALU cycle with one-cycle latency. Whereas the corresponding dual-ported data cache can start only two reads or writes per cycle, with multiple cycles of latency. Again, that's one third of the throughput of registers. It is very expensive to build a cache with additional ports.

Since a stack is a component of most software programs, even when the software used is not strictly a stack machine, a hardware stack machine might more closely mimic the inner workings of its programs. Processor registers have a high thermal cost, and a stack machine might claim higher energy efficiency.

Interrupts
Responding to an interrupt involves saving the registers to a stack, and then branching to the interrupt handler code. Often stack machines respond more quickly to interrupts, because most parameters are already on a stack and there is no need to push them there. Some register machines deal with this by having multiple register files that can be instantly swapped but this increases costs and slows down the register file.

Interpreters
Interpreters for virtual stack machines are easier to build than interpreters for register machines; the logic for handling memory address modes is in just one place rather than repeated in many instructions. Stack machines also tend to have fewer variations of an opcode; one generalized opcode will handle both frequent cases and obscure corner cases of memory references or function call setup. (But code density is often improved by adding short and long forms for the same operation.)

Interpreters for virtual stack machines are often slower than interpreters for other styles of virtual machine. This slowdown is worst when running on host machines with deep execution pipelines, such as current x86 chips.

In some interpreters, the interpreter must execute a N-way switch jump to decode the next opcode and branch to its steps for that particular opcode. Another method for selecting opcodes is threaded code. The host machine's prefetch mechanisms are unable to predict and fetch the target of that indexed or indirect jump. So the host machine's execution pipeline must restart each time the hosted interpreter decodes another virtual instruction. This happens more often for virtual stack machines than for other styles of virtual machine.

One example is the Java programming language. Its canonical virtual machine is specified as an 8-bit stack machine. However, the Dalvik virtual machine for Java used on Android smartphones is a 16-bit virtual-register machine - a choice made for efficiency reasons. Arithmetic instructions directly fetch or store local variables via 4-bit (or larger) instruction fields. Similarly version 5.0 of Lua replaced its virtual stack machine with a faster virtual register machine.

Since Java virtual machine became popular, microprocessors have employed advanced branch predictors for indirect jumps. This advance avoids most of pipeline restarts from N-way jumps and eliminates much of the instruction count costs that affect stack interpreters.

title: Stack machine


text:
Mount Elgon

Mount Elgon is an extinct shield volcano on the border of Uganda and Kenya, north of Kisumu and west of Kitale. The mountain's highest point, named "Wagagai", is located entirely within Uganda. Although there is no verifiable evidence of its earliest volcanic activity, geologists estimate that Mount Elgon is at least 24 million years old, making it the oldest extinct volcano in East Africa. The mountain's name originates from its Maasai name, “Ol Doinyo Ilgoon” (Breast Mountain).

Physical features

Mount Elgon is a massive solitary volcanic mountain on the border of eastern Uganda and western Kenya. Its vast form, 80 km in diameter, rises 3070 m above the surrounding plains. Its cooler heights offer respite for humans from the hot plains below, and its higher altitudes provide a refuge for flora and fauna.

Mt. Elgon consists of five major peaks:
 * Wagagai (4321 m), in Uganda
 * Sudek   (4302 m) on the Kenya/Uganda border
 * Koitobos (4222 m), a flat-topped basalt column in Kenya
 * Mubiyi  (4211 m) in Uganda
 * Masaba 	 (4161 m) in Uganda

Other features of note are:
 * The caldera — Elgon's is one of the largest intact calderas in the world.
 * Subsidiary craters to the Southwest: All about 25 km across, Bududu, and manafwa rings intersect the caldera and Bububo with a central plug sits at its edge. The smaller Tororo marks the plain almost 50 km from Elgon’s peak.

 * The warm springs by the Suam River
 * Endebess Bluff (2563 m)
 * Ngwarisha, Makingeny, Chepnyalil, and Kitum caves: Kitum Cave is over 60 m wide and penetrates 200 m. The cave contains salt deposits and it is frequented by wild elephants that lick the salt exposed by gouging the walls with their tusks. Richard Preston's book The Hot Zone (1994) described the cave's association with the Marburg virus after two people who had visited it (one in 1980 and another in 1987) contracted the disease and died.

The mountain soil is red laterite. The mountain is the catchment area for several rivers such as the Suam River, which becomes the Turkwel downstream and drains into Lake Turkana, and the Nzoia River and the Lwakhakha River, which flow to Lake Victoria. The town of Kitale is in the foothills of the mountain. The area around the mountain is protected by two Mount Elgon National Parks, one on each side of the international border.

Fauna
A population of African bush elephants is present around the mountain that ventures deep into caves to access salt licks. This population was formerly present around the entire mountain, but has since been reduced to the Kenyan side, where they venture into Kitum Cave.

There are several disjunct populations of mammal species that are restricted to Mount Elgon, including the Elgon shrew (Crocidura elgonius), Rudd's mole-rat (Tachyoryctes ruddi), and Thomas's pygmy mouse (Mus sorella). There are also several disjunct populations of rare bird species, including Sharpe's longclaw (Macronyx sharpei), Hunter's cisticola (Cisticola hunteri), Jackson's spurfowl (Pternistis jacksoni), and the Elgon francolin (Scleroptila elgonensis).

An endemic subspecies of the bushbuck (Tragelaphus scriptus heterochrous) is restricted to the mountain. The possibly extinct Du Toit's torrent frog (Arthroleptides dutoiti), considered an EDGE species due to its evolutionary distinctiveness, is known only from a single specimen collected on the Kenyan side of the mountain.

Flora
Some rare plants are found on the mountain, including Ardisiandra wettsteinii, Carduus afromontanus, Echinops hoehnelii, Ranunculus keniensis, and Romulea keniensis.

Local ethnicities
Mount Elgon and its tributaries are home to five tribes: the Bagisu, the Mbay, Sor, Sapiiny,  Koony, Someek,  Pook, and the Ogiek, better known in the region under the derogatory umbrella term Ndorobo.

title: Mount Elgon


text:
VII

VII or vii may refer to: the Roman numeral 7

Art and entertainment

 * vii, leading-tone triad, see diminished triad
 * VII (Blitzen Trapper album)
 * VII (Just-Ice album)
 * VII (Teyana Taylor album)
 * VII (Tresor album)
 * VII: Journal of the Marion E. Wade Center
 * VII Photo Agency, an international photographic cooperative
 * Saw VII, the seventh film in the Saw franchise, commonly called "VII"

Other uses

 * VII, The Roman number for seven
 * vii, leading-tone triad, see diminished triad
 * Vii (river), a river in Romania
 * Vehicle Infrastructure Integration, an R&D initiative for linking road vehicles to their physical surroundings
 * Viscosity index improver
 * Type VII Submarine, a German submarine class in World War 2
 * Type VII Submarine, a German submarine class in World War 2

title: VII


text:
XII (Neal McCoy album)

XII is the tenth studio album by American country music singer Neal McCoy. Released on March 6, 2012, by Blaster Records, it is his first album of new material since That's Life in 2005. Blake Shelton and Miranda Lambert co-produced the album with Brent Rowan. The album includes the single "A-OK".

Critical reception
Matt Bjorke of Roughstock gave the album three-and-a-half stars out of five, saying that it "finds him doing what he does best, performing nimble mainstream country music tunes as good as anything else on the marketplace." Rating it four stars out of five, Taste of Country writer Billy Dukes favorably compared McCoy's vocals to Shelton's. J. Poet of Allmusic rated it three stars out of five, saying that the album had "one great tune, two good ones, and a whole lot that get by on McCoy's powerful vocals".

Personnel

 * Perry Coleman – background vocals
 * Eric Darken – percussion
 * Scott Ducaj – trumpet
 * Dan Dugmore – dobro, electric guitar, steel guitar, lap steel guitar
 * Lester Estelle Jr. – drums
 * David Grissom – electric guitar
 * Aubrey Haynie – fiddle
 * Wes Hightower – background vocals
 * John Barlow Jarvis – piano
 * Kim Keyes – background vocals
 * Miranda Lambert – background vocals
 * Tim Lauer – organ, synthesizer, Wurlitzer
 * Mac McAnally – acoustic guitar
 * Neal McCoy – lead vocals, whistle
 * Greg Morrow – drums, percussion
 * Wendy Moten – background vocals
 * Michael Rhodes – bass guitar
 * Mike Rojas – piano
 * Brent Rowan – bass guitar, acoustic guitar, electric guitar, piano, sitar
 * Blake Shelton – acoustic guitar, background vocals
 * Bryan Sutton – banjo, acoustic guitar, resonator guitar
 * Glenn Worf – bass guitar

title: XII (Neal McCoy album)


text:
XXV

XXV may refer to:

 * 25 (number)
 * XXV (Klamydia album)
 * XXV (Oomph! album)
 * XXV (Robbie Williams album)
 * XXV (The Shadows album)
 * XXV (Vader album)
 * XXV: The Essential, an album by Mike Oldfield

title: XXV


text:
LII

LII may refer to:

 * Year AD 52, in Roman numerals
 * 52 (number) in Roman numerals
 * Laser-induced incandescence, a method of measuring particle sizes in flames
 * Legal Information Institute, a non-profit public service of Cornell Law School
 * Lithium iodide (LiI)
 * Logical Intuitive Introvert, one of the 16 classifications of people in socionics
 * Gromov Flight Research Institute, a Russian aircraft test base (ЛИИ, or LII, in Russian)
 * Super Bowl LII, the fifty-second NFL Super Bowl

title: LII


text:
LIV

LIV or Liv may refer to:

People

 * Liv (given name), a given name
 * Liv (surname), list of people with the surname Liv
 * Liv Morgan, a professional wrestler
 * Liv, a person who speaks the Livonian language of Latvia
 * Titus Livius, a Roman historian

Places

 * Liv Glacier, Antarctic glacier from Barnum Peak and draining north
 * Liverpool Lime Street railway station, England (station code LIV)

Groups, companies, organizations, brands

 * Liv (band), a Swedish/American indie pop group

 * Liv (TV channel), a Finnish TV channel
 * Investigation Discovery (Latin America), a TV channel, formerly "Liv"
 * Law Institute of Victoria, Australia
 * LIV Golf, a professional golf tour
 * Liv Bicycles, a sub-brand of Giant Bicycles, designed specially for women
 * Sony Liv, an Indian television network

Arts and entertainment

 * Liv (Livingston Taylor album), 1971
 * Liv (Waltons album), 2001
 * Liv (film), a 1967 Norwegian film by Pål Løkkeberg

Other

 * 54 (number) in Roman numerals
 * Left innominate vein in the upper chest
 * Lexikon der indogermanischen Verben ("Lexicon of the Indo-European Verbs")
 * Line-item veto in law-making
 * Wilder's law of initial value in statistics
 * LiV DASH, a lithium-ion battery powered vehicle made by Hybrid Technologies
 * Low information voter
 * Livonian language (ISO 639-3 language code ) of Latvia
 * (UCI code: LIV), a women's professional cycling team

title: LIV


text:
Talk:Power series

Explanation of Symbols Needed.
There is an uneven distribution of levels of understanding on this (and it seems, any mathematics related) page.

The problem is that many of the symbols are not explained. There is a lot that is easy to understand on this page, and the hypothetical you, the reader, will be going along fine "yeah yeah, uhuh, I get that," until all of a sudden, "What the hell is that??!"

And if you don't know, then you just don't know.

I would go through and fix this problem, But I somehow managed to get to Multivariable Calculus without seeing some of these symbols.

DoomedToBeTeaching (talk) 05:46, 8 March 2009 (UTC)

 * Which ones? 67.198.37.16 (talk) 17:37, 5 July 2016 (UTC)

Multiplication and division
I don't believe the division formula is correct.

Cheers Kris — Preceding unsigned comment added by Krzysztofandrzejkrakowski (talk • contribs) 02:14, 9 August 2016 (UTC)

Uniqueness of coefficients
Probably easy, but if f and g are two power series, and f=g for all x, then a_i=b_i for all i? Darcourse (talk) 20:39, 23 September 2019 (UTC)

 * What specifically in the article are you referring to?—Anita5192 (talk) 20:45, 23 September 2019 (UTC)

 * More like it's lack of presence in the article :) Darcourse (talk) 20:47, 23 September 2019 (UTC)

 * I think you can prove it with differentiation. f(0)=g(0) -> a_0=b_0, so these can be removed, and f_1=g_1. The differentials must also be the same, so f_1'(0)=g_1'(0) -> a_1=b_1, etc... Darcourse (talk) 20:53, 23 September 2019 (UTC)

 * For a formal series it is the definition of equality. For non-formal series (e.g., Taylor series), it is only true if you add that the series converges in some open neighborhood: for example, the series $$ \sum n! x^n$$ and $$ \sum n^n x^n $$ agree at every point and which they both converge. I don't think that suggests something that should be added to the article. --JBL (talk) 21:15, 23 September 2019 (UTC)

Misleading use of the word convergent
Mathematicians often use misleading grammar (unnecessarily confusing wording) when explaining themselves. The wikipedia pages on Power Series and Taylor Series offer a good example of unnecessarily confusing wording wherein the word "convergent" is misused grammatically. A complete, clear, understandable use of the word "convergent" identifies TWO things that move towards each other. TWO things must be identified. The Radius of Convergence section of the Power Series page now says "A power series will converge for some values of the variable x and may diverge for others", which completely ignores to specify WHAT THING the power series is converging towards! A power series can converge to a) a finite number, b) an analytical function, c) zero, d) infinity, but this wikipedia article talks about "convergent" as if the reader pre-knows that the power series is supposed to converge towards -- which is common parlance for mathematicians but is not obvious for the non-expert reader. Thus, for the sake of clarity and readability, this Power Series wikipedia explanation needs a small edit to specify WHAT THING the power series "will converge" towards. I tried to make this simple improvement "A power series will converge towards an analytic function for some values of the variable x and may diverge for others" but it was undone because people want to discuss it first, e.g. D.Lazard. So let's discuss. --Damon Turney (talk) 23:47, 8 December 2020 (UTC)

 * The sentence "The series converges" is standard, correct mathematical English. Anyone who has taken a first course in calculus will have been introduced to it, and no one who has not taken a first course in calculus could possibly understand any of what you are talking about.  Separately, you reverted my edit, but your edit summary (and the fact that you are the one who originally made the change) suggests you have no substantive objection to it.  If that is correct, I ask that you self-revert. --JBL (talk) 01:20, 9 December 2020 (UTC)

 * I agree with you that it doesn't need to converge to an analytical function, so for that, I thank you. But let's be clear, we should allow non-experts to have a chance at understanding this Wikipedia article -- by using correct English. It is a simple thing to understand that the word "converge" must specify TWO things that are converging towards each other. A power series is just one thing, so we must specify what SECOND THING the power series could be "converging" towards. This whole issue of confusion is nicely and clearly explained in the convergent series article where it is clearly explained that "convergent" means that the series is converging to a non-infinite limit.  Can we please insert a convergent series link into the first sentence of the Radius of Convergence subsection of the Power Series article?  It would clear everything up.  I will go ahead and insert convergent series. --Damon Turney (talk) 17:46, 9 December 2020 (UTC)

 * It is standard that many English words have a mathematical meaning that differs from their common English meaning. These different meanings lead often to different grammatical syntax. For example, "unknown", "variable", and "indeterminate" are nouns in mathematics, while they are only adjectives in current English (also, "variables" are often things that do not vary, and "indeterminates" are well defined objects). In mathematics, the verb "to converge" means "being convergent", and therefore does not require to have any complement (for the definition of "being convergent", see Convergent series). Also, the convergence of a series does not requires that the series represents a function. For exemple, the fact that the series $$\textstyle \sum_{n=0}^\infty 1/n!$$ converges is a theorem that can be proved without knowing that its sum (not its limit) is commonly called $e$. D.Lazard (talk) 10:24, 9 December 2020 (UTC)

 * No, incorrect, the words "unknown" and "variable" can also be NOUNS in English. Just look in a dictionary. Regarding "being convergent", you are also incorrect: "being convergent" also requires explanation of what SECOND THING it is "being convergent" towards. Regarding the series $$\textstyle \sum_{n=0}^\infty 1/n!$$, I agree with you that it doesn't need to converge towards a function, and for pointing that out, I thank you.--Damon Turney (talk) 17:46, 9 December 2020 (UTC)

 * If we're doing the "just look in a dictionary" test, here is what Merriam-Webster has to say about "converge": "converge (intransitive verb) ... 3 : to approach a limit as the number of terms increases without limit; 'the series converges' " --JBL (talk) 17:54, 9 December 2020 (UTC)

 * Yes good point JBL, but the problem is that most people don't use that definition of "converge", or have it memorized, and most readers on Wikipedia are reading Wikipedia because they are trying to LEARN mathematics -- they are not already experts in mathematics, otherwise they would have no need for reading Wikipedia.  Clarifying this point of confusion helps Wikipedia serve non-experts.--Damon Turney (talk) 18:07, 9 December 2020 (UTC)

 * I have reverted your change from "point of convergence" to "convergent point" since "convergent point" is a phrase that does not has any mathematical meaning, and is thus your own WP:original research. D.Lazard (talk) 11:05, 9 December 2020 (UTC)

 * Weirdly, that phrase was already present before Damonturney started editing. (In fact, it's been in the article a really long time.  Damonturney removed it, but then later reinstated it ¯\_(ツ)_/¯.) --JBL (talk) 12:53, 9 December 2020 (UTC)

 * JayBeeEll, I reinstated "convergent point" because D.Lazard eliminated it initially and called for a "talk" session, so I was just giving D.Lazard a chance to talk about and edit everything before final changes were accepted.--Damon Turney (talk) 17:46, 9 December 2020 (UTC)

 * I understand why you did it; what I was trying to point out is that there is no need to discuss things that everyone agrees about, ergo there was no point in reverting something when you agree it is an improvement. (It's a moot point now -- we all have agreed that we agree, and it has been put back correctly.) --JBL (talk) 17:58, 9 December 2020 (UTC)

 * Great, thanks, sorry for the back and forth.--Damon Turney (talk) 18:00, 9 December 2020 (UTC)

Power series = function series
User:JayBeeEll You seem to disagree that a power series is a series of functions, despite the fact that I provided a reference for this. Could you explain your motivations?

Besides, I am generally against the use of intuitive, non-mathematical vocabulary like "infinite series". As far as I know, a series or a sequence is always "infinite". The emphasis ought to be on whether it is a series of functions or a numerical series. --L'âne onyme (talk) 18:02, 27 October 2021 (UTC)
 * Power series are certainly not always series of functions; for example over a finite field where polynomials are not in one-to-one correspondence with polynomial functions. As I said elsewhere, your personal idiosyncrasies are interesting but are not an acceptable basis for writing Wikipedia articles. --JBL (talk) 20:26, 27 October 2021 (UTC)
 * Ok, I didn't know that. So if I understand you right, a power series is actually a series of polynomials rather than functions ? Then I think it should be stated more clearly. In the whole article I didn't find anywhere a precise definition of a power series. Can we at least agree that "infinite series" is far too vague ?
 * Besides, as I also said elsewhere, you are bound to respect the rules of politeness on Wikipedia, especially since despite my personal "idiosyncracies" I have never broken the rules or engaged in edit warring on my side (which is not my intention).--L'âne onyme (talk) 21:15, 27 October 2021 (UTC)
 * Can we at least agree that "infinite series" is far too vague ? No, for reasons I have articulated elsewhere. --JBL (talk) 21:21, 27 October 2021 (UTC)
 * Can we at least agree that "infinite series" is far too vague ? No, as infinite series links to a definition.
 * ... whether it [a power series] is a series of functions or a numerical series. It may be both, and also a series of monomials (formal power series). The distinction is exactly as relevant as deciding whether $$x^2$$ is a function (formally, it is not), an expression, a monomial, a polynomial, a quadratic form, or even a number, if a value has been assigned to $x$. D.Lazard (talk) 09:51, 28 October 2021 (UTC)

title: Talk:Power series


text:
Medina, Isle of Wight

Medina was a non-metropolitan district with the status of a borough on the Isle of Wight in England from 1974 to 1995.

The district was formed by the Local Government Act 1972, and was a merger of the municipal boroughs of Newport and Ryde along with the urban district of Cowes. It was one of two districts on the Island formed in 1974 - the other was South Wight.

"Medina" was an older name for Newport which has been preserved in the River Medina.

Following a review by the Local Government Commission for England, the borough was abolished on 1 April 1995, when a single Isle of Wight Council replaced the Isle of Wight County Council and the island's two district councils.

title: Medina, Isle of Wight


text:
Lix (readability test)

LIX (abbreviation of Swedish läsbarhetsindex, "readibility index") is a readability measure indicating the difficulty of reading a text developed by Swedish scholar Carl-Hugo Björnsson. It is defined as a sum of two numbers: the average sentence length and the percentage of words of more than six letters.

$$\text{LIX} = \text{average sentence length} + \text{percentage of words of more than six letters}$$

Scores usually range from 20 ("very easy") to 60 ("very difficult").

The exact formula is:

$$\text{LIX} = \frac{A}{B} + \frac{C \cdot 100}{A}$$, where

$$A$$ is the number of words,

$$B$$ is the number of periods (defined by period, colon or capital first letter), and

$$C$$ is the number of long words (more than 6 letters).

title: Lix (readability test)


text:
LXV

LXV may refer to:

 * 65 (number) in Roman numerals
 * LXV, the IATA and FAA LID code for Lake County Airport, United States

title: LXV