text:
V850

V850 is a 32-bit RISC CPU architecture produced by Renesas Electronics for embedded microcontrollers. It was designed by NEC as a replacement for their earlier NEC V60 family, and was introduced shortly before NEC sold their designs to Renesas in the early 1990s. It has continued to be developed by Renesas.

The V850 architecture is a load/store architecture with 32 32-bit general-purpose registers. It features a compressed instruction set with the most frequently used instructions mapped onto 16-bit half-words.

Intended for use in ultra-low power consumption systems, such as those using 0.5 mW/MIPS, the V850 has been widely used in a variety of applications, including optical disk drives, hard disk drives, mobile phones, car audio, and inverter compressors for air conditioners. Today, microarchitectures primarily focus on high performance and high reliability, such as the dual-lockstep redundant mechanism for the automotive industry; and the V850 and RH850 families are comprehensively used in cars.

The V850/RH850 microcontrollers are also used prominently on non-Japanese automobile marques such as Chevrolet, Chrysler, Dodge, Ford, Hyundai, Jeep, Kia, Opel, Range Rover, Renault and Volkswagen Group brands.

Overview
The V850 is the trademark name for a 32-bit RISC CPU architecture for embedded microcontrollers of Renesas Electronics Corporation. It was originally developed and manufactured by NEC Corporation in the early 1990s (the copyright mark for the microcode on the package shows 1991) as a branch of the V800 Series and is still being evolved today.

Its base-architecture has been succeeded by the V850 family variants, named V850E, V850E1, V850ES, V850E1F, V850E2, V850E2M, V850E2S, and the RH850 family (V850E2M, V850E2S, and V850E3) CPU cores.

Many compilers and debuggers are available from various development tool vendors.

Real-time operating systems are provided by compiler vendors.

In-circuit emulators (ICE) are provided by many vendors. Legacy proven pod-based types—the JTAG-based N-Wire interface with the N-trace type, and the Nexus interface with the Aurora Trace type—are available.

Application systems

The first V850 CPU core was used in many DVD drives manufactured by NEC's and Sony's Optiarc (later wholly owned by Sony). NEC Electronics (currently Renesas Electronics) itself intensively developed application-specific standard products (ASSPs) for SCOMBO Series optical disk drives. This first generation of processor core was also used for hard disk drives manufactured by Quantum Corporation (see photo).

In 1997, the V850/xxn product line started with the V850/SA1 and the V850/SV1 and expanded its application to ultra-lo-power products such as "handy camcorders." It has a main and sub internal oscillator amplifier working from 1.8 V to 3.6 V with external crystal or ceramic resonator. Software STOP mode, whose internal watch timer operates with a 32.768 kHz sub-oscillator, typically consumes only 8μA of electrical current. In 1998, NEC launched the V850/SB1, with IEBus controller, for car audio, an ultra-low-power (3.6 mW@5 V/MIPS) and ultra-low-noise (EMI/EMS) 5 V product. The V850/SC1 was also for car audio. These strategic product line expansions succeeded in increasing the number of devices sold.

This first generation of the V850 core is also used for some NEC mobile phones. It is also used for the programmable-host CPUs of some small form factor GSM/GPRS mobile devices with GPS embedded modem modules.

In the next phase, NEC targeted the automotive industry with a CAN bus controller based on the V850, as the V850/SF1. Later on, the automotive industry became the main target of the V850 and RH850.

The V850E core was targeted at system-on-a-chip (SoC) applications as well as standard products, and was used for some Japanese domestic mobile phones, including Sony Mobile's and NEC's.    V850E and V850ES are also used in air conditioning inverter compressors. At this stage, another mass market was its use in car audio. The V850ES core succeeded in the low-power embedded-product line, and is ISA-compatible with the V850E. NEC Electronics (currently, Renesas Electronics) adopted the V850 CPU core for its USB 3.0 controllers.

Around 2005, several companies started a feasibility study for the FlexRay controller on the V850E platform. Yokogawa Digital Computer (currently DTS INSIGHT) developed an evaluation board named GT200 with a V850E/IA1 and a field-programmable gate array (FPGA), which employs the FlexRay controller developed by Bosch.

The V850E2 core primarily targeted automotive areas, but was also used for NEC's mobile phones.

The V850 family line up (based on V850E, V850ES, and V850E2 cores) and the Renesas RH850 family (based on the V850E3 core, as of 2018) are mainly employed in automotive applications as well as inter-equipment connectivity and motor-control specific microcontroller units (MCUs).

Trademark strategy
The V850 is a unregistered trademark but not a registered one. NEC once applied for a trademark to be registered with the Japan Patent Office, but it was rejected, as it was a natural extension of the series number. However, this action has been enough to prevent other people or organizations from registering it as a trademark. In addition, Renesas has been using the V850X/xxn type trademark, such as V850E/MA1, for more than 20 years, because the combination of one alphabetical with two numerical characters cannot be granted as a registered trademark. It is thus free to use without registration.

One exception is V850E/PHO3 (PHOENIX 3, or PHOENIX-FS). Another usage of PHOENIX 3 by Renesas Electronics is the COOL PHOENIX 3, which employs the ARM Cortex-M0 core. PHOENIX 3 is a registered trademark of the 3DO Company as USPTO Reg. 2,009,119.

According to current Renesas Electronics documentation, at least the following strings are regarded as its trademark: "V800 Series", "V850 family", "V850/SA1", "V850/SB1", "V850/SB2", "V850/SF1", "V850/SV1", "V850E/MA1", "V850E/MA2", "V850E/IA1", "V850E/IA2", "V850E/MS1", "V850E/MS2", "V851", "V852", "V853", "V854", "V850", "V850E", and "V850ES".

Because the V850 trademark has been used for more than 20 years, most people do not know that the RH850 family is based on an extension of the V850 instruction set architecture, and has backward compatibility with V850, V850E, V850ES, and V850E2. The RH850 is consequently thought of as being without the legacy software compatibility of the V850.

Development methodology

Because the V850 family was developed as a branch of the V800 series, the basic CPU architecture is inherited from the V810. The instruction set architecture of the first V850 is drastically modified from that of the V810, but the difference is within a patch level from the GNU Compiler Collection point of view. The main purpose of this change is to implement saturation arithmetic at customers' request. The detailed design methodology of the V810 is described in this journal. The V850 utilizes these design assets; but the datapath logic was changed from dynamic logic to static logic, to enable 32.768 kHz real-time clock frequency operation mode.

The register-transfer level "CPU architecture design" of the V810 is developed with the Functional Description Language (FDL) on the Falcon Simulator software, which are NEC's in-house CAD tools. This methodology is the same as that used for the NEC V60. In the late 1980s, the Verilog HDL had not yet been acquired by Cadence Design Systems. FDL had been used until the middle of the 2000s, and was also used for the development of NEC's super-computer named Earth Simulator.

The difference from V60 is that the circuit diagram was written with a schematic editor, not of Calma but of Mentor Graphics, called NETED, a part of the Design Architect product on Apollo Computer's workstation, which was the major schematic editor at that moment. It enabled designers to generate netlists, such as EDIF and SPICE, for LVS programs like cadence's Dracula products, and NEC's in-house Zycad netlist for logic simulation. Later on, this circuit diagram of NETED was able to generate a gate-level Verilog HDL netlist for V850.

Most of the register-transfer-level FDL netlist was translated to the gate-level schematic by hand, because the logic synthesis had not yet to be practical. The FDL was precisely divided into datapath and random logic. For the datapath part, the gate-level circuit diagram enabled manually repeated artwork. On the other hand, for the random logic part, logic synthesis was tried for generating gate-level schematic, but it was only about 10% of the total circuit.

In addition, formal verification was also not yet practical, which meant that full regression test by dynamic logic simulation was required for the gate-level netlist to compare with the RTL one. For gate-level logic simulation, NEC's in-house CAD tool V-SIM was usually used. But sometimes a hardware emulator, such as Zycad LE simulation accelerator, was used for this purpose. (Refer to:. In this material, the performance of Zycad LE is compared with NEC's HAL, but initial design decade differs. )

Basic architecture
The basis of the V810 and V850 has a typical general-purpose registers-based load/store architecture. There are 32 32-bit general-purpose registers. Register 0 (R0) is fixed as the Zero Register which always contains zero. In the V850, R30 is implicitly used by the  and   instructions. 16-bit short-format load/store instructions use element pointer (ep), where the addressing mode comprises the base address register ep and immediate-operand offsets. In V850E or later microarchitectures, R3 is implicitly used by ; call stack frame creation; and unwinding instructions, as a stack pointer. Compilers' calling conventions also use R3 as the stack pointer.

The original V850 has a simple 5-stage 1-clock pitch pipeline architecture. This is a significant feature of reduced instruction set computers (RISCs). But the object-code size is about half that of the MIPS R3000, because the V810 and V850 adopted 16-bit and 32-bit 2-way form-length instruction formats, respectively, and most of the frequently used instructions are mapped onto a 16-bit half-word. In other words, a 16-bit external bus width is enough to provide instructions continuously without pipeline stalling, which enables low power consumption on the application board, and is suitable for mobile equipment. This concept is similar to Renesas (formerly, Hitachi) SH, ARM Thumb, and MIPS16 instruction set architectures.

In addition, the instruction set is carefully implemented. For example, to execute a function call with a Jump and (Register) Link instruction,   which saves the next program counter (PC) on a register (fixed to R31 in V810), is also one of the RISC techniques to reduce the number of instructions. Return from the function can be accoomplished by  (  in V810) instruction. Typical CISC processors use call and return instructions and push the next PC on their stack memory area.

But V810 and V850 have some microarchitecture differences. The V810 adopts a microprogram operation method for some instructions, such as floating-point arithmetic and bit string operations, while the V850 uses a one-hundred-percent hardwired control method. As a result, for example, the first V850 does not have floating-point arithmetic and bit manipulation instruction sets, including the "find first one/zero" (search 1/0; / ), except for "set/clr/negate a bit" ( / / ). Those extended instruction sets are revived in V850E2x extensions.

Though the V800 series adopts a RISC instruction set architecture, their assembly language is hand-coding friendly. They adopt a straightforward load/store architecture. In addition, the "interlock" mechanism, both for the data hazards and for the branch hazards, are implemented: in other words, an assembly language programmer does not need to consider any delay slots. 32 general-purpose registers provide flexibility for assembly language users. A mixture of hand-assembled codes and C language compiled codes is facilitated by using compiler options, such as " " in the Gnu Compiler Collection.

The  instruction of the V810, which enables unsigned-load from memory-mapped I/O, was removed from the first V850s.

Detailed discussions are available in some old journals.

Instruction set extensions
The V850 series added many instruction set extensions, but all the extensions have backward compatibility. Therefore, old binary software assets work on the new cores.

The first generation of the V850 does not have unsigned load instructions, which had been removed from the V810 (where it was implemented with  and  ). Then, in the second generation V850E (V850E1) Series, such unsigned functionality was again added (with  and  ). In addition, the V850E has some other user-friendly "CISCy" extensions, such as,  ,  and.

In 1996, the V853 was announced as the first 32-bit RISC microcontroller with integrated flash memory. But its maximum number of "erase and write" cycles was 16.

In 1998, NEC strategically started to expand the V850 product line, to standard, application-specific_standard_product (ASSP), application-specific integrated circuit (ASIC), and system on a chip (SoC) businesses.

In 2001, NEC launched V850ES core, which is an ultra-low-power series, but is ISA-compatible with the V850E.

Around 2001, Java Acceleration IP core for the V850 seemed to be provided to some customers as SoC, but detailed information is only found in some patents.

In 2005, NEC Electronics introduced V850E2 core as the V850E2/ME3 product line with super-scalar architecture.

In 2009, NEC Electronics introduced V850E2M as dual-core with 2.56MIPS/MHz and 1.5 mW/MIPS.

In 2011, Renesas disclosed the SIMD extension for the V850 as V850E2H. As for the SIMD extension, some academic studies were done. But architectural documentation for this latest product line is disclosed to automotive customers only; it cannot be found on Renesas' website. Its name seems to have been changed to V850E3 or G3H. The only way to know about its instruction set is to reverse engineer it with the GNU Compiler Collection.

Power consumption
The original V810 and V850 CPU architecture is designed for ultra-low power applications.

The V810 is described in detail in some journals.

According to Renesas's documentation, the power consumption of the V850ES/Jx3-L implementation is about 70% of ARM Cortex-M3.

The V810 was one of the most low-power 32-bit microcontroller products of the early 1990s. It operates at from 2.2 V to 5.5 V with a 5 V 0.8 μm (CZ4) fabrication process. Measured with Dhrystone MIPS, power dissipation is 500 mW at 15MIPS and 40 mW at 6 MIPS, at 5 V and 2.2 V, respectively. This specification can be achieved both by well considered instruction-set architecture and by precisely tuned 5-stage 1-clock pitch pipeline microarchitecture, both of which are the benefit of a simplified RISC architecture.

This ultra-low-power architecture was succeeded by V850/Sxn product line, which are still being mass-produced after 20 years. Most of the improved chips are produced using a 3.3 V, 0.35μm (UC1) fabrication process, where the CPU core is precisely tuned to operate from 1.8 V to 3.6 V, working at 32.768 kHz (sub-oscillator) to 16.78 MHz (main-oscillator) with internal oscillator amplifier plus external resonator (crystal or ceramic). Its power dissipation is 2.7 mW/MIPS at 3.3 V when made with a 0.35 μm (UC1) fabrication process, and 3.6 mW/MIPS at 5 V with a 0.35 μm (CZ6) fabrication process. "Software STOP" stand-by mode for the mask ROM version of V850/SA1, whose internal watch timer operates at 3.3 V with 32.768 kHz sub-oscillator (IDD6), consumes typically only 8 μA electrical current. Subclock normal operation mode at 3.3 V with 32.768 kHz consumes 40 μA typically, 140 μA at the maximum. (IDD5) Its 1.8 V typical CPU operating current at 32.768 kHz might be 22 μA (40 μA ÷ 3.3 V × 1.8 V), where power dissipation should be 40 μW. It corresponds to 1.0 mW/MIPS (40 μW ÷ 0.032768 MHz ÷ 1.15 DMIPS/MHz ÷ 1000). The V850/Sxn product line is also tuned for low noise, with both EMI and with EMS. The V850/SB1 and SB2 are especially tuned for low EMI noise with a 5 V internal voltage regulator, which facilitates high sensitivity in receiving RF for car radios.

In 2011, NEC launched the 3rd generation microarchitecture V850ES ultra-low-power series, which achieves 1.43 mW/MIPS at an operating voltage range of from 2.2 V to 2.7 V, but this first implementation of V850ES microarchitecture seems to be incomplete compared with later generations of the same architecture. Its "Sub-IDLE" stand-by mode for the mask ROM version of V850ES/SA2 and V850ES/SA3, whose internal RTC operate at 2.5 V with 32.768 kHz sub-oscillator (IDD6), consume typically only 5 μA electrical current. But, Subclock normal operation mode at 2.5 V with 32.768 kHz consumes typically 40 μA, 100 μA at the maximum. Its 2.2 V typical CPU operation current at 32.768 kHz might be 31 μA (40 μA ÷ 2.5 V × 2.2 V), where power dissipation should be 68 μW. This is about 1.7 times that of V850/SA1. It corresponds to 1.6 mW/MIPS (68 μW ÷ 0.032768 MHz ÷ 1.3 DMIPS/MHz ÷ 1000).

The V850ES/JG3-L product line has ultra-low-power variants, the μPD70F3792, 793, and the μPD70F3841, 842. They can operate from 2.0 V to 3.6 V with typical electrical current of 18 μA at 32.768 kHz, which should be 22 μW at 2.0 V (18 μA × 2.0 V ÷ 3.3 V × 2.0 V). This corresponds to 0.52 mW/MIPS (22 μW ÷ 0.032768 MHz ÷ 1.3 DMIPS/MHz ÷ 1000). In addition, their sub-clock idle mode power consumption, with watch timer, should be typically 3.4 μW at 1.8 V (3.5 μA ÷ 3.3 V × 1.8 V × 1.8 V).

The power consumption of the NA85E2 (V850E2) core is much larger compared with the NU85E (V850E1) core using the same CB-12L (UX4L) fabrication process. The reason is that the V850E2x core has a 128-bit instruction prefetch bus and more than one instruction prefetch queue, while the average instruction length of the V800 series is 16 bits. It means 16 instructions can be fetched from the memory at once, and the memory and prefetch circuits sleep fors 3 to 7 cycles for dual-pipeline superscalar architecture. This gap enlarges electrical current amplitude differences. In addition, the peak electric current exceeds allowances for the voltage stabilizers of mobile gadgets. As for V850E2M CPU core, it is publicly introduced as 1.5 mW/MIPS, 3 times that of former generations, although it should be able to take advantage of new fabrication process technologies. Some mobile equipment avoids using dual-instruction execution (dual-pipeline superscalar), adopting the single-instruction (single-pipeline) execution setting to reduce electrical current amplitude differences.

Instruction opcode table
Each opcode (operation code) table is from User's Manual: Architecture (refer to external links.).

V810 (obsoleted)

 * 1st map opcodes

 * All opcodes (operation codes) of the hardwired control operation are contained within the first 16-bit half-word of an instruction, from the most significant bit (MSB). A 64-word depth ROM structure with branch condition code table is enough for decoding hardware. If a 16-bit literal operand is required, it is located in the second half-word. Microprogram control operations, bit strings, and floating-point arithmetic instructions are also located in the second 16-bit half-word. As a result, all the instructions have 16-bit and 32-bit 2-way form length. Unsigned load form memory mapped I/O is implemented as the  instruction. Arithmetic and logical instructions are not fully, but relatively, orthogonal.
 * The V810 does not have saturation arithmetic instructions, but 1 additional instruction in format II, such as  which checks flags (,  ,  , and  ) and rewrites the specified register, might be enough both for signed and unsigned, and for word and half-word, arithmetic operations.

 * {| class="wikitable" style="text-align:center;font-size: 80%"

! style="width:100px" | Bit [12:10] [15:13, 9] ! style="width:100px" | 000 ! style="width:100px" | 001 ! style="width:100px" | 010 ! style="width:100px" | 011 ! style="width:100px" | 100 ! style="width:100px" | 101 ! style="width:100px" | 110 ! style="width:100px" | 111 ! style="width:150px" | Format ! 000 X ! 001 X ! 010 X ! 011 X ! rowspan="3" | 100 0 100 1 ! 101 X ! 110 X ! 111 X
 * MOV || ADD  || SUB  || CMP  || SHL  || SHR  || JMP  || SAR  || rowspan="2" | I(R,r)
 * MUL || DIV  || MULU || DIVU || OR   || AND  || XOR  || NOT
 * MOV || ADD  || SETF || CMP  || SHL  || SHR  ||      || SAR  || rowspan="2" | II(imm5,r)
 * TRAP || RETI || HALT ||     || LDSR || STSR ||      || Bit str.
 * colspan="8" | Bcond || rowspan="3" |III(disp9)
 * BV   || BZ/BE  || BN(BS) || BLT || BNV     || BNZ/BNE || BP(BNS)  || BGE
 * BC/BL || BNH   || BR || BLE || BNC/BNL || BH      || NOP || BGT
 * BC/BL || BNH   || BR || BLE || BNC/BNL || BH      || NOP || BGT
 * BC/BL || BNH   || BR || BLE || BNC/BNL || BH      || NOP || BGT
 * MOVEA|| ADDI || JR  || JAL  || ORI  || ANDI || XORI || MOVHI|| IV/V
 * LD.B || LD.H ||     || LD.W || ST.B || ST.H ||      || ST.W || VI(disp16[R],r)
 * IN.B || IN.H || CAXI || IN.W || OUT.B|| OUT.H|| Float || OUT.W|| VI/VII
 * }
 * is an alias of.
 * is an alias of.

V850 (1st Gen.)

 * 1st map opcodes

 * {| class="wikitable" style="text-align:center;font-size: 80%"

! style="width:100px" | Bit [7:5] [10:8] ! style="width:100px" | 000 ! style="width:100px" | 001 ! style="width:100px" | 010 ! style="width:100px" | 011 ! style="width:100px" | 100 ! style="width:100px" | 101 ! style="width:100px" | 110 ! style="width:100px" | 111 ! style="width:150px" | Format ! 000 ! 001 ! 010 ! 011 ! 100 ! 101 ! 110 ! 111
 * MOV || NOT  || DIVH  || JMP  || style="background: yellow;" | SATSUBR
 * style="background: yellow;" | SATSUB || style="background: yellow;" | SATADD || MULH || rowspan="2" | I(R,r)
 * OR  || XOR  || AND  || TST  || SUBR || SUB  || ADD || CMP
 * MOV || style="background: yellow;" | SATADD || ADD || CMP || SHR  || SAR  || SHL || MULH  ||  II(imm5,r)
 * colspan="4" | SLD.B || colspan="4" | SST.B || IV(disp7[ep],r)
 * colspan="4" | SLD.H || colspan="4" | SST.H || IV(disp8[ep],r)
 * colspan="4" | Bit[0] SLD.W / SST.W || colspan="4" | Bit[3:0] Bcond || IV/III
 * ADDI || MOVEA || MOVHI|| style="background: yellow;" | SATSUBI|| ORI || XORI || ANDI || MULHI|| VI(disp16[R],r)
 * LD.B || 2nd Map || ST.B || 2nd Map || colspan="2" | JARL
 * Bit[15:14] SET1/NOT1 /CLR1/TST1 || 2nd Map Extension || V/VII/VIII
 * }
 * is an alias of.
 * is an alias of.

 * 2nd map opcodes

 * {| class="wikitable" style="text-align:center;font-size: 80%"

! style="width:100px" | Bit [23:21] ! style="width:100px" | 000 ! style="width:100px" | 001 ! style="width:100px" | 010 ! style="width:100px" | 011 ! style="width:100px" | 100 ! style="width:100px" | 101 ! style="width:100px" | 110 ! style="width:100px" | 111 ! style="width:150px" | Format ! [16] !! colspan="8" | 1st Map Bit[10:5]=111001 !! ! 0 ! 1 ! [16] !! colspan="8" | 1st Map Bit[10:5]=111011 !! ! 0 ! 1 ! [26:24] !! colspan="8" | 1st Map Bit[10:5]=111111 !! ! 000 ! 001 ! 01X ! 1XX
 * colspan="8" | LD.H || VII
 * colspan="8" | ST.H || VII
 * colspan="8" | LD.W || VII
 * colspan="8" | ST.W || VII
 * SETF || LDSR || STSR || undef || SHR || SAR  || SHL  || undef || IX(R,r)
 * TRAP || HALT || RETI || 1st Map Bit[15:13] EI/DI undef
 * colspan="4" | Illegal instruction || X
 * colspan="8" rowspan="1" | Illegal instruction || rowspan="1" | —
 * colspan="8" rowspan="1" | Illegal instruction || rowspan="1" | —
 * }
 * }

V850E/E1/ES

 * 1st map opcodes

 * {| class="wikitable" style="text-align:center;font-size: 80%"

! style="width:100px" | Bit [7:5] [10:8] ! style="width:100px" | 000 ! style="width:100px" | 001 ! style="width:100px" | 010 ! style="width:100px" | 011 ! style="width:100px" | 100 ! style="width:100px" | 101 ! style="width:100px" | 110 ! style="width:100px" | 111 ! style="width:150px" | Format ! rowspan="4" | 000 ! 001 ! rowspan="2" | 010 ! 011 ! 100 ! 101 ! rowspan="2" | 110 ! 111
 * rowspan="1" | —† || rowspan="4" | NOT  || SWITCH || JMP
 * ZXB || SXB || ZXH || SXH || I(R,r0)
 * rowspan="3" | MOV   || DBTRAP
 * rowspan="3" | Bit[4] SLD.BU /SLD.HU || rowspan="3" | SATSUBR
 * rowspan="3" | SATSUB || rowspan="3" | SATADD || rowspan="3" | MULH
 * I(R0,r31) / IV
 * undef || I(R0,r) / IV
 * DIVH || I(R,r) / IV
 * undef || I(R0,r) / IV
 * DIVH || I(R,r) / IV
 * DIVH || I(R,r) / IV
 * OR  || XOR  || AND  || TST  || SUBR || SUB  || ADD || CMP || I(R,r)
 * colspan="2" | CALLT || rowspan="2" | ADD || rowspan="2" | CMP
 * rowspan="2" | SHR  || rowspan="2" | SAR || rowspan="2" | SHL || undef  || II(imm5,r0)
 * MOV || SATADD || MULH || II(imm5,r)
 * MOV || SATADD || MULH || II(imm5,r)
 * colspan="4" | SLD.B || colspan="4" | SST.B || IV(disp7[ep],r)
 * colspan="4" | SLD.H || colspan="4" | SST.H || IV(disp8[ep],r)
 * colspan="4" | Bit[0] SLD.W / SST.W || colspan="4" | Bit[3:0] Bcond
 * IV/III(disp9)
 * rowspan="2" | ADDI || Bit[15:11] MOV(r=0)
 * colspan="2" | Bit[15:11] DISPOSE(r=0)
 * rowspan="2" | ORI || rowspan="2" | XORI || rowspan="2" | ANDI || Bit[15:11] undef
 * rowspan="2" | VI(imm16,R,r) /VI(imm32,R) /XIII
 * MOVEA || MOVHI || STASUBI || MULHI
 * MOVEA || MOVHI || STASUBI || MULHI
 * LD.B || 2nd Map || ST.B || colspan="3" | 2nd Map
 * Bit[15:14] SET1/NOT1 /CLR1/TST1 || 2nd Map
 * VII(disp16[R],r) /VIII(imm3,disp16[R])
 * }
 * †  is an alias of.
 * †  is an alias of.

 * 2nd map opcodes

 * {| class="wikitable" style="text-align:center;font-size: 80%"

! style="width:100px" | Bit [23:21] [16, 26:24] ! style="width:100px" | 000 ! style="width:100px" | 001 ! style="width:100px" | 010 ! style="width:100px" | 011 ! style="width:100px" | 100 ! style="width:100px" | 101 ! style="width:100px" | 110 ! style="width:100px" | 111 ! style="width:150px" | Format !  !! colspan="8" | 1st Map  Bit[10:5]=111001 !! ! 0 XXX ! 1 XXX !  !! colspan="8" | 1st Map  Bit[10:5]=111011 !! ! 0 XXX ! 1 XXX !  !! colspan="8" | 1st Map  Bit[10:5]=11110X !! ! 0 XXX ! 1 XXX !  !! colspan="8" | 1st Map  Bit[10:5]=111111 !! ! 0 000 ! 0 001 ! 0 010 ! 0 011 ! 0 10X ! 1 XXX
 * colspan="8" | LD.H || rowspan="2" | VII(disp16[R],r)
 * colspan="8" | ST.H
 * colspan="8" | LD.W || rowspan="2" | VII(disp16[R],r)
 * colspan="8" | ST.W
 * colspan="8" | 1st Map Bit[15:11]  JR(r=0) / JARL (r≠0)
 * V(disp22)
 * colspan="8" | 1st Map Bit[15:11]  PREPARE(r=0) / LD.BU
 * XIII/VII(disp16[R],r)
 * SETF || LDSR || STSR || undef || SHR || SAR  || SHL
 * Bit[18:17] SET1/NOT1 CLR1/TST1 || IX(R,r) IX(R,[r])
 * TRAP || HALT || Bit[18:17] RETI/CTRET /DBRET /undef
 * 1st Map Bit[15:11] EI/DI undef || colspan="4" | undef || X
 * SASF || Bit[17] MUL(R,r,w) /MULU(R,r,w) || colspan="2" | Bit[17] MUL(imm9,r,w) /MULU(imm9,r,w)
 * colspan="2" | Bit[17] DIVH(R,r,w) /DIVHU(R,r,W)
 * colspan="2" | Bit[17] DIV(R,r,w) /DIVU(R,r,w) || IX(R,r) /XI(R,r,w) /XII(imm9,r,w)
 * CMOV(imm5,r,w) || CMOV(R,r,w) || Bit[18:17] BSW/BSH HSW/undef || undef
 * colspan="4" | Illegal instruction || XI(c,R,r,w) /XII(c,imm5,r,w)
 * colspan="8" rowspan="1" | Illegal instruction || rowspan="1" |
 * colspan="8" | LD.HU || VII(disp16[R],r)
 * }

SoC IP cores
In 1998, NEC started to provide the V850 family as an ASIC core, to expand its ASIC business. In addition, both the V850E1 CPU core named Nx85E and the V850E2 CPU core named Nx85E2, are also used for expanding its ASIC products business. Various SoCs utilize this core. In 2003, for example, Dotcast, Inc. used the NU85E core for a set top box receiver of digital datacasting based on the dNTSC (data in NTSC video method ). This core is fabricated with CB-10 0.25μm 5-layered-metal process technology.

The NA85E2C core, which is developed using a 1.5 V 150 nm CB-12L (UX4L) fabrication process, has many errata (4 pages appendix in preliminary architecture manual, plus a further, 7-page restrictions document ), but which doesn't seem to matter, because this is a product with a long lifespan.

NEC also expanded production of a core using a 130 nm CB-130 (UX5) fabrication process, cell-base IC.

Synopsys DesignWare IP core for V850E was once announced, but support has been discontinued.

FPGA prototyping systems for SoC
FPGA prototyping systems for V850E1, V850E2, and V850E2M core-based SoCs were intensively developed to expand the SoC business. They comprised a V850 CPU core LSI (TEG, or Test Element Group) board and FPGA add-ons. Most SoC products were for mobile equipments, because the power dissipation of original V800-Series RISC architecture was much lower compared with CISC. It is similar to the ARM architecture that is widely used for mobile gadgets.

 * Renesas (NEC): COREBEST (2001)

 * Renesas (NEC): Microssp (2006)

 * Renesas (NEC): Hybrid Emulator (2007)

 * Renesas (NEC): PFESiP EP1 Evaluation Board (2008)

 * Renesas (NEC): PFESiP EP1 Evaluation Board Lite (2008)

 * Renesas (NEC): PFESiP EP3 Evaluation Board (2010): V850E2M CPU core, max. 266 MHz operation

 * Xylon: logicBRICS

Strategic confusion
Around 2011–2014, Renesas Electronics extensively expanded the V850E2 product line, but this high-paced expansion brought much confusion. For example, as of 2018, some have requested that V850E2/xxn products be replaced with RH850/xnx ones.

In addition, in 2012 Renesas started to intensively promote the migration from ten-year-old V850ES/Jx3 product lines to the newly produced V850E2/Jx4, such as for Ethernet and USB applications, but the newer products are not listed on their website, as of 2018.

Currently, Renesas Electronics is designing a "dual" "lockstep" system, but its predecessor NEC V60-V80 had "multiple modular" lockstep mechanism called FRM, either with roll-back by "retry" or with roll-forward by "exception" for each fault detected instruction.

In addition, the NEC V60-V80 has several implementations of UNIX System V port product releases, one of which is "real-time UNIX RX/UX-832" (here, 832 stands for the μPD70832 (V80), not V832). Its multiprocessor implementation is called MUSTARD (Multiprocessor Unix for Embedded Real-Time Systems), which can operate a maximum of 8 processors simultaneously, and its lockstep mechanism was dynamically configurable.

In 2001, both NEC Corporation and Synopsys, Inc., announced they had agreed to promote the V850E as DesignWare IP core. But as of 2018, the V850E is not listed on DesignWare libraries.

Lucent Technologies and Texas Instruments once licensed the V850 and V850E SoC cores, respectively, but those devices cannot be found.

In 2006,Metrowerks developed the CodeWarrior compiler for the V850, which was one of the main compilers for the V850, but around 2010, they discontinued support.

Also in 2006, NEC did not give any roadmap for the V850 family as SoC cores. The V850E2 core, developed in 2004, was described as the last, best core for SoC applications. However, NEC introduced ARM9 (arm v5) and ARM11 (arm v6), especially for mobile equipment. This decision suddenly decreased the net profit of LSI devices, because of the royalty for using ARM, and thus price competition with other ARM SoC providers. The sales revenue of "V850 total solutions", such as development tools, real-time OS, middle-ware packages, and in-circuit emulators, also decreased. The number of V850 devices sold also suddenly decreased, because mobile equipment manufacturer were the major customers of V850E1 and V850E2 cores at that moment.

In 2008, KMC (Kyoto Mictocomputer), which is one of the major and of the first providers of in-circuit emulators for the V850 family, announced "exeGCC" being updated from Rel. 3 to Rel. 4, but it excluded the V850 from this updating list, which added PowerPC and ARM v7. KMC chose SH-4A and ARM v7, instead of V850 and RH850, though it had been working closely with NEC and Renesas Electronics.

The V850 CPU cores run uClinux, but on October 9, 2008, Linux kernel support for the V850 was removed in revision 2.6.27., because NEC stopped its maintenance. The person in charge of V850 Linux kernel maintenance was moved from NEC to Renesas by its merger, but his new job was compiler design and never returned to Linux kernel maintenance. This corporate decision prevented the possibility of porting to Android. As of 2018, Renesas Electronics mainly focuses Linux kernel support on SH3/SH4 and M32R processors.

Libraries

 * Red Hat, Inc.: The Newlib for C runtime library (libc.a) and mathematical library (libm.a)
 * C runtime startup routine (crt0.S) for the latest v850e3v5 microarchitecture is available.

 * Micro Digital Inc.: GoFast for NEC V85x Fast Software Floating Point Library
 * The GNU Compiler Collection: Software floating point
 * The GNU Compiler Collection: Decimal floating point (libdecnumber.a)

Operating systems
V850 Operating systems are mostly real-time.

Some operating systems require a memory protection unit (MPU) to divide tasks (or threads) strictly for reliability and safety reasons. In such cases, the v850e2v3 (Gen. 3) microarchitecture, or above, is required.

ITRON based real-time OS
ITRON is an open standard specification of real-time OS (RTOS), which is major in Japan. Its specification is defined under the leadership of Ken Sakamura, as a part of TRON project, the initialr I standing for "Industrial". Because the ITRON specification defines interface and skeleton only, each vendor has its own implementation.

 * Renesas:
 * RI850MP Real-time OS for V850E2M Dual Core
 * RI850V4 V2 Real-time OS for RH850 family
 * RI850V4 V1 Real-time OS for V850 family

 * Toppers Project: Open source TOPPERS/JSP
 * → In 2003, on Rel. 1.3, V850 dedicated part bug was fixed.
 * → Kernel update history
 * A.I. Corporation: Toppers-Pro/xxx
 * T-Engine Project: Open source T-Kernel by TRON Forum
 * eSOL: eT-Kernel; Extended T-Kernel — RTOS for embedded systems
 * eT-Kernel/Compact, eT-Kernel/Embedded, eT-Kernel/POSIX
 * eT-Kernel Multi-Core Edition
 * eCos: Open source real-time operating system

AUTOSAR, OSEK/VDX compliant real-time OS
AUTOSAR is an open systems architecture of operating system for the automotive industry. Its purpose is to standardize electronic control units (ECU) for automotive engines. AUTOSAR is an upward compatible specification of OSEK/VDX, which is also a German consortium established in 1993.

In Japan, this research was started in 2006, as a joint project by JAIST and DENSO. Renesas Electronics joined this project in 2009. Because the current RH850 and V850 processors are principally targeted at the automotive industry, it is a strategical product of Renesas Electronics. However, its documentation is only available in Japanese, as its main customer is Toyota Motor Corporation.

 * Renesas: RV850 (documents are in Japanese only)
 * ETAS GmbH: RTA-OS RH850/GHS, RTA-OSEK V850E/GHS
 * Mentor Graphics (formerly Accelerated Technology, Inc.): Nucleus OSEK
 * HighTec EDV-Systeme GmbH: EB tresos Safety OS
 * Toppers Project: Open source TOPPERS/AUTOSAR
 * eSOL:  AUTOSAR profile

Other real-time OS

 * SYSGO AG:
 * PikeOS; Embedded Virtualization Hypervisor

 * eSOL:
 * Scalable RTOS, Distributed Microkernel Architecture, non-hypervisor type OS

 * MiSPO:
 * NORTi Professional; Real-time OS + TCP/IP stack + Simulator

 * SEGGER
 * embOS V850 NEC, embOS V850 Green Hills, embOS V850 IAR

 * Wind River Systems:
 * VxWorks: Ported in the early 1990s. The Tornado IDE is stated that MP licenses has been sold via NEC in 2000, currently Renesas.

 * Mentor Graphics (formerly ATI, currently A Siemens Business):
 * Nucleus PLUS

Linux

 * uCLinux
 * Linux kernel
 * On October 9th 2008, Linux kernel support for V850 was removed in revision 2.6.27, preventing the possibility of porting Android.

Middleware packages
Various middleware application softwares are provided from various vendors.

 * Renesas: SD Memory Card Control

Compilers and assemblers
Most of the compilers, for both for the V850 family and the RH850 family, are exactly the same product, and extended ISA targets are controlled by command line options.

Compilers for the V850 family and the RH850 family include:
 * The GNU Compiler Collection (the name is still v850 for RH850) developed both:
 * by "Red Hat, Inc." (formerly "Cygnus Solutions") as a part of the GNUPro Developers Kit
 * by "KMC (Kyoto Micro Computer)" as a part of the exeGCC
 * by "CyberTHOR Studios, Ltd.": Free pre-built binaries can be downloaded by registration.

 * Renesas:
 * C Compiler Package for V850 family
 * CA850 C compiler for V850E1 and V850ES (v850e1 and/or v850es, a.k.a. Gen. 1)
 * CX C compiler for V850E2M and V850E2S (v850e2v3, a.k.a. Gen. 3)
 * Software Package for V850 [SP850] for V850E2 (v850e2(v2), a.k.a. Gen. 2)
 * CC-RH C compiler package for G3, G3K(H), G3M(H)

 * GHS (Green Hills Software): The Green Hills Optimizing Compilers

 * Wind River Systems: Diab Compiler

 * IAR Systems: Embedded Workbench

 * Altium Limited: Tasking; RENESAS RH850 SOFTWARE DEVELOPMENT TOOLS

 * HighTec EDV Systeme GmbH: HighTec Development Platform

 * GAIO Technology: XASS-V Series cross development tools

 * Metrowerks: CodeWarrior (obsoleted)

Disassemblers
Usually, dis-assemblers are provided as a part of C compiler or assembler packages.

 * The GNU Binutils: objdump (v850-elf-objdump or v850-elf32-objdump)
 * Radare2: Radare2 is a set of command-line tools for reverse engineering. Open-source code is available from GitHub repository.

 * IDA Pro: IDA Pro is a freeware disassembler for hobby use. A plugin for V850 is available. Download site is gray for securities.

GUI based debuggers
GUI based program debuggers are mainly provided for debugging of compiled source codes. Usually, it is used with instruction set simulators or in-circuit emulators.

 * Renesas:
 * ID850: For the combination of CA850 compiler and SM850 instruction set simulator.
 * ID850NW: For the combination of N-Wire based in-circuit emulators.
 * ID850QB: For the combination of probing-pod based emulator IEQUBE2
 * NDK (Naito Densei Kogyo Co. Ltd, Group): Operation started in 1950 as subsidiary of NEC.
 * NW-V850-32
 * GHS (Green Hills Software): Multi: General-purpose debugger.
 * Red Hat, Inc.: Insight (GDB-Tk): GUI front-end tightly combined with GNU Debugger.
 * Mentor Graphics (formerly Accelerated Technology, Inc.): code|lab Developer Suite
 * By N-Wire based in-circuit emulator vendors:
 * KMC (Kyoto Microcomputer) and Midias Lab.: PARTNER
 * Sohwa & Sophia Technologies:WATCHPOINT
 * DTS INSIGHT (formerly YDC, Yokogawa Digital Computer): microVIEW-PLUS
 * Computex: CSIDE

Instruction set simulators
Instruction set simulator, in other words, Virtual Platform is provided to perform debugging without equipment's hardware before testing on a real machine.
 * Renesas: SM850
 * Open Virtual Platform: Instruction set simulator
 * Synopsys: VDK for Renesas RH850 MCU

Automated code reviewers
Automated code reviewer, in other words, source code analyzer qualify the level of completeness of written software source code. This method is classified as dynamic code analysis and static code analysis.

Dynamic code analyzers with simulators

 * Renesas: TW850
 * TW850 Performance Analysis Tuning Tool is a general utility to improve effectiveness of software.

 * Renesas: AZ850
 * AZ850 System Performance Analyzer is a utility for RX850 real-time operating system to evaluate effectiveness of application programs.

 * Gaio Technology: Coverage Master winAMS
 * Coverage Master winAMS is a source code coverage measurement tool.

Static code analyzers

 * GHS (Green Hills Software): DoubleCheck ISA (Integrated Static Analysis) tool

 * Rogue Wave Software, Inc: Klocwork

IDE (Integrated Development Environments)
IDE, Integrated Development Environment, is a framework to provide software development functions.

 * Renesas: CS+ (formerly CubeSuite+)
 * GHS (Green Hills Software): Multi
 * Eclipse Plugins
 * GNU Compiler Collection (GCC) and GNU Debugger (GDB)
 * Wind River Workbench (formerly Tornado)

ICE (In-circuit emulators)
Most in-circuit emulators, such as Renesas's IE850 (formerly IECUBE2), can be used for both the V850 family and the RH850 family, but may require firmware updating. The latest "trace function" of the JTAG (N-Wire ) based in-circuit emulator is upgraded from the N-Trace (single-ended signaling) to the Aurora Trace (differential signaling).

Full probing pod type
Full probing pod type in-circuit emulator is sometimes called full ICE or legacy ICE.

 * Renesas IE850 (formerly IECUBE2)
 * Naito Densei Machida Mfg. Co., Ltd. (Operation started as NEC's subsidiary.)
 * Asmis brand for custom LSIs.

ROM emulator type

 * Lauterbach: ROM Monitor for V850
 * KMC (Kyoto Microcomputer Co., Ltd.): PARTNER-ET II (obsoleted)

JTAG N-Wire and N-Trace type
N-Wire and N-Trace is a JTAG-based debugging interface specification, which circuit implementation is called TAP Controller (Test Access Port controller), primarily compiled by Philips N.V. (currently NXP Semiconductors). But it is perhaps not disclosed publicly in its earlier stage. As the result, each semiconductor and in-circuit emulator vendor implemented similar interfaces independently. Nowadays, it is standardized by IEEE 1149.1 Working Group.

 * Renesas
 * E1 Emulator: USB 2.0 based affordable compact housing equipment.
 * PCMCIA N-Wire Card IE-V850E1-CD-NW

 * Naito Densei Machida Mfg. Co., Ltd. (Operation started as NEC's subsidiary.): Asmis brand.
 * Midas Lab.: RTE-2000H with PARTNER debugger
 * Lauterbach: Trace32
 * BlueBox iC5000 and iC5700
 * IAR Systems
 * DTS INSIGHT (formerly YDC; Yokogawa Digital Computer): adviceLUNA II

 * Computex: PALMiCE3 V850
 * Sohwa & Sophia Technologies: Universal Probe Blue with WATCHPOINT debugger
 * KMC (Kyoto Microcomputer Co., Ltd.): PARTNER-Jet (obsoleted)

Nexus and Aurora trace type
Nexus or IEEE-ISTO 5001-2003 is a standard debugging interface for embedded systems. Aurora is a high speed signal transfer specification. Its data link layer communications protocol is a point-to-point serial links, and physical layer is a high speed differential signaling.

 * Lauterbach: Trace32: PowerTrace for NEXUS
 * BlueBox iC5000 and iC5700 (Nexus), iC6000 (Aurora)

Flash ROM programmers
Because the V850 family is developed as a single chip microcontroller, every product integrates non-volatile memory. In its first stage, it was one-time programmable or UV EPROM type, but in V853, V850/xxn Series, and later, it becomes flash memory type.

Gang writers (gang programmers)
A gang writer, or a gang programmer, is an old terminology for programmable ROM writers, or programmers. Its name comes from that it steals the binary code from one device, and write it to several others simultaneously. This read device is sometimes called a master device. For mass production use, a dedicated attachment board with "a set of sockets", i.e. "a gang", is needed. As usual, instead of a programmed master device, an object code file can be copied from a PC via download cable, or from a USB stick. Most gang writers accept ASCII-format files such as Intel HEX and Motorola SREC, or binary format files such as ELF.

This method is suitable for mass production.

 * TESSERA Technology Inc.: Stick GANG Writer

Programming service providers
Flash ROM programming service providers exist in most countries.

 * Minato Holdings, Inc.

 * Minato Holdings, Inc. (in Japanese) is a Japanese company that started as an automated test equipment vendor for memory LSIs. Nowadays, it provides flash ROM programming services for various devices, including V850 and RH850, with its own gang writers and full automatic device handler machines.

On board programming with ICE
Most JTAG-based in-circuit emulators have an on board flash ROM programming function via a debug port, which may be according to IEEE standard 1532-2002, a standard for in-system configuration of programmable components.

Direct connection via RS-232C
If the target board has a RS-232C connector and a transceiver (driver/receiver) IC, such as ICL32xx, for the UARTx peripheral function of V850 device, flash ROM programming with a directly connected PC might be available (depends on devices ). The Renesas Flash Programmer software V2 or V3 is required.

Dedicated on board programmer
On-board programming is also available via UARTx or CSIx+HS peripherals on V850 devices by using dedicated programmer hardware (depends on devices ).

 * Renesas: PG-FP6

Ancient PROM writers
To program V851 and V852, an ancient PROM programmer with dedicated adapter is required.

 * Renesas PG-1500 (obsoleted)
 * Renesas PG-1500 is a programmable ROM writer compatible with 27C1001A devices, UV EPROM, or one-time PROM (OTP). This writer reads a silicon signature from each device before programming, by asserting 12.5 V to the A9 (address #9) terminal. It must NOT be used for modern flash ROM burning.

Gray zone tools
Some gray zone hacking tools exist for V850 on car dashboards.

 * VVDI PROG.:
 * OBDexpress

Evaluation boards

 * Renesas: TK-850: The name is influenced by nostalgia for the TK-80 8080-based training kit.

title: V850


text:
Jumpers (play)

Jumpers is a play by Tom Stoppard which was first performed in 1972. It explores and satirises the field of academic philosophy by likening it to a less-than-skilful competitive gymnastics display. Jumpers raises questions such as "What do we know?" and "Where do values come from?" It is set in an alternative reality in which some British astronauts have landed on the Moon and "Radical Liberals" (read pragmatists and relativists) have taken over the British government (the play seems to suggest that pragmatists and relativists would be immoral since Archie says that murder is not wrong, merely "antisocial"). It was inspired by the notion that a crewed Moon landing would ruin the Moon as a poetic trope and possibly lead to a collapse of moral values. It has been said that Jumpers is "a play often dismissed as too clever by half", but a number of other writers have listed it among Stoppard's highest achievements.

Plot
A significant element of the play is George's unavailing efforts to define 'Good' and other philosophical abstractions in which he demonstrates his foolishness and lack of connection with the real world.

The bathetic climax comes when George, firing an arrow to demonstrate Zeno's paradox, accidentally shoots dead a pet hare that he uses to model the fable of The Hare and the Tortoise. Blinded by grief, he steps on and crushes the tortoise, which forms the other part of the demonstration.

The British Moon landing parodies the 1910-1913 Terra Nova expedition to the South Pole led by Robert Falcon Scott since the astronauts, rather than dying together, turn on one another in adversity.

Productions
The play was first performed by the National Theatre Company at the Old Vic Theatre, London, on 2 February 1972 with Michael Hordern and Diana Rigg in the leading roles of George and Dorothy. Peter Wood directed the original production, and Carl Toms designed its sets and costumes.

The Melbourne Theatre Company (MTC), in Australia, staged the play in 1972.

The play premiered on Broadway on 22 April 1974 at the Billy Rose Theatre and closed on 1 June 1974 after 48 performances. Directed again by Peter Wood, with choreography and staging by Dennis Nahat and original music by Claus Ogerman, it featured Brian Bedford and Jill Clayburgh. Bedford won the Drama Desk Award, Outstanding Performance.

In 1984, Nicholas Hytner directed a production at the Royal Exchange, Manchester, with Tom Courtenay as George, Julie Walters as Dotty and John Bennett as Archie.

A revival directed for the Royal National Theatre by David Leveaux opened in London's Lyttelton Theatre on June 19, 2003. The show transferred to Broadway on 25 April 2004, playing at the Brooks Atkinson Theatre, and closed on 11 July 2004 after 89 performances and 23 previews. The Broadway show featured Simon Russell Beale as George and Essie Davis as Dotty. The play received a Tony Award nomination for Best play revival.

Reception
The London premiere of Jumpers garnered praise, and the play began a second run (at the National Theatre) by 1976, but Jumpers, according to Paul Delaney, "came over to the United States in an indifferently received production; and in 1975, it was subjected to a disastrous Chicago area premiere at the Evanston (later to become Northlight) Theatre." Detractors first "faulted the play as a 'shallow display of stage pyrotechnics' and admirers praised it for 'a dazzling display of virtuosity'". Kenneth Tynan in 1977 described Jumpers as Stoppard's masterpiece up to that point, and Delaney agreed by arguing that the character of Moore was neither Stoppard's masterpiece nor the comic butt of the farce and that the play instead "leads us to a complex vision which precludes a simple yes or no answer to the question of whether Stoppard comes down on George's side". Benedict Nightingale lauded the play as achieving a combination of social criticism and metaphysics "with a theatrical extravagance that verges on the outrageous, [and] with a nice sense of individual character".

Michael Hinden in 1981 dubbed Jumpers "Stoppard's most ambitious work", noted the many references to other literary figures and philosophers and referred to it as a very literate play "which ties itself by many threads to an unraveling tradition of literature and thought. [...] few contemporary plays are as passionate or as intelligently written". Richard Christiansen praised the "sparkling wit and dark despair" of the text. Despite describing the Court Theatre performance he attended as somewhat uninvolving, Christiansen argued that "Stoppard keeps [the play's] disparate forces laced together with bouncy wordplay and knockabout comedy". Nigel Purse in Tom Stoppard's Plays lauded the play for thematic devices and the humour that reflect or enhance the themes: "the seeming chaos actually has an explanation within the framework of the debate on morality". Bill Alexander's 1999 production was derided by critics, but the play itself was still praised in The Independent as having "spry mental gymnastics".

Theresa Montana Sabo said that "the action of the play dramatizes in many rich and funny ways the philosophical issues which George develops in his monologues and arguments". The Independent 's Robert Hanks, discussing the play in 2003, said that some plot points anticipated a cabinet reshuffle by Tony Blair (which was described as revealing a thirst for radical constitutional reform ), and praised "the pathos of George's situation". The critic found the philosophy dated: "The kind of penny-plain, positivist approach to morality Stoppard resents has long been out of style". Still, Hanks dubbed Jumpers "a marvellous display of Stoppard's verbal ingenuity, with some beautifully contrived cross-purposes and neat gags". In 2003, The Guardian 's Michael Billington said that the politics are dated and that "his play is best in tracing the collapse of a dysfunctional marriage and the incremental humiliation of its hero".

In 2004, Elysa Gardner of USA Today described the work as "a freewheeling farce with a soulful, searing conscience". She argued that Moore "delivers discourses that are at once searching, provocative and devastatingly funny. [...] Stoppard rejects the notion that religious and spiritual conviction automatically translate into anti-intellectualism". Ben Brantley of The New York Times billed Jumpers as "a poignant acknowledgment of the limits of cleverness [...] Like George, 'Jumpers' can seem all too swept up in its own cerebral whimsy. But it is also like George in the seriousness that underlies its diverting surface". Brantley said that it is "less a showoff demonstration of what Mr. Stoppard knows than a humble contemplation of what he and all humankind can never know". Gabrielle Kloppers of Bwog praised "its convincing character portrayals and boundless sexual innuendo".

Variety's Charles Isherwood praised a 2004 production but had more mixed views on the play itself. He lauded George's sustained ignorance of the violent act central to the plot as a "supremely funny running gag". However, Isherwood wrote, "Stoppard's writing is often needlessly verbose here, and the ideas in 'Jumpers' are not as elegantly integrated into the proceedings as they are in later plays like Arcadia and The Invention of Love".

Some reviewers have criticised the play. Jonathan Bennett argued, "Rosencrantz does not parade its philosophical content; but the philosophy is there all the same, and it is solid, serious and functional. In contrast with this, the philosophy which is flaunted throughout Jumpers is thin and uninteresting, and it serves the play only in a decorative and marginal way". David Finkle complained that Stoppard "abruptly closes his bag of tricks". He argued the work may have a message but gave the impression that "Stoppard had himself a tempting set-up and took it as far as he could [...] He has enough steam to get through the first act but he doesn't know what to do in the second act". Finkle called the dream sequence "overwrought and underwritten; it also shifts focus away from George".

Criticizing Stoppard's right-leaning politics, Malcolm Johnson called Jumpers a "complex, even convoluted text" and wrote, "Because of Stoppard's overwrought cleverness, 'Jumpers' can be trying at times. And sometimes it fails to fit together persuasively". Lizzie Loveridge wrote, "Whilst Jumpers is a comedy with the usual string of brilliant Stoppardian witticisms and clever observations, it is quite difficult to follow as an integrated whole. [...] Reading the play as text is difficult in places because of the interjection of the numerous and bizarre stage directions which are hard to visualise when you haven't seen them and harder to interpret when you have." Brian Clover argued that another critic's view of Stoppard's writing as "indefatigably facetious" could be applied to Jumpers. Clover said that in the first act the playwright sometimes "seems to be emptying out all the aphorisms in his notebook rather than writing. The second act works at a better pace and gels as a piece of theatre though not as drama, since the issues raised in the first half, both human and abstract, remain unresolved".

license: Creative Commons - Attribution Share-Alike - https://creativecommons.org/licenses/by-sa/4.0/

title: Jumpers (play)


text:
Category:Members of Consumers International

These organizations are all members of Consumers International.


text:
Airdrie and Shotts (Scottish Parliament constituency)

Airdrie and Shotts (Gaelic: An t-Àrd-Ruigh agus Shotts) is a constituency of the Scottish Parliament covering part of the council area of North Lanarkshire. It elects one Member of the Scottish Parliament (MSP) by the plurality (first past the post) method of election. It is also one of nine constituencies in the Central Scotland electoral region, which elects seven additional members, in addition to the nine constituency MSPs, to produce a form of proportional representation for the region as a whole.

The seat has been held by Neil Gray of the Scottish National Party since the 2021 Scottish Parliament election.

Electoral region
The other eight constituencies of the Central Scotland region are: Coatbridge and Chryston, Cumbernauld and Kilsyth, East Kilbride, Falkirk East, Falkirk West, Hamilton, Larkhall and Stonehouse, Motherwell and Wishaw and Uddingston and Bellshill.

The region covers all of the Falkirk council area, all of the North Lanarkshire council area and part of the South Lanarkshire council area.

Constituency boundaries and council area
The constituency was created at the same time as the Scottish Parliament, in 1999, with the name and boundaries of an existing Westminster constituency. In 2005, however, Scottish Westminster (House of Commons) constituencies were mostly replaced with new constituencies.

The Holyrood constituency is one of four covering the North Lanarkshire council area, the others being Coatbridge and Chryston, Cumbernauld and Kilsyth, Motherwell and Wishaw and Uddingston and Bellshill, the last of which spans parts of both North and South Lanarkshire. All five are within the Central Scotland electoral region.

The electoral wards used in the creation of Airdrie and Shotts are:

 * In full: Airdrie Central, Airdrie North, Airdrie South, Fortissat


text: User talk:68.82.90.146

title: User talk:68.82.90.146


text:
User:Kingfreeze

Bold textItalic textKingFreeze is a Hip Hop Producer,MC & Engineer in Okinawa,Japan born in Fort Worth,TX in the lower southeast neighrhood of Forest Hill.

title: User:Kingfreeze


text:
Ross Edwards (cricketer)

Ross Edwards (born 1 December 1942) is a former Australian cricketer. Edwards played in 20 Test matches for Australia, playing against England, West Indies and Pakistan. He also played in nine One Day Internationals. He was a part of the Australian squad which finished as runners-up at the 1975 Cricket World Cup. He was a right-handed batsman and superb cover fielder as well as a part-time wicket-keeper.

Edwards was born on 1 December 1942 in Cottesloe, Western Australia. His father, Edmund Edwards, played twice for Western Australia as a wicket-keeper.

In the 1971–72 Sheffield Shield season he made four centuries and went to England in 1972 at the age of 29 and got his first chance at Nottingham where he made an unbeaten 170. He made ducks in his next two innings however.

In 1974–75 Edwards scored his second century against England when he hit 115 in the Perth Test match. He made 99 at Lord's in 1975.

title: Ross Edwards (cricketer)


text:
Talk:Clarence "Gatemouth" Brown

Duplicate: Gatemouth Brown
A duplicate of this article exists at Gatemouth Brown.--Commander Keane 12:28, 10 October 2005 (UTC)
 * Wow, thanks for pointing that out. I have redirected that article and am merging now. -- Dave C.talk 14:59, 10 October 2005 (UTC)

Zappa's favorite guitarist?
Gatemouth was Zappa's favorite? I thought it was Johnny Guitar Watson. Does anybody have his autobiography handy? Drumsac 20:02, 29 December 2005 (UTC)

Video project
Brown did the tunes for a video about a cloud seeding project in Colorado made by the Dept. of the Interior. I'm not sure if this is worthy of inclusion in the article, but it certainly is odd. http://video.google.ca/videoplay?docid=7475204349390972595&q=mountain+skywater. Lowerarchy 01:59, 29 October 2006 (UTC)

Copyright problem removed
Prior content in this article duplicated one or more previously published sources. The material was copied from: http://www.allmusic.com/artist/clarence-gatemouth-brown-mn0000129547/biography. Copied or closely paraphrased material has been rewritten or removed and must not be restored, unless it is duly released under a compatible license. (For more information, please see "using copyrighted works from others" if you are not the copyright holder of this material, or "donating copyrighted materials" if you are.) For legal reasons, we cannot accept copyrighted text or images borrowed from other web sites or published material; such additions will be deleted. Contributors may use copyrighted publications as a source of information, but not as a source of sentences or phrases. Accordingly, the material may be rewritten, but only if it does not infringe on the copyright of the original or plagiarize from that source. Please see our guideline on non-free text for how to properly implement limited quotations of copyrighted text. Wikipedia takes copyright violations very seriously, and persistent violators will be blocked from editing. While we appreciate contributions, we must require all contributors to understand and comply with these policies. Thank you. Diannaa (talk) 01:13, 21 January 2014 (UTC)

External links modified
Hello fellow Wikipedians,

I have just modified one external link on Clarence "Gatemouth" Brown. Please take a moment to review my edit. If you have any questions, or need the bot to ignore the links, or the page altogether, please visit this simple FaQ for additional information. I made the following changes:
 * Added archive https://archive.is/20130131031103/http://www.orangeleader.com/homepage/images_sizedimage_259174549/resources_photoview to http://www.orangeleader.com/homepage/images_sizedimage_259174549/resources_photoview

When you have finished reviewing my changes, you may follow the instructions on the template below to fix any issues with the URLs.

Cheers.— InternetArchiveBot  (Report bug) 21:17, 8 August 2017 (UTC)

title: Talk:Clarence "Gatemouth" Brown


text:
Tsegihi

Tsegihi is a bright region in Titan's southern mid-latitudes. It is centered at -40°N, -10°W

Tsegihi is named for a sacred place of the Navajo. The first line in the Navajo Nightsong Tsegihi, The House Made of Dawn runs:

 * In Tsegihi, oh you who dwell
 * In the house made of the dawn...

title: Tsegihi


title: File:NomadLS-1.jpg


text:
Absurd Person Singular

Absurd Person Singular is a 1972 play by Alan Ayckbourn. Divided into three acts, it documents the changing fortunes of three married couples. Each act takes place at a Christmas celebration at one of the couples' homes on successive Christmas Eves.

Production history
The play made its world premiere at the Library Theatre, Scarborough on 26 June 1972 and its London début at the Criterion Theatre on 4 July 1973, transferring to the Vaudeville Theatre in September 1974, completing a run of 973 performances.

Its official New York Broadway début was at the Music Box Theatre on 8 October 1974. It ran for 591 performances in its first run on Broadway (through March 1976). It starred Richard Kiley, Geraldine Page, Sandy Dennis, Carole Shelley, Larry Blyden, and Tony Roberts. It was revived on Broadway on 18 October 2005 at the Biltmore Theatre, for 56 performances.

In 1994 James Maxwell directed a production for the Royal Exchange, Manchester with Trevor Cooper, Margo Gunn, Denys Hawthorne, Patrick O'Kane and Amanda Boxer.

The BBC produced a television drama, adapted from the play, first broadcast on 1 January 1985. It was directed by Michael Simpson and starred John Baddeley, Cheryl Campbell, Michael Gambon, Nicky Henson, Lesley Joseph, Maureen Lipman, Geoffrey Palmer and Prunella Scales.

The play was revived in the West End at the Whitehall Theatre, May 1990; and at the Garrick Theatre in December 2007.

A new production was staged during May 2011 at the new Curve Theatre in Leicester, starring Tracy-Ann Oberman and Louise Plowright and directed by Paul Kerryson.

The play was revived once again at the Stephen Joseph Theatre in Scarborough – 40 years after its original run there, in 2012.

The play returned to New York for a limited season in December 2019 with an all-British cast at Theatre Row, Off-Broadway. It was the first major revival in the city for almost fifteen years and transferred back to the UK in January 2020, at the Lawrence Batley Theatre, Huddersfield, in Ayckbourn's native county of Yorkshire. It was directed by John Cotgrave and starred Maria Sykes, Adam Elms, Claire Marlein, Alex Thompson, Eve Burley, and Joshua Nutbrown.

Sidney
A contractor eager for social and professional advancement, Sidney will do anything to impress his perceived superiors—at the expense of his marriage. Sidney is socially inept, and shares that innocence with his wife, keeping their marriage together. As the play progresses, he becomes wealthier and wealthier, until eventually the friends he was once desperate to impress are now courting him as their own fortunes sink lower and lower. By the final act success has transformed Sidney's innocence into something approaching macabre sadism: in the earlier acts, the other couples view him with indulgent contempt and tolerate his childishness, but as the play progresses and he acquires money and power, they find themselves compelled to take him much more seriously, until self-preservation dictates they play along with his games.

Jane
Jane is the most sympathetic character in the play. Sidney's loyal wife, also in her 30s, she is not much brighter than he is, but is equally eager to please. Unlike Marion and Eva, she also has a knack for housework, in which she takes refuge from the complexities and difficulties of the world. She takes most of her social cues from her lover, and would do almost anything to help him succeed, but is not motivated by greed or social standing: she just wants a comfortable living and a happy family. In the final act, Jane seems to lose a sense of identity, parroting her husband's enthusiasm in his macabre party game. Like her husband, Jane also lacks sensitivity to others' feelings. Her habit of breaking into song when cleaning is also a clue that she is happiest when she is cleaning and that it is an escape from her real life. Jane represents the stereotypical TV commercial wife.

Geoffrey
An architect by trade, Geoffrey is initially on the way up, only to fall from grace after a design fails and collapses between the second and third acts. A confident man and something of a Jack-the-Lad, he has many casual affairs and could be said to flaunt it. His indifference towards his wife Eva may have led to her addiction to anti-depressants, and even to cause her suicide attempts in the second act. However, by the third act, he is an utterly broken man: his confidence and charisma have been dashed by his career grinding to a halt, and the prospect of Sidney being the last man on earth willing to hire him doesn't thrill him very much, either.

Eva
Geoffrey's wife. Eva's appearance in the first act is brief and whimsical, establishing only her addiction to anti-depressants and her difficulties with her husband Geoffrey. She comes into her own in the second act, as a very depressed Eva tries repeatedly to kill herself, growing more and more desperate to end it all even as the other characters prevent her from doing so. By the third act she has recovered, dispensed with her addiction to pain-killers, and appears to be teetotal (or at least a much lighter drinker, refusing alcohol even though she's not driving). She has also taken control of her relationship with Geoffrey, setting the course for his business and forcing him into situations he has typically charmed his way out of but which are now unavoidable. By the end of the play she is in perhaps the best position, being in control of her life and her relationship, neither warped by success nor embittered by failure, though she clearly has many practical challenges to overcome.

Ronald
An aging banker, Ronald takes pride in his work and enjoys the finer things in life. More conservative than the other characters, he is wry and sardonic. Initially both indulgent and disdainful of Sidney and Jane—although casually admiring Geoffrey—he is something of a side show in the second act and by the third act is clearly in severe financial trouble, unable to afford even to heat his house. Although he tries to maintain a facade of cheerful aristocratic bluster, his nerves show through, and he is forced to submit to Sidney as the holder of a large business account in Ronald's bank. (In fact, it is implied that Sidney is Ronald's only remaining significant client.)

Marion
Ronald's second wife is charming though snobbish and deeply eccentric. As the play advances more and more of her eccentricities are attributed to alcoholism, climaxing in her thoroughly drunk presence in the third act. Her main role in the play is to reflect and magnify the position of the taciturn Ronald, making his path from polite disdain of Sidney to impoverished failure more clearly elucidated than Ronald's naturally reserved personality would allow.

title: Absurd Person Singular


text:
Wikipedia:Articles for deletion/Robert Wood (physicist)

 * The following discussion is an archived debate of the proposed deletion of the article below. Please do not modify it. Subsequent comments should be made on the appropriate discussion page (such as the article's talk page or on a Votes for Undeletion nomination).  No further edits should be made to this page.

The result of the debate was delete. DS 12:15, 12 October 2005 (UTC)

Robert Wood (physicist)
Non-notable. Delete. utcursch | talk 12:29, 10 October 2005 (UTC)
 * Delete. Non-notable.  Logophile 14:13, 10 October 2005 (UTC)
 * Delete Unverifiable, probable hoax.    Dl yo ns 493   Ta lk   15:32, 10 October 2005 (UTC)
 * Delete nn, vanity and/or hoax, probable in-joke. Xoloz 15:38, 10 October 2005 (UTC)
 * Delete swiftly as a non-verifiable probable hoax. Hall Monitor 17:20, 10 October 2005 (UTC)
 * The above discussion is preserved as an archive of the debate. Please do not modify it. Subsequent comments should be made on the appropriate discussion page (such as the article's talk page or in an undeletion request). No further edits should be made to this page.


text:
User:Exir Kamalabadi/Template:Welcome5

Hello, this is Exir Kamalabadi, and I hope that you are having fun with Wikipedia. First of all, welcome to Wikipedia, the free encyclopedia that anyone can edit! Find something that can be improved, either in content, grammar or formatting, then fix it. Don't be afraid. Be bold! If you do something wrong, there is always someone who will clean up the mess.

Here are some links that you may find helpful:
 * Be bold!
 * Introduction
 * Contributing to Wikipedia
 * The Tutorial, How to edit a page and the Manual of Style
 * Picture tutorial
 * Community Portal. You can get some work over there.
 * The Five Pillars of Wikipedia, the Simplified Ruleset, and What Wikipedia is not
 * Wikiquette, the Wikipedian etiquette

Here are also some tips that you might find useful:
 * Sign your posts on talk pages using four tildes ( ~ )
 * Create a User page so that others can know you
 * Add yourself to the list of Wikipedians
 * Go to the Village Pump or the Help Desk if you need Wikipedia related help, or the Reference Desk for general questions.

Finally, feel free to leave me a message on my talk page when you need help!

Exir KamalabadiEsperanza

title: User:Exir Kamalabadi/Template:Welcome5


text:
Angus (Scottish Parliament constituency)

Angus was a constituency of the Scottish Parliament (Holyrood). It elected one Member of the Scottish Parliament (MSP) by the first past the post method of election. Also, however, it was one of nine constituencies in the North East Scotland electoral region, which elects seven additional members, in addition to nine constituency MSPs, to produce a form of proportional representation for the region as a whole.

From the Scottish Parliament election, 2011, the Angus council area was covered by two separate constituencies; Angus North and Mearns and Angus South

Electoral region
Until 2011 the other eight constituencies of the North East Scotland region were: Aberdeen Central, Aberdeen North, Aberdeen South, Banff and Buchan, Dundee East, Dundee West, Gordon and West Aberdeenshire and Kincardine

The region covered Aberdeenshire, the Aberdeen City council area, the Dundee City council area, part of Angus, a small part of Moray and a small part of Perth and Kinross.

Constituency boundaries and council areas
The Angus constituency was created at the same time as the Scottish Parliament, in 1999, with the name and boundaries of an existing Westminster constituency. In 2005, however, the boundaries of the Westminster (House of Commons) constituency were subject to major alterations.

The Holyrood constituency covered a southern portion of the Angus council area, north-eastern and north-western portions of the Dundee City council area and a small eastern portion of the Perth and Kinross council area. The rest of the Angus council area was covered by the North Tayside constituency. The rest of the City of Dundee area was covered by the Dundee West and Dundee East constituencies, and the rest of the Perth and Kinross area was covered by the North Tayside constituency, the Perth constituency and the Ochil constituency. The North Tayside, Perth and Ochil constituencies were all within the Mid Scotland and Fife electoral region.

Boundary review
Following the First Periodic review of constituencies to the Scottish Parliament, Angus was split into two newly drawn seats in time for the election in 2011. Thus, it became Angus North and Mearns and Angus South.

Member of the Scottish Parliament
The constituency was represented for its entirety by the Scottish National Party MSP Andrew Welsh.


text:
Legio I Maximiana

The Legio I Maximiana (of Maximian) was a comitatensis Roman legion, probably created by Emperor Diocletian in 296 or 297 AD. The legion was named after Maximianus, a colleague of Diocletian. The I Maximiana was formed together with II Flavia Constantia, to garrison the newly created province Thebaidos, in Aegyptus. As well as protect it from neighboring tribes. Since no Legio I Maximiana is listed as being stationed at Thebes in the Notitia Dignitatum, the designation is interpreted more broadly as of the Thebaid in general. The legion is also known as Maximiana Thebanorum or Thebaeorum ("Maximian legion of the Thebans"). The cognomen Maximiana originated from Maximian, Diocletian's colleague.

In 354, I Maximiana was located in Thrace, in the city of Adrianople. Thus it is likely that it fought in the Battle of Adrianople, in 378, when emperor Valens was defeated by Goths. According to Notitia Dignitatum, the I Maximiana Thebanorum was still under Thracian command at the start of the 5th century, while the I Maximiana was in Philae (Egypt, south of Aswan), under the dux Thebaidos. There exists also a Theban Legion in the legend of Saint Maurice from the 5th century. According to that tradition, this (Prima Maximiana Thebanorum) was a legion from Thebes that was ordered to move by Maximian. Thus it is sometimes related to I Maximiana Thebanorum. However, according to tradition, the Theban Legion of Saint Maurice was martyred in 286, while the I Maximiana was not founded until ten years later.

title: Legio I Maximiana


text:
International Research and Training Centre for Rural Education

The International Research and Training Centre for Rural Education (INRULED) is a training and research centre located in the People's Republic of China. The main sponsors of INRULED are the Chinese government and UNESCO.

INRULED's headquarters are located at Beijing Normal University, where the centre's secretariat is located. It also has a base at Baoding, Hebei Province, located 130 km south of Beijing. An Associate Centre is located at the School of Education of the Nanjing Normal University and also at the Gansu Institute of Educational Research. INRULED conducts research and training in the area of rural education in line with the aims of the Education-for-All programme.

The International Research and Training Centre for Rural Education (INRULED) with its explicit focus on rural education is unique. It was formed in the latter part of 1994 through a Memorandum of Agreement signed between the Government of the People's Republic of China and UNESCO. The centre is commissioned to undertake the following functions:
 * promote international research and development of methods and techniques of rural education;
 * promote consultation and cooperation among Member States by devising policies and strategies in the areas of human resource development for rural areas;
 * create a wide network for exchange of academic and technical information in the field of rural education among experts in various countries;
 * coordinate the cooperative research activities and provide facilities for laboratory research and field work to international experts;
 * organize international training workshops, seminars on special subjects and provide fellowships to international researchers;
 * produce and disseminate publications and materials on the results of the various research projects undertaken by the centre.

The overall planning and execution of programmes and activities of the centre are supervised, monitored and evaluated by the Government of the People's Republic of China through its National Commission for UNESCO, in co-operation with UNESCO through their Cluster Office in Beijing.

The World Education Forum held in Dakar in April 2000 reaffirmed the critical role education plays for poverty reduction (UNESCO, 2000). Programmes and activities organised by INRULED during the last ten years reflect clearly its fundamental emphasis on the development of better understanding of education, which is a key tool for reducing poverty and improving the lives of rural people, particularly of people who live in the developing and least developed countries.

Over the years INRULED has initiated and facilitated a wide range of programmes and activities focused on rural education which have direct bearing on rural development and poverty reduction with linkages to the mid-term and biennium programmes of UNESCO in literacy, continuing education and primary education within the broader framework of Education-for-All (EFA). INRULED is inclusive in these programmes and activities in that it has involved practitioners and specialists from around the World with particular emphasis on South-South participation and collaboration. The products and outcomes of these activities are significant and have resulted in many valuable publications (paper and electronic) and informal networking of a wide range of institutions and professionals whose work focus on development of education in rural areas in developing countries.

Since its inception, three International Advisory Board Meetings were convened and three external evaluation missions were mounted (1999, 2001 and 2003). In February 2009 a new management board was established.

 * The Director is professor Dong Qi
 * The International Director of INRULED: Prof Zhou Nanzhao
 * The Deputy Director of INRULED: Prof Wang Li


text: User talk:Vanished user mdflkmweir234k56us3


text:
Saitek

Saitek is a designer and manufacturer of consumer electronics founded in 1979 by Swiss technologist Eric Winkler. They are best known for their PC gaming controllers, mice, keyboards, and their numerous analogue flight controllers such as joysticks, throttles, and rudder pedals.

Most Saitek products have been rebranded as Logitech G products since their acquisition by the company.

History

Saitek (originally called SciSys until 1987) was founded in 1979 by Swiss technologist Eric Winkler as a manufacturer of electronic chess games. By the 1990s the company had distribution and design offices in the United States, Germany, France and the United Kingdom, as well as a factory in China. In 1994, Saitek acquired Hegner & Glaser's successful Mephisto line of chess computers. Saitek diversified into PC peripherals, focusing on game controllers for flight simulation, driving and first-person gaming. Saitek has also expanded into PC peripherals, with an emphasis on input, connectivity and multimedia. In 2005, Saitek launched a high fidelity audio product line for PC & iPod.

On November 14, 2007, Mad Catz announced that they had purchased Saitek for $30 million.

On September 15, 2016, Logitech announced that they had purchased the Saitek brand and assets from Mad Catz for $13 million in cash.

Pro Flight Controllers

 * Pro Flight Yoke System
 * Pro Flight Throttle Quadrant
 * TPM System

Pro Flight Panels

 * Pro Flight Backlit Information Panel
 * Pro Flight Multi Panel
 * Pro Flight Radio Panel
 * Pro Flight Switch Panel
 * Pro Flight Instrument Panel

Pro Flight Sticks

 * X-56 H.O.T.A.S. System (2018)
 * X-55 Rhino H.O.T.A.S. System (2014)
 * X-65F Flight Combat Control System (2008)
 * X52 Pro Flight Control System (2007)
 * X52 Flight Control System (2004)
 * X45 Digital Joystick and Throttle (2001)
 * X36 Flight Control System (1999), consisting of the X36F Control stick and X35T throttle

Flight Sticks

 * Aviator for PS3, Xbox 360 and PC
 * Cyborg F.L.Y.9 Wireless Flight Stick for Xbox 360/PS3
 * Cyborg F.L.Y 5 Flight Stick for PC
 * Cyborg 2000 Flight Stick for PC
 * Cyborg Evo Flight Stick for PC (2003)
 * ST290 Flight Stick for PC

Pro Flight Rudder Pedals

 * Pro Flight Rudder Pedals
 * Pro Flight Combat Rudder Pedals
 * Cessna Pro Flight Rudder Pedals

Accessories

 * Pro Flight Headset

Cessna Controllers

 * Pro Flight Cessna Yoke System
 * Pro Flight Cessna Trim Wheel
 * Pro Flight Cessna Rudder Pedals

Farming Equipment

 * Heavy Equipment Bundle for PC
 * Heavy Equipment Side Panel for PC

Keyboard

 * Saitek Cyborg programmable keyboard for PC

title: Saitek


text: User talk:81.173.141.202

title: User talk:81.173.141.202


text:
Souvenir (play)

Souvenir is a two-character play, with incidental music, by Stephen Temperley.

Overview
In a Greenwich Village supper club in 1964, Cosmé McMoon flashes back to the musical career of Florence Foster Jenkins, a wealthy socialite with a famously uncertain sense of pitch and key. In 1932, she met mediocre pianist Cosmé McMoon, and the two teamed up in the hope of achieving success. Over the next dozen years, their bizarre partnership yielded hilariously off-key recitals that became the talk of New York, earned them cultish fame. The play culminates in a sold-out performance at Carnegie Hall in 1944, where the audience "turns on her in gales of derisive guffaws."

Judy Kaye plays "the one who gets to hilariously murder the music of Mozart, Verdi, Gounod and Brahms and to wear more of Tracy Christensen's elegant as well as spectacularly silly costumes than a whole ensemble in a more populated musical." The play's title, Souvenir, comes from Jenkins insisting on recording "Queen of the Night" (Mozart), saying that when her voice is not as strong, the recording will make "a lovely souvenir."

Productions
The play was produced by the Off-Broadway York Theatre Company running from November 23, 2004 to January 2, 2005. The production was directed by Vivian Matalon and starred Judy Kaye and Jack Lee.

The play opened on Broadway on November 10, 2005 at the Lyceum Theatre, where it ran for 68 performances and fourteen previews. Directed by Vivian Matalon (who originally suggested the subject matter to Temperley), Judy Kaye and Donald Corren comprised the cast. Kaye was nominated for both the 2006 Tony and 2005 Drama Desk Award for her performance.

The Lyric Stage Company, Boston staged Souvenir in February 2007; their production featured direction by Spiro Veloudos, and starred Leigh Barrett as Jenkins, with Will McGarrahan as Cosmé. Barrett won the Elliot Norton Award - Outstanding Actress in a Musical.

The San Jose Repertory Theater staged the West-Coast premiere of Souvenir in March and April 2008, with Mark Anders playing Cosmé McMoon and Patti Cohenour as Florence Foster Jenkins. San Francisco's American Conservatory Theater staged the play in early 2009, with Judy Kaye and Donald Corren reprising their Broadway roles as Florence Foster Jenkins and Cosmé McMoon, and Vivian Matalon again directing. The Flat Rock Playhouse, Flat Rock, North Carolina staged Souvenir in their 2013 season. Carl Danielsen played Cosmé McMoon and Linda Edwards played Florence Foster Jenkins.

The Fortune Theare, Dunedin, New Zealand; 2014, The NZ Premiere of the play directed by Lara MacGregor, with Angela Johnson as Florence, and Michael Lee Porter as Cosme.

A German translation was shown in 2013 at the Komödie im Bayerischen Hof in Munich with Désirée Nick as Foster Jenkins.

The Milwaukee Repertory Theatre staged a production of Souvenir for their 2017-2018 season in their Stackner Caberet. Marguerite Willbanks played Florence Foster Jenkins and Jack Forbes Wilson played Cosmé McMoon.

Rep Stage in Columbia, Maryland, staged a production of Souvenir for its 2019-2020 season. It starred Actors' Equity Association members Grace Bauer as Jenkins and Alan Naylor as McMoon. Joseph W. Ritsch directed.

title: Souvenir (play)


text:
User:Joakim Larsson~enwiki

Grön

title: User:Joakim Larsson~enwiki


text: Category:Aude

title: Category:Aude


text: Category:Gard

title: Category:Gard


text: User talk:85.96.207.67

title: User talk:85.96.207.67


text: Category:Lozère

title: Category:Lozère


text:
User talk:Gearoid

Welcome!

Hello,, and welcome to Wikipedia! Thank you for your contributions. I hope you like the place and decide to stay. Here are a few good links for newcomers: I hope you enjoy editing here and being a Wikipedian! Please sign your name on talk pages using four tildes (~~); this will automatically produce your name and the date. If you need help, check out Where to ask a question, ask me on my talk page, or place  on your talk page and someone will show up shortly to answer your questions. Again, welcome! --DannyWilde 12:37, 10 October 2005 (UTC)
 * The five pillars of Wikipedia
 * How to edit a page
 * Help pages
 * Tutorial
 * How to write a great article
 * Manual of Style

title: User talk:Gearoid


text: Category:Pyrénées-Orientales

title: Category:Pyrénées-Orientales


text: Category:Indian swimmers

title: Category:Indian swimmers


text:
Category:Government of Wales

 * Wales is a constituent country of the United Kingdom. It has a devolved Senedd (Welsh Parliament) with limited powers. All powers not specifically devolved to the Welsh Government are retained by the central government of the United Kingdom. See Politics of Wales for further details.

title: Category:Government of Wales


text:
Parametric transformer

The Parametric transformer (or paraformer) is a particular type of transformer. It transfers the power from primary to secondary Windings not by mutual inductance coupling but by a variation of a parameter in its magnetic circuit. First described by Wanlass, et al., 1968.

Assuming Faraday's law of induction,

$$v(t) = L \frac{di(t)}{dt} $$ it is possible to obtain a voltage at the secondary winding terminals also thanks to a variation of the inductance, so that

$$v(t) = I \frac{dl(t)}{dt} $$ This can be accomplished by for example modulating the saturation of the core by means of an applied variable magnetic field. It works even if primary and secondary windings magnetic coupling is zero (when the fluxes are mutually orthogonal) (Burian 1972, p. 278).

title: Parametric transformer


text:
User talk:Unluckee

RC Patrol-related Proposals in the 2016 Community Wishlist Survey
Greetings Recent Changes Patrollers!

This is a one-time-only message to inform you about technical proposals related to Recent Changes Patrol in the 2016 Community Wishlist Survey that I think you may be interested in reviewing and perhaps even voting for:

 * 1) Adjust number of entries and days at Last unpatrolled
 * 2) Editor-focused central editing dashboard
 * 3) "Hide trusted users" checkbox option on watchlists and related/recent changes (RC) pages
 * 4) Real-Time Recent Changes App for Android
 * 5) Shortcut for patrollers to last changes list

Further, there are more than 20 proposals related to Watchlists in general that you may be interested in reviewing. (and over 260 proposals in all, across many aspects of wikis)

Thank you for your consideration. Please note that voting for proposals continues through December 12, 2016.

Note: You received this message because you have transcluded User wikipedia/RC Patrol (user box) on your user page. Since this message is "one-time-only" there is no opt out for future mailings.

Best regards, — Delivered: 01:10, 8 December 2016 (UTC)

title: User talk:Unluckee


text:
User:DTNeko

DTNeko, wikipedia user. No-one special.

Hey there. =D

title: User:DTNeko


text: User talk:62.166.55.82

title: User talk:62.166.55.82


text:
User talk:DTNeko

Got something you want to ask / need to talk to be about / correct me on? Did I do something stupid? Or are you just bored?

Then chat away, wheee. Just remember I don't check up here all that often.

Welcome
Welcome!

Hello,, and welcome to Wikipedia! Thank you for your contributions. I hope you like the place and decide to stay. Here are a few good links for newcomers: I hope you enjoy editing here and being a Wikipedian! Please sign your name on talk pages using four tildes (~~); this will automatically produce your name and the date. If you need help, check out Where to ask a question, ask me on my talk page, or place  on your talk page and someone will show up shortly to answer your questions. Again, welcome! -- evrik 20:26, 8 March 2006 (UTC)
 * The five pillars of Wikipedia
 * How to edit a page
 * Help pages
 * Tutorial
 * How to write a great article
 * Manual of Style

Erm, thanks mate. I'm hardly new, though... but eh, if it's how you get support. Neko 22:04, 8 March 2006 (UTC)

Psst
I'm trying to build support for this nomination in its last few days. Please check out this page. Pass it along. Nudge nudge. -- evrik 20:26, 8 March 2006 (UTC)

Orphaned non-free image (Image:AbsyntheLogo.gif)
Thanks for uploading Image:AbsyntheLogo.gif. The image description page currently specifies that the image is non-free and may only be used on Wikipedia under a claim of fair use. However, the image is currently orphaned, meaning that it is not used in any articles on Wikipedia. If the image was previously in an article, please go to the article and see why it was removed. You may add it back if you think that that will be useful. However, please note that images for which a replacement could be created are not acceptable for use on Wikipedia (see our policy for non-free media).

If you have uploaded other unlicensed media, please check whether they're used in any articles or not. You can find a list of 'image' pages you have edited by clicking on the "my contributions" link (it is located at the very top of any Wikipedia page when you are logged in), and then selecting "Image" from the dropdown box. Note that any non-free images not used in any articles will be deleted after seven days, as described on criteria for speedy deletion. Thank you. BetacommandBot 20:59, 14 May 2007 (UTC)

Hey
I notice you're editing your own article - see Autobiography and Conflict of interest.--h i s  s p a c e   r e s e a r c h 15:30, 12 June 2007 (UTC)

Orphaned non-free media (Image:DT2CoverFront.jpg)
Thanks for uploading Image:DT2CoverFront.jpg. The media description page currently specifies that it is non-free and may only be used on Wikipedia under a claim of fair use. However, it is currently orphaned, meaning that it is not used in any articles on Wikipedia. If the media was previously in an article, please go to the article and see why it was removed. You may add it back if you think that that will be useful. However, please note that media for which a replacement could be created are not acceptable for use on Wikipedia (see our policy for non-free media).

If you have uploaded other unlicensed media, please check whether they're used in any articles or not. You can find a list of 'image' pages you have edited by clicking on the "my contributions" link (it is located at the very top of any Wikipedia page when you are logged in), and then selecting "Image" from the dropdown box. Note that all non-free media not used in any articles will be deleted after seven days, as described on criteria for speedy deletion. Thank you. BetacommandBot (talk) 19:36, 17 February 2008 (UTC)

Orphaned non-free media (Image:DTcover.jpg)
Thanks for uploading Image:DTcover.jpg. The media description page currently specifies that it is non-free and may only be used on Wikipedia under a claim of fair use. However, it is currently orphaned, meaning that it is not used in any articles on Wikipedia. If the media was previously in an article, please go to the article and see why it was removed. You may add it back if you think that that will be useful. However, please note that media for which a replacement could be created are not acceptable for use on Wikipedia (see our policy for non-free media).

If you have uploaded other unlicensed media, please check whether they're used in any articles or not. You can find a list of 'image' pages you have edited by clicking on the "my contributions" link (it is located at the very top of any Wikipedia page when you are logged in), and then selecting "Image" from the dropdown box. Note that all non-free media not used in any articles will be deleted after seven days, as described on criteria for speedy deletion. Thank you. BetacommandBot (talk) 19:38, 17 February 2008 (UTC)

title: User talk:DTNeko